tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'tty-6.17-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty

Pull tty/serial fixes from Greg KH:
"Here are some small tty and serial driver fixes for 6.17-rc6 that
resolve some reported problems. Included in here are:

- 8250 driver dt bindings fixes

- broadcom serial driver binding fixes

- hvc_console bugfix

- xilinx serial driver bugfix

- sc16is7xx serial driver bugfix

All of these have been in linux-next for the past week with no
reported issues"

* tag 'tty-6.17-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty:
serial: xilinx_uartps: read reg size from DTS
tty: hvc_console: Call hvc_kick in hvc_write unconditionally
dt-bindings: serial: 8250: allow "main" and "uart" as clock names
dt-bindings: serial: 8250: move a constraint
dt-bindings: serial: brcm,bcm7271-uart: Constrain clocks
serial: sc16is7xx: fix bug in flow control levels init

Linus Torvalds 1519fc7c d6b42787

+42 -46
+31 -25
Documentation/devicetree/bindings/serial/8250.yaml
··· 48 48 oneOf: 49 49 - required: [ clock-frequency ] 50 50 - required: [ clocks ] 51 - 52 51 - if: 53 52 properties: 54 53 compatible: ··· 59 60 items: 60 61 - const: uartclk 61 62 - const: reg 62 - else: 63 + - if: 64 + properties: 65 + compatible: 66 + contains: 67 + const: spacemit,k1-uart 68 + then: 63 69 properties: 64 70 clock-names: 65 71 items: 66 72 - const: core 67 73 - const: bus 74 + - if: 75 + properties: 76 + compatible: 77 + contains: 78 + enum: 79 + - spacemit,k1-uart 80 + - nxp,lpc1850-uart 81 + then: 82 + required: 83 + - clocks 84 + - clock-names 85 + properties: 86 + clocks: 87 + minItems: 2 88 + clock-names: 89 + minItems: 2 90 + else: 91 + properties: 92 + clocks: 93 + maxItems: 1 94 + clock-names: 95 + maxItems: 1 68 96 69 97 properties: 70 98 compatible: ··· 188 162 minItems: 1 189 163 maxItems: 2 190 164 oneOf: 165 + - enum: 166 + - main 167 + - uart 191 168 - items: 192 169 - const: core 193 170 - const: bus ··· 292 263 required: 293 264 - reg 294 265 - interrupts 295 - 296 - if: 297 - properties: 298 - compatible: 299 - contains: 300 - enum: 301 - - spacemit,k1-uart 302 - - nxp,lpc1850-uart 303 - then: 304 - required: 305 - - clocks 306 - - clock-names 307 - properties: 308 - clocks: 309 - minItems: 2 310 - clock-names: 311 - minItems: 2 312 - else: 313 - properties: 314 - clocks: 315 - maxItems: 1 316 - clock-names: 317 - maxItems: 1 318 266 319 267 unevaluatedProperties: false 320 268
+1 -1
Documentation/devicetree/bindings/serial/brcm,bcm7271-uart.yaml
··· 41 41 - const: dma_intr2 42 42 43 43 clocks: 44 - minItems: 1 44 + maxItems: 1 45 45 46 46 clock-names: 47 47 const: sw_baud
+3 -3
drivers/tty/hvc/hvc_console.c
··· 543 543 } 544 544 545 545 /* 546 - * Racy, but harmless, kick thread if there is still pending data. 546 + * Kick thread to flush if there's still pending data 547 + * or to wakeup the write queue. 547 548 */ 548 - if (hp->n_outbuf) 549 - hvc_kick(); 549 + hvc_kick(); 550 550 551 551 return written; 552 552 }
+2 -12
drivers/tty/serial/sc16is7xx.c
··· 1177 1177 sc16is7xx_port_write(port, SC16IS7XX_FCR_REG, 1178 1178 SC16IS7XX_FCR_FIFO_BIT); 1179 1179 1180 - /* Enable EFR */ 1181 - sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, 1182 - SC16IS7XX_LCR_CONF_MODE_B); 1183 - 1184 - regcache_cache_bypass(one->regmap, true); 1185 - 1186 - /* Enable write access to enhanced features and internal clock div */ 1187 - sc16is7xx_port_update(port, SC16IS7XX_EFR_REG, 1188 - SC16IS7XX_EFR_ENABLE_BIT, 1189 - SC16IS7XX_EFR_ENABLE_BIT); 1190 - 1191 1180 /* Enable TCR/TLR */ 1192 1181 sc16is7xx_port_update(port, SC16IS7XX_MCR_REG, 1193 1182 SC16IS7XX_MCR_TCRTLR_BIT, ··· 1188 1199 SC16IS7XX_TCR_RX_RESUME(24) | 1189 1200 SC16IS7XX_TCR_RX_HALT(48)); 1190 1201 1191 - regcache_cache_bypass(one->regmap, false); 1202 + /* Disable TCR/TLR access */ 1203 + sc16is7xx_port_update(port, SC16IS7XX_MCR_REG, SC16IS7XX_MCR_TCRTLR_BIT, 0); 1192 1204 1193 1205 /* Now, initialize the UART */ 1194 1206 sc16is7xx_port_write(port, SC16IS7XX_LCR_REG, SC16IS7XX_LCR_WORD_LEN_8);
+5 -5
drivers/tty/serial/xilinx_uartps.c
··· 33 33 #define CDNS_UART_MINOR 0 /* works best with devtmpfs */ 34 34 #define CDNS_UART_NR_PORTS 16 35 35 #define CDNS_UART_FIFO_SIZE 64 /* FIFO size */ 36 - #define CDNS_UART_REGISTER_SPACE 0x1000 37 36 #define TX_TIMEOUT 500000 38 37 39 38 /* Rx Trigger level */ ··· 1097 1098 */ 1098 1099 static int cdns_uart_request_port(struct uart_port *port) 1099 1100 { 1100 - if (!request_mem_region(port->mapbase, CDNS_UART_REGISTER_SPACE, 1101 + if (!request_mem_region(port->mapbase, port->mapsize, 1101 1102 CDNS_UART_NAME)) { 1102 1103 return -ENOMEM; 1103 1104 } 1104 1105 1105 - port->membase = ioremap(port->mapbase, CDNS_UART_REGISTER_SPACE); 1106 + port->membase = ioremap(port->mapbase, port->mapsize); 1106 1107 if (!port->membase) { 1107 1108 dev_err(port->dev, "Unable to map registers\n"); 1108 - release_mem_region(port->mapbase, CDNS_UART_REGISTER_SPACE); 1109 + release_mem_region(port->mapbase, port->mapsize); 1109 1110 return -ENOMEM; 1110 1111 } 1111 1112 return 0; ··· 1120 1121 */ 1121 1122 static void cdns_uart_release_port(struct uart_port *port) 1122 1123 { 1123 - release_mem_region(port->mapbase, CDNS_UART_REGISTER_SPACE); 1124 + release_mem_region(port->mapbase, port->mapsize); 1124 1125 iounmap(port->membase); 1125 1126 port->membase = NULL; 1126 1127 } ··· 1779 1780 * and triggers invocation of the config_port() entry point. 1780 1781 */ 1781 1782 port->mapbase = res->start; 1783 + port->mapsize = resource_size(res); 1782 1784 port->irq = irq; 1783 1785 port->dev = &pdev->dev; 1784 1786 port->uartclk = clk_get_rate(cdns_uart_data->uartclk);