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dt-bindings: ufs: cdns,ufshc: convert to dtschema

Convert the Cadence Universal Flash Storage (UFS) Controlle to DT schema
format.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220306111125.116455-4-krzysztof.kozlowski@canonical.com

authored by

Krzysztof Kozlowski and committed by
Rob Herring
1581355b cebe2234

+71 -36
-32
Documentation/devicetree/bindings/ufs/cdns,ufshc.txt
··· 1 - * Cadence Universal Flash Storage (UFS) Controller 2 - 3 - UFS nodes are defined to describe on-chip UFS host controllers. 4 - Each UFS controller instance should have its own node. 5 - Please see the ufshcd-pltfrm.txt for a list of all available properties. 6 - 7 - Required properties: 8 - - compatible : Compatible list, contains one of the following controllers: 9 - "cdns,ufshc" - Generic CDNS HCI, 10 - "cdns,ufshc-m31-16nm" - CDNS UFS HC + M31 16nm PHY 11 - complemented with the JEDEC version: 12 - "jedec,ufs-2.0" 13 - 14 - - reg : Address and length of the UFS register set. 15 - - interrupts : One interrupt mapping. 16 - - freq-table-hz : Clock frequency table. 17 - See the ufshcd-pltfrm.txt for details. 18 - - clocks : List of phandle and clock specifier pairs. 19 - - clock-names : List of clock input name strings sorted in the same 20 - order as the clocks property. "core_clk" is mandatory. 21 - Depending on a type of a PHY, 22 - the "phy_clk" clock can also be added, if needed. 23 - 24 - Example: 25 - ufs@fd030000 { 26 - compatible = "cdns,ufshc", "jedec,ufs-2.0"; 27 - reg = <0xfd030000 0x10000>; 28 - interrupts = <0 1 IRQ_TYPE_LEVEL_HIGH>; 29 - freq-table-hz = <0 0>, <0 0>; 30 - clocks = <&ufs_core_clk>, <&ufs_phy_clk>; 31 - clock-names = "core_clk", "phy_clk"; 32 - };
+68
Documentation/devicetree/bindings/ufs/cdns,ufshc.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/ufs/cdns,ufshc.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Cadence Universal Flash Storage (UFS) Controller 8 + 9 + maintainers: 10 + - Jan Kotas <jank@cadence.com> 11 + 12 + # Select only our matches, not all jedec,ufs-2.0 13 + select: 14 + properties: 15 + compatible: 16 + contains: 17 + enum: 18 + - cdns,ufshc 19 + - cdns,ufshc-m31-16nm 20 + required: 21 + - compatible 22 + 23 + allOf: 24 + - $ref: ufs-common.yaml 25 + 26 + properties: 27 + compatible: 28 + items: 29 + - enum: 30 + - cdns,ufshc 31 + # CDNS UFS HC + M31 16nm PHY 32 + - cdns,ufshc-m31-16nm 33 + - const: jedec,ufs-2.0 34 + 35 + clocks: 36 + minItems: 1 37 + maxItems: 3 38 + 39 + clock-names: 40 + minItems: 1 41 + items: 42 + - const: core_clk 43 + - const: phy_clk 44 + - const: ref_clk 45 + 46 + reg: 47 + maxItems: 1 48 + 49 + required: 50 + - compatible 51 + - clocks 52 + - clock-names 53 + - reg 54 + 55 + unevaluatedProperties: false 56 + 57 + examples: 58 + - | 59 + #include <dt-bindings/interrupt-controller/arm-gic.h> 60 + 61 + ufs@fd030000 { 62 + compatible = "cdns,ufshc", "jedec,ufs-2.0"; 63 + reg = <0xfd030000 0x10000>; 64 + interrupts = <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>; 65 + freq-table-hz = <0 0>, <0 0>; 66 + clocks = <&ufs_core_clk>, <&ufs_phy_clk>; 67 + clock-names = "core_clk", "phy_clk"; 68 + };
+3 -4
Documentation/devicetree/bindings/ufs/ti,j721e-ufs.yaml
··· 47 47 48 48 patternProperties: 49 49 "^ufs@[0-9a-f]+$": 50 - type: object 50 + $ref: cdns,ufshc.yaml 51 51 description: | 52 - Cadence UFS controller node must be the child node. Refer 53 - Documentation/devicetree/bindings/ufs/cdns,ufshc.txt for binding 54 - documentation of child node 52 + Cadence UFS controller node must be the child node. 53 + unevaluatedProperties: false 55 54 56 55 additionalProperties: false 57 56