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dt-bindings: arm: Add Coresight TMC Control Unit hardware

Add binding file to specify how to define a Coresight TMC Control Unit device
in device tree.

It is responsible for controlling the data filter function based on the source
device's Trace ID for TMC ETR device. The trace data with that Trace id can get
into ETR's buffer while other trace data gets ignored.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Jie Gan <quic_jiegan@quicinc.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20250303032931.2500935-9-quic_jiegan@quicinc.com

authored by

Jie Gan and committed by
Suzuki K Poulose 166df2a1 080ee83c

+84
+84
Documentation/devicetree/bindings/arm/qcom,coresight-ctcu.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/arm/qcom,coresight-ctcu.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: CoreSight TMC Control Unit 8 + 9 + maintainers: 10 + - Yuanfang Zhang <quic_yuanfang@quicinc.com> 11 + - Mao Jinlong <quic_jinlmao@quicinc.com> 12 + - Jie Gan <quic_jiegan@quicinc.com> 13 + 14 + description: | 15 + The Trace Memory Controller(TMC) is used for Embedded Trace Buffer(ETB), 16 + Embedded Trace FIFO(ETF) and Embedded Trace Router(ETR) configurations. 17 + The configuration mode (ETB, ETF, ETR) is discovered at boot time when 18 + the device is probed. 19 + 20 + The Coresight TMC Control unit controls various Coresight behaviors. 21 + It works as a helper device when connected to TMC ETR device. 22 + It is responsible for controlling the data filter function based on 23 + the source device's Trace ID for TMC ETR device. The trace data with 24 + that Trace id can get into ETR's buffer while other trace data gets 25 + ignored. 26 + 27 + properties: 28 + compatible: 29 + enum: 30 + - qcom,sa8775p-ctcu 31 + 32 + reg: 33 + maxItems: 1 34 + 35 + clocks: 36 + maxItems: 1 37 + 38 + clock-names: 39 + items: 40 + - const: apb 41 + 42 + in-ports: 43 + $ref: /schemas/graph.yaml#/properties/ports 44 + 45 + patternProperties: 46 + '^port(@[0-1])?$': 47 + description: Input connections from CoreSight Trace bus 48 + $ref: /schemas/graph.yaml#/properties/port 49 + 50 + required: 51 + - compatible 52 + - reg 53 + - in-ports 54 + 55 + additionalProperties: false 56 + 57 + examples: 58 + - | 59 + ctcu@1001000 { 60 + compatible = "qcom,sa8775p-ctcu"; 61 + reg = <0x1001000 0x1000>; 62 + 63 + clocks = <&aoss_qmp>; 64 + clock-names = "apb"; 65 + 66 + in-ports { 67 + #address-cells = <1>; 68 + #size-cells = <0>; 69 + 70 + port@0 { 71 + reg = <0>; 72 + ctcu_in_port0: endpoint { 73 + remote-endpoint = <&etr0_out_port>; 74 + }; 75 + }; 76 + 77 + port@1 { 78 + reg = <1>; 79 + ctcu_in_port1: endpoint { 80 + remote-endpoint = <&etr1_out_port>; 81 + }; 82 + }; 83 + }; 84 + };