+2 -10

drivers/ntb/hw/amd/ntb_hw_amd.c

reviewed

··· 1176 1176 1177 1177 pci_set_master(pdev); 1178 1178 1179 1179 - rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 1179 1179 + rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 1180 1180 if (rc) { 1181 1181 - rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 1181 1181 + rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 1182 1182 if (rc) 1183 1183 goto err_dma_mask; 1184 1184 dev_warn(&pdev->dev, "Cannot DMA highmem\n"); 1185 1185 - } 1186 1186 - 1187 1187 - rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); 1188 1188 - if (rc) { 1189 1189 - rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 1190 1190 - if (rc) 1191 1191 - goto err_dma_mask; 1192 1192 - dev_warn(&pdev->dev, "Cannot DMA consistent highmem\n"); 1193 1185 } 1194 1186 1195 1187 ndev->self_mmio = pci_iomap(pdev, 0, 0);

+2 -13

drivers/ntb/hw/idt/ntb_hw_idt.c

reviewed

··· 2640 2640 int ret; 2641 2641 2642 2642 /* Initialize the bit mask of PCI/NTB DMA */ 2643 2643 - ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 2643 2643 + ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 2644 2644 if (ret != 0) { 2645 2645 - ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 2645 2645 + ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 2646 2646 if (ret != 0) { 2647 2647 dev_err(&pdev->dev, "Failed to set DMA bit mask\n"); 2648 2648 return ret; 2649 2649 } 2650 2650 dev_warn(&pdev->dev, "Cannot set DMA highmem bit mask\n"); 2651 2651 - } 2652 2652 - ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); 2653 2653 - if (ret != 0) { 2654 2654 - ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 2655 2655 - if (ret != 0) { 2656 2656 - dev_err(&pdev->dev, 2657 2657 - "Failed to set consistent DMA bit mask\n"); 2658 2658 - return ret; 2659 2659 - } 2660 2660 - dev_warn(&pdev->dev, 2661 2661 - "Cannot set consistent DMA highmem bit mask\n"); 2662 2651 } 2663 2652 2664 2653 /*

+2 -10

drivers/ntb/hw/intel/ntb_hw_gen1.c

reviewed

··· 1771 1771 1772 1772 pci_set_master(pdev); 1773 1773 1774 1774 - rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 1774 1774 + rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 1775 1775 if (rc) { 1776 1776 - rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 1776 1776 + rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)); 1777 1777 if (rc) 1778 1778 goto err_dma_mask; 1779 1779 dev_warn(&pdev->dev, "Cannot DMA highmem\n"); 1780 1780 - } 1781 1781 - 1782 1782 - rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); 1783 1783 - if (rc) { 1784 1784 - rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 1785 1785 - if (rc) 1786 1786 - goto err_dma_mask; 1787 1787 - dev_warn(&pdev->dev, "Cannot DMA consistent highmem\n"); 1788 1780 } 1789 1781 1790 1782 ndev->self_mmio = pci_iomap(pdev, 0, 0);

-3

drivers/ntb/hw/intel/ntb_hw_intel.h

reviewed

··· 43 43 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 44 44 * 45 45 * Intel PCIe NTB Linux driver 46 46 - * 47 47 - * Contact Information: 48 48 - * Jon Mason <jon.mason@intel.com> 49 46 */ 50 47 51 48 #ifndef NTB_HW_INTEL_H

+3 -1

drivers/ntb/test/ntb_msi_test.c

reviewed

··· 369 369 if (ret) 370 370 goto remove_dbgfs; 371 371 372 372 - if (!nm->isr_ctx) 372 372 + if (!nm->isr_ctx) { 373 373 + ret = -ENOMEM; 373 374 goto remove_dbgfs; 375 375 + } 374 376 375 377 ntb_link_enable(ntb, NTB_SPEED_AUTO, NTB_WIDTH_AUTO); 376 378

+1

drivers/ntb/test/ntb_perf.c

reviewed

··· 598 598 return -ENOMEM; 599 599 } 600 600 if (!IS_ALIGNED(peer->inbuf_xlat, xlat_align)) { 601 601 + ret = -EINVAL; 601 602 dev_err(&perf->ntb->dev, "Unaligned inbuf allocated\n"); 602 603 goto err_free_inbuf; 603 604 }

+1 -1

drivers/ntb/test/ntb_pingpong.c

reviewed

··· 187 187 188 188 static void pp_pong(struct pp_ctx *pp) 189 189 { 190 190 - u32 msg_data = -1, spad_data = -1; 190 190 + u32 msg_data, spad_data; 191 191 int pidx = 0; 192 192 193 193 /* Read pong data */