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phy: ti: gmii-sel: Enable SGMII mode for J7200

TI's J7200 SoC supports SGMII mode with the CPSW5G instance of the CPSW
Ethernet Switch. Thus, enable it by adding SGMII mode to the list of the
corresponding extra_modes member.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20230309063514.398705-3-s-vadapalli@ti.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Siddharth Vadapalli and committed by
Vinod Koul
178b6515 6a301188

+1 -1
+1 -1
drivers/phy/ti/phy-gmii-sel.c
··· 221 221 struct phy_gmii_sel_soc_data phy_gmii_sel_cpsw5g_soc_j7200 = { 222 222 .use_of_data = true, 223 223 .regfields = phy_gmii_sel_fields_am654, 224 - .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII), 224 + .extra_modes = BIT(PHY_INTERFACE_MODE_QSGMII) | BIT(PHY_INTERFACE_MODE_SGMII), 225 225 .num_ports = 4, 226 226 .num_qsgmii_main_ports = 1, 227 227 };