drm/msm/dp: fold dp_power into dp_ctrl module

-1

drivers/gpu/drm/msm/Makefile

··· 128 128 dp/dp_link.o \ 129 129 dp/dp_panel.o \ 130 130 dp/dp_parser.o \ 131 - dp/dp_power.o \ 132 131 dp/dp_audio.o 133 132 134 133 msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o

+134 -16

drivers/gpu/drm/msm/dp/dp_ctrl.c

··· 76 76 struct drm_dp_aux *aux; 77 77 struct dp_panel *panel; 78 78 struct dp_link *link; 79 - struct dp_power *power; 80 79 struct dp_parser *parser; 81 80 struct dp_catalog *catalog; 82 81 83 82 struct completion idle_comp; 84 83 struct completion psr_op_comp; 85 84 struct completion video_comp; 85 + 86 + bool core_clks_on; 87 + bool link_clks_on; 88 + bool stream_clks_on; 86 89 }; 87 90 88 91 static int dp_aux_link_configure(struct drm_dp_aux *aux, ··· 1336 1333 name, rate); 1337 1334 } 1338 1335 1336 + int dp_ctrl_clk_enable(struct dp_ctrl *dp_ctrl, 1337 + enum dp_pm_type pm_type, bool enable) 1338 + { 1339 + struct dp_ctrl_private *ctrl; 1340 + struct dss_module_power *mp; 1341 + int ret = 0; 1342 + 1343 + ctrl = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); 1344 + 1345 + if (pm_type != DP_CORE_PM && 1346 + pm_type != DP_CTRL_PM && 1347 + pm_type != DP_STREAM_PM) { 1348 + DRM_ERROR("unsupported ctrl module: %s\n", 1349 + dp_parser_pm_name(pm_type)); 1350 + return -EINVAL; 1351 + } 1352 + 1353 + if (enable) { 1354 + if (pm_type == DP_CORE_PM && ctrl->core_clks_on) { 1355 + drm_dbg_dp(ctrl->drm_dev, 1356 + "core clks already enabled\n"); 1357 + return 0; 1358 + } 1359 + 1360 + if (pm_type == DP_CTRL_PM && ctrl->link_clks_on) { 1361 + drm_dbg_dp(ctrl->drm_dev, 1362 + "links clks already enabled\n"); 1363 + return 0; 1364 + } 1365 + 1366 + if (pm_type == DP_STREAM_PM && ctrl->stream_clks_on) { 1367 + drm_dbg_dp(ctrl->drm_dev, 1368 + "pixel clks already enabled\n"); 1369 + return 0; 1370 + } 1371 + 1372 + if ((pm_type == DP_CTRL_PM) && (!ctrl->core_clks_on)) { 1373 + drm_dbg_dp(ctrl->drm_dev, 1374 + "Enable core clks before link clks\n"); 1375 + mp = &ctrl->parser->mp[DP_CORE_PM]; 1376 + 1377 + ret = clk_bulk_prepare_enable(mp->num_clk, mp->clocks); 1378 + if (ret) 1379 + return ret; 1380 + 1381 + ctrl->core_clks_on = true; 1382 + } 1383 + } 1384 + 1385 + mp = &ctrl->parser->mp[pm_type]; 1386 + if (enable) { 1387 + ret = clk_bulk_prepare_enable(mp->num_clk, mp->clocks); 1388 + if (ret) 1389 + return ret; 1390 + } else { 1391 + clk_bulk_disable_unprepare(mp->num_clk, mp->clocks); 1392 + } 1393 + 1394 + if (pm_type == DP_CORE_PM) 1395 + ctrl->core_clks_on = enable; 1396 + else if (pm_type == DP_STREAM_PM) 1397 + ctrl->stream_clks_on = enable; 1398 + else 1399 + ctrl->link_clks_on = enable; 1400 + 1401 + drm_dbg_dp(ctrl->drm_dev, "%s clocks for %s\n", 1402 + enable ? "enable" : "disable", 1403 + dp_parser_pm_name(pm_type)); 1404 + drm_dbg_dp(ctrl->drm_dev, 1405 + "stream_clks:%s link_clks:%s core_clks:%s\n", 1406 + ctrl->stream_clks_on ? "on" : "off", 1407 + ctrl->link_clks_on ? "on" : "off", 1408 + ctrl->core_clks_on ? "on" : "off"); 1409 + 1410 + return 0; 1411 + } 1412 + 1339 1413 static int dp_ctrl_enable_mainlink_clocks(struct dp_ctrl_private *ctrl) 1340 1414 { 1341 1415 int ret = 0; ··· 1429 1349 phy_power_on(phy); 1430 1350 1431 1351 dev_pm_opp_set_rate(ctrl->dev, ctrl->link->link_params.rate * 1000); 1432 - ret = dp_power_clk_enable(ctrl->power, DP_CTRL_PM, true); 1352 + ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, true); 1433 1353 if (ret) 1434 1354 DRM_ERROR("Unable to start link clocks. ret=%d\n", ret); 1435 1355 ··· 1577 1497 * link maintenance. 1578 1498 */ 1579 1499 dev_pm_opp_set_rate(ctrl->dev, 0); 1580 - ret = dp_power_clk_enable(ctrl->power, DP_CTRL_PM, false); 1500 + ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, false); 1581 1501 if (ret) { 1582 1502 DRM_ERROR("Failed to disable clocks. ret=%d\n", ret); 1583 1503 return ret; ··· 1609 1529 dp_catalog_ctrl_reset(ctrl->catalog); 1610 1530 1611 1531 dev_pm_opp_set_rate(ctrl->dev, 0); 1612 - ret = dp_power_clk_enable(ctrl->power, DP_CTRL_PM, false); 1532 + ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, false); 1613 1533 if (ret) { 1614 1534 DRM_ERROR("Failed to disable link clocks. ret=%d\n", ret); 1615 1535 } ··· 1731 1651 pixel_rate = ctrl->panel->dp_mode.drm_mode.clock; 1732 1652 dp_ctrl_set_clock_rate(ctrl, DP_STREAM_PM, "stream_pixel", pixel_rate * 1000); 1733 1653 1734 - ret = dp_power_clk_enable(ctrl->power, DP_STREAM_PM, true); 1654 + ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_STREAM_PM, true); 1735 1655 if (ret) { 1736 1656 DRM_ERROR("Failed to start pixel clocks. ret=%d\n", ret); 1737 1657 return ret; ··· 1827 1747 rate = ctrl->panel->link_info.rate; 1828 1748 pixel_rate = ctrl->panel->dp_mode.drm_mode.clock; 1829 1749 1830 - dp_power_clk_enable(ctrl->power, DP_CORE_PM, true); 1750 + dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CORE_PM, true); 1831 1751 1832 1752 if (ctrl->link->sink_request & DP_TEST_LINK_PHY_TEST_PATTERN) { 1833 1753 drm_dbg_dp(ctrl->drm_dev, ··· 1960 1880 ctrl->link->link_params.rate, 1961 1881 ctrl->link->link_params.num_lanes, pixel_rate); 1962 1882 1963 - if (!dp_power_clk_status(ctrl->power, DP_CTRL_PM)) { /* link clk is off */ 1883 + drm_dbg_dp(ctrl->drm_dev, 1884 + "core_clk_on=%d link_clk_on=%d stream_clk_on=%d\n", 1885 + ctrl->core_clks_on, ctrl->link_clks_on, ctrl->stream_clks_on); 1886 + 1887 + if (!ctrl->link_clks_on) { /* link clk is off */ 1964 1888 ret = dp_ctrl_enable_mainlink_clocks(ctrl); 1965 1889 if (ret) { 1966 1890 DRM_ERROR("Failed to start link clocks. ret=%d\n", ret); ··· 1974 1890 1975 1891 dp_ctrl_set_clock_rate(ctrl, DP_STREAM_PM, "stream_pixel", pixel_rate * 1000); 1976 1892 1977 - ret = dp_power_clk_enable(ctrl->power, DP_STREAM_PM, true); 1893 + ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_STREAM_PM, true); 1978 1894 if (ret) { 1979 1895 DRM_ERROR("Unable to start pixel clocks. ret=%d\n", ret); 1980 1896 goto end; ··· 2030 1946 2031 1947 dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); 2032 1948 2033 - if (dp_power_clk_status(ctrl->power, DP_STREAM_PM)) { 2034 - ret = dp_power_clk_enable(ctrl->power, DP_STREAM_PM, false); 1949 + if (ctrl->stream_clks_on) { 1950 + ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_STREAM_PM, false); 2035 1951 if (ret) { 2036 1952 DRM_ERROR("Failed to disable pclk. ret=%d\n", ret); 2037 1953 return ret; ··· 2039 1955 } 2040 1956 2041 1957 dev_pm_opp_set_rate(ctrl->dev, 0); 2042 - ret = dp_power_clk_enable(ctrl->power, DP_CTRL_PM, false); 1958 + ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, false); 2043 1959 if (ret) { 2044 1960 DRM_ERROR("Failed to disable link clocks. ret=%d\n", ret); 2045 1961 return ret; ··· 2069 1985 2070 1986 dp_catalog_ctrl_mainlink_ctrl(ctrl->catalog, false); 2071 1987 2072 - ret = dp_power_clk_enable(ctrl->power, DP_CTRL_PM, false); 1988 + ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, false); 2073 1989 if (ret) { 2074 1990 DRM_ERROR("Failed to disable link clocks. ret=%d\n", ret); 2075 1991 } ··· 2103 2019 2104 2020 dp_catalog_ctrl_reset(ctrl->catalog); 2105 2021 2106 - ret = dp_power_clk_enable(ctrl->power, DP_STREAM_PM, false); 2022 + ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_STREAM_PM, false); 2107 2023 if (ret) 2108 2024 DRM_ERROR("Failed to disable pixel clocks. ret=%d\n", ret); 2109 2025 2110 2026 dev_pm_opp_set_rate(ctrl->dev, 0); 2111 - ret = dp_power_clk_enable(ctrl->power, DP_CTRL_PM, false); 2027 + ret = dp_ctrl_clk_enable(&ctrl->dp_ctrl, DP_CTRL_PM, false); 2112 2028 if (ret) { 2113 2029 DRM_ERROR("Failed to disable link clocks. ret=%d\n", ret); 2114 2030 } ··· 2165 2081 return ret; 2166 2082 } 2167 2083 2084 + static int dp_ctrl_clk_init(struct dp_ctrl *dp_ctrl) 2085 + { 2086 + struct dp_ctrl_private *ctrl_private; 2087 + int rc = 0; 2088 + struct dss_module_power *core, *ctrl, *stream; 2089 + struct device *dev; 2090 + 2091 + ctrl_private = container_of(dp_ctrl, struct dp_ctrl_private, dp_ctrl); 2092 + dev = ctrl_private->dev; 2093 + 2094 + core = &ctrl_private->parser->mp[DP_CORE_PM]; 2095 + ctrl = &ctrl_private->parser->mp[DP_CTRL_PM]; 2096 + stream = &ctrl_private->parser->mp[DP_STREAM_PM]; 2097 + 2098 + rc = devm_clk_bulk_get(dev, core->num_clk, core->clocks); 2099 + if (rc) 2100 + return rc; 2101 + 2102 + rc = devm_clk_bulk_get(dev, ctrl->num_clk, ctrl->clocks); 2103 + if (rc) 2104 + return -ENODEV; 2105 + 2106 + rc = devm_clk_bulk_get(dev, stream->num_clk, stream->clocks); 2107 + if (rc) 2108 + return -ENODEV; 2109 + 2110 + return 0; 2111 + } 2112 + 2168 2113 struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link, 2169 2114 struct dp_panel *panel, struct drm_dp_aux *aux, 2170 - struct dp_power *power, struct dp_catalog *catalog, 2115 + struct dp_catalog *catalog, 2171 2116 struct dp_parser *parser) 2172 2117 { 2173 2118 struct dp_ctrl_private *ctrl; ··· 2233 2120 /* in parameters */ 2234 2121 ctrl->parser = parser; 2235 2122 ctrl->panel = panel; 2236 - ctrl->power = power; 2237 2123 ctrl->aux = aux; 2238 2124 ctrl->link = link; 2239 2125 ctrl->catalog = catalog; 2240 2126 ctrl->dev = dev; 2127 + 2128 + ret = dp_ctrl_clk_init(&ctrl->dp_ctrl); 2129 + if (ret) { 2130 + dev_err(dev, "failed to init clocks\n"); 2131 + return ERR_PTR(ret); 2132 + } 2241 2133 2242 2134 return &ctrl->dp_ctrl; 2243 2135 }

+4 -2

drivers/gpu/drm/msm/dp/dp_ctrl.h

··· 10 10 #include "dp_panel.h" 11 11 #include "dp_link.h" 12 12 #include "dp_parser.h" 13 - #include "dp_power.h" 14 13 #include "dp_catalog.h" 15 14 16 15 struct dp_ctrl { ··· 27 28 void dp_ctrl_handle_sink_request(struct dp_ctrl *dp_ctrl); 28 29 struct dp_ctrl *dp_ctrl_get(struct device *dev, struct dp_link *link, 29 30 struct dp_panel *panel, struct drm_dp_aux *aux, 30 - struct dp_power *power, struct dp_catalog *catalog, 31 + struct dp_catalog *catalog, 31 32 struct dp_parser *parser); 32 33 33 34 void dp_ctrl_reset_irq_ctrl(struct dp_ctrl *dp_ctrl, bool enable); ··· 37 38 38 39 void dp_ctrl_set_psr(struct dp_ctrl *dp_ctrl, bool enable); 39 40 void dp_ctrl_config_psr(struct dp_ctrl *dp_ctrl); 41 + 42 + int dp_ctrl_clk_enable(struct dp_ctrl *ctrl, enum dp_pm_type pm_type, 43 + bool enable); 40 44 41 45 #endif /* _DP_CTRL_H_ */

+4 -20

drivers/gpu/drm/msm/dp/dp_display.c

··· 16 16 #include "msm_drv.h" 17 17 #include "msm_kms.h" 18 18 #include "dp_parser.h" 19 - #include "dp_power.h" 19 + #include "dp_ctrl.h" 20 20 #include "dp_catalog.h" 21 21 #include "dp_aux.h" 22 22 #include "dp_reg.h" 23 23 #include "dp_link.h" 24 24 #include "dp_panel.h" 25 - #include "dp_ctrl.h" 26 25 #include "dp_display.h" 27 26 #include "dp_drm.h" 28 27 #include "dp_audio.h" ··· 89 90 struct dentry *root; 90 91 91 92 struct dp_parser *parser; 92 - struct dp_power *power; 93 93 struct dp_catalog *catalog; 94 94 struct drm_dp_aux *aux; 95 95 struct dp_link *link; ··· 433 435 dp->dp_display.connector_type, dp->core_initialized, 434 436 dp->phy_initialized); 435 437 436 - dp_power_clk_enable(dp->power, DP_CORE_PM, true); 438 + dp_ctrl_clk_enable(dp->ctrl, DP_CORE_PM, true); 437 439 dp_ctrl_reset_irq_ctrl(dp->ctrl, true); 438 440 dp_aux_init(dp->aux); 439 441 dp->core_initialized = true; ··· 447 449 448 450 dp_ctrl_reset_irq_ctrl(dp->ctrl, false); 449 451 dp_aux_deinit(dp->aux); 450 - dp_power_clk_enable(dp->power, DP_CORE_PM, false); 452 + dp_ctrl_clk_enable(dp->ctrl, DP_CORE_PM, false); 451 453 dp->core_initialized = false; 452 454 } 453 455 ··· 730 732 goto error; 731 733 } 732 734 733 - dp->power = dp_power_get(dev, dp->parser); 734 - if (IS_ERR(dp->power)) { 735 - rc = PTR_ERR(dp->power); 736 - DRM_ERROR("failed to initialize power, rc = %d\n", rc); 737 - dp->power = NULL; 738 - goto error; 739 - } 740 - 741 735 dp->aux = dp_aux_get(dev, dp->catalog, dp->dp_display.is_edp); 742 736 if (IS_ERR(dp->aux)) { 743 737 rc = PTR_ERR(dp->aux); ··· 759 769 } 760 770 761 771 dp->ctrl = dp_ctrl_get(dev, dp->link, dp->panel, dp->aux, 762 - dp->power, dp->catalog, dp->parser); 772 + dp->catalog, dp->parser); 763 773 if (IS_ERR(dp->ctrl)) { 764 774 rc = PTR_ERR(dp->ctrl); 765 775 DRM_ERROR("failed to initialize ctrl, rc = %d\n", rc); ··· 1255 1265 if (rc) { 1256 1266 DRM_ERROR("init sub module failed\n"); 1257 1267 return -EPROBE_DEFER; 1258 - } 1259 - 1260 - rc = dp_power_client_init(dp->power); 1261 - if (rc) { 1262 - DRM_ERROR("Power client create failed\n"); 1263 - goto err; 1264 1268 } 1265 1269 1266 1270 /* setup event q */

-170

drivers/gpu/drm/msm/dp/dp_power.c

··· 1 - // SPDX-License-Identifier: GPL-2.0-only 2 - /* 3 - * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved. 4 - */ 5 - 6 - #define pr_fmt(fmt) "[drm-dp] %s: " fmt, __func__ 7 - 8 - #include <linux/clk.h> 9 - #include <linux/clk-provider.h> 10 - #include <linux/regulator/consumer.h> 11 - #include <linux/pm_opp.h> 12 - #include "dp_power.h" 13 - #include "msm_drv.h" 14 - 15 - struct dp_power_private { 16 - struct dp_parser *parser; 17 - struct device *dev; 18 - struct drm_device *drm_dev; 19 - 20 - struct dp_power dp_power; 21 - }; 22 - 23 - static int dp_power_clk_init(struct dp_power_private *power) 24 - { 25 - int rc = 0; 26 - struct dss_module_power *core, *ctrl, *stream; 27 - struct device *dev = power->dev; 28 - 29 - core = &power->parser->mp[DP_CORE_PM]; 30 - ctrl = &power->parser->mp[DP_CTRL_PM]; 31 - stream = &power->parser->mp[DP_STREAM_PM]; 32 - 33 - rc = devm_clk_bulk_get(dev, core->num_clk, core->clocks); 34 - if (rc) 35 - return rc; 36 - 37 - rc = devm_clk_bulk_get(dev, ctrl->num_clk, ctrl->clocks); 38 - if (rc) 39 - return -ENODEV; 40 - 41 - rc = devm_clk_bulk_get(dev, stream->num_clk, stream->clocks); 42 - if (rc) 43 - return -ENODEV; 44 - 45 - return 0; 46 - } 47 - 48 - int dp_power_clk_status(struct dp_power *dp_power, enum dp_pm_type pm_type) 49 - { 50 - struct dp_power_private *power; 51 - 52 - power = container_of(dp_power, struct dp_power_private, dp_power); 53 - 54 - drm_dbg_dp(power->drm_dev, 55 - "core_clk_on=%d link_clk_on=%d stream_clk_on=%d\n", 56 - dp_power->core_clks_on, dp_power->link_clks_on, dp_power->stream_clks_on); 57 - 58 - if (pm_type == DP_CORE_PM) 59 - return dp_power->core_clks_on; 60 - 61 - if (pm_type == DP_CTRL_PM) 62 - return dp_power->link_clks_on; 63 - 64 - if (pm_type == DP_STREAM_PM) 65 - return dp_power->stream_clks_on; 66 - 67 - return 0; 68 - } 69 - 70 - int dp_power_clk_enable(struct dp_power *dp_power, 71 - enum dp_pm_type pm_type, bool enable) 72 - { 73 - int rc = 0; 74 - struct dp_power_private *power; 75 - struct dss_module_power *mp; 76 - 77 - power = container_of(dp_power, struct dp_power_private, dp_power); 78 - 79 - if (pm_type != DP_CORE_PM && pm_type != DP_CTRL_PM && 80 - pm_type != DP_STREAM_PM) { 81 - DRM_ERROR("unsupported power module: %s\n", 82 - dp_parser_pm_name(pm_type)); 83 - return -EINVAL; 84 - } 85 - 86 - if (enable) { 87 - if (pm_type == DP_CORE_PM && dp_power->core_clks_on) { 88 - drm_dbg_dp(power->drm_dev, 89 - "core clks already enabled\n"); 90 - return 0; 91 - } 92 - 93 - if (pm_type == DP_CTRL_PM && dp_power->link_clks_on) { 94 - drm_dbg_dp(power->drm_dev, 95 - "links clks already enabled\n"); 96 - return 0; 97 - } 98 - 99 - if (pm_type == DP_STREAM_PM && dp_power->stream_clks_on) { 100 - drm_dbg_dp(power->drm_dev, 101 - "pixel clks already enabled\n"); 102 - return 0; 103 - } 104 - 105 - if ((pm_type == DP_CTRL_PM) && (!dp_power->core_clks_on)) { 106 - drm_dbg_dp(power->drm_dev, 107 - "Enable core clks before link clks\n"); 108 - mp = &power->parser->mp[DP_CORE_PM]; 109 - 110 - rc = clk_bulk_prepare_enable(mp->num_clk, mp->clocks); 111 - if (rc) 112 - return rc; 113 - 114 - dp_power->core_clks_on = true; 115 - } 116 - } 117 - 118 - mp = &power->parser->mp[pm_type]; 119 - if (enable) { 120 - rc = clk_bulk_prepare_enable(mp->num_clk, mp->clocks); 121 - if (rc) 122 - return rc; 123 - } else { 124 - clk_bulk_disable_unprepare(mp->num_clk, mp->clocks); 125 - } 126 - 127 - if (pm_type == DP_CORE_PM) 128 - dp_power->core_clks_on = enable; 129 - else if (pm_type == DP_STREAM_PM) 130 - dp_power->stream_clks_on = enable; 131 - else 132 - dp_power->link_clks_on = enable; 133 - 134 - drm_dbg_dp(power->drm_dev, "%s clocks for %s\n", 135 - enable ? "enable" : "disable", 136 - dp_parser_pm_name(pm_type)); 137 - drm_dbg_dp(power->drm_dev, 138 - "strem_clks:%s link_clks:%s core_clks:%s\n", 139 - dp_power->stream_clks_on ? "on" : "off", 140 - dp_power->link_clks_on ? "on" : "off", 141 - dp_power->core_clks_on ? "on" : "off"); 142 - 143 - return 0; 144 - } 145 - 146 - int dp_power_client_init(struct dp_power *dp_power) 147 - { 148 - struct dp_power_private *power; 149 - 150 - power = container_of(dp_power, struct dp_power_private, dp_power); 151 - 152 - return dp_power_clk_init(power); 153 - } 154 - 155 - struct dp_power *dp_power_get(struct device *dev, struct dp_parser *parser) 156 - { 157 - struct dp_power_private *power; 158 - struct dp_power *dp_power; 159 - 160 - power = devm_kzalloc(dev, sizeof(*power), GFP_KERNEL); 161 - if (!power) 162 - return ERR_PTR(-ENOMEM); 163 - 164 - power->parser = parser; 165 - power->dev = dev; 166 - 167 - dp_power = &power->dp_power; 168 - 169 - return dp_power; 170 - }

-74

drivers/gpu/drm/msm/dp/dp_power.h

··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * Copyright (c) 2012-2020, The Linux Foundation. All rights reserved. 4 - */ 5 - 6 - #ifndef _DP_POWER_H_ 7 - #define _DP_POWER_H_ 8 - 9 - #include "dp_parser.h" 10 - 11 - /** 12 - * sruct dp_power - DisplayPort's power related data 13 - * 14 - * @init: initializes the regulators/core clocks/GPIOs/pinctrl 15 - * @deinit: turns off the regulators/core clocks/GPIOs/pinctrl 16 - * @clk_enable: enable/disable the DP clocks 17 - * @set_pixel_clk_parent: set the parent of DP pixel clock 18 - */ 19 - struct dp_power { 20 - bool core_clks_on; 21 - bool link_clks_on; 22 - bool stream_clks_on; 23 - }; 24 - 25 - /** 26 - * dp_power_clk_status() - display controller clocks status 27 - * 28 - * @power: instance of power module 29 - * @pm_type: type of pm, core/ctrl/phy 30 - * return: status of power clocks 31 - * 32 - * This API return status of DP clocks 33 - */ 34 - 35 - int dp_power_clk_status(struct dp_power *dp_power, enum dp_pm_type pm_type); 36 - 37 - /** 38 - * dp_power_clk_enable() - enable display controller clocks 39 - * 40 - * @power: instance of power module 41 - * @pm_type: type of pm, core/ctrl/phy 42 - * @enable: enables or disables 43 - * return: pointer to allocated power module data 44 - * 45 - * This API will call setrate and enable for DP clocks 46 - */ 47 - 48 - int dp_power_clk_enable(struct dp_power *power, enum dp_pm_type pm_type, 49 - bool enable); 50 - 51 - /** 52 - * dp_power_client_init() - initialize clock and regulator modules 53 - * 54 - * @power: instance of power module 55 - * return: 0 for success, error for failure. 56 - * 57 - * This API will configure the DisplayPort's clocks and regulator 58 - * modules. 59 - */ 60 - int dp_power_client_init(struct dp_power *power); 61 - 62 - /** 63 - * dp_power_get() - configure and get the DisplayPort power module data 64 - * 65 - * @parser: instance of parser module 66 - * return: pointer to allocated power module data 67 - * 68 - * This API will configure the DisplayPort's power module and provides 69 - * methods to be called by the client to configure the power related 70 - * modules. 71 - */ 72 - struct dp_power *dp_power_get(struct device *dev, struct dp_parser *parser); 73 - 74 - #endif /* _DP_POWER_H_ */

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