tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma

Pull rdma fixes from Jason Gunthorpe:

- Memory leak in bnxt GSI qp path

- Failure in irdma registering large MRs

- Failure to clean out the right CQ table entry in irdma

- Invalid vf_id in some cases

- Incorrect error unwind in EFA CQ create

- hns doesn't use the optimal cq/qp relationships for it's HW banks

- hns reports the wrong SGE size to userspace for its QPs

- Corruption of the hns work queue entries in some cases

* tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma:
MAINTAINERS: Update irdma maintainers
RDMA/irdma: Fix vf_id size to u16 to avoid overflow
RDMA/hns: Remove an extra blank line
RDMA/hns: Fix wrong WQE data when QP wraps around
RDMA/hns: Fix the modification of max_send_sge
RDMA/hns: Fix recv CQ and QP cache affinity
RDMA/uverbs: Fix umem release in UVERBS_METHOD_CQ_CREATE
RDMA/irdma: Set irdma_cq cq_num field during CQ create
RDMA/irdma: Fix SD index calculation
RDMA/bnxt_re: Fix a potential memory leak in destroy_gsi_sqp

Linus Torvalds 17d85f33 c9cfc122

+87 -29
+1
MAINTAINERS
··· 12521 12521 F: include/linux/net/intel/*/ 12522 12522 12523 12523 INTEL ETHERNET PROTOCOL DRIVER FOR RDMA 12524 + M: Krzysztof Czurylo <krzysztof.czurylo@intel.com> 12524 12525 M: Tatyana Nikolova <tatyana.e.nikolova@intel.com> 12525 12526 L: linux-rdma@vger.kernel.org 12526 12527 S: Supported
+1
drivers/infiniband/core/uverbs_std_types_cq.c
··· 206 206 return ret; 207 207 208 208 err_free: 209 + ib_umem_release(umem); 209 210 rdma_restrack_put(&cq->res); 210 211 kfree(cq); 211 212 err_event_file:
+3 -8
drivers/infiniband/hw/bnxt_re/ib_verbs.c
··· 913 913 spin_unlock_irqrestore(&qp->scq->cq_lock, flags); 914 914 } 915 915 916 - static int bnxt_re_destroy_gsi_sqp(struct bnxt_re_qp *qp) 916 + static void bnxt_re_destroy_gsi_sqp(struct bnxt_re_qp *qp) 917 917 { 918 918 struct bnxt_re_qp *gsi_sqp; 919 919 struct bnxt_re_ah *gsi_sah; ··· 933 933 934 934 ibdev_dbg(&rdev->ibdev, "Destroy the shadow QP\n"); 935 935 rc = bnxt_qplib_destroy_qp(&rdev->qplib_res, &gsi_sqp->qplib_qp); 936 - if (rc) { 936 + if (rc) 937 937 ibdev_err(&rdev->ibdev, "Destroy Shadow QP failed"); 938 - goto fail; 939 - } 938 + 940 939 bnxt_qplib_free_qp_res(&rdev->qplib_res, &gsi_sqp->qplib_qp); 941 940 942 941 /* remove from active qp list */ ··· 950 951 rdev->gsi_ctx.gsi_sqp = NULL; 951 952 rdev->gsi_ctx.gsi_sah = NULL; 952 953 rdev->gsi_ctx.sqp_tbl = NULL; 953 - 954 - return 0; 955 - fail: 956 - return rc; 957 954 } 958 955 959 956 static void bnxt_re_del_unique_gid(struct bnxt_re_dev *rdev)
+7 -9
drivers/infiniband/hw/efa/efa_verbs.c
··· 1216 1216 if (umem->length < cq->size) { 1217 1217 ibdev_dbg(&dev->ibdev, "External memory too small\n"); 1218 1218 err = -EINVAL; 1219 - goto err_free_mem; 1219 + goto err_out; 1220 1220 } 1221 1221 1222 1222 if (!ib_umem_is_contiguous(umem)) { 1223 1223 ibdev_dbg(&dev->ibdev, "Non contiguous CQ unsupported\n"); 1224 1224 err = -EINVAL; 1225 - goto err_free_mem; 1225 + goto err_out; 1226 1226 } 1227 1227 1228 1228 cq->cpu_addr = NULL; ··· 1251 1251 1252 1252 err = efa_com_create_cq(&dev->edev, &params, &result); 1253 1253 if (err) 1254 - goto err_free_mem; 1254 + goto err_free_mapped; 1255 1255 1256 1256 resp.db_off = result.db_off; 1257 1257 resp.cq_idx = result.cq_idx; ··· 1299 1299 efa_cq_user_mmap_entries_remove(cq); 1300 1300 err_destroy_cq: 1301 1301 efa_destroy_cq_idx(dev, cq->cq_idx); 1302 - err_free_mem: 1303 - if (umem) 1304 - ib_umem_release(umem); 1305 - else 1306 - efa_free_mapped(dev, cq->cpu_addr, cq->dma_addr, cq->size, DMA_FROM_DEVICE); 1307 - 1302 + err_free_mapped: 1303 + if (!umem) 1304 + efa_free_mapped(dev, cq->cpu_addr, cq->dma_addr, cq->size, 1305 + DMA_FROM_DEVICE); 1308 1306 err_out: 1309 1307 atomic64_inc(&dev->stats.create_cq_err); 1310 1308 return err;
+55 -3
drivers/infiniband/hw/hns/hns_roce_cq.c
··· 30 30 * SOFTWARE. 31 31 */ 32 32 33 + #include <linux/pci.h> 33 34 #include <rdma/ib_umem.h> 34 35 #include <rdma/uverbs_ioctl.h> 35 36 #include "hns_roce_device.h" 36 37 #include "hns_roce_cmd.h" 37 38 #include "hns_roce_hem.h" 38 39 #include "hns_roce_common.h" 40 + 41 + void hns_roce_put_cq_bankid_for_uctx(struct hns_roce_ucontext *uctx) 42 + { 43 + struct hns_roce_dev *hr_dev = to_hr_dev(uctx->ibucontext.device); 44 + struct hns_roce_cq_table *cq_table = &hr_dev->cq_table; 45 + 46 + if (hr_dev->pci_dev->revision < PCI_REVISION_ID_HIP09) 47 + return; 48 + 49 + mutex_lock(&cq_table->bank_mutex); 50 + cq_table->ctx_num[uctx->cq_bank_id]--; 51 + mutex_unlock(&cq_table->bank_mutex); 52 + } 53 + 54 + void hns_roce_get_cq_bankid_for_uctx(struct hns_roce_ucontext *uctx) 55 + { 56 + struct hns_roce_dev *hr_dev = to_hr_dev(uctx->ibucontext.device); 57 + struct hns_roce_cq_table *cq_table = &hr_dev->cq_table; 58 + u32 least_load = cq_table->ctx_num[0]; 59 + u8 bankid = 0; 60 + u8 i; 61 + 62 + if (hr_dev->pci_dev->revision < PCI_REVISION_ID_HIP09) 63 + return; 64 + 65 + mutex_lock(&cq_table->bank_mutex); 66 + for (i = 1; i < HNS_ROCE_CQ_BANK_NUM; i++) { 67 + if (cq_table->ctx_num[i] < least_load) { 68 + least_load = cq_table->ctx_num[i]; 69 + bankid = i; 70 + } 71 + } 72 + cq_table->ctx_num[bankid]++; 73 + mutex_unlock(&cq_table->bank_mutex); 74 + 75 + uctx->cq_bank_id = bankid; 76 + } 39 77 40 78 static u8 get_least_load_bankid_for_cq(struct hns_roce_bank *bank) 41 79 { ··· 93 55 return bankid; 94 56 } 95 57 96 - static int alloc_cqn(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq) 58 + static u8 select_cq_bankid(struct hns_roce_dev *hr_dev, 59 + struct hns_roce_bank *bank, struct ib_udata *udata) 60 + { 61 + struct hns_roce_ucontext *uctx = udata ? 62 + rdma_udata_to_drv_context(udata, struct hns_roce_ucontext, 63 + ibucontext) : NULL; 64 + 65 + if (hr_dev->pci_dev->revision >= PCI_REVISION_ID_HIP09) 66 + return uctx ? uctx->cq_bank_id : 0; 67 + 68 + return get_least_load_bankid_for_cq(bank); 69 + } 70 + 71 + static int alloc_cqn(struct hns_roce_dev *hr_dev, struct hns_roce_cq *hr_cq, 72 + struct ib_udata *udata) 97 73 { 98 74 struct hns_roce_cq_table *cq_table = &hr_dev->cq_table; 99 75 struct hns_roce_bank *bank; ··· 115 63 int id; 116 64 117 65 mutex_lock(&cq_table->bank_mutex); 118 - bankid = get_least_load_bankid_for_cq(cq_table->bank); 66 + bankid = select_cq_bankid(hr_dev, cq_table->bank, udata); 119 67 bank = &cq_table->bank[bankid]; 120 68 121 69 id = ida_alloc_range(&bank->ida, bank->min, bank->max, GFP_KERNEL); ··· 448 396 goto err_cq_buf; 449 397 } 450 398 451 - ret = alloc_cqn(hr_dev, hr_cq); 399 + ret = alloc_cqn(hr_dev, hr_cq, udata); 452 400 if (ret) { 453 401 ibdev_err(ibdev, "failed to alloc CQN, ret = %d.\n", ret); 454 402 goto err_cq_db;
+4
drivers/infiniband/hw/hns/hns_roce_device.h
··· 217 217 struct mutex page_mutex; 218 218 struct hns_user_mmap_entry *db_mmap_entry; 219 219 u32 config; 220 + u8 cq_bank_id; 220 221 }; 221 222 222 223 struct hns_roce_pd { ··· 496 495 struct hns_roce_hem_table table; 497 496 struct hns_roce_bank bank[HNS_ROCE_CQ_BANK_NUM]; 498 497 struct mutex bank_mutex; 498 + u32 ctx_num[HNS_ROCE_CQ_BANK_NUM]; 499 499 }; 500 500 501 501 struct hns_roce_srq_table { ··· 1307 1305 size_t length, 1308 1306 enum hns_roce_mmap_type mmap_type); 1309 1307 bool check_sl_valid(struct hns_roce_dev *hr_dev, u8 sl); 1308 + void hns_roce_put_cq_bankid_for_uctx(struct hns_roce_ucontext *uctx); 1309 + void hns_roce_get_cq_bankid_for_uctx(struct hns_roce_ucontext *uctx); 1310 1310 1311 1311 #endif /* _HNS_ROCE_DEVICE_H */
+8 -4
drivers/infiniband/hw/hns/hns_roce_hw_v2.c
··· 165 165 hr_reg_write(fseg, FRMR_PBL_BUF_PG_SZ, 166 166 to_hr_hw_page_shift(mr->pbl_mtr.hem_cfg.buf_pg_shift)); 167 167 hr_reg_clear(fseg, FRMR_BLK_MODE); 168 + hr_reg_clear(fseg, FRMR_BLOCK_SIZE); 169 + hr_reg_clear(fseg, FRMR_ZBVA); 168 170 } 169 171 170 172 static void set_atomic_seg(const struct ib_send_wr *wr, ··· 340 338 struct hns_roce_qp *qp = to_hr_qp(ibqp); 341 339 int j = 0; 342 340 int i; 343 - 344 - hr_reg_write(rc_sq_wqe, RC_SEND_WQE_MSG_START_SGE_IDX, 345 - (*sge_ind) & (qp->sge.sge_cnt - 1)); 346 341 347 342 hr_reg_write(rc_sq_wqe, RC_SEND_WQE_INLINE, 348 343 !!(wr->send_flags & IB_SEND_INLINE)); ··· 585 586 hr_reg_write(rc_sq_wqe, RC_SEND_WQE_CQE, 586 587 (wr->send_flags & IB_SEND_SIGNALED) ? 1 : 0); 587 588 589 + hr_reg_write(rc_sq_wqe, RC_SEND_WQE_MSG_START_SGE_IDX, 590 + curr_idx & (qp->sge.sge_cnt - 1)); 591 + 588 592 if (wr->opcode == IB_WR_ATOMIC_CMP_AND_SWP || 589 593 wr->opcode == IB_WR_ATOMIC_FETCH_AND_ADD) { 590 594 if (msg_len != ATOMIC_WR_LEN) ··· 735 733 qp->sq.wrid[wqe_idx] = wr->wr_id; 736 734 owner_bit = 737 735 ~(((qp->sq.head + nreq) >> ilog2(qp->sq.wqe_cnt)) & 0x1); 736 + 737 + /* RC and UD share the same DirectWQE field layout */ 738 + ((struct hns_roce_v2_rc_send_wqe *)wqe)->byte_4 = 0; 738 739 739 740 /* Corresponding to the QP type, wqe process separately */ 740 741 if (ibqp->qp_type == IB_QPT_RC) ··· 7052 7047 dev_err(hr_dev->dev, "RoCE Engine init failed!\n"); 7053 7048 goto error_failed_roce_init; 7054 7049 } 7055 - 7056 7050 7057 7051 handle->priv = hr_dev; 7058 7052
+4
drivers/infiniband/hw/hns/hns_roce_main.c
··· 425 425 if (ret) 426 426 goto error_fail_copy_to_udata; 427 427 428 + hns_roce_get_cq_bankid_for_uctx(context); 429 + 428 430 return 0; 429 431 430 432 error_fail_copy_to_udata: ··· 448 446 { 449 447 struct hns_roce_ucontext *context = to_hr_ucontext(ibcontext); 450 448 struct hns_roce_dev *hr_dev = to_hr_dev(ibcontext->device); 449 + 450 + hns_roce_put_cq_bankid_for_uctx(context); 451 451 452 452 if (hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_CQ_RECORD_DB || 453 453 hr_dev->caps.flags & HNS_ROCE_CAP_FLAG_QP_RECORD_DB)
-2
drivers/infiniband/hw/hns/hns_roce_qp.c
··· 662 662 663 663 hr_qp->sq.wqe_shift = ucmd->log_sq_stride; 664 664 hr_qp->sq.wqe_cnt = cnt; 665 - cap->max_send_sge = hr_qp->sq.max_gs; 666 665 667 666 return 0; 668 667 } ··· 743 744 744 745 /* sync the parameters of kernel QP to user's configuration */ 745 746 cap->max_send_wr = cnt; 746 - cap->max_send_sge = hr_qp->sq.max_gs; 747 747 748 748 return 0; 749 749 }
+1 -1
drivers/infiniband/hw/irdma/pble.c
··· 71 71 static void get_sd_pd_idx(struct irdma_hmc_pble_rsrc *pble_rsrc, 72 72 struct sd_pd_idx *idx) 73 73 { 74 - idx->sd_idx = (u32)pble_rsrc->next_fpm_addr / IRDMA_HMC_DIRECT_BP_SIZE; 74 + idx->sd_idx = pble_rsrc->next_fpm_addr / IRDMA_HMC_DIRECT_BP_SIZE; 75 75 idx->pd_idx = (u32)(pble_rsrc->next_fpm_addr / IRDMA_HMC_PAGED_BP_SIZE); 76 76 idx->rel_pd_idx = (idx->pd_idx % IRDMA_HMC_PD_CNT_IN_SD); 77 77 }
+1 -1
drivers/infiniband/hw/irdma/type.h
··· 706 706 u32 vchnl_ver; 707 707 u16 num_vfs; 708 708 u16 hmc_fn_id; 709 - u8 vf_id; 709 + u16 vf_id; 710 710 bool privileged:1; 711 711 bool vchnl_up:1; 712 712 bool ceq_valid:1;
+1
drivers/infiniband/hw/irdma/verbs.c
··· 2503 2503 spin_lock_init(&iwcq->lock); 2504 2504 INIT_LIST_HEAD(&iwcq->resize_list); 2505 2505 INIT_LIST_HEAD(&iwcq->cmpl_generated); 2506 + iwcq->cq_num = cq_num; 2506 2507 info.dev = dev; 2507 2508 ukinfo->cq_size = max(entries, 4); 2508 2509 ukinfo->cq_id = cq_num;
+1 -1
drivers/infiniband/hw/irdma/verbs.h
··· 140 140 struct irdma_cq { 141 141 struct ib_cq ibcq; 142 142 struct irdma_sc_cq sc_cq; 143 - u16 cq_num; 143 + u32 cq_num; 144 144 bool user_mode; 145 145 atomic_t armed; 146 146 enum irdma_cmpl_notify last_notify;