tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

Merge tag 'arm-fixes-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
"There have not been a lot of fixes for for the soc tree in 6.4, but
these have been sitting here for too long.

For the devicetree side, there is one minor warning fix for vexpress,
the rest all all for the the NXP i.MX platforms: SoC specific bugfixes
for the iMX8 clocks and its USB-3.0 gadget device, as well as board
specific fixes for regulators and the phy on some of the i.MX boards.

The microchip risc-v and arm32 maintainers now also add a shared
maintainer file entry for the arm64 parts.

The remaining fixes are all for firmware drivers, addressing mistakes
in the optee, scmi and ff-a firmware driver implementation, mostly in
the error handling code, incorrect use of the alloc_workqueue()
interface in SCMI, and compatibility with corner cases of the firmware
implementation"

* tag 'arm-fixes-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
MAINTAINERS: update arm64 Microchip entries
arm64: dts: imx8: fix USB 3.0 Gadget Failure in QM & QXPB0 at super speed
dt-binding: cdns,usb3: Fix cdns,on-chip-buff-size type
arm64: dts: colibri-imx8x: delete adc1 and dsp
arm64: dts: colibri-imx8x: fix iris pinctrl configuration
arm64: dts: colibri-imx8x: move pinctrl property from SoM to eval board
arm64: dts: colibri-imx8x: fix eval board pin configuration
arm64: dts: imx8mp: Fix video clock parents
ARM: dts: imx6qdl-mba6: Add missing pvcie-supply regulator
ARM: dts: imx6ull-dhcor: Set and limit the mode for PMIC buck 1, 2 and 3
arm64: dts: imx8mn-var-som: fix PHY detection bug by adding deassert delay
arm64: dts: imx8mn: Fix video clock parents
firmware: arm_ffa: Set reserved/MBZ fields to zero in the memory descriptors
firmware: arm_ffa: Fix FFA device names for logical partitions
firmware: arm_ffa: Fix usage of partition info get count flag
firmware: arm_ffa: Check if ffa_driver remove is present before executing
arm64: dts: arm: add missing cache properties
ARM: dts: vexpress: add missing cache properties
firmware: arm_scmi: Fix incorrect alloc_workqueue() invocation
optee: fix uninited async notif value

Linus Torvalds 18713e8a 96f15fc6

+99 -49
+1 -1
Documentation/devicetree/bindings/usb/cdns,usb3.yaml
··· 64 64 description: 65 65 size of memory intended as internal memory for endpoints 66 66 buffers expressed in KB 67 - $ref: /schemas/types.yaml#/definitions/uint32 67 + $ref: /schemas/types.yaml#/definitions/uint16 68 68 69 69 cdns,phyrst-a-enable: 70 70 description: Enable resetting of PHY if Rx fail is detected
+10 -2
MAINTAINERS
··· 2429 2429 N: at91 2430 2430 N: atmel 2431 2431 2432 + ARM/MICROCHIP (ARM64) SoC support 2433 + M: Conor Dooley <conor@kernel.org> 2434 + M: Nicolas Ferre <nicolas.ferre@microchip.com> 2435 + M: Claudiu Beznea <claudiu.beznea@microchip.com> 2436 + L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 2437 + S: Supported 2438 + T: git https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux.git 2439 + F: arch/arm64/boot/dts/microchip/ 2440 + 2432 2441 ARM/Microchip Sparx5 SoC support 2433 2442 M: Lars Povlsen <lars.povlsen@microchip.com> 2434 2443 M: Steen Hegelund <Steen.Hegelund@microchip.com> ··· 2445 2436 M: UNGLinuxDriver@microchip.com 2446 2437 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 2447 2438 S: Supported 2448 - T: git git://github.com/microchip-ung/linux-upstream.git 2449 - F: arch/arm64/boot/dts/microchip/ 2439 + F: arch/arm64/boot/dts/microchip/sparx* 2450 2440 F: drivers/net/ethernet/microchip/vcap/ 2451 2441 F: drivers/pinctrl/pinctrl-microchip-sgpio.c 2452 2442 N: sparx5
+1
arch/arm/boot/dts/imx6qdl-mba6.dtsi
··· 209 209 pinctrl-names = "default"; 210 210 pinctrl-0 = <&pinctrl_pcie>; 211 211 reset-gpio = <&gpio6 7 GPIO_ACTIVE_LOW>; 212 + vpcie-supply = <&reg_pcie>; 212 213 status = "okay"; 213 214 }; 214 215
+7
arch/arm/boot/dts/imx6ull-dhcor-som.dtsi
··· 8 8 #include <dt-bindings/input/input.h> 9 9 #include <dt-bindings/leds/common.h> 10 10 #include <dt-bindings/pwm/pwm.h> 11 + #include <dt-bindings/regulator/dlg,da9063-regulator.h> 11 12 #include "imx6ull.dtsi" 12 13 13 14 / { ··· 85 84 86 85 regulators { 87 86 vdd_soc_in_1v4: buck1 { 87 + regulator-allowed-modes = <DA9063_BUCK_MODE_SLEEP>; /* PFM */ 88 88 regulator-always-on; 89 89 regulator-boot-on; 90 + regulator-initial-mode = <DA9063_BUCK_MODE_SLEEP>; 90 91 regulator-max-microvolt = <1400000>; 91 92 regulator-min-microvolt = <1400000>; 92 93 regulator-name = "vdd_soc_in_1v4"; 93 94 }; 94 95 95 96 vcc_3v3: buck2 { 97 + regulator-allowed-modes = <DA9063_BUCK_MODE_SYNC>; /* PWM */ 96 98 regulator-always-on; 97 99 regulator-boot-on; 100 + regulator-initial-mode = <DA9063_BUCK_MODE_SYNC>; 98 101 regulator-max-microvolt = <3300000>; 99 102 regulator-min-microvolt = <3300000>; 100 103 regulator-name = "vcc_3v3"; ··· 111 106 * the voltage is set to 1.5V. 112 107 */ 113 108 vcc_ddr_1v35: buck3 { 109 + regulator-allowed-modes = <DA9063_BUCK_MODE_SYNC>; /* PWM */ 114 110 regulator-always-on; 115 111 regulator-boot-on; 112 + regulator-initial-mode = <DA9063_BUCK_MODE_SYNC>; 116 113 regulator-max-microvolt = <1500000>; 117 114 regulator-min-microvolt = <1500000>; 118 115 regulator-name = "vcc_ddr_1v35";
+1
arch/arm/boot/dts/vexpress-v2p-ca5s.dts
··· 132 132 reg = <0x2c0f0000 0x1000>; 133 133 interrupts = <0 84 4>; 134 134 cache-level = <2>; 135 + cache-unified; 135 136 }; 136 137 137 138 pmu {
+1
arch/arm64/boot/dts/arm/foundation-v8.dtsi
··· 59 59 L2_0: l2-cache0 { 60 60 compatible = "cache"; 61 61 cache-level = <2>; 62 + cache-unified; 62 63 }; 63 64 }; 64 65
+1
arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
··· 72 72 L2_0: l2-cache0 { 73 73 compatible = "cache"; 74 74 cache-level = <2>; 75 + cache-unified; 75 76 }; 76 77 }; 77 78
+1
arch/arm64/boot/dts/arm/vexpress-v2f-1xv7-ca53x2.dts
··· 58 58 L2_0: l2-cache0 { 59 59 compatible = "cache"; 60 60 cache-level = <2>; 61 + cache-unified; 61 62 }; 62 63 }; 63 64
+1
arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
··· 171 171 interrupt-names = "host", "peripheral", "otg", "wakeup"; 172 172 phys = <&usb3_phy>; 173 173 phy-names = "cdns3,usb3-phy"; 174 + cdns,on-chip-buff-size = /bits/ 16 <18>; 174 175 status = "disabled"; 175 176 }; 176 177 };
+7 -1
arch/arm64/boot/dts/freescale/imx8mn-var-som.dtsi
··· 98 98 #address-cells = <1>; 99 99 #size-cells = <0>; 100 100 101 - ethphy: ethernet-phy@4 { 101 + ethphy: ethernet-phy@4 { /* AR8033 or ADIN1300 */ 102 102 compatible = "ethernet-phy-ieee802.3-c22"; 103 103 reg = <4>; 104 104 reset-gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; 105 105 reset-assert-us = <10000>; 106 + /* 107 + * Deassert delay: 108 + * ADIN1300 requires 5ms. 109 + * AR8033 requires 1ms. 110 + */ 111 + reset-deassert-us = <20000>; 106 112 }; 107 113 }; 108 114 };
+15 -13
arch/arm64/boot/dts/freescale/imx8mn.dtsi
··· 1069 1069 <&clk IMX8MN_CLK_DISP_APB_ROOT>, 1070 1070 <&clk IMX8MN_CLK_DISP_AXI_ROOT>; 1071 1071 clock-names = "pix", "axi", "disp_axi"; 1072 - assigned-clocks = <&clk IMX8MN_CLK_DISP_PIXEL_ROOT>, 1073 - <&clk IMX8MN_CLK_DISP_AXI>, 1074 - <&clk IMX8MN_CLK_DISP_APB>; 1075 - assigned-clock-parents = <&clk IMX8MN_CLK_DISP_PIXEL>, 1076 - <&clk IMX8MN_SYS_PLL2_1000M>, 1077 - <&clk IMX8MN_SYS_PLL1_800M>; 1078 - assigned-clock-rates = <594000000>, <500000000>, <200000000>; 1079 1072 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 1080 1073 power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_LCDIF>; 1081 1074 status = "disabled"; ··· 1086 1093 clocks = <&clk IMX8MN_CLK_DSI_CORE>, 1087 1094 <&clk IMX8MN_CLK_DSI_PHY_REF>; 1088 1095 clock-names = "bus_clk", "sclk_mipi"; 1089 - assigned-clocks = <&clk IMX8MN_CLK_DSI_CORE>, 1090 - <&clk IMX8MN_CLK_DSI_PHY_REF>; 1091 - assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_266M>, 1092 - <&clk IMX8MN_CLK_24M>; 1093 - assigned-clock-rates = <266000000>, <24000000>; 1094 - samsung,pll-clock-frequency = <24000000>; 1095 1096 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>; 1096 1097 power-domains = <&disp_blk_ctrl IMX8MN_DISPBLK_PD_MIPI_DSI>; 1097 1098 status = "disabled"; ··· 1129 1142 "lcdif-axi", "lcdif-apb", "lcdif-pix", 1130 1143 "dsi-pclk", "dsi-ref", 1131 1144 "csi-aclk", "csi-pclk"; 1145 + assigned-clocks = <&clk IMX8MN_CLK_DSI_CORE>, 1146 + <&clk IMX8MN_CLK_DSI_PHY_REF>, 1147 + <&clk IMX8MN_CLK_DISP_PIXEL>, 1148 + <&clk IMX8MN_CLK_DISP_AXI>, 1149 + <&clk IMX8MN_CLK_DISP_APB>; 1150 + assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_266M>, 1151 + <&clk IMX8MN_CLK_24M>, 1152 + <&clk IMX8MN_VIDEO_PLL1_OUT>, 1153 + <&clk IMX8MN_SYS_PLL2_1000M>, 1154 + <&clk IMX8MN_SYS_PLL1_800M>; 1155 + assigned-clock-rates = <266000000>, 1156 + <24000000>, 1157 + <594000000>, 1158 + <500000000>, 1159 + <200000000>; 1132 1160 #power-domain-cells = <1>; 1133 1161 }; 1134 1162
+9 -16
arch/arm64/boot/dts/freescale/imx8mp.dtsi
··· 1211 1211 <&clk IMX8MP_CLK_MEDIA_APB_ROOT>, 1212 1212 <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>; 1213 1213 clock-names = "pix", "axi", "disp_axi"; 1214 - assigned-clocks = <&clk IMX8MP_CLK_MEDIA_DISP1_PIX_ROOT>, 1215 - <&clk IMX8MP_CLK_MEDIA_AXI>, 1216 - <&clk IMX8MP_CLK_MEDIA_APB>; 1217 - assigned-clock-parents = <&clk IMX8MP_CLK_MEDIA_DISP1_PIX>, 1218 - <&clk IMX8MP_SYS_PLL2_1000M>, 1219 - <&clk IMX8MP_SYS_PLL1_800M>; 1220 - assigned-clock-rates = <594000000>, <500000000>, <200000000>; 1221 1214 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 1222 1215 power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_LCDIF_1>; 1223 1216 status = "disabled"; ··· 1230 1237 <&clk IMX8MP_CLK_MEDIA_APB_ROOT>, 1231 1238 <&clk IMX8MP_CLK_MEDIA_AXI_ROOT>; 1232 1239 clock-names = "pix", "axi", "disp_axi"; 1233 - assigned-clocks = <&clk IMX8MP_CLK_MEDIA_DISP2_PIX>, 1234 - <&clk IMX8MP_VIDEO_PLL1>; 1235 - assigned-clock-parents = <&clk IMX8MP_VIDEO_PLL1_OUT>, 1236 - <&clk IMX8MP_VIDEO_PLL1_REF_SEL>; 1237 - assigned-clock-rates = <0>, <1039500000>; 1238 1240 power-domains = <&media_blk_ctrl IMX8MP_MEDIABLK_PD_LCDIF_2>; 1239 1241 status = "disabled"; 1240 1242 ··· 1284 1296 "disp1", "disp2", "isp", "phy"; 1285 1297 1286 1298 assigned-clocks = <&clk IMX8MP_CLK_MEDIA_AXI>, 1287 - <&clk IMX8MP_CLK_MEDIA_APB>; 1299 + <&clk IMX8MP_CLK_MEDIA_APB>, 1300 + <&clk IMX8MP_CLK_MEDIA_DISP1_PIX>, 1301 + <&clk IMX8MP_CLK_MEDIA_DISP2_PIX>, 1302 + <&clk IMX8MP_VIDEO_PLL1>; 1288 1303 assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_1000M>, 1289 - <&clk IMX8MP_SYS_PLL1_800M>; 1290 - assigned-clock-rates = <500000000>, <200000000>; 1291 - 1304 + <&clk IMX8MP_SYS_PLL1_800M>, 1305 + <&clk IMX8MP_VIDEO_PLL1_OUT>, 1306 + <&clk IMX8MP_VIDEO_PLL1_OUT>; 1307 + assigned-clock-rates = <500000000>, <200000000>, 1308 + <0>, <0>, <1039500000>; 1292 1309 #power-domain-cells = <1>; 1293 1310 1294 1311 lvds_bridge: bridge@5c {
+6
arch/arm64/boot/dts/freescale/imx8x-colibri-eval-v3.dtsi
··· 33 33 }; 34 34 }; 35 35 36 + &iomuxc { 37 + pinctrl-names = "default"; 38 + pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>, 39 + <&pinctrl_lpspi2_cs2>; 40 + }; 41 + 36 42 /* Colibri SPI */ 37 43 &lpspi2 { 38 44 status = "okay";
+1 -2
arch/arm64/boot/dts/freescale/imx8x-colibri-iris.dtsi
··· 48 48 <IMX8QXP_SAI0_TXFS_LSIO_GPIO0_IO28 0x20>, /* SODIMM 101 */ 49 49 <IMX8QXP_SAI0_RXD_LSIO_GPIO0_IO27 0x20>, /* SODIMM 97 */ 50 50 <IMX8QXP_ENET0_RGMII_RXC_LSIO_GPIO5_IO03 0x06000020>, /* SODIMM 85 */ 51 - <IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26 0x20>, /* SODIMM 79 */ 52 - <IMX8QXP_QSPI0A_DATA1_LSIO_GPIO3_IO10 0x06700041>; /* SODIMM 45 */ 51 + <IMX8QXP_SAI0_TXC_LSIO_GPIO0_IO26 0x20>; /* SODIMM 79 */ 53 52 }; 54 53 55 54 pinctrl_uart1_forceoff: uart1forceoffgrp {
+8 -6
arch/arm64/boot/dts/freescale/imx8x-colibri.dtsi
··· 363 363 /* TODO VPU Encoder/Decoder */ 364 364 365 365 &iomuxc { 366 - pinctrl-names = "default"; 367 - pinctrl-0 = <&pinctrl_ext_io0>, <&pinctrl_hog0>, <&pinctrl_hog1>, 368 - <&pinctrl_hog2>, <&pinctrl_lpspi2_cs2>; 369 - 370 366 /* On-module touch pen-down interrupt */ 371 367 pinctrl_ad7879_int: ad7879intgrp { 372 368 fsl,pins = <IMX8QXP_MIPI_CSI0_I2C0_SCL_LSIO_GPIO3_IO05 0x21>; ··· 495 499 }; 496 500 497 501 pinctrl_hog1: hog1grp { 498 - fsl,pins = <IMX8QXP_CSI_MCLK_LSIO_GPIO3_IO01 0x20>, /* SODIMM 75 */ 499 - <IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16 0x20>; /* SODIMM 93 */ 502 + fsl,pins = <IMX8QXP_QSPI0A_SCLK_LSIO_GPIO3_IO16 0x20>; /* SODIMM 93 */ 500 503 }; 501 504 502 505 pinctrl_hog2: hog2grp { ··· 769 774 fsl,pins = <IMX8QXP_SCU_BOOT_MODE3_SCU_DSC_RTC_CLOCK_OUTPUT_32K 0x20>; 770 775 }; 771 776 }; 777 + 778 + /* Delete peripherals which are not present on SOC, but are defined in imx8-ss-*.dtsi */ 779 + 780 + /delete-node/ &adc1; 781 + /delete-node/ &adc1_lpcg; 782 + /delete-node/ &dsp; 783 + /delete-node/ &dsp_lpcg;
+16 -5
drivers/firmware/arm_ffa/bus.c
··· 15 15 16 16 #include "common.h" 17 17 18 + static DEFINE_IDA(ffa_bus_id); 19 + 18 20 static int ffa_device_match(struct device *dev, struct device_driver *drv) 19 21 { 20 22 const struct ffa_device_id *id_table; ··· 55 53 { 56 54 struct ffa_driver *ffa_drv = to_ffa_driver(dev->driver); 57 55 58 - ffa_drv->remove(to_ffa_dev(dev)); 56 + if (ffa_drv->remove) 57 + ffa_drv->remove(to_ffa_dev(dev)); 59 58 } 60 59 61 60 static int ffa_device_uevent(const struct device *dev, struct kobj_uevent_env *env) ··· 133 130 { 134 131 struct ffa_device *ffa_dev = to_ffa_dev(dev); 135 132 133 + ida_free(&ffa_bus_id, ffa_dev->id); 136 134 kfree(ffa_dev); 137 135 } 138 136 ··· 174 170 struct ffa_device *ffa_device_register(const uuid_t *uuid, int vm_id, 175 171 const struct ffa_ops *ops) 176 172 { 177 - int ret; 173 + int id, ret; 178 174 struct device *dev; 179 175 struct ffa_device *ffa_dev; 180 176 181 - ffa_dev = kzalloc(sizeof(*ffa_dev), GFP_KERNEL); 182 - if (!ffa_dev) 177 + id = ida_alloc_min(&ffa_bus_id, 1, GFP_KERNEL); 178 + if (id < 0) 183 179 return NULL; 180 + 181 + ffa_dev = kzalloc(sizeof(*ffa_dev), GFP_KERNEL); 182 + if (!ffa_dev) { 183 + ida_free(&ffa_bus_id, id); 184 + return NULL; 185 + } 184 186 185 187 dev = &ffa_dev->dev; 186 188 dev->bus = &ffa_bus_type; 187 189 dev->release = ffa_release_device; 188 - dev_set_name(&ffa_dev->dev, "arm-ffa-%04x", vm_id); 190 + dev_set_name(&ffa_dev->dev, "arm-ffa-%d", id); 189 191 190 192 ffa_dev->vm_id = vm_id; 191 193 ffa_dev->ops = ops; ··· 227 217 { 228 218 ffa_devices_unregister(); 229 219 bus_unregister(&ffa_bus_type); 220 + ida_destroy(&ffa_bus_id); 230 221 }
+8 -1
drivers/firmware/arm_ffa/driver.c
··· 193 193 int idx, count, flags = 0, sz, buf_sz; 194 194 ffa_value_t partition_info; 195 195 196 - if (!buffer || !num_partitions) /* Just get the count for now */ 196 + if (drv_info->version > FFA_VERSION_1_0 && 197 + (!buffer || !num_partitions)) /* Just get the count for now */ 197 198 flags = PARTITION_INFO_GET_RETURN_COUNT_ONLY; 198 199 199 200 mutex_lock(&drv_info->rx_lock); ··· 421 420 ep_mem_access->receiver = args->attrs[idx].receiver; 422 421 ep_mem_access->attrs = args->attrs[idx].attrs; 423 422 ep_mem_access->composite_off = COMPOSITE_OFFSET(args->nattrs); 423 + ep_mem_access->flag = 0; 424 + ep_mem_access->reserved = 0; 424 425 } 426 + mem_region->reserved_0 = 0; 427 + mem_region->reserved_1 = 0; 425 428 mem_region->ep_count = args->nattrs; 426 429 427 430 composite = buffer + COMPOSITE_OFFSET(args->nattrs); 428 431 composite->total_pg_cnt = ffa_get_num_pages_sg(args->sg); 429 432 composite->addr_range_cnt = num_entries; 433 + composite->reserved = 0; 430 434 431 435 length = COMPOSITE_CONSTITUENTS_OFFSET(args->nattrs, num_entries); 432 436 frag_len = COMPOSITE_CONSTITUENTS_OFFSET(args->nattrs, 0); ··· 466 460 467 461 constituents->address = sg_phys(args->sg); 468 462 constituents->pg_cnt = args->sg->length / FFA_PAGE_SIZE; 463 + constituents->reserved = 0; 469 464 constituents++; 470 465 frag_len += sizeof(struct ffa_mem_region_addr_range); 471 466 } while ((args->sg = sg_next(args->sg)));
+1 -1
drivers/firmware/arm_scmi/raw_mode.c
··· 1066 1066 1067 1067 raw->wait_wq = alloc_workqueue("scmi-raw-wait-wq-%d", 1068 1068 WQ_UNBOUND | WQ_FREEZABLE | 1069 - WQ_HIGHPRI, WQ_SYSFS, raw->id); 1069 + WQ_HIGHPRI | WQ_SYSFS, 0, raw->id); 1070 1070 if (!raw->wait_wq) 1071 1071 return -ENOMEM; 1072 1072
+3 -1
drivers/tee/optee/smc_abi.c
··· 1004 1004 1005 1005 invoke_fn(OPTEE_SMC_GET_ASYNC_NOTIF_VALUE, 0, 0, 0, 0, 0, 0, 0, &res); 1006 1006 1007 - if (res.a0) 1007 + if (res.a0) { 1008 + *value_valid = false; 1008 1009 return 0; 1010 + } 1009 1011 *value_valid = (res.a2 & OPTEE_SMC_ASYNC_NOTIF_VALUE_VALID); 1010 1012 *value_pending = (res.a2 & OPTEE_SMC_ASYNC_NOTIF_VALUE_PENDING); 1011 1013 return res.a1;
+1
include/linux/arm_ffa.h
··· 96 96 97 97 /* FFA Bus/Device/Driver related */ 98 98 struct ffa_device { 99 + u32 id; 99 100 int vm_id; 100 101 bool mode_32bit; 101 102 uuid_t uuid;