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Merge tag 'for-3.7' of git://openrisc.net/jonas/linux

Pull OpenRISC updates from Jonas Bonn:
"Fixups for some corner cases, build issues, and some obvious bugs in
IRQ handling. No major changes."

* tag 'for-3.7' of git://openrisc.net/jonas/linux:
openrisc: mask interrupts in irq_mask_ack function
openrisc: fix typos in comments and warnings
openrisc: PIC should act on domain-local irqs
openrisc: Make cpu_relax() invoke barrier()
audit: define AUDIT_ARCH_OPENRISC
openrisc: delay: fix handling of counter overflow
openrisc: delay: fix loops calculation for __const_udelay

+17 -14
+1 -1
arch/openrisc/include/asm/processor.h
··· 103 103 104 104 #define init_stack (init_thread_union.stack) 105 105 106 - #define cpu_relax() do { } while (0) 106 + #define cpu_relax() barrier() 107 107 108 108 #endif /* __ASSEMBLY__ */ 109 109 #endif /* __ASM_OPENRISC_PROCESSOR_H */
+11 -9
arch/openrisc/kernel/irq.c
··· 46 46 47 47 static void or1k_pic_mask(struct irq_data *data) 48 48 { 49 - mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->irq)); 49 + mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->hwirq)); 50 50 } 51 51 52 52 static void or1k_pic_unmask(struct irq_data *data) 53 53 { 54 - mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (1UL << data->irq)); 54 + mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (1UL << data->hwirq)); 55 55 } 56 56 57 57 static void or1k_pic_ack(struct irq_data *data) 58 58 { 59 59 /* EDGE-triggered interrupts need to be ack'ed in order to clear 60 60 * the latch. 61 - * LEVER-triggered interrupts do not need to be ack'ed; however, 61 + * LEVEL-triggered interrupts do not need to be ack'ed; however, 62 62 * ack'ing the interrupt has no ill-effect and is quicker than 63 63 * trying to figure out what type it is... 64 64 */ ··· 75 75 * as opposed to a 1 as mandated by the spec 76 76 */ 77 77 78 - mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->irq)); 78 + mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->hwirq)); 79 79 #else 80 - WARN(1, "Interrupt handling possibily broken\n"); 81 - mtspr(SPR_PICSR, (1UL << irq)); 80 + WARN(1, "Interrupt handling possibly broken\n"); 81 + mtspr(SPR_PICSR, (1UL << data->hwirq)); 82 82 #endif 83 83 } 84 84 ··· 87 87 /* Comments for pic_ack apply here, too */ 88 88 89 89 #ifdef CONFIG_OR1K_1200 90 - mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->irq)); 90 + mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->hwirq)); 91 + mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->hwirq)); 91 92 #else 92 - WARN(1, "Interrupt handling possibily broken\n"); 93 - mtspr(SPR_PICSR, (1UL << irq)); 93 + WARN(1, "Interrupt handling possibly broken\n"); 94 + mtspr(SPR_PICMR, (1UL << data->hwirq)); 95 + mtspr(SPR_PICSR, (1UL << data->hwirq)); 94 96 #endif 95 97 } 96 98
+1 -1
arch/openrisc/kernel/ptrace.c
··· 187 187 */ 188 188 ret = -1L; 189 189 190 - audit_syscall_entry(audit_arch(), regs->gpr[11], 190 + audit_syscall_entry(AUDIT_ARCH_OPENRISC, regs->gpr[11], 191 191 regs->gpr[3], regs->gpr[4], 192 192 regs->gpr[5], regs->gpr[6]); 193 193
+3 -3
arch/openrisc/lib/delay.c
··· 30 30 31 31 void __delay(unsigned long cycles) 32 32 { 33 - cycles_t target = get_cycles() + cycles; 33 + cycles_t start = get_cycles(); 34 34 35 - while (get_cycles() < target) 35 + while ((get_cycles() - start) < cycles) 36 36 cpu_relax(); 37 37 } 38 38 EXPORT_SYMBOL(__delay); ··· 41 41 { 42 42 unsigned long long loops; 43 43 44 - loops = xloops * loops_per_jiffy * HZ; 44 + loops = (unsigned long long)xloops * loops_per_jiffy * HZ; 45 45 46 46 __delay(loops >> 32); 47 47 }
+1
include/linux/audit.h
··· 337 337 #define AUDIT_ARCH_MIPSEL (EM_MIPS|__AUDIT_ARCH_LE) 338 338 #define AUDIT_ARCH_MIPS64 (EM_MIPS|__AUDIT_ARCH_64BIT) 339 339 #define AUDIT_ARCH_MIPSEL64 (EM_MIPS|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE) 340 + #define AUDIT_ARCH_OPENRISC (EM_OPENRISC) 340 341 #define AUDIT_ARCH_PARISC (EM_PARISC) 341 342 #define AUDIT_ARCH_PARISC64 (EM_PARISC|__AUDIT_ARCH_64BIT) 342 343 #define AUDIT_ARCH_PPC (EM_PPC)