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drm/xe/svm: Support DRM_XE_SVM_MEM_RANGE_ATTR_PAT memory attribute

This attributes sets the pat_index for the svm used vma range, which is
utilized to ascertain the coherence.

v2 (Matthew Brost)
- Pat index sanity check

Cc: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
Link: https://lore.kernel.org/r/20250821173104.3030148-12-himal.prasad.ghimiray@intel.com
Signed-off-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>

+22 -2
+22 -2
drivers/gpu/drm/xe/xe_vm_madvise.c
··· 9 9 #include <drm/xe_drm.h> 10 10 11 11 #include "xe_bo.h" 12 + #include "xe_pat.h" 12 13 #include "xe_pt.h" 13 14 #include "xe_svm.h" 14 15 ··· 122 121 struct xe_vma **vmas, int num_vmas, 123 122 struct drm_xe_madvise *op) 124 123 { 125 - /* Implementation pending */ 124 + int i; 125 + 126 + xe_assert(vm->xe, op->type == DRM_XE_MEM_RANGE_ATTR_PAT); 127 + 128 + for (i = 0; i < num_vmas; i++) 129 + vmas[i]->attr.pat_index = op->pat_index.val; 126 130 } 127 131 128 132 typedef void (*madvise_func)(struct xe_device *xe, struct xe_vm *vm, ··· 235 229 236 230 break; 237 231 case DRM_XE_MEM_RANGE_ATTR_PAT: 238 - /*TODO: Add valid pat check */ 232 + { 233 + u16 coh_mode = xe_pat_index_get_coh_mode(xe, args->pat_index.val); 234 + 235 + if (XE_IOCTL_DBG(xe, !coh_mode)) 236 + return false; 237 + 238 + if (XE_WARN_ON(coh_mode > XE_COH_AT_LEAST_1WAY)) 239 + return false; 240 + 241 + if (XE_IOCTL_DBG(xe, args->pat_index.pad)) 242 + return false; 243 + 244 + if (XE_IOCTL_DBG(xe, args->pat_index.reserved)) 245 + return false; 239 246 break; 247 + } 240 248 default: 241 249 if (XE_IOCTL_DBG(xe, 1)) 242 250 return false;