clk: qcom: gcc-glymur: Update the halt check flags for pipe clocks

The pipe clocks for PCIE and USB are externally sourced and they should
not be polled by the clock driver. Update the halt_check flags to 'SKIP'
to disable polling for these clocks.

This helps avoid the clock status stuck at 'off' warnings, which are
benign, since all consumers of the PHYs must initialize a given instance
before performing any operations.

Fixes: efe504300a17 ("clk: qcom: gcc: Add support for Global Clock Controller")
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Reviewed-by: Imran Shaik <imran.shaik@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250925-glymur_gcc_usb_fixes-v2-1-ee4619571efe@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

authored by

Taniya Das and committed by

Bjorn Andersson 7 months ago 18da820e 393f7834

+12 -12

1 changed file

expand all

drivers

clk

qcom

gcc-glymur.c

+12 -12

drivers/clk/qcom/gcc-glymur.c

··· 6760 6760 6761 6761 static struct clk_branch gcc_usb3_prim_phy_pipe_clk = { 6762 6762 .halt_reg = 0x3f088, 6763 - .halt_check = BRANCH_HALT_DELAY, 6763 + .halt_check = BRANCH_HALT_SKIP, 6764 6764 .hwcg_reg = 0x3f088, 6765 6765 .hwcg_bit = 1, 6766 6766 .clkr = { ··· 6816 6816 6817 6817 static struct clk_branch gcc_usb3_sec_phy_pipe_clk = { 6818 6818 .halt_reg = 0xe2078, 6819 - .halt_check = BRANCH_HALT_VOTED, 6819 + .halt_check = BRANCH_HALT_SKIP, 6820 6820 .hwcg_reg = 0xe2078, 6821 6821 .hwcg_bit = 1, 6822 6822 .clkr = { ··· 6872 6872 6873 6873 static struct clk_branch gcc_usb3_tert_phy_pipe_clk = { 6874 6874 .halt_reg = 0xe1078, 6875 - .halt_check = BRANCH_HALT_VOTED, 6875 + .halt_check = BRANCH_HALT_SKIP, 6876 6876 .hwcg_reg = 0xe1078, 6877 6877 .hwcg_bit = 1, 6878 6878 .clkr = { ··· 6961 6961 6962 6962 static struct clk_branch gcc_usb4_0_phy_p2rr2p_pipe_clk = { 6963 6963 .halt_reg = 0x2b0f4, 6964 - .halt_check = BRANCH_HALT, 6964 + .halt_check = BRANCH_HALT_SKIP, 6965 6965 .clkr = { 6966 6966 .enable_reg = 0x2b0f4, 6967 6967 .enable_mask = BIT(0), ··· 6979 6979 6980 6980 static struct clk_branch gcc_usb4_0_phy_pcie_pipe_clk = { 6981 6981 .halt_reg = 0x2b04c, 6982 - .halt_check = BRANCH_HALT_VOTED, 6982 + .halt_check = BRANCH_HALT_SKIP, 6983 6983 .clkr = { 6984 6984 .enable_reg = 0x62010, 6985 6985 .enable_mask = BIT(11), ··· 7033 7033 7034 7034 static struct clk_branch gcc_usb4_0_phy_usb_pipe_clk = { 7035 7035 .halt_reg = 0x2b0bc, 7036 - .halt_check = BRANCH_HALT_VOTED, 7036 + .halt_check = BRANCH_HALT_SKIP, 7037 7037 .hwcg_reg = 0x2b0bc, 7038 7038 .hwcg_bit = 1, 7039 7039 .clkr = { ··· 7196 7196 7197 7197 static struct clk_branch gcc_usb4_1_phy_p2rr2p_pipe_clk = { 7198 7198 .halt_reg = 0x2d118, 7199 - .halt_check = BRANCH_HALT, 7199 + .halt_check = BRANCH_HALT_SKIP, 7200 7200 .clkr = { 7201 7201 .enable_reg = 0x2d118, 7202 7202 .enable_mask = BIT(0), ··· 7214 7214 7215 7215 static struct clk_branch gcc_usb4_1_phy_pcie_pipe_clk = { 7216 7216 .halt_reg = 0x2d04c, 7217 - .halt_check = BRANCH_HALT_VOTED, 7217 + .halt_check = BRANCH_HALT_SKIP, 7218 7218 .clkr = { 7219 7219 .enable_reg = 0x62010, 7220 7220 .enable_mask = BIT(12), ··· 7268 7268 7269 7269 static struct clk_branch gcc_usb4_1_phy_usb_pipe_clk = { 7270 7270 .halt_reg = 0x2d0e0, 7271 - .halt_check = BRANCH_HALT_VOTED, 7271 + .halt_check = BRANCH_HALT_SKIP, 7272 7272 .hwcg_reg = 0x2d0e0, 7273 7273 .hwcg_bit = 1, 7274 7274 .clkr = { ··· 7431 7431 7432 7432 static struct clk_branch gcc_usb4_2_phy_p2rr2p_pipe_clk = { 7433 7433 .halt_reg = 0xe00f8, 7434 - .halt_check = BRANCH_HALT, 7434 + .halt_check = BRANCH_HALT_SKIP, 7435 7435 .clkr = { 7436 7436 .enable_reg = 0xe00f8, 7437 7437 .enable_mask = BIT(0), ··· 7449 7449 7450 7450 static struct clk_branch gcc_usb4_2_phy_pcie_pipe_clk = { 7451 7451 .halt_reg = 0xe004c, 7452 - .halt_check = BRANCH_HALT_VOTED, 7452 + .halt_check = BRANCH_HALT_SKIP, 7453 7453 .clkr = { 7454 7454 .enable_reg = 0x62010, 7455 7455 .enable_mask = BIT(13), ··· 7503 7503 7504 7504 static struct clk_branch gcc_usb4_2_phy_usb_pipe_clk = { 7505 7505 .halt_reg = 0xe00c0, 7506 - .halt_check = BRANCH_HALT_VOTED, 7506 + .halt_check = BRANCH_HALT_SKIP, 7507 7507 .hwcg_reg = 0xe00c0, 7508 7508 .hwcg_bit = 1, 7509 7509 .clkr = {

Configure Feed

Configure Feed