misc: amd-sbi: Extend support for MCAMSR protocol for rev 0x21

- MCAMSR protocol for revision 0x21 is updated to include the
extended thread supported by the platform.
- This modifies the existing protocol to include additional byte
to provide high thread number.
- New input structure is defined to address this, as the hardware
protocol is tightly coupled with the input structure length

Reviewed-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com>
Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
Link: https://patch.msgid.link/20250915103649.1705078-6-akshay.gupta@amd.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Akshay Gupta and committed by

Greg Kroah-Hartman 8 months ago 18e4a029 87816eb4

+69 -23

1 changed file

expand all

drivers

misc

amd-sbi

rmi-core.c

+69 -23

drivers/misc/amd-sbi/rmi-core.c

··· 35 35 /* MSR */ 36 36 #define MSR_RD_REG_LEN 0xa 37 37 #define MSR_WR_REG_LEN 0x8 38 + #define MSR_WR_REG_LEN_EXT 0x9 38 39 #define MSR_RD_DATA_LEN 0x8 39 40 #define MSR_WR_DATA_LEN 0x7 41 + #define MSR_WR_DATA_LEN_EXT 0x8 40 42 41 43 /* CPUID MSR Command Ids */ 42 44 #define CPUID_MCA_CMD 0x73 ··· 119 117 input->wr_len = MSR_WR_DATA_LEN; 120 118 input->proto_cmd = RD_MCA_CMD; 121 119 input->thread = thread_id << 1; 120 + input->value = data_in; 121 + } 122 + 123 + static inline void prepare_mca_msr_input_message_ext(struct cpu_msr_indata_ext *input, 124 + u16 thread_id, u32 data_in) 125 + { 126 + input->rd_len = MSR_RD_DATA_LEN; 127 + input->wr_len = MSR_WR_DATA_LEN_EXT; 128 + input->proto_cmd = RD_MCA_CMD; 129 + input->thread_lo = (thread_id & 0xFF) << 1; 130 + input->thread_hi = thread_id >> 8; 122 131 input->value = data_in; 123 132 } 124 133 ··· 261 248 return ret; 262 249 } 263 250 251 + static int rmi_mcamsr_input(struct sbrmi_data *data, struct apml_mcamsr_msg *msg, 252 + u16 thread) 253 + { 254 + struct cpu_msr_indata input = {0}; 255 + int val = 0, ret; 256 + 257 + /* Thread > 127, Thread128 CS register, 1'b1 needs to be set to 1 */ 258 + if (thread > 127) { 259 + thread -= 128; 260 + val = 1; 261 + } 262 + 263 + ret = regmap_write(data->regmap, SBRMI_THREAD128CS, val); 264 + if (ret < 0) 265 + return ret; 266 + 267 + prepare_mca_msr_input_message(&input, thread, 268 + msg->mcamsr_in_out & CPUID_MCA_FUNC_MASK); 269 + 270 + return regmap_bulk_write(data->regmap, CPUID_MCA_CMD, 271 + &input, MSR_WR_REG_LEN); 272 + } 273 + 274 + static int rmi_mcamsr_input_ext(struct sbrmi_data *data, struct apml_mcamsr_msg *msg, 275 + u16 thread) 276 + { 277 + struct cpu_msr_indata_ext input = {0}; 278 + 279 + prepare_mca_msr_input_message_ext(&input, thread, 280 + msg->mcamsr_in_out & CPUID_MCA_FUNC_MASK); 281 + 282 + return regmap_bulk_write(data->regmap, CPUID_MCA_CMD, 283 + &input, MSR_WR_REG_LEN_EXT); 284 + } 285 + 264 286 /* MCA MSR protocol */ 265 287 static int rmi_mca_msr_read(struct sbrmi_data *data, 266 288 struct apml_mcamsr_msg *msg) 267 289 { 268 290 struct cpu_msr_outdata output = {0}; 269 - struct cpu_msr_indata input = {0}; 270 - int ret, val = 0; 291 + int ret; 271 292 int hw_status; 272 293 u16 thread; 273 294 ··· 312 265 if (ret < 0) 313 266 goto exit_unlock; 314 267 } 315 - /* MCA MSR protocol for REV 0x20 is supported*/ 316 - if (data->rev != 0x20) { 268 + 269 + /* Extract thread from the input msg structure */ 270 + thread = msg->mcamsr_in_out >> CPUID_MCA_THRD_INDEX; 271 + 272 + switch (data->rev) { 273 + case 0x10: 274 + /* MCAMSR protocol for REV 0x10 is not supported*/ 275 + ret = -EOPNOTSUPP; 276 + goto exit_unlock; 277 + case 0x20: 278 + ret = rmi_mcamsr_input(data, msg, thread); 279 + if (ret) 280 + goto exit_unlock; 281 + break; 282 + case 0x21: 283 + ret = rmi_mcamsr_input_ext(data, msg, thread); 284 + if (ret) 285 + goto exit_unlock; 286 + break; 287 + default: 317 288 ret = -EOPNOTSUPP; 318 289 goto exit_unlock; 319 290 } 320 - 321 - thread = msg->mcamsr_in_out >> CPUID_MCA_THRD_INDEX; 322 - 323 - /* Thread > 127, Thread128 CS register, 1'b1 needs to be set to 1 */ 324 - if (thread > 127) { 325 - thread -= 128; 326 - val = 1; 327 - } 328 - ret = regmap_write(data->regmap, SBRMI_THREAD128CS, val); 329 - if (ret < 0) 330 - goto exit_unlock; 331 - 332 - prepare_mca_msr_input_message(&input, thread, 333 - msg->mcamsr_in_out & CPUID_MCA_FUNC_MASK); 334 - 335 - ret = regmap_bulk_write(data->regmap, CPUID_MCA_CMD, 336 - &input, MSR_WR_REG_LEN); 337 - if (ret < 0) 338 - goto exit_unlock; 339 291 340 292 /* 341 293 * For RMI Rev 0x20, new h/w status bit is introduced. which is used

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