tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

mtd: spinand: gigadevice: add support for GD5F{2, 4}GQ5xExxG

Add support for:
GD5F2GQ5{U,R}ExxG
GD5F4GQ6{U,R}ExxG

These chips uses 4 dummy bytes for quad io and 2 dummy bytes for dual io.
Besides that and memory layout, they are identical to their 1G variant.

Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220320100001.247905-5-gch981213@gmail.com

authored by

Chuanhong Guo and committed by
Miquel Raynal 194ec04b 620a9888

+48
+48
drivers/mtd/nand/spi/gigadevice.c
··· 47 47 SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), 48 48 SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); 49 49 50 + static SPINAND_OP_VARIANTS(read_cache_variants_2gq5, 51 + SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 4, NULL, 0), 52 + SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0), 53 + SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 2, NULL, 0), 54 + SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0), 55 + SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0), 56 + SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0)); 57 + 50 58 static SPINAND_OP_VARIANTS(write_cache_variants, 51 59 SPINAND_PROG_LOAD_X4(true, 0, NULL, 0), 52 60 SPINAND_PROG_LOAD(true, 0, NULL, 0)); ··· 396 388 NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1), 397 389 NAND_ECCREQ(4, 512), 398 390 SPINAND_INFO_OP_VARIANTS(&read_cache_variants_1gq5, 391 + &write_cache_variants, 392 + &update_cache_variants), 393 + SPINAND_HAS_QE_BIT, 394 + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, 395 + gd5fxgq5xexxg_ecc_get_status)), 396 + SPINAND_INFO("GD5F2GQ5UExxG", 397 + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x52), 398 + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), 399 + NAND_ECCREQ(4, 512), 400 + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_2gq5, 401 + &write_cache_variants, 402 + &update_cache_variants), 403 + SPINAND_HAS_QE_BIT, 404 + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, 405 + gd5fxgq5xexxg_ecc_get_status)), 406 + SPINAND_INFO("GD5F2GQ5RExxG", 407 + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x42), 408 + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1), 409 + NAND_ECCREQ(4, 512), 410 + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_2gq5, 411 + &write_cache_variants, 412 + &update_cache_variants), 413 + SPINAND_HAS_QE_BIT, 414 + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, 415 + gd5fxgq5xexxg_ecc_get_status)), 416 + SPINAND_INFO("GD5F4GQ6UExxG", 417 + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x55), 418 + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 2, 1), 419 + NAND_ECCREQ(4, 512), 420 + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_2gq5, 421 + &write_cache_variants, 422 + &update_cache_variants), 423 + SPINAND_HAS_QE_BIT, 424 + SPINAND_ECCINFO(&gd5fxgqx_variant2_ooblayout, 425 + gd5fxgq5xexxg_ecc_get_status)), 426 + SPINAND_INFO("GD5F4GQ6RExxG", 427 + SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x45), 428 + NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 2, 1), 429 + NAND_ECCREQ(4, 512), 430 + SPINAND_INFO_OP_VARIANTS(&read_cache_variants_2gq5, 399 431 &write_cache_variants, 400 432 &update_cache_variants), 401 433 SPINAND_HAS_QE_BIT,