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dt-bindings: imx6q-pcie: Handle more resets on legacy platforms

The i.MX6 and i.MX7D does not use block controller to toggle PCIe
reset, hence the PCIe DT description contains three reset entries
on these older SoCs. Add this exception into the binding document.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Link: https://lore.kernel.org/r/20221211024859.672076-3-marex@denx.de
Signed-off-by: Rob Herring <robh@kernel.org>

authored by

Marek Vasut and committed by
Rob Herring 1a2cead1 8b8161ed

+31 -4
+31 -4
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml
··· 84 84 - const: pcie_phy 85 85 86 86 resets: 87 + minItems: 2 87 88 maxItems: 3 88 89 description: Phandles to PCIe-related reset lines exposed by SRC 89 90 IP block. Additional required by imx7d-pcie and imx8mq-pcie. 90 91 91 92 reset-names: 92 - items: 93 - - const: pciephy 94 - - const: apps 95 - - const: turnoff 93 + minItems: 2 94 + maxItems: 3 96 95 97 96 fsl,tx-deemph-gen1: 98 97 description: Gen1 De-emphasis value (optional required). ··· 274 275 power-domains: 275 276 maxItems: 1 276 277 power-domain-names: false 278 + 279 + - if: 280 + properties: 281 + compatible: 282 + contains: 283 + enum: 284 + - fsl,imx6q-pcie 285 + - fsl,imx6sx-pcie 286 + - fsl,imx6qp-pcie 287 + - fsl,imx7d-pcie 288 + - fsl,imx8mq-pcie 289 + then: 290 + properties: 291 + resets: 292 + minItems: 3 293 + reset-names: 294 + items: 295 + - const: pciephy 296 + - const: apps 297 + - const: turnoff 298 + else: 299 + properties: 300 + resets: 301 + maxItems: 2 302 + reset-names: 303 + items: 304 + - const: apps 305 + - const: turnoff 277 306 278 307 unevaluatedProperties: false 279 308