Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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ASoC: Merge fixes due to dependencies

So we can apply the tlv320aic3xxx DT conversion.

+206 -149
+1 -1
Documentation/devicetree/bindings/sound/tlv320aic32x4.txt
··· 8 8 "ti,tlv320aic32x6" TLV320AIC3206, TLV320AIC3256 9 9 "ti,tas2505" TAS2505, TAS2521 10 10 - reg: I2C slave address 11 - - supply-*: Required supply regulators are: 11 + - *-supply: Required supply regulators are: 12 12 "iov" - digital IO power supply 13 13 "ldoin" - LDO power supply 14 14 "dv" - Digital core power supply
+3 -2
drivers/firmware/cirrus/cs_dsp.c
··· 2124 2124 file, blocks, le32_to_cpu(blk->len), 2125 2125 type, le32_to_cpu(blk->id)); 2126 2126 2127 + region_name = cs_dsp_mem_region_name(type); 2127 2128 mem = cs_dsp_find_region(dsp, type); 2128 2129 if (!mem) { 2129 2130 cs_dsp_err(dsp, "No base for region %x\n", type); ··· 2148 2147 reg = dsp->ops->region_to_reg(mem, reg); 2149 2148 reg += offset; 2150 2149 } else { 2151 - cs_dsp_err(dsp, "No %x for algorithm %x\n", 2152 - type, le32_to_cpu(blk->id)); 2150 + cs_dsp_err(dsp, "No %s for algorithm %x\n", 2151 + region_name, le32_to_cpu(blk->id)); 2153 2152 } 2154 2153 break; 2155 2154
+1
include/sound/soc-acpi.h
··· 170 170 /* Descriptor for SST ASoC machine driver */ 171 171 struct snd_soc_acpi_mach { 172 172 u8 id[ACPI_ID_LEN]; 173 + const char *uid; 173 174 const struct snd_soc_acpi_codecs *comp_ids; 174 175 const u32 link_mask; 175 176 const struct snd_soc_acpi_link_adr *links;
+4
include/sound/soc-dpcm.h
··· 122 122 int snd_soc_dpcm_can_be_params(struct snd_soc_pcm_runtime *fe, 123 123 struct snd_soc_pcm_runtime *be, int stream); 124 124 125 + /* can this BE perform prepare */ 126 + int snd_soc_dpcm_can_be_prepared(struct snd_soc_pcm_runtime *fe, 127 + struct snd_soc_pcm_runtime *be, int stream); 128 + 125 129 /* is the current PCM operation for this FE ? */ 126 130 int snd_soc_dpcm_fe_can_update(struct snd_soc_pcm_runtime *fe, int stream); 127 131
+2 -1
include/uapi/sound/skl-tplg-interface.h
··· 66 66 SKL_CH_CFG_DUAL_MONO = 9, 67 67 SKL_CH_CFG_I2S_DUAL_STEREO_0 = 10, 68 68 SKL_CH_CFG_I2S_DUAL_STEREO_1 = 11, 69 - SKL_CH_CFG_4_CHANNEL = 12, 69 + SKL_CH_CFG_7_1 = 12, 70 + SKL_CH_CFG_4_CHANNEL = SKL_CH_CFG_7_1, 70 71 SKL_CH_CFG_INVALID 71 72 }; 72 73
+1 -2
sound/soc/amd/ps/pci-ps.c
··· 198 198 case ACP63_PDM_DEV_MASK: 199 199 adata->pdm_dev_index = 0; 200 200 acp63_fill_platform_dev_info(&pdevinfo[0], parent, NULL, "acp_ps_pdm_dma", 201 - 0, adata->res, 1, &adata->acp_lock, 202 - sizeof(adata->acp_lock)); 201 + 0, adata->res, 1, NULL, 0); 203 202 acp63_fill_platform_dev_info(&pdevinfo[1], parent, NULL, "dmic-codec", 204 203 0, NULL, 0, NULL, 0); 205 204 acp63_fill_platform_dev_info(&pdevinfo[2], parent, NULL, "acp_ps_mach",
+5 -5
sound/soc/amd/ps/ps-pdm-dma.c
··· 358 358 { 359 359 struct resource *res; 360 360 struct pdm_dev_data *adata; 361 + struct acp63_dev_data *acp_data; 362 + struct device *parent; 361 363 int status; 362 364 363 - if (!pdev->dev.platform_data) { 364 - dev_err(&pdev->dev, "platform_data not retrieved\n"); 365 - return -ENODEV; 366 - } 365 + parent = pdev->dev.parent; 366 + acp_data = dev_get_drvdata(parent); 367 367 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 368 368 if (!res) { 369 369 dev_err(&pdev->dev, "IORESOURCE_MEM FAILED\n"); ··· 379 379 return -ENOMEM; 380 380 381 381 adata->capture_stream = NULL; 382 - adata->acp_lock = pdev->dev.platform_data; 382 + adata->acp_lock = &acp_data->acp_lock; 383 383 dev_set_drvdata(&pdev->dev, adata); 384 384 status = devm_snd_soc_register_component(&pdev->dev, 385 385 &acp63_pdm_component,
+7
sound/soc/amd/yc/acp6x-mach.c
··· 175 175 .driver_data = &acp6x_card, 176 176 .matches = { 177 177 DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), 178 + DMI_MATCH(DMI_PRODUCT_NAME, "21EF"), 179 + } 180 + }, 181 + { 182 + .driver_data = &acp6x_card, 183 + .matches = { 184 + DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"), 178 185 DMI_MATCH(DMI_PRODUCT_NAME, "21EM"), 179 186 } 180 187 },
+3 -3
sound/soc/codecs/cs35l41-lib.c
··· 46 46 { CS35L41_DSP1_RX5_SRC, 0x00000020 }, 47 47 { CS35L41_DSP1_RX6_SRC, 0x00000021 }, 48 48 { CS35L41_DSP1_RX7_SRC, 0x0000003A }, 49 - { CS35L41_DSP1_RX8_SRC, 0x00000001 }, 49 + { CS35L41_DSP1_RX8_SRC, 0x0000003B }, 50 50 { CS35L41_NGATE1_SRC, 0x00000008 }, 51 51 { CS35L41_NGATE2_SRC, 0x00000009 }, 52 52 { CS35L41_AMP_DIG_VOL_CTRL, 0x00008000 }, ··· 58 58 { CS35L41_IRQ1_MASK2, 0xFFFFFFFF }, 59 59 { CS35L41_IRQ1_MASK3, 0xFFFF87FF }, 60 60 { CS35L41_IRQ1_MASK4, 0xFEFFFFFF }, 61 - { CS35L41_GPIO1_CTRL1, 0xE1000001 }, 62 - { CS35L41_GPIO2_CTRL1, 0xE1000001 }, 61 + { CS35L41_GPIO1_CTRL1, 0x81000001 }, 62 + { CS35L41_GPIO2_CTRL1, 0x81000001 }, 63 63 { CS35L41_MIXER_NGATE_CFG, 0x00000000 }, 64 64 { CS35L41_MIXER_NGATE_CH1_CFG, 0x00000303 }, 65 65 { CS35L41_MIXER_NGATE_CH2_CFG, 0x00000303 },
-3
sound/soc/codecs/cs35l56.c
··· 704 704 static int cs35l56_sdw_dai_set_stream(struct snd_soc_dai *dai, 705 705 void *sdw_stream, int direction) 706 706 { 707 - if (!sdw_stream) 708 - return 0; 709 - 710 707 snd_soc_dai_dma_data_set(dai, direction, sdw_stream); 711 708 712 709 return 0;
+5
sound/soc/codecs/lpass-tx-macro.c
··· 746 746 struct tx_macro *tx = snd_soc_component_get_drvdata(component); 747 747 748 748 val = ucontrol->value.enumerated.item[0]; 749 + if (val >= e->items) 750 + return -EINVAL; 749 751 750 752 switch (e->reg) { 751 753 case CDC_TX_INP_MUX_ADC_MUX0_CFG0: ··· 774 772 case CDC_TX_INP_MUX_ADC_MUX7_CFG0: 775 773 mic_sel_reg = CDC_TX7_TX_PATH_CFG0; 776 774 break; 775 + default: 776 + dev_err(component->dev, "Error in configuration!!\n"); 777 + return -EINVAL; 777 778 } 778 779 779 780 if (val != 0) {
+2 -2
sound/soc/codecs/max98363.c
··· 211 211 } 212 212 213 213 #define MAX98363_RATES SNDRV_PCM_RATE_8000_192000 214 - #define MAX98363_FORMATS (SNDRV_PCM_FMTBIT_S32_LE) 214 + #define MAX98363_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE) 215 215 216 216 static int max98363_sdw_dai_hw_params(struct snd_pcm_substream *substream, 217 217 struct snd_pcm_hw_params *params, ··· 246 246 stream_config.frame_rate = params_rate(params); 247 247 stream_config.bps = snd_pcm_format_width(params_format(params)); 248 248 stream_config.direction = direction; 249 - stream_config.ch_count = params_channels(params); 249 + stream_config.ch_count = 1; 250 250 251 251 if (stream_config.ch_count > runtime->hw.channels_max) { 252 252 stream_config.ch_count = runtime->hw.channels_max;
+24
sound/soc/codecs/nau8824.c
··· 1903 1903 }, 1904 1904 .driver_data = (void *)(NAU8824_MONO_SPEAKER), 1905 1905 }, 1906 + { 1907 + /* Positivo CW14Q01P */ 1908 + .matches = { 1909 + DMI_MATCH(DMI_SYS_VENDOR, "Positivo Tecnologia SA"), 1910 + DMI_MATCH(DMI_BOARD_NAME, "CW14Q01P"), 1911 + }, 1912 + .driver_data = (void *)(NAU8824_JD_ACTIVE_HIGH), 1913 + }, 1914 + { 1915 + /* Positivo K1424G */ 1916 + .matches = { 1917 + DMI_MATCH(DMI_SYS_VENDOR, "Positivo Tecnologia SA"), 1918 + DMI_MATCH(DMI_BOARD_NAME, "K1424G"), 1919 + }, 1920 + .driver_data = (void *)(NAU8824_JD_ACTIVE_HIGH), 1921 + }, 1922 + { 1923 + /* Positivo N14ZP74G */ 1924 + .matches = { 1925 + DMI_MATCH(DMI_SYS_VENDOR, "Positivo Tecnologia SA"), 1926 + DMI_MATCH(DMI_BOARD_NAME, "N14ZP74G"), 1927 + }, 1928 + .driver_data = (void *)(NAU8824_JD_ACTIVE_HIGH), 1929 + }, 1906 1930 {} 1907 1931 }; 1908 1932
+3 -1
sound/soc/codecs/rt5682-i2c.c
··· 266 266 ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL, 267 267 rt5682_irq, IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING 268 268 | IRQF_ONESHOT, "rt5682", rt5682); 269 - if (ret) 269 + if (!ret) 270 + rt5682->irq = i2c->irq; 271 + else 270 272 dev_err(&i2c->dev, "Failed to reguest IRQ: %d\n", ret); 271 273 } 272 274
+6
sound/soc/codecs/rt5682.c
··· 2959 2959 if (rt5682->is_sdw) 2960 2960 return 0; 2961 2961 2962 + if (rt5682->irq) 2963 + disable_irq(rt5682->irq); 2964 + 2962 2965 cancel_delayed_work_sync(&rt5682->jack_detect_work); 2963 2966 cancel_delayed_work_sync(&rt5682->jd_check_work); 2964 2967 if (rt5682->hs_jack && (rt5682->jack_type & SND_JACK_HEADSET) == SND_JACK_HEADSET) { ··· 3029 3026 rt5682->jack_type = 0; 3030 3027 mod_delayed_work(system_power_efficient_wq, 3031 3028 &rt5682->jack_detect_work, msecs_to_jiffies(0)); 3029 + 3030 + if (rt5682->irq) 3031 + enable_irq(rt5682->irq); 3032 3032 3033 3033 return 0; 3034 3034 }
+1
sound/soc/codecs/rt5682.h
··· 1461 1461 int pll_out[RT5682_PLLS]; 1462 1462 1463 1463 int jack_type; 1464 + int irq; 1464 1465 int irq_work_delay_time; 1465 1466 }; 1466 1467
-1
sound/soc/codecs/wcd938x-sdw.c
··· 1190 1190 .readable_reg = wcd938x_readable_register, 1191 1191 .writeable_reg = wcd938x_writeable_register, 1192 1192 .volatile_reg = wcd938x_volatile_register, 1193 - .can_multi_write = true, 1194 1193 }; 1195 1194 1196 1195 static const struct sdw_slave_ops wcd9380_slave_ops = {
-1
sound/soc/codecs/wsa881x.c
··· 645 645 .readable_reg = wsa881x_readable_register, 646 646 .reg_format_endian = REGMAP_ENDIAN_NATIVE, 647 647 .val_format_endian = REGMAP_ENDIAN_NATIVE, 648 - .can_multi_write = true, 649 648 }; 650 649 651 650 enum {
-1
sound/soc/codecs/wsa883x.c
··· 946 946 .writeable_reg = wsa883x_writeable_register, 947 947 .reg_format_endian = REGMAP_ENDIAN_NATIVE, 948 948 .val_format_endian = REGMAP_ENDIAN_NATIVE, 949 - .can_multi_write = true, 950 949 .use_single_read = true, 951 950 }; 952 951
+9 -32
sound/soc/dwc/dwc-i2s.c
··· 184 184 } 185 185 } 186 186 187 - static int dw_i2s_startup(struct snd_pcm_substream *substream, 188 - struct snd_soc_dai *cpu_dai) 189 - { 190 - struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(cpu_dai); 191 - union dw_i2s_snd_dma_data *dma_data = NULL; 192 - 193 - if (!(dev->capability & DWC_I2S_RECORD) && 194 - (substream->stream == SNDRV_PCM_STREAM_CAPTURE)) 195 - return -EINVAL; 196 - 197 - if (!(dev->capability & DWC_I2S_PLAY) && 198 - (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)) 199 - return -EINVAL; 200 - 201 - if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 202 - dma_data = &dev->play_dma_data; 203 - else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) 204 - dma_data = &dev->capture_dma_data; 205 - 206 - snd_soc_dai_set_dma_data(cpu_dai, substream, (void *)dma_data); 207 - 208 - return 0; 209 - } 210 - 211 187 static void dw_i2s_config(struct dw_i2s_dev *dev, int stream) 212 188 { 213 189 u32 ch_reg; ··· 282 306 return 0; 283 307 } 284 308 285 - static void dw_i2s_shutdown(struct snd_pcm_substream *substream, 286 - struct snd_soc_dai *dai) 287 - { 288 - snd_soc_dai_set_dma_data(dai, substream, NULL); 289 - } 290 - 291 309 static int dw_i2s_prepare(struct snd_pcm_substream *substream, 292 310 struct snd_soc_dai *dai) 293 311 { ··· 353 383 } 354 384 355 385 static const struct snd_soc_dai_ops dw_i2s_dai_ops = { 356 - .startup = dw_i2s_startup, 357 - .shutdown = dw_i2s_shutdown, 358 386 .hw_params = dw_i2s_hw_params, 359 387 .prepare = dw_i2s_prepare, 360 388 .trigger = dw_i2s_trigger, ··· 594 626 595 627 } 596 628 629 + static int dw_i2s_dai_probe(struct snd_soc_dai *dai) 630 + { 631 + struct dw_i2s_dev *dev = snd_soc_dai_get_drvdata(dai); 632 + 633 + snd_soc_dai_init_dma_data(dai, &dev->play_dma_data, &dev->capture_dma_data); 634 + return 0; 635 + } 636 + 597 637 static int dw_i2s_probe(struct platform_device *pdev) 598 638 { 599 639 const struct i2s_platform_data *pdata = pdev->dev.platform_data; ··· 620 644 return -ENOMEM; 621 645 622 646 dw_i2s_dai->ops = &dw_i2s_dai_ops; 647 + dw_i2s_dai->probe = dw_i2s_dai_probe; 623 648 624 649 dev->i2s_base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); 625 650 if (IS_ERR(dev->i2s_base))
+9 -2
sound/soc/fsl/fsl_sai.c
··· 491 491 regmap_update_bits(sai->regmap, reg, FSL_SAI_CR2_MSEL_MASK, 492 492 FSL_SAI_CR2_MSEL(sai->mclk_id[tx])); 493 493 494 - if (savediv == 1) 494 + if (savediv == 1) { 495 495 regmap_update_bits(sai->regmap, reg, 496 496 FSL_SAI_CR2_DIV_MASK | FSL_SAI_CR2_BYP, 497 497 FSL_SAI_CR2_BYP); 498 - else 498 + if (fsl_sai_dir_is_synced(sai, adir)) 499 + regmap_update_bits(sai->regmap, FSL_SAI_xCR2(tx, ofs), 500 + FSL_SAI_CR2_BCI, FSL_SAI_CR2_BCI); 501 + else 502 + regmap_update_bits(sai->regmap, FSL_SAI_xCR2(tx, ofs), 503 + FSL_SAI_CR2_BCI, 0); 504 + } else { 499 505 regmap_update_bits(sai->regmap, reg, 500 506 FSL_SAI_CR2_DIV_MASK | FSL_SAI_CR2_BYP, 501 507 savediv / 2 - 1); 508 + } 502 509 503 510 if (sai->soc_data->max_register >= FSL_SAI_MCTL) { 504 511 /* SAI is in master mode at this point, so enable MCLK */
+1
sound/soc/fsl/fsl_sai.h
··· 116 116 117 117 /* SAI Transmit and Receive Configuration 2 Register */ 118 118 #define FSL_SAI_CR2_SYNC BIT(30) 119 + #define FSL_SAI_CR2_BCI BIT(28) 119 120 #define FSL_SAI_CR2_MSEL_MASK (0x3 << 26) 120 121 #define FSL_SAI_CR2_MSEL_BUS 0 121 122 #define FSL_SAI_CR2_MSEL_MCLK1 BIT(26)
+1 -1
sound/soc/generic/simple-card-utils.c
··· 314 314 } 315 315 ret = snd_pcm_hw_constraint_minmax(substream->runtime, SNDRV_PCM_HW_PARAM_RATE, 316 316 fixed_rate, fixed_rate); 317 - if (ret) 317 + if (ret < 0) 318 318 goto codec_err; 319 319 } 320 320
+1
sound/soc/generic/simple-card.c
··· 416 416 417 417 if (ret < 0) { 418 418 of_node_put(codec); 419 + of_node_put(plat); 419 420 of_node_put(np); 420 421 goto error; 421 422 }
+5 -1
sound/soc/intel/avs/apl.c
··· 169 169 { 170 170 struct avs_path *path; 171 171 172 + spin_lock(&adev->path_list_lock); 172 173 /* Any gateway without buffer allocated in LP area disqualifies D0IX. */ 173 174 list_for_each_entry(path, &adev->path_list, node) { 174 175 struct avs_path_pipeline *ppl; ··· 189 188 if (cfg->copier.dma_type == INVALID_OBJECT_ID) 190 189 continue; 191 190 192 - if (!mod->gtw_attrs.lp_buffer_alloc) 191 + if (!mod->gtw_attrs.lp_buffer_alloc) { 192 + spin_unlock(&adev->path_list_lock); 193 193 return false; 194 + } 194 195 } 195 196 } 196 197 } 198 + spin_unlock(&adev->path_list_lock); 197 199 198 200 return true; 199 201 }
+2 -2
sound/soc/intel/avs/avs.h
··· 283 283 284 284 int avs_dsp_init_module(struct avs_dev *adev, u16 module_id, u8 ppl_instance_id, 285 285 u8 core_id, u8 domain, void *param, u32 param_size, 286 - u16 *instance_id); 287 - void avs_dsp_delete_module(struct avs_dev *adev, u16 module_id, u16 instance_id, 286 + u8 *instance_id); 287 + void avs_dsp_delete_module(struct avs_dev *adev, u16 module_id, u8 instance_id, 288 288 u8 ppl_instance_id, u8 core_id); 289 289 int avs_dsp_create_pipeline(struct avs_dev *adev, u16 req_size, u8 priority, 290 290 bool lp, u16 attributes, u8 *instance_id);
+1 -1
sound/soc/intel/avs/board_selection.c
··· 443 443 } 444 444 445 445 for (mach = boards->machs; mach->id[0]; mach++) { 446 - if (!acpi_dev_present(mach->id, NULL, -1)) 446 + if (!acpi_dev_present(mach->id, mach->uid, -1)) 447 447 continue; 448 448 449 449 if (mach->machine_quirk)
+15 -7
sound/soc/intel/avs/control.c
··· 21 21 return to_avs_dev(w->dapm->component->dev); 22 22 } 23 23 24 - static struct avs_path_module *avs_get_kcontrol_module(struct avs_dev *adev, u32 id) 24 + static struct avs_path_module *avs_get_volume_module(struct avs_dev *adev, u32 id) 25 25 { 26 26 struct avs_path *path; 27 27 struct avs_path_pipeline *ppl; 28 28 struct avs_path_module *mod; 29 29 30 - list_for_each_entry(path, &adev->path_list, node) 31 - list_for_each_entry(ppl, &path->ppl_list, node) 32 - list_for_each_entry(mod, &ppl->mod_list, node) 33 - if (mod->template->ctl_id && mod->template->ctl_id == id) 30 + spin_lock(&adev->path_list_lock); 31 + list_for_each_entry(path, &adev->path_list, node) { 32 + list_for_each_entry(ppl, &path->ppl_list, node) { 33 + list_for_each_entry(mod, &ppl->mod_list, node) { 34 + if (guid_equal(&mod->template->cfg_ext->type, &AVS_PEAKVOL_MOD_UUID) 35 + && mod->template->ctl_id == id) { 36 + spin_unlock(&adev->path_list_lock); 34 37 return mod; 38 + } 39 + } 40 + } 41 + } 42 + spin_unlock(&adev->path_list_lock); 35 43 36 44 return NULL; 37 45 } ··· 57 49 /* prevent access to modules while path is being constructed */ 58 50 mutex_lock(&adev->path_mutex); 59 51 60 - active_module = avs_get_kcontrol_module(adev, ctl_data->id); 52 + active_module = avs_get_volume_module(adev, ctl_data->id); 61 53 if (active_module) { 62 54 ret = avs_ipc_peakvol_get_volume(adev, active_module->module_id, 63 55 active_module->instance_id, &dspvols, ··· 97 89 changed = 1; 98 90 } 99 91 100 - active_module = avs_get_kcontrol_module(adev, ctl_data->id); 92 + active_module = avs_get_volume_module(adev, ctl_data->id); 101 93 if (active_module) { 102 94 dspvol.channel_id = AVS_ALL_CHANNELS_MASK; 103 95 dspvol.target_volume = *volume;
+2 -2
sound/soc/intel/avs/dsp.c
··· 225 225 226 226 int avs_dsp_init_module(struct avs_dev *adev, u16 module_id, u8 ppl_instance_id, 227 227 u8 core_id, u8 domain, void *param, u32 param_size, 228 - u16 *instance_id) 228 + u8 *instance_id) 229 229 { 230 230 struct avs_module_entry mentry; 231 231 bool was_loaded = false; ··· 272 272 return ret; 273 273 } 274 274 275 - void avs_dsp_delete_module(struct avs_dev *adev, u16 module_id, u16 instance_id, 275 + void avs_dsp_delete_module(struct avs_dev *adev, u16 module_id, u8 instance_id, 276 276 u8 ppl_instance_id, u8 core_id) 277 277 { 278 278 struct avs_module_entry mentry;
+1 -1
sound/soc/intel/avs/messages.h
··· 619 619 AVS_CHANNEL_CONFIG_DUAL_MONO = 9, 620 620 AVS_CHANNEL_CONFIG_I2S_DUAL_STEREO_0 = 10, 621 621 AVS_CHANNEL_CONFIG_I2S_DUAL_STEREO_1 = 11, 622 - AVS_CHANNEL_CONFIG_4_CHANNEL = 12, 622 + AVS_CHANNEL_CONFIG_7_1 = 12, 623 623 AVS_CHANNEL_CONFIG_INVALID 624 624 }; 625 625
+1 -1
sound/soc/intel/avs/path.h
··· 37 37 38 38 struct avs_path_module { 39 39 u16 module_id; 40 - u16 instance_id; 40 + u8 instance_id; 41 41 union avs_gtw_attributes gtw_attrs; 42 42 43 43 struct avs_tplg_module *template;
+18 -5
sound/soc/intel/avs/pcm.c
··· 468 468 469 469 host_stream = snd_hdac_ext_stream_assign(bus, substream, HDAC_EXT_STREAM_TYPE_HOST); 470 470 if (!host_stream) { 471 - kfree(data); 472 - return -EBUSY; 471 + ret = -EBUSY; 472 + goto err; 473 473 } 474 474 475 475 data->host_stream = host_stream; 476 - snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); 476 + ret = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS); 477 + if (ret < 0) 478 + goto err; 479 + 477 480 /* avoid wrap-around with wall-clock */ 478 - snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_TIME, 20, 178000000); 479 - snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_rates); 481 + ret = snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_TIME, 20, 178000000); 482 + if (ret < 0) 483 + goto err; 484 + 485 + ret = snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_rates); 486 + if (ret < 0) 487 + goto err; 488 + 480 489 snd_pcm_set_sync(substream); 481 490 482 491 dev_dbg(dai->dev, "%s fe STARTUP tag %d str %p", 483 492 __func__, hdac_stream(host_stream)->stream_tag, substream); 484 493 485 494 return 0; 495 + 496 + err: 497 + kfree(data); 498 + return ret; 486 499 } 487 500 488 501 static void avs_dai_fe_shutdown(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
+1 -1
sound/soc/intel/avs/probes.c
··· 18 18 { 19 19 struct avs_probe_cfg cfg = {{0}}; 20 20 struct avs_module_entry mentry; 21 - u16 dummy; 21 + u8 dummy; 22 22 23 23 avs_get_module_entry(adev, &AVS_PROBE_MOD_UUID, &mentry); 24 24
-7
sound/soc/mediatek/mt8188/mt8188-afe-clk.c
··· 436 436 return 0; 437 437 } 438 438 439 - void mt8188_afe_deinit_clock(void *priv) 440 - { 441 - struct mtk_base_afe *afe = priv; 442 - 443 - mt8188_audsys_clk_unregister(afe); 444 - } 445 - 446 439 int mt8188_afe_enable_clk(struct mtk_base_afe *afe, struct clk *clk) 447 440 { 448 441 int ret;
-1
sound/soc/mediatek/mt8188/mt8188-afe-clk.h
··· 111 111 int mt8188_get_apll_by_rate(struct mtk_base_afe *afe, int rate); 112 112 int mt8188_get_apll_by_name(struct mtk_base_afe *afe, const char *name); 113 113 int mt8188_afe_init_clock(struct mtk_base_afe *afe); 114 - void mt8188_afe_deinit_clock(void *priv); 115 114 int mt8188_afe_enable_clk(struct mtk_base_afe *afe, struct clk *clk); 116 115 void mt8188_afe_disable_clk(struct mtk_base_afe *afe, struct clk *clk); 117 116 int mt8188_afe_set_clk_rate(struct mtk_base_afe *afe, struct clk *clk,
-4
sound/soc/mediatek/mt8188/mt8188-afe-pcm.c
··· 3256 3256 if (ret) 3257 3257 return dev_err_probe(dev, ret, "init clock error"); 3258 3258 3259 - ret = devm_add_action_or_reset(dev, mt8188_afe_deinit_clock, (void *)afe); 3260 - if (ret) 3261 - return ret; 3262 - 3263 3259 spin_lock_init(&afe_priv->afe_ctrl_lock); 3264 3260 3265 3261 mutex_init(&afe->irq_alloc_lock);
+24 -23
sound/soc/mediatek/mt8188/mt8188-audsys-clk.c
··· 138 138 GATE_AUD6(CLK_AUD_GASRC11, "aud_gasrc11", "top_asm_h", 11), 139 139 }; 140 140 141 + static void mt8188_audsys_clk_unregister(void *data) 142 + { 143 + struct mtk_base_afe *afe = data; 144 + struct mt8188_afe_private *afe_priv = afe->platform_priv; 145 + struct clk *clk; 146 + struct clk_lookup *cl; 147 + int i; 148 + 149 + if (!afe_priv) 150 + return; 151 + 152 + for (i = 0; i < CLK_AUD_NR_CLK; i++) { 153 + cl = afe_priv->lookup[i]; 154 + if (!cl) 155 + continue; 156 + 157 + clk = cl->clk; 158 + clk_unregister_gate(clk); 159 + 160 + clkdev_drop(cl); 161 + } 162 + } 163 + 141 164 int mt8188_audsys_clk_register(struct mtk_base_afe *afe) 142 165 { 143 166 struct mt8188_afe_private *afe_priv = afe->platform_priv; ··· 202 179 afe_priv->lookup[i] = cl; 203 180 } 204 181 205 - return 0; 206 - } 207 - 208 - void mt8188_audsys_clk_unregister(struct mtk_base_afe *afe) 209 - { 210 - struct mt8188_afe_private *afe_priv = afe->platform_priv; 211 - struct clk *clk; 212 - struct clk_lookup *cl; 213 - int i; 214 - 215 - if (!afe_priv) 216 - return; 217 - 218 - for (i = 0; i < CLK_AUD_NR_CLK; i++) { 219 - cl = afe_priv->lookup[i]; 220 - if (!cl) 221 - continue; 222 - 223 - clk = cl->clk; 224 - clk_unregister_gate(clk); 225 - 226 - clkdev_drop(cl); 227 - } 182 + return devm_add_action_or_reset(afe->dev, mt8188_audsys_clk_unregister, afe); 228 183 }
-1
sound/soc/mediatek/mt8188/mt8188-audsys-clk.h
··· 10 10 #define _MT8188_AUDSYS_CLK_H_ 11 11 12 12 int mt8188_audsys_clk_register(struct mtk_base_afe *afe); 13 - void mt8188_audsys_clk_unregister(struct mtk_base_afe *afe); 14 13 15 14 #endif
-5
sound/soc/mediatek/mt8195/mt8195-afe-clk.c
··· 410 410 return 0; 411 411 } 412 412 413 - void mt8195_afe_deinit_clock(struct mtk_base_afe *afe) 414 - { 415 - mt8195_audsys_clk_unregister(afe); 416 - } 417 - 418 413 int mt8195_afe_enable_clk(struct mtk_base_afe *afe, struct clk *clk) 419 414 { 420 415 int ret;
-1
sound/soc/mediatek/mt8195/mt8195-afe-clk.h
··· 101 101 int mt8195_afe_get_mclk_source_rate(struct mtk_base_afe *afe, int apll); 102 102 int mt8195_afe_get_default_mclk_source_by_rate(int rate); 103 103 int mt8195_afe_init_clock(struct mtk_base_afe *afe); 104 - void mt8195_afe_deinit_clock(struct mtk_base_afe *afe); 105 104 int mt8195_afe_enable_clk(struct mtk_base_afe *afe, struct clk *clk); 106 105 void mt8195_afe_disable_clk(struct mtk_base_afe *afe, struct clk *clk); 107 106 int mt8195_afe_prepare_clk(struct mtk_base_afe *afe, struct clk *clk);
-4
sound/soc/mediatek/mt8195/mt8195-afe-pcm.c
··· 3224 3224 3225 3225 static void mt8195_afe_pcm_dev_remove(struct platform_device *pdev) 3226 3226 { 3227 - struct mtk_base_afe *afe = platform_get_drvdata(pdev); 3228 - 3229 3227 snd_soc_unregister_component(&pdev->dev); 3230 3228 3231 3229 pm_runtime_disable(&pdev->dev); 3232 3230 if (!pm_runtime_status_suspended(&pdev->dev)) 3233 3231 mt8195_afe_runtime_suspend(&pdev->dev); 3234 - 3235 - mt8195_afe_deinit_clock(afe); 3236 3232 } 3237 3233 3238 3234 static const struct of_device_id mt8195_afe_pcm_dt_match[] = {
+24 -23
sound/soc/mediatek/mt8195/mt8195-audsys-clk.c
··· 148 148 GATE_AUD6(CLK_AUD_GASRC19, "aud_gasrc19", "top_asm_h", 19), 149 149 }; 150 150 151 + static void mt8195_audsys_clk_unregister(void *data) 152 + { 153 + struct mtk_base_afe *afe = data; 154 + struct mt8195_afe_private *afe_priv = afe->platform_priv; 155 + struct clk *clk; 156 + struct clk_lookup *cl; 157 + int i; 158 + 159 + if (!afe_priv) 160 + return; 161 + 162 + for (i = 0; i < CLK_AUD_NR_CLK; i++) { 163 + cl = afe_priv->lookup[i]; 164 + if (!cl) 165 + continue; 166 + 167 + clk = cl->clk; 168 + clk_unregister_gate(clk); 169 + 170 + clkdev_drop(cl); 171 + } 172 + } 173 + 151 174 int mt8195_audsys_clk_register(struct mtk_base_afe *afe) 152 175 { 153 176 struct mt8195_afe_private *afe_priv = afe->platform_priv; ··· 211 188 afe_priv->lookup[i] = cl; 212 189 } 213 190 214 - return 0; 215 - } 216 - 217 - void mt8195_audsys_clk_unregister(struct mtk_base_afe *afe) 218 - { 219 - struct mt8195_afe_private *afe_priv = afe->platform_priv; 220 - struct clk *clk; 221 - struct clk_lookup *cl; 222 - int i; 223 - 224 - if (!afe_priv) 225 - return; 226 - 227 - for (i = 0; i < CLK_AUD_NR_CLK; i++) { 228 - cl = afe_priv->lookup[i]; 229 - if (!cl) 230 - continue; 231 - 232 - clk = cl->clk; 233 - clk_unregister_gate(clk); 234 - 235 - clkdev_drop(cl); 236 - } 191 + return devm_add_action_or_reset(afe->dev, mt8195_audsys_clk_unregister, afe); 237 192 }
-1
sound/soc/mediatek/mt8195/mt8195-audsys-clk.h
··· 10 10 #define _MT8195_AUDSYS_CLK_H_ 11 11 12 12 int mt8195_audsys_clk_register(struct mtk_base_afe *afe); 13 - void mt8195_audsys_clk_unregister(struct mtk_base_afe *afe); 14 13 15 14 #endif
+20
sound/soc/soc-pcm.c
··· 2431 2431 if (!snd_soc_dpcm_be_can_update(fe, be, stream)) 2432 2432 continue; 2433 2433 2434 + if (!snd_soc_dpcm_can_be_prepared(fe, be, stream)) 2435 + continue; 2436 + 2434 2437 if ((be->dpcm[stream].state != SND_SOC_DPCM_STATE_HW_PARAMS) && 2435 2438 (be->dpcm[stream].state != SND_SOC_DPCM_STATE_STOP) && 2436 2439 (be->dpcm[stream].state != SND_SOC_DPCM_STATE_SUSPEND) && ··· 3090 3087 return snd_soc_dpcm_check_state(fe, be, stream, state, ARRAY_SIZE(state)); 3091 3088 } 3092 3089 EXPORT_SYMBOL_GPL(snd_soc_dpcm_can_be_params); 3090 + 3091 + /* 3092 + * We can only prepare a BE DAI if any of it's FE are not prepared, 3093 + * running or paused for the specified stream direction. 3094 + */ 3095 + int snd_soc_dpcm_can_be_prepared(struct snd_soc_pcm_runtime *fe, 3096 + struct snd_soc_pcm_runtime *be, int stream) 3097 + { 3098 + const enum snd_soc_dpcm_state state[] = { 3099 + SND_SOC_DPCM_STATE_START, 3100 + SND_SOC_DPCM_STATE_PAUSED, 3101 + SND_SOC_DPCM_STATE_PREPARE, 3102 + }; 3103 + 3104 + return snd_soc_dpcm_check_state(fe, be, stream, state, ARRAY_SIZE(state)); 3105 + } 3106 + EXPORT_SYMBOL_GPL(snd_soc_dpcm_can_be_prepared);
+3
sound/soc/tegra/tegra_pcm.c
··· 117 117 return ret; 118 118 } 119 119 120 + /* Set wait time to 500ms by default */ 121 + substream->wait_time = 500; 122 + 120 123 return 0; 121 124 } 122 125 EXPORT_SYMBOL_GPL(tegra_pcm_open);