Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'fixes' of master.kernel.org:/home/rmk/linux-2.6-arm:
ARM: 6657/1: hw_breakpoint: fix ptrace breakpoint advertising on unsupported arch
ARM: 6656/1: hw_breakpoint: avoid UNPREDICTABLE behaviour when reading DBGDSCR
ARM: 6658/1: collie: do actually pass locomo_info to locomo driver
ARM: 6659/1: Thumb-2: Make CONFIG_OABI_COMPAT depend on !CONFIG_THUMB2_KERNEL
ARM: 6654/1: perf/oprofile: fix off-by-one in stack check
ARM: fixup SMP alternatives in modules
ARM: make SWP emulation explicit on !CPU_USE_DOMAINS
ARM: Avoid building unsafe kernels on OMAP2 and MX3
ARM: pxa: Properly configure PWM period for palm27x
ARM: pxa: only save/restore registers when pm functions are defined
ARM: pxa/colibri: use correct SD detect pin
ARM: pxa: fix mfpr_sync to read from valid offset
+95
-46
+1
-1
arch/arm/Kconfig
+1
-1
arch/arm/Kconfig
···
1391
1391
1392
1392
config OABI_COMPAT
1393
1393
bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
1394
-
depends on AEABI && EXPERIMENTAL
1394
+
depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
1395
1395
default y
1396
1396
help
1397
1397
This option preserves the old syscall interface along with the
+27
-13
arch/arm/kernel/head.S
+27
-13
arch/arm/kernel/head.S
···
391
391
392
392
393
393
#ifdef CONFIG_SMP_ON_UP
394
+
__INIT
394
395
__fixup_smp:
395
396
and r3, r9, #0x000f0000 @ architecture version
396
397
teq r3, #0x000f0000 @ CPU ID supported?
···
416
415
sub r3, r0, r3
417
416
add r4, r4, r3
418
417
add r5, r5, r3
419
-
2: cmp r4, r5
420
-
movhs pc, lr
421
-
ldmia r4!, {r0, r6}
422
-
ARM( str r6, [r0, r3] )
423
-
THUMB( add r0, r0, r3 )
424
-
#ifdef __ARMEB__
425
-
THUMB( mov r6, r6, ror #16 ) @ Convert word order for big-endian.
426
-
#endif
427
-
THUMB( strh r6, [r0], #2 ) @ For Thumb-2, store as two halfwords
428
-
THUMB( mov r6, r6, lsr #16 ) @ to be robust against misaligned r3.
429
-
THUMB( strh r6, [r0] )
430
-
b 2b
418
+
b __do_fixup_smp_on_up
431
419
ENDPROC(__fixup_smp)
432
420
433
421
.align
···
430
440
ALT_SMP(.long 1)
431
441
ALT_UP(.long 0)
432
442
.popsection
433
-
434
443
#endif
444
+
445
+
.text
446
+
__do_fixup_smp_on_up:
447
+
cmp r4, r5
448
+
movhs pc, lr
449
+
ldmia r4!, {r0, r6}
450
+
ARM( str r6, [r0, r3] )
451
+
THUMB( add r0, r0, r3 )
452
+
#ifdef __ARMEB__
453
+
THUMB( mov r6, r6, ror #16 ) @ Convert word order for big-endian.
454
+
#endif
455
+
THUMB( strh r6, [r0], #2 ) @ For Thumb-2, store as two halfwords
456
+
THUMB( mov r6, r6, lsr #16 ) @ to be robust against misaligned r3.
457
+
THUMB( strh r6, [r0] )
458
+
b __do_fixup_smp_on_up
459
+
ENDPROC(__do_fixup_smp_on_up)
460
+
461
+
ENTRY(fixup_smp)
462
+
stmfd sp!, {r4 - r6, lr}
463
+
mov r4, r0
464
+
add r5, r0, r1
465
+
mov r3, #0
466
+
bl __do_fixup_smp_on_up
467
+
ldmfd sp!, {r4 - r6, pc}
468
+
ENDPROC(fixup_smp)
435
469
436
470
#include "head-common.S"
+26
-18
arch/arm/kernel/hw_breakpoint.c
+26
-18
arch/arm/kernel/hw_breakpoint.c
···
137
137
u32 didr;
138
138
139
139
/* Do we implement the extended CPUID interface? */
140
-
if (((read_cpuid_id() >> 16) & 0xf) != 0xf) {
141
-
pr_warning("CPUID feature registers not supported. "
142
-
"Assuming v6 debug is present.\n");
140
+
if (WARN_ONCE((((read_cpuid_id() >> 16) & 0xf) != 0xf),
141
+
"CPUID feature registers not supported. "
142
+
"Assuming v6 debug is present.\n"))
143
143
return ARM_DEBUG_ARCH_V6;
144
-
}
145
144
146
145
ARM_DBG_READ(c0, 0, didr);
147
146
return (didr >> 16) & 0xf;
···
149
150
u8 arch_get_debug_arch(void)
150
151
{
151
152
return debug_arch;
153
+
}
154
+
155
+
static int debug_arch_supported(void)
156
+
{
157
+
u8 arch = get_debug_arch();
158
+
return arch >= ARM_DEBUG_ARCH_V6 && arch <= ARM_DEBUG_ARCH_V7_ECP14;
152
159
}
153
160
154
161
/* Determine number of BRP register available. */
···
273
268
274
269
int hw_breakpoint_slots(int type)
275
270
{
271
+
if (!debug_arch_supported())
272
+
return 0;
273
+
276
274
/*
277
275
* We can be called early, so don't rely on
278
276
* our static variables being initialised.
···
842
834
843
835
/*
844
836
* v7 debug contains save and restore registers so that debug state
845
-
* can be maintained across low-power modes without leaving
846
-
* the debug logic powered up. It is IMPLEMENTATION DEFINED whether
847
-
* we can write to the debug registers out of reset, so we must
848
-
* unlock the OS Lock Access Register to avoid taking undefined
849
-
* instruction exceptions later on.
837
+
* can be maintained across low-power modes without leaving the debug
838
+
* logic powered up. It is IMPLEMENTATION DEFINED whether we can access
839
+
* the debug registers out of reset, so we must unlock the OS Lock
840
+
* Access Register to avoid taking undefined instruction exceptions
841
+
* later on.
850
842
*/
851
843
if (debug_arch >= ARM_DEBUG_ARCH_V7_ECP14) {
852
844
/*
···
890
882
891
883
debug_arch = get_debug_arch();
892
884
893
-
if (debug_arch > ARM_DEBUG_ARCH_V7_ECP14) {
885
+
if (!debug_arch_supported()) {
894
886
pr_info("debug architecture 0x%x unsupported.\n", debug_arch);
895
887
return 0;
896
888
}
···
907
899
pr_info("%d breakpoint(s) reserved for watchpoint "
908
900
"single-step.\n", core_num_reserved_brps);
909
901
902
+
/*
903
+
* Reset the breakpoint resources. We assume that a halting
904
+
* debugger will leave the world in a nice state for us.
905
+
*/
906
+
on_each_cpu(reset_ctrl_regs, NULL, 1);
907
+
910
908
ARM_DBG_READ(c1, 0, dscr);
911
909
if (dscr & ARM_DSCR_HDBGEN) {
910
+
max_watchpoint_len = 4;
912
911
pr_warning("halting debug mode enabled. Assuming maximum "
913
-
"watchpoint size of 4 bytes.");
912
+
"watchpoint size of %u bytes.", max_watchpoint_len);
914
913
} else {
915
-
/*
916
-
* Reset the breakpoint resources. We assume that a halting
917
-
* debugger will leave the world in a nice state for us.
918
-
*/
919
-
smp_call_function(reset_ctrl_regs, NULL, 1);
920
-
reset_ctrl_regs(NULL);
921
-
922
914
/* Work out the maximum supported watchpoint length. */
923
915
max_watchpoint_len = get_max_wp_len();
924
916
pr_info("maximum watchpoint size is %u bytes.\n",
+21
-1
arch/arm/kernel/module.c
+21
-1
arch/arm/kernel/module.c
···
22
22
23
23
#include <asm/pgtable.h>
24
24
#include <asm/sections.h>
25
+
#include <asm/smp_plat.h>
25
26
#include <asm/unwind.h>
26
27
27
28
#ifdef CONFIG_XIP_KERNEL
···
269
268
const Elf_Shdr *txt_sec;
270
269
};
271
270
271
+
static const Elf_Shdr *find_mod_section(const Elf32_Ehdr *hdr,
272
+
const Elf_Shdr *sechdrs, const char *name)
273
+
{
274
+
const Elf_Shdr *s, *se;
275
+
const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
276
+
277
+
for (s = sechdrs, se = sechdrs + hdr->e_shnum; s < se; s++)
278
+
if (strcmp(name, secstrs + s->sh_name) == 0)
279
+
return s;
280
+
281
+
return NULL;
282
+
}
283
+
284
+
extern void fixup_smp(const void *, unsigned long);
285
+
272
286
int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs,
273
287
struct module *mod)
274
288
{
289
+
const Elf_Shdr * __maybe_unused s = NULL;
275
290
#ifdef CONFIG_ARM_UNWIND
276
291
const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
277
-
const Elf_Shdr *s, *sechdrs_end = sechdrs + hdr->e_shnum;
292
+
const Elf_Shdr *sechdrs_end = sechdrs + hdr->e_shnum;
278
293
struct mod_unwind_map maps[ARM_SEC_MAX];
279
294
int i;
280
295
···
332
315
maps[i].txt_sec->sh_addr,
333
316
maps[i].txt_sec->sh_size);
334
317
#endif
318
+
s = find_mod_section(hdr, sechdrs, ".alt.smp.init");
319
+
if (s && !is_smp())
320
+
fixup_smp((void *)s->sh_addr, s->sh_size);
335
321
return 0;
336
322
}
337
323
+1
-1
arch/arm/kernel/perf_event.c
+1
-1
arch/arm/kernel/perf_event.c
+1
-1
arch/arm/mach-pxa/colibri-evalboard.c
+1
-1
arch/arm/mach-pxa/colibri-evalboard.c
···
50
50
GPIO0_COLIBRI_PXA270_SD_DETECT;
51
51
if (machine_is_colibri300()) /* PXA300 Colibri */
52
52
colibri_mci_platform_data.gpio_card_detect =
53
-
GPIO39_COLIBRI_PXA300_SD_DETECT;
53
+
GPIO13_COLIBRI_PXA300_SD_DETECT;
54
54
else /* PXA320 Colibri */
55
55
colibri_mci_platform_data.gpio_card_detect =
56
56
GPIO28_COLIBRI_PXA320_SD_DETECT;
+1
-1
arch/arm/mach-pxa/colibri-pxa300.c
+1
-1
arch/arm/mach-pxa/colibri-pxa300.c
+1
-1
arch/arm/mach-pxa/include/mach/colibri.h
+1
-1
arch/arm/mach-pxa/include/mach/colibri.h
···
60
60
#define GPIO113_COLIBRI_PXA270_TS_IRQ 113
61
61
62
62
/* GPIO definitions for Colibri PXA300/310 */
63
-
#define GPIO39_COLIBRI_PXA300_SD_DETECT 39
63
+
#define GPIO13_COLIBRI_PXA300_SD_DETECT 13
64
64
65
65
/* GPIO definitions for Colibri PXA320 */
66
66
#define GPIO28_COLIBRI_PXA320_SD_DETECT 28
+1
-1
arch/arm/mach-pxa/palm27x.c
+1
-1
arch/arm/mach-pxa/palm27x.c
+2
-2
arch/arm/mach-pxa/pm.c
+2
-2
arch/arm/mach-pxa/pm.c
···
33
33
#endif
34
34
35
35
/* skip registers saving for standby */
36
-
if (state != PM_SUSPEND_STANDBY) {
36
+
if (state != PM_SUSPEND_STANDBY && pxa_cpu_pm_fns->save) {
37
37
pxa_cpu_pm_fns->save(sleep_save);
38
38
/* before sleeping, calculate and save a checksum */
39
39
for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++)
···
44
44
pxa_cpu_pm_fns->enter(state);
45
45
cpu_init();
46
46
47
-
if (state != PM_SUSPEND_STANDBY) {
47
+
if (state != PM_SUSPEND_STANDBY && pxa_cpu_pm_fns->restore) {
48
48
/* after sleeping, validate the checksum */
49
49
for (i = 0; i < pxa_cpu_pm_fns->save_count - 1; i++)
50
50
checksum += sleep_save[i];
+3
arch/arm/mach-sa1100/collie.c
+3
arch/arm/mach-sa1100/collie.c
+3
-3
arch/arm/mm/Kconfig
+3
-3
arch/arm/mm/Kconfig
···
405
405
config CPU_32v6K
406
406
bool "Support ARM V6K processor extensions" if !SMP
407
407
depends on CPU_V6 || CPU_V7
408
-
default y if SMP && !(ARCH_MX3 || ARCH_OMAP2)
408
+
default y if SMP
409
409
help
410
410
Say Y here if your ARMv6 processor supports the 'K' extension.
411
411
This enables the kernel to use some instructions not present
···
416
416
# ARMv7
417
417
config CPU_V7
418
418
bool "Support ARM V7 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX
419
-
select CPU_32v6K if !ARCH_OMAP2
419
+
select CPU_32v6K
420
420
select CPU_32v7
421
421
select CPU_ABRT_EV7
422
422
select CPU_PABRT_V7
···
644
644
645
645
config SWP_EMULATE
646
646
bool "Emulate SWP/SWPB instructions"
647
-
depends on CPU_V7 && !CPU_V6
647
+
depends on !CPU_USE_DOMAINS && CPU_V7 && !CPU_V6
648
648
select HAVE_PROC_CPU if PROC_FS
649
649
default y if SMP
650
650
help
+1
-1
arch/arm/oprofile/common.c
+1
-1
arch/arm/oprofile/common.c
+6
-2
arch/arm/plat-pxa/mfp.c
+6
-2
arch/arm/plat-pxa/mfp.c
···
139
139
#define mfp_configured(p) ((p)->config != -1)
140
140
141
141
/*
142
-
* perform a read-back of any MFPR register to make sure the
142
+
* perform a read-back of any valid MFPR register to make sure the
143
143
* previous writings are finished
144
144
*/
145
-
#define mfpr_sync() (void)__raw_readl(mfpr_mmio_base + 0)
145
+
static unsigned long mfpr_off_readback;
146
+
#define mfpr_sync() (void)__raw_readl(mfpr_mmio_base + mfpr_off_readback)
146
147
147
148
static inline void __mfp_config_run(struct mfp_pin *p)
148
149
{
···
248
247
int i;
249
248
250
249
spin_lock_irqsave(&mfp_spin_lock, flags);
250
+
251
+
/* mfp offset for readback */
252
+
mfpr_off_readback = map[0].offset;
251
253
252
254
for (p = map; p->start != MFP_PIN_INVALID; p++) {
253
255
offset = p->offset;