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Merge tag 'mmc-v5.7-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc

Pull MMC fixes from Ulf Hansson:
"MMC core:
- Fix a couple of quite severe issues for the CQE request path

MMC host:
- alcor: Fix a resource leak in the error path for ->probe()
- sdhci-acpi: Fix the DMA support for the AMD eMMC v5.0 variant
- sdhci-pci-gli: Fix system resume support for GL975x
- sdhci-pci-gli: Fix reboot error for GL9750"

* tag 'mmc-v5.7-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc:
mmc: sdhci-acpi: Add SDHCI_QUIRK2_BROKEN_64_BIT_DMA for AMDI0040
mmc: block: Fix request completion in the CQE timeout path
mmc: core: Fix recursive locking issue in CQE recovery path
mmc: core: Check request type before completing the request
mmc: sdhci-pci-gli: Fix can not access GL9750 after reboot from Windows 10
mmc: alcor: Fix a resource leak in the error path for ->probe()
mmc: sdhci-pci-gli: Fix no irq handler from suspend

+41 -17
+2 -1
drivers/mmc/core/block.c
··· 1370 1370 struct mmc_request *mrq = &mqrq->brq.mrq; 1371 1371 struct request_queue *q = req->q; 1372 1372 struct mmc_host *host = mq->card->host; 1373 + enum mmc_issue_type issue_type = mmc_issue_type(mq, req); 1373 1374 unsigned long flags; 1374 1375 bool put_card; 1375 1376 int err; ··· 1400 1399 1401 1400 spin_lock_irqsave(&mq->lock, flags); 1402 1401 1403 - mq->in_flight[mmc_issue_type(mq, req)] -= 1; 1402 + mq->in_flight[issue_type] -= 1; 1404 1403 1405 1404 put_card = (mmc_tot_in_flight(mq) == 0); 1406 1405
+5 -11
drivers/mmc/core/queue.c
··· 107 107 case MMC_ISSUE_DCMD: 108 108 if (host->cqe_ops->cqe_timeout(host, mrq, &recovery_needed)) { 109 109 if (recovery_needed) 110 - __mmc_cqe_recovery_notifier(mq); 110 + mmc_cqe_recovery_notifier(mrq); 111 111 return BLK_EH_RESET_TIMER; 112 112 } 113 - /* No timeout (XXX: huh? comment doesn't make much sense) */ 114 - blk_mq_complete_request(req); 113 + /* The request has gone already */ 115 114 return BLK_EH_DONE; 116 115 default: 117 116 /* Timeout is handled by mmc core */ ··· 126 127 struct mmc_card *card = mq->card; 127 128 struct mmc_host *host = card->host; 128 129 unsigned long flags; 129 - int ret; 130 + bool ignore_tout; 130 131 131 132 spin_lock_irqsave(&mq->lock, flags); 132 - 133 - if (mq->recovery_needed || !mq->use_cqe || host->hsq_enabled) 134 - ret = BLK_EH_RESET_TIMER; 135 - else 136 - ret = mmc_cqe_timed_out(req); 137 - 133 + ignore_tout = mq->recovery_needed || !mq->use_cqe || host->hsq_enabled; 138 134 spin_unlock_irqrestore(&mq->lock, flags); 139 135 140 - return ret; 136 + return ignore_tout ? BLK_EH_RESET_TIMER : mmc_cqe_timed_out(req); 141 137 } 142 138 143 139 static void mmc_mq_recovery_handler(struct work_struct *work)
+5 -1
drivers/mmc/host/alcor.c
··· 1104 1104 1105 1105 if (ret) { 1106 1106 dev_err(&pdev->dev, "Failed to get irq for data line\n"); 1107 - return ret; 1107 + goto free_host; 1108 1108 } 1109 1109 1110 1110 mutex_init(&host->cmd_mutex); ··· 1116 1116 dev_set_drvdata(&pdev->dev, host); 1117 1117 mmc_add_host(mmc); 1118 1118 return 0; 1119 + 1120 + free_host: 1121 + mmc_free_host(mmc); 1122 + return ret; 1119 1123 } 1120 1124 1121 1125 static int alcor_pci_sdmmc_drv_remove(struct platform_device *pdev)
+6 -4
drivers/mmc/host/sdhci-acpi.c
··· 605 605 } 606 606 607 607 static const struct sdhci_acpi_slot sdhci_acpi_slot_amd_emmc = { 608 - .chip = &sdhci_acpi_chip_amd, 609 - .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE, 610 - .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | SDHCI_QUIRK_32BIT_DMA_SIZE | 611 - SDHCI_QUIRK_32BIT_ADMA_SIZE, 608 + .chip = &sdhci_acpi_chip_amd, 609 + .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE, 610 + .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | 611 + SDHCI_QUIRK_32BIT_DMA_SIZE | 612 + SDHCI_QUIRK_32BIT_ADMA_SIZE, 613 + .quirks2 = SDHCI_QUIRK2_BROKEN_64_BIT_DMA, 612 614 .probe_slot = sdhci_acpi_emmc_amd_probe_slot, 613 615 }; 614 616
+23
drivers/mmc/host/sdhci-pci-gli.c
··· 26 26 #define SDHCI_GLI_9750_DRIVING_2 GENMASK(27, 26) 27 27 #define GLI_9750_DRIVING_1_VALUE 0xFFF 28 28 #define GLI_9750_DRIVING_2_VALUE 0x3 29 + #define SDHCI_GLI_9750_SEL_1 BIT(29) 30 + #define SDHCI_GLI_9750_SEL_2 BIT(31) 31 + #define SDHCI_GLI_9750_ALL_RST (BIT(24)|BIT(25)|BIT(28)|BIT(30)) 29 32 30 33 #define SDHCI_GLI_9750_PLL 0x864 31 34 #define SDHCI_GLI_9750_PLL_TX2_INV BIT(23) ··· 125 122 GLI_9750_DRIVING_1_VALUE); 126 123 driving_value |= FIELD_PREP(SDHCI_GLI_9750_DRIVING_2, 127 124 GLI_9750_DRIVING_2_VALUE); 125 + driving_value &= ~(SDHCI_GLI_9750_SEL_1|SDHCI_GLI_9750_SEL_2|SDHCI_GLI_9750_ALL_RST); 126 + driving_value |= SDHCI_GLI_9750_SEL_2; 128 127 sdhci_writel(host, driving_value, SDHCI_GLI_9750_DRIVING); 129 128 130 129 sw_ctrl_value &= ~SDHCI_GLI_9750_SW_CTRL_4; ··· 339 334 return value; 340 335 } 341 336 337 + #ifdef CONFIG_PM_SLEEP 338 + static int sdhci_pci_gli_resume(struct sdhci_pci_chip *chip) 339 + { 340 + struct sdhci_pci_slot *slot = chip->slots[0]; 341 + 342 + pci_free_irq_vectors(slot->chip->pdev); 343 + gli_pcie_enable_msi(slot); 344 + 345 + return sdhci_pci_resume_host(chip); 346 + } 347 + #endif 348 + 342 349 static const struct sdhci_ops sdhci_gl9755_ops = { 343 350 .set_clock = sdhci_set_clock, 344 351 .enable_dma = sdhci_pci_enable_dma, ··· 365 348 .quirks2 = SDHCI_QUIRK2_BROKEN_DDR50, 366 349 .probe_slot = gli_probe_slot_gl9755, 367 350 .ops = &sdhci_gl9755_ops, 351 + #ifdef CONFIG_PM_SLEEP 352 + .resume = sdhci_pci_gli_resume, 353 + #endif 368 354 }; 369 355 370 356 static const struct sdhci_ops sdhci_gl9750_ops = { ··· 386 366 .quirks2 = SDHCI_QUIRK2_BROKEN_DDR50, 387 367 .probe_slot = gli_probe_slot_gl9750, 388 368 .ops = &sdhci_gl9750_ops, 369 + #ifdef CONFIG_PM_SLEEP 370 + .resume = sdhci_pci_gli_resume, 371 + #endif 389 372 };