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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
pinctrl: qcom: Introduce SM6115 LPI pinctrl driver
Add support for the pin controller block on SM6115's Low Power Island.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230722-topic-6115_lpasstlmm-v2-2-d4883831a858@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
authored by
Konrad Dybcio
and committed by
Linus Walleij
1b1db9e0
743cbe65
+185
+9
drivers/pinctrl/qcom/Kconfig
+9
drivers/pinctrl/qcom/Kconfig
···
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Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI
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(Low Power Island) found on the Qualcomm Technologies Inc SC7280 platform.
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config PINCTRL_SM6115_LPASS_LPI
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tristate "Qualcomm Technologies Inc SM6115 LPASS LPI pin controller driver"
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depends on ARM64 || COMPILE_TEST
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depends on PINCTRL_LPASS_LPI
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help
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This is the pinctrl, pinmux, pinconf and gpiolib driver for the
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Qualcomm Technologies Inc LPASS (Low Power Audio SubSystem) LPI
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(Low Power Island) found on the Qualcomm Technologies Inc SM6115 platform.
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config PINCTRL_SM8250_LPASS_LPI
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tristate "Qualcomm Technologies Inc SM8250 LPASS LPI pin controller driver"
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depends on ARM64 || COMPILE_TEST
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drivers/pinctrl/qcom/Makefile
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drivers/pinctrl/qcom/Makefile
···
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obj-$(CONFIG_PINCTRL_SDX65) += pinctrl-sdx65.o
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obj-$(CONFIG_PINCTRL_SDX75) += pinctrl-sdx75.o
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obj-$(CONFIG_PINCTRL_SM6115) += pinctrl-sm6115.o
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obj-$(CONFIG_PINCTRL_SM6115_LPASS_LPI) += pinctrl-sm6115-lpass-lpi.o
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obj-$(CONFIG_PINCTRL_SM6125) += pinctrl-sm6125.o
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obj-$(CONFIG_PINCTRL_SM6350) += pinctrl-sm6350.o
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obj-$(CONFIG_PINCTRL_SM6375) += pinctrl-sm6375.o
+175
drivers/pinctrl/qcom/pinctrl-sm6115-lpass-lpi.c
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drivers/pinctrl/qcom/pinctrl-sm6115-lpass-lpi.c
···
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
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* Copyright (c) 2020, 2023 Linaro Ltd.
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*/
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#include <linux/gpio/driver.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include "pinctrl-lpass-lpi.h"
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enum lpass_lpi_functions {
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LPI_MUX_dmic01_clk,
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LPI_MUX_dmic01_data,
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LPI_MUX_dmic23_clk,
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LPI_MUX_dmic23_data,
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LPI_MUX_i2s1_clk,
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LPI_MUX_i2s1_data,
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LPI_MUX_i2s1_ws,
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LPI_MUX_i2s2_clk,
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LPI_MUX_i2s2_data,
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LPI_MUX_i2s2_ws,
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LPI_MUX_i2s3_clk,
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LPI_MUX_i2s3_data,
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LPI_MUX_i2s3_ws,
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LPI_MUX_qua_mi2s_data,
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LPI_MUX_qua_mi2s_sclk,
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LPI_MUX_qua_mi2s_ws,
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LPI_MUX_swr_rx_clk,
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LPI_MUX_swr_rx_data,
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LPI_MUX_swr_tx_clk,
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LPI_MUX_swr_tx_data,
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LPI_MUX_wsa_mclk,
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LPI_MUX_gpio,
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LPI_MUX__,
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};
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static int gpio0_pins[] = { 0 };
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static int gpio1_pins[] = { 1 };
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static int gpio2_pins[] = { 2 };
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static int gpio3_pins[] = { 3 };
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static int gpio4_pins[] = { 4 };
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static int gpio5_pins[] = { 5 };
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static int gpio6_pins[] = { 6 };
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static int gpio7_pins[] = { 7 };
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static int gpio8_pins[] = { 8 };
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static int gpio9_pins[] = { 9 };
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static int gpio10_pins[] = { 10 };
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static int gpio11_pins[] = { 11 };
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static int gpio12_pins[] = { 12 };
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static int gpio13_pins[] = { 13 };
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static int gpio14_pins[] = { 14 };
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static int gpio15_pins[] = { 15 };
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static int gpio16_pins[] = { 16 };
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static int gpio17_pins[] = { 17 };
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static int gpio18_pins[] = { 18 };
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static const struct pinctrl_pin_desc sm6115_lpi_pins[] = {
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PINCTRL_PIN(0, "gpio0"),
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PINCTRL_PIN(1, "gpio1"),
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PINCTRL_PIN(2, "gpio2"),
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PINCTRL_PIN(3, "gpio3"),
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PINCTRL_PIN(4, "gpio4"),
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PINCTRL_PIN(5, "gpio5"),
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PINCTRL_PIN(6, "gpio6"),
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PINCTRL_PIN(7, "gpio7"),
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PINCTRL_PIN(8, "gpio8"),
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PINCTRL_PIN(9, "gpio9"),
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PINCTRL_PIN(10, "gpio10"),
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PINCTRL_PIN(11, "gpio11"),
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PINCTRL_PIN(12, "gpio12"),
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PINCTRL_PIN(13, "gpio13"),
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PINCTRL_PIN(14, "gpio14"),
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PINCTRL_PIN(15, "gpio15"),
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PINCTRL_PIN(16, "gpio16"),
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PINCTRL_PIN(17, "gpio17"),
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PINCTRL_PIN(18, "gpio18"),
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};
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static const char * const dmic01_clk_groups[] = { "gpio6" };
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static const char * const dmic01_data_groups[] = { "gpio7" };
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static const char * const dmic23_clk_groups[] = { "gpio8" };
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static const char * const dmic23_data_groups[] = { "gpio9" };
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static const char * const i2s1_clk_groups[] = { "gpio6" };
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static const char * const i2s1_data_groups[] = { "gpio8", "gpio9" };
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static const char * const i2s1_ws_groups[] = { "gpio7" };
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static const char * const i2s2_clk_groups[] = { "gpio10" };
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static const char * const i2s2_data_groups[] = { "gpio12", "gpio13" };
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static const char * const i2s2_ws_groups[] = { "gpio11" };
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static const char * const i2s3_clk_groups[] = { "gpio14" };
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static const char * const i2s3_data_groups[] = { "gpio16", "gpio17" };
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static const char * const i2s3_ws_groups[] = { "gpio15" };
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static const char * const qua_mi2s_data_groups[] = { "gpio2", "gpio3", "gpio4", "gpio5" };
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static const char * const qua_mi2s_sclk_groups[] = { "gpio0" };
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static const char * const qua_mi2s_ws_groups[] = { "gpio1" };
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static const char * const swr_rx_clk_groups[] = { "gpio3" };
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static const char * const swr_rx_data_groups[] = { "gpio4", "gpio5" };
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static const char * const swr_tx_clk_groups[] = { "gpio0" };
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static const char * const swr_tx_data_groups[] = { "gpio1", "gpio2" };
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static const char * const wsa_mclk_groups[] = { "gpio18" };
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static const struct lpi_pingroup sm6115_groups[] = {
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LPI_PINGROUP(0, 0, swr_tx_clk, qua_mi2s_sclk, _, _),
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LPI_PINGROUP(1, 2, swr_tx_data, qua_mi2s_ws, _, _),
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LPI_PINGROUP(2, 4, swr_tx_data, qua_mi2s_data, _, _),
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LPI_PINGROUP(3, 8, swr_rx_clk, qua_mi2s_data, _, _),
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LPI_PINGROUP(4, 10, swr_rx_data, qua_mi2s_data, _, _),
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LPI_PINGROUP(5, 12, swr_rx_data, _, qua_mi2s_data, _),
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LPI_PINGROUP(6, LPI_NO_SLEW, dmic01_clk, i2s1_clk, _, _),
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LPI_PINGROUP(7, LPI_NO_SLEW, dmic01_data, i2s1_ws, _, _),
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LPI_PINGROUP(8, LPI_NO_SLEW, dmic23_clk, i2s1_data, _, _),
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LPI_PINGROUP(9, LPI_NO_SLEW, dmic23_data, i2s1_data, _, _),
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LPI_PINGROUP(10, LPI_NO_SLEW, i2s2_clk, _, _, _),
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LPI_PINGROUP(11, LPI_NO_SLEW, i2s2_ws, _, _, _),
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LPI_PINGROUP(12, LPI_NO_SLEW, _, i2s2_data, _, _),
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LPI_PINGROUP(13, LPI_NO_SLEW, _, i2s2_data, _, _),
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LPI_PINGROUP(14, LPI_NO_SLEW, i2s3_clk, _, _, _),
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LPI_PINGROUP(15, LPI_NO_SLEW, i2s3_ws, _, _, _),
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LPI_PINGROUP(16, LPI_NO_SLEW, i2s3_data, _, _, _),
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LPI_PINGROUP(17, LPI_NO_SLEW, i2s3_data, _, _, _),
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LPI_PINGROUP(18, 14, wsa_mclk, _, _, _),
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};
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static const struct lpi_function sm6115_functions[] = {
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LPI_FUNCTION(dmic01_clk),
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LPI_FUNCTION(dmic01_data),
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LPI_FUNCTION(dmic23_clk),
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LPI_FUNCTION(dmic23_data),
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LPI_FUNCTION(i2s1_clk),
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LPI_FUNCTION(i2s1_data),
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LPI_FUNCTION(i2s1_ws),
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LPI_FUNCTION(i2s2_clk),
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LPI_FUNCTION(i2s2_data),
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LPI_FUNCTION(i2s2_ws),
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LPI_FUNCTION(i2s3_clk),
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LPI_FUNCTION(i2s3_data),
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LPI_FUNCTION(i2s3_ws),
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LPI_FUNCTION(qua_mi2s_data),
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LPI_FUNCTION(qua_mi2s_sclk),
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LPI_FUNCTION(qua_mi2s_ws),
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LPI_FUNCTION(swr_rx_clk),
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LPI_FUNCTION(swr_rx_data),
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LPI_FUNCTION(swr_tx_clk),
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LPI_FUNCTION(swr_tx_data),
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LPI_FUNCTION(wsa_mclk),
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};
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static const struct lpi_pinctrl_variant_data sm6115_lpi_data = {
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.pins = sm6115_lpi_pins,
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.npins = ARRAY_SIZE(sm6115_lpi_pins),
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.groups = sm6115_groups,
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.ngroups = ARRAY_SIZE(sm6115_groups),
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.functions = sm6115_functions,
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.nfunctions = ARRAY_SIZE(sm6115_functions),
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};
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static const struct of_device_id lpi_pinctrl_of_match[] = {
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{ .compatible = "qcom,sm6115-lpass-lpi-pinctrl", .data = &sm6115_lpi_data },
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{ }
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};
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MODULE_DEVICE_TABLE(of, lpi_pinctrl_of_match);
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static struct platform_driver lpi_pinctrl_driver = {
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.driver = {
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.name = "qcom-sm6115-lpass-lpi-pinctrl",
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.of_match_table = lpi_pinctrl_of_match,
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},
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.probe = lpi_pinctrl_probe,
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.remove = lpi_pinctrl_remove,
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};
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module_platform_driver(lpi_pinctrl_driver);
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MODULE_DESCRIPTION("QTI SM6115 LPI GPIO pin control driver");
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MODULE_LICENSE("GPL");