+1 -1

arch/arm/Kconfig.debug

reviewed

··· 101 101 help 102 102 Choice for UART for kernel low-level using S3C2410 UARTS, 103 103 should be between zero and two. The port must have been 104 104 - initalised by the boot-loader before use. 104 104 + initialised by the boot-loader before use. 105 105 106 106 The uncompressor code port configuration is now handled 107 107 by CONFIG_S3C2410_LOWLEVEL_UART_PORT.

+1 -1

arch/arm/mach-ixp4xx/Kconfig

reviewed

··· 141 141 2) If > 64MB of memory space is required, the IXP4xx can be 142 142 configured to use indirect registers to access PCI This allows 143 143 for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus. 144 144 - The disadvantadge of this is that every PCI access requires 144 144 + The disadvantage of this is that every PCI access requires 145 145 three local register accesses plus a spinlock, but in some 146 146 cases the performance hit is acceptable. In addition, you cannot 147 147 mmap() PCI devices in this case due to the indirect nature

+1

arch/arm/mach-pxa/mainstone.c

reviewed

··· 493 493 MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") 494 494 /* Maintainer: MontaVista Software Inc. */ 495 495 .phys_io = 0x40000000, 496 496 + .boot_params = 0xa0000100, /* BLOB boot parameter setting */ 496 497 .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, 497 498 .map_io = mainstone_map_io, 498 499 .init_irq = mainstone_init_irq,

+1 -1

arch/arm/mach-s3c2410/Kconfig

reviewed

··· 170 170 depends on ARCH_S3C2410 && PM 171 171 help 172 172 Say Y here if you want verbose debugging from the PM Suspend and 173 173 - Resume code. See `Documentation/arm/Samsing-S3C24XX/Suspend.txt` 173 173 + Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt> 174 174 for more information. 175 175 176 176 config S3C2410_PM_CHECK