Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
clocksource/drivers/vf-pit: Encapsulate the macros
Pass the base address to the macro, so we can use the macro with
multiple instances of the timer because we deal with different base
address. At the same time, change writes to the register to the
existing corresponding functions.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20250804152344.1109310-11-daniel.lezcano@linaro.org
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-16
+18
-16
drivers/clocksource/timer-vf-pit.c
+18
-16
drivers/clocksource/timer-vf-pit.c
···
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#define PITMCR 0x00
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#define PIT0_OFFSET 0x100
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#define PIT_CH(n) (PIT0_OFFSET + 0x10 * (n))
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-
#define PITLDVAL 0x00
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+
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#define PITCVAL 0x04
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-
#define PITTCTRL 0x08
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#define PITTFLG 0x0c
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#define PITMCR_MDIS BIT(1)
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-
#define PITTCTRL_TEN BIT(0)
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#define PITTCTRL_TIE BIT(1)
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#define PITCTRL_CHN BIT(2)
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+
#define PITLDVAL(__base) (__base)
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+
#define PITTCTRL(__base) ((__base) + 0x08)
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-
#define PITTFLG_TIF 0x1
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#define PITTCTRL_TEN BIT(0)
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#define PITTCTRL_TIE BIT(1)
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#define PITTFLG(__base) ((__base) + 0x0c)
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#define PITTFLG_TIF BIT(0)
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struct pit_timer {
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void __iomem *clksrc_base;
···
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static inline void pit_timer_enable(struct pit_timer *pit)
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{
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-
writel(PITTCTRL_TEN | PITTCTRL_TIE, pit->clkevt_base + PITTCTRL);
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+
writel(PITTCTRL_TEN | PITTCTRL_TIE, PITTCTRL(pit->clkevt_base));
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}
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static inline void pit_timer_disable(struct pit_timer *pit)
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{
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writel(0, pit->clkevt_base + PITTCTRL);
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writel(0, PITTCTRL(pit->clkevt_base));
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}
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static inline void pit_irq_acknowledge(struct pit_timer *pit)
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{
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writel(PITTFLG_TIF, pit->clkevt_base + PITTFLG);
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writel(PITTFLG_TIF, PITTFLG(pit->clkevt_base));
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}
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static u64 notrace pit_read_sched_clock(void)
···
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pit->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS;
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/* set the max load value and start the clock source counter */
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writel(0, pit->clksrc_base + PITTCTRL);
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writel(~0, pit->clksrc_base + PITLDVAL);
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writel(PITTCTRL_TEN, pit->clksrc_base + PITTCTRL);
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+
pit_timer_disable(pit);
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writel(~0, PITLDVAL(pit->clksrc_base));
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writel(PITTCTRL_TEN, PITTCTRL(pit->clksrc_base));
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clksrc_base = pit->clksrc_base;
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···
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* hardware requirement.
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*/
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pit_timer_disable(pit);
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writel(delta - 1, pit->clkevt_base + PITLDVAL);
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writel(delta - 1, PITLDVAL(pit->clkevt_base));
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pit_timer_enable(pit);
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return 0;
···
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pit->clkevt_base = base + PIT_CH(3);
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pit->cycle_per_jiffy = rate / (HZ);
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writel(0, pit->clkevt_base + PITTCTRL);
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pit_timer_disable(pit);
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writel(PITTFLG_TIF, pit->clkevt_base + PITTFLG);
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pit_irq_acknowledge(pit);
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BUG_ON(request_irq(irq, pit_timer_interrupt, IRQF_TIMER | IRQF_IRQPOLL,
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"VF pit timer", &pit->ced));