+6

MAINTAINERS

reviewed

··· 4051 4051 S: Maintained 4052 4052 W: http://www.kroah.com/linux-usb/ 4053 4053 4054 4054 + USB CYPRESS C67X00 DRIVER 4055 4055 + P: Peter Korsgaard 4056 4056 + M: jacmet@sunsite.dk 4057 4057 + L: linux-usb@vger.kernel.org 4058 4058 + S: Maintained 4059 4059 + 4054 4060 USB DAVICOM DM9601 DRIVER 4055 4061 P: Peter Korsgaard 4056 4062 M: jacmet@sunsite.dk

+39 -24

drivers/block/ub.c

reviewed

··· 205 205 unsigned char key, asc, ascq; /* May be valid if error==-EIO */ 206 206 207 207 int stat_count; /* Retries getting status. */ 208 208 + unsigned int timeo; /* jiffies until rq->timeout changes */ 208 209 209 210 unsigned int len; /* Requested length */ 210 211 unsigned int current_sg; ··· 319 318 int openc; /* protected by ub_lock! */ 320 319 /* kref is too implicit for our taste */ 321 320 int reset; /* Reset is running */ 321 321 + int bad_resid; 322 322 unsigned int tagcnt; 323 323 char name[12]; 324 324 struct usb_device *dev; ··· 766 764 cmd->cdb_len = rq->cmd_len; 767 765 768 766 cmd->len = rq->data_len; 767 767 + 768 768 + /* 769 769 + * To reapply this to every URB is not as incorrect as it looks. 770 770 + * In return, we avoid any complicated tracking calculations. 771 771 + */ 772 772 + cmd->timeo = rq->timeout; 769 773 } 770 774 771 775 static void ub_rw_cmd_done(struct ub_dev *sc, struct ub_scsi_cmd *cmd) ··· 793 785 scsi_status = 0; 794 786 } else { 795 787 if (cmd->act_len != cmd->len) { 796 796 - if ((cmd->key == MEDIUM_ERROR || 797 797 - cmd->key == UNIT_ATTENTION) && 798 798 - ub_rw_cmd_retry(sc, lun, urq, cmd) == 0) 799 799 - return; 800 788 scsi_status = SAM_STAT_CHECK_CONDITION; 801 789 } else { 802 790 scsi_status = 0; ··· 808 804 else 809 805 scsi_status = DID_ERROR << 16; 810 806 } else { 811 811 - if (cmd->error == -EIO) { 807 807 + if (cmd->error == -EIO && 808 808 + (cmd->key == 0 || 809 809 + cmd->key == MEDIUM_ERROR || 810 810 + cmd->key == UNIT_ATTENTION)) { 812 811 if (ub_rw_cmd_retry(sc, lun, urq, cmd) == 0) 813 812 return; 814 813 } ··· 1266 1259 return; 1267 1260 } 1268 1261 1269 1269 - len = le32_to_cpu(bcs->Residue); 1270 1270 - if (len != cmd->len - cmd->act_len) { 1271 1271 - /* 1272 1272 - * It is all right to transfer less, the caller has 1273 1273 - * to check. But it's not all right if the device 1274 1274 - * counts disagree with our counts. 1275 1275 - */ 1276 1276 - goto Bad_End; 1262 1262 + if (!sc->bad_resid) { 1263 1263 + len = le32_to_cpu(bcs->Residue); 1264 1264 + if (len != cmd->len - cmd->act_len) { 1265 1265 + /* 1266 1266 + * Only start ignoring if this cmd ended well. 1267 1267 + */ 1268 1268 + if (cmd->len == cmd->act_len) { 1269 1269 + printk(KERN_NOTICE "%s: " 1270 1270 + "bad residual %d of %d, ignoring\n", 1271 1271 + sc->name, len, cmd->len); 1272 1272 + sc->bad_resid = 1; 1273 1273 + } 1274 1274 + } 1277 1275 } 1278 1276 1279 1277 switch (bcs->Status) { ··· 1309 1297 ub_state_done(sc, cmd, -EIO); 1310 1298 1311 1299 } else { 1312 1312 - printk(KERN_WARNING "%s: " 1313 1313 - "wrong command state %d\n", 1300 1300 + printk(KERN_WARNING "%s: wrong command state %d\n", 1314 1301 sc->name, cmd->state); 1315 1302 ub_state_done(sc, cmd, -EINVAL); 1316 1303 return; ··· 1347 1336 return; 1348 1337 } 1349 1338 1350 1350 - sc->work_timer.expires = jiffies + UB_DATA_TIMEOUT; 1339 1339 + if (cmd->timeo) 1340 1340 + sc->work_timer.expires = jiffies + cmd->timeo; 1341 1341 + else 1342 1342 + sc->work_timer.expires = jiffies + UB_DATA_TIMEOUT; 1351 1343 add_timer(&sc->work_timer); 1352 1344 1353 1345 cmd->state = UB_CMDST_DATA; ··· 1390 1376 return -1; 1391 1377 } 1392 1378 1393 1393 - sc->work_timer.expires = jiffies + UB_STAT_TIMEOUT; 1379 1379 + if (cmd->timeo) 1380 1380 + sc->work_timer.expires = jiffies + cmd->timeo; 1381 1381 + else 1382 1382 + sc->work_timer.expires = jiffies + UB_STAT_TIMEOUT; 1394 1383 add_timer(&sc->work_timer); 1395 1384 return 0; 1396 1385 } ··· 1532 1515 return; 1533 1516 } 1534 1517 if (cmd->state != UB_CMDST_SENSE) { 1535 1535 - printk(KERN_WARNING "%s: " 1536 1536 - "sense done with bad cmd state %d\n", 1518 1518 + printk(KERN_WARNING "%s: sense done with bad cmd state %d\n", 1537 1519 sc->name, cmd->state); 1538 1520 return; 1539 1521 } ··· 1736 1720 } 1737 1721 1738 1722 /* 1739 1739 - * This is called once a new disk was seen by the block layer or by ub_probe(). 1723 1723 + * This is called by check_disk_change if we reported a media change. 1740 1724 * The main onjective here is to discover the features of the media such as 1741 1725 * the capacity, read-only status, etc. USB storage generally does not 1742 1726 * need to be spun up, but if we needed it, this would be the place. ··· 2152 2136 } 2153 2137 2154 2138 if (ep_in == NULL || ep_out == NULL) { 2155 2155 - printk(KERN_NOTICE "%s: failed endpoint check\n", 2156 2156 - sc->name); 2139 2139 + printk(KERN_NOTICE "%s: failed endpoint check\n", sc->name); 2157 2140 return -ENODEV; 2158 2141 } 2159 2142 ··· 2369 2354 spin_unlock_irqrestore(&ub_lock, flags); 2370 2355 2371 2356 /* 2372 2372 - * Fence stall clearnings, operations triggered by unlinkings and so on. 2357 2357 + * Fence stall clearings, operations triggered by unlinkings and so on. 2373 2358 * We do not attempt to unlink any URBs, because we do not trust the 2374 2359 * unlink paths in HC drivers. Also, we get -84 upon disconnect anyway. 2375 2360 */ ··· 2432 2417 spin_unlock_irqrestore(sc->lock, flags); 2433 2418 2434 2419 /* 2435 2435 - * There is virtually no chance that other CPU runs times so long 2420 2420 + * There is virtually no chance that other CPU runs a timeout so long 2436 2421 * after ub_urb_complete should have called del_timer, but only if HCD 2437 2422 * didn't forget to deliver a callback on unlink. 2438 2423 */

+2

drivers/usb/Makefile

reviewed

··· 17 17 obj-$(CONFIG_USB_U132_HCD) += host/ 18 18 obj-$(CONFIG_USB_R8A66597_HCD) += host/ 19 19 20 20 + obj-$(CONFIG_USB_C67X00_HCD) += c67x00/ 21 21 + 20 22 obj-$(CONFIG_USB_ACM) += class/ 21 23 obj-$(CONFIG_USB_PRINTER) += class/ 22 24

-4

drivers/usb/atm/Kconfig

reviewed

··· 19 19 20 20 config USB_SPEEDTOUCH 21 21 tristate "Speedtouch USB support" 22 22 - depends on USB_ATM 23 22 select FW_LOADER 24 23 help 25 24 Say Y here if you have an SpeedTouch USB or SpeedTouch 330 ··· 31 32 32 33 config USB_CXACRU 33 34 tristate "Conexant AccessRunner USB support" 34 34 - depends on USB_ATM 35 35 select FW_LOADER 36 36 help 37 37 Say Y here if you have an ADSL USB modem based on the Conexant ··· 43 45 44 46 config USB_UEAGLEATM 45 47 tristate "ADI 930 and eagle USB DSL modem" 46 46 - depends on USB_ATM 47 48 select FW_LOADER 48 49 help 49 50 Say Y here if you have an ADSL USB modem based on the ADI 930 ··· 55 58 56 59 config USB_XUSBATM 57 60 tristate "Other USB DSL modem support" 58 58 - depends on USB_ATM 59 61 help 60 62 Say Y here if you have a DSL USB modem not explicitly supported by 61 63 another USB DSL drivers. In order to use your modem you will need to

+9

drivers/usb/c67x00/Makefile

reviewed

··· 1 1 + # 2 2 + # Makefile for Cypress C67X00 USB Controller 3 3 + # 4 4 + 5 5 + ccflags-$(CONFIG_USB_DEBUG) += -DDEBUG 6 6 + 7 7 + obj-$(CONFIG_USB_C67X00_HCD) += c67x00.o 8 8 + 9 9 + c67x00-objs := c67x00-drv.o c67x00-ll-hpi.o c67x00-hcd.o c67x00-sched.o

+243

drivers/usb/c67x00/c67x00-drv.c

reviewed

··· 1 1 + /* 2 2 + * c67x00-drv.c: Cypress C67X00 USB Common infrastructure 3 3 + * 4 4 + * Copyright (C) 2006-2008 Barco N.V. 5 5 + * Derived from the Cypress cy7c67200/300 ezusb linux driver and 6 6 + * based on multiple host controller drivers inside the linux kernel. 7 7 + * 8 8 + * This program is free software; you can redistribute it and/or modify 9 9 + * it under the terms of the GNU General Public License as published by 10 10 + * the Free Software Foundation; either version 2 of the License, or 11 11 + * (at your option) any later version. 12 12 + * 13 13 + * This program is distributed in the hope that it will be useful, 14 14 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 15 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 16 + * GNU General Public License for more details. 17 17 + * 18 18 + * You should have received a copy of the GNU General Public License 19 19 + * along with this program; if not, write to the Free Software 20 20 + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 21 21 + * MA 02110-1301 USA. 22 22 + */ 23 23 + 24 24 + /* 25 25 + * This file implements the common infrastructure for using the c67x00. 26 26 + * It is both the link between the platform configuration and subdrivers and 27 27 + * the link between the common hardware parts and the subdrivers (e.g. 28 28 + * interrupt handling). 29 29 + * 30 30 + * The c67x00 has 2 SIE's (serial interface engine) wich can be configured 31 31 + * to be host, device or OTG (with some limitations, E.G. only SIE1 can be OTG). 32 32 + * 33 33 + * Depending on the platform configuration, the SIE's are created and 34 34 + * the corresponding subdriver is initialized (c67x00_probe_sie). 35 35 + */ 36 36 + 37 37 + #include <linux/device.h> 38 38 + #include <linux/io.h> 39 39 + #include <linux/list.h> 40 40 + #include <linux/usb.h> 41 41 + #include <linux/usb/c67x00.h> 42 42 + 43 43 + #include "c67x00.h" 44 44 + #include "c67x00-hcd.h" 45 45 + 46 46 + static void c67x00_probe_sie(struct c67x00_sie *sie, 47 47 + struct c67x00_device *dev, int sie_num) 48 48 + { 49 49 + spin_lock_init(&sie->lock); 50 50 + sie->dev = dev; 51 51 + sie->sie_num = sie_num; 52 52 + sie->mode = c67x00_sie_config(dev->pdata->sie_config, sie_num); 53 53 + 54 54 + switch (sie->mode) { 55 55 + case C67X00_SIE_HOST: 56 56 + c67x00_hcd_probe(sie); 57 57 + break; 58 58 + 59 59 + case C67X00_SIE_UNUSED: 60 60 + dev_info(sie_dev(sie), 61 61 + "Not using SIE %d as requested\n", sie->sie_num); 62 62 + break; 63 63 + 64 64 + default: 65 65 + dev_err(sie_dev(sie), 66 66 + "Unsupported configuration: 0x%x for SIE %d\n", 67 67 + sie->mode, sie->sie_num); 68 68 + break; 69 69 + } 70 70 + } 71 71 + 72 72 + static void c67x00_remove_sie(struct c67x00_sie *sie) 73 73 + { 74 74 + switch (sie->mode) { 75 75 + case C67X00_SIE_HOST: 76 76 + c67x00_hcd_remove(sie); 77 77 + break; 78 78 + 79 79 + default: 80 80 + break; 81 81 + } 82 82 + } 83 83 + 84 84 + static irqreturn_t c67x00_irq(int irq, void *__dev) 85 85 + { 86 86 + struct c67x00_device *c67x00 = __dev; 87 87 + struct c67x00_sie *sie; 88 88 + u16 msg, int_status; 89 89 + int i, count = 8; 90 90 + 91 91 + int_status = c67x00_ll_hpi_status(c67x00); 92 92 + if (!int_status) 93 93 + return IRQ_NONE; 94 94 + 95 95 + while (int_status != 0 && (count-- >= 0)) { 96 96 + c67x00_ll_irq(c67x00, int_status); 97 97 + for (i = 0; i < C67X00_SIES; i++) { 98 98 + sie = &c67x00->sie[i]; 99 99 + msg = 0; 100 100 + if (int_status & SIEMSG_FLG(i)) 101 101 + msg = c67x00_ll_fetch_siemsg(c67x00, i); 102 102 + if (sie->irq) 103 103 + sie->irq(sie, int_status, msg); 104 104 + } 105 105 + int_status = c67x00_ll_hpi_status(c67x00); 106 106 + } 107 107 + 108 108 + if (int_status) 109 109 + dev_warn(&c67x00->pdev->dev, "Not all interrupts handled! " 110 110 + "status = 0x%04x\n", int_status); 111 111 + 112 112 + return IRQ_HANDLED; 113 113 + } 114 114 + 115 115 + /* ------------------------------------------------------------------------- */ 116 116 + 117 117 + static int __devinit c67x00_drv_probe(struct platform_device *pdev) 118 118 + { 119 119 + struct c67x00_device *c67x00; 120 120 + struct c67x00_platform_data *pdata; 121 121 + struct resource *res, *res2; 122 122 + int ret, i; 123 123 + 124 124 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 125 125 + if (!res) 126 126 + return -ENODEV; 127 127 + 128 128 + res2 = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 129 129 + if (!res2) 130 130 + return -ENODEV; 131 131 + 132 132 + pdata = pdev->dev.platform_data; 133 133 + if (!pdata) 134 134 + return -ENODEV; 135 135 + 136 136 + c67x00 = kzalloc(sizeof(*c67x00), GFP_KERNEL); 137 137 + if (!c67x00) 138 138 + return -ENOMEM; 139 139 + 140 140 + if (!request_mem_region(res->start, res->end - res->start + 1, 141 141 + pdev->name)) { 142 142 + dev_err(&pdev->dev, "Memory region busy\n"); 143 143 + ret = -EBUSY; 144 144 + goto request_mem_failed; 145 145 + } 146 146 + c67x00->hpi.base = ioremap(res->start, res->end - res->start + 1); 147 147 + if (!c67x00->hpi.base) { 148 148 + dev_err(&pdev->dev, "Unable to map HPI registers\n"); 149 149 + ret = -EIO; 150 150 + goto map_failed; 151 151 + } 152 152 + 153 153 + spin_lock_init(&c67x00->hpi.lock); 154 154 + c67x00->hpi.regstep = pdata->hpi_regstep; 155 155 + c67x00->pdata = pdev->dev.platform_data; 156 156 + c67x00->pdev = pdev; 157 157 + 158 158 + c67x00_ll_init(c67x00); 159 159 + c67x00_ll_hpi_reg_init(c67x00); 160 160 + 161 161 + ret = request_irq(res2->start, c67x00_irq, 0, pdev->name, c67x00); 162 162 + if (ret) { 163 163 + dev_err(&pdev->dev, "Cannot claim IRQ\n"); 164 164 + goto request_irq_failed; 165 165 + } 166 166 + 167 167 + ret = c67x00_ll_reset(c67x00); 168 168 + if (ret) { 169 169 + dev_err(&pdev->dev, "Device reset failed\n"); 170 170 + goto reset_failed; 171 171 + } 172 172 + 173 173 + for (i = 0; i < C67X00_SIES; i++) 174 174 + c67x00_probe_sie(&c67x00->sie[i], c67x00, i); 175 175 + 176 176 + platform_set_drvdata(pdev, c67x00); 177 177 + 178 178 + return 0; 179 179 + 180 180 + reset_failed: 181 181 + free_irq(res2->start, c67x00); 182 182 + request_irq_failed: 183 183 + iounmap(c67x00->hpi.base); 184 184 + map_failed: 185 185 + release_mem_region(res->start, res->end - res->start + 1); 186 186 + request_mem_failed: 187 187 + kfree(c67x00); 188 188 + 189 189 + return ret; 190 190 + } 191 191 + 192 192 + static int __devexit c67x00_drv_remove(struct platform_device *pdev) 193 193 + { 194 194 + struct c67x00_device *c67x00 = platform_get_drvdata(pdev); 195 195 + struct resource *res; 196 196 + int i; 197 197 + 198 198 + for (i = 0; i < C67X00_SIES; i++) 199 199 + c67x00_remove_sie(&c67x00->sie[i]); 200 200 + 201 201 + c67x00_ll_release(c67x00); 202 202 + 203 203 + res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 204 204 + if (res) 205 205 + free_irq(res->start, c67x00); 206 206 + 207 207 + iounmap(c67x00->hpi.base); 208 208 + 209 209 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 210 210 + if (res) 211 211 + release_mem_region(res->start, res->end - res->start + 1); 212 212 + 213 213 + kfree(c67x00); 214 214 + 215 215 + return 0; 216 216 + } 217 217 + 218 218 + static struct platform_driver c67x00_driver = { 219 219 + .probe = c67x00_drv_probe, 220 220 + .remove = __devexit_p(c67x00_drv_remove), 221 221 + .driver = { 222 222 + .owner = THIS_MODULE, 223 223 + .name = "c67x00", 224 224 + }, 225 225 + }; 226 226 + MODULE_ALIAS("platform:c67x00"); 227 227 + 228 228 + static int __init c67x00_init(void) 229 229 + { 230 230 + return platform_driver_register(&c67x00_driver); 231 231 + } 232 232 + 233 233 + static void __exit c67x00_exit(void) 234 234 + { 235 235 + platform_driver_unregister(&c67x00_driver); 236 236 + } 237 237 + 238 238 + module_init(c67x00_init); 239 239 + module_exit(c67x00_exit); 240 240 + 241 241 + MODULE_AUTHOR("Peter Korsgaard, Jan Veldeman, Grant Likely"); 242 242 + MODULE_DESCRIPTION("Cypress C67X00 USB Controller Driver"); 243 243 + MODULE_LICENSE("GPL");

+412

drivers/usb/c67x00/c67x00-hcd.c

reviewed

··· 1 1 + /* 2 2 + * c67x00-hcd.c: Cypress C67X00 USB Host Controller Driver 3 3 + * 4 4 + * Copyright (C) 2006-2008 Barco N.V. 5 5 + * Derived from the Cypress cy7c67200/300 ezusb linux driver and 6 6 + * based on multiple host controller drivers inside the linux kernel. 7 7 + * 8 8 + * This program is free software; you can redistribute it and/or modify 9 9 + * it under the terms of the GNU General Public License as published by 10 10 + * the Free Software Foundation; either version 2 of the License, or 11 11 + * (at your option) any later version. 12 12 + * 13 13 + * This program is distributed in the hope that it will be useful, 14 14 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 15 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 16 + * GNU General Public License for more details. 17 17 + * 18 18 + * You should have received a copy of the GNU General Public License 19 19 + * along with this program; if not, write to the Free Software 20 20 + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 21 21 + * MA 02110-1301 USA. 22 22 + */ 23 23 + 24 24 + #include <linux/device.h> 25 25 + #include <linux/platform_device.h> 26 26 + #include <linux/usb.h> 27 27 + 28 28 + #include "c67x00.h" 29 29 + #include "c67x00-hcd.h" 30 30 + 31 31 + /* -------------------------------------------------------------------------- 32 32 + * Root Hub Support 33 33 + */ 34 34 + 35 35 + static __u8 c67x00_hub_des[] = { 36 36 + 0x09, /* __u8 bLength; */ 37 37 + 0x29, /* __u8 bDescriptorType; Hub-descriptor */ 38 38 + 0x02, /* __u8 bNbrPorts; */ 39 39 + 0x00, /* __u16 wHubCharacteristics; */ 40 40 + 0x00, /* (per-port OC, no power switching) */ 41 41 + 0x32, /* __u8 bPwrOn2pwrGood; 2ms */ 42 42 + 0x00, /* __u8 bHubContrCurrent; 0 mA */ 43 43 + 0x00, /* __u8 DeviceRemovable; ** 7 Ports max ** */ 44 44 + 0xff, /* __u8 PortPwrCtrlMask; ** 7 ports max ** */ 45 45 + }; 46 46 + 47 47 + static void c67x00_hub_reset_host_port(struct c67x00_sie *sie, int port) 48 48 + { 49 49 + struct c67x00_hcd *c67x00 = sie->private_data; 50 50 + unsigned long flags; 51 51 + 52 52 + c67x00_ll_husb_reset(sie, port); 53 53 + 54 54 + spin_lock_irqsave(&c67x00->lock, flags); 55 55 + c67x00_ll_husb_reset_port(sie, port); 56 56 + spin_unlock_irqrestore(&c67x00->lock, flags); 57 57 + 58 58 + c67x00_ll_set_husb_eot(sie->dev, DEFAULT_EOT); 59 59 + } 60 60 + 61 61 + static int c67x00_hub_status_data(struct usb_hcd *hcd, char *buf) 62 62 + { 63 63 + struct c67x00_hcd *c67x00 = hcd_to_c67x00_hcd(hcd); 64 64 + struct c67x00_sie *sie = c67x00->sie; 65 65 + u16 status; 66 66 + int i; 67 67 + 68 68 + *buf = 0; 69 69 + status = c67x00_ll_usb_get_status(sie); 70 70 + for (i = 0; i < C67X00_PORTS; i++) 71 71 + if (status & PORT_CONNECT_CHANGE(i)) 72 72 + *buf |= (1 << i); 73 73 + 74 74 + /* bit 0 denotes hub change, b1..n port change */ 75 75 + *buf <<= 1; 76 76 + 77 77 + return !!*buf; 78 78 + } 79 79 + 80 80 + static int c67x00_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, 81 81 + u16 wIndex, char *buf, u16 wLength) 82 82 + { 83 83 + struct c67x00_hcd *c67x00 = hcd_to_c67x00_hcd(hcd); 84 84 + struct c67x00_sie *sie = c67x00->sie; 85 85 + u16 status, usb_status; 86 86 + int len = 0; 87 87 + unsigned int port = wIndex-1; 88 88 + u16 wPortChange, wPortStatus; 89 89 + 90 90 + switch (typeReq) { 91 91 + 92 92 + case GetHubStatus: 93 93 + *(__le32 *) buf = cpu_to_le32(0); 94 94 + len = 4; /* hub power */ 95 95 + break; 96 96 + 97 97 + case GetPortStatus: 98 98 + if (wIndex > C67X00_PORTS) 99 99 + return -EPIPE; 100 100 + 101 101 + status = c67x00_ll_usb_get_status(sie); 102 102 + usb_status = c67x00_ll_get_usb_ctl(sie); 103 103 + 104 104 + wPortChange = 0; 105 105 + if (status & PORT_CONNECT_CHANGE(port)) 106 106 + wPortChange |= USB_PORT_STAT_C_CONNECTION; 107 107 + 108 108 + wPortStatus = USB_PORT_STAT_POWER; 109 109 + if (!(status & PORT_SE0_STATUS(port))) 110 110 + wPortStatus |= USB_PORT_STAT_CONNECTION; 111 111 + if (usb_status & LOW_SPEED_PORT(port)) { 112 112 + wPortStatus |= USB_PORT_STAT_LOW_SPEED; 113 113 + c67x00->low_speed_ports |= (1 << port); 114 114 + } else 115 115 + c67x00->low_speed_ports &= ~(1 << port); 116 116 + 117 117 + if (usb_status & SOF_EOP_EN(port)) 118 118 + wPortStatus |= USB_PORT_STAT_ENABLE; 119 119 + 120 120 + *(__le16 *) buf = cpu_to_le16(wPortStatus); 121 121 + *(__le16 *) (buf + 2) = cpu_to_le16(wPortChange); 122 122 + len = 4; 123 123 + break; 124 124 + 125 125 + case SetHubFeature: /* We don't implement these */ 126 126 + case ClearHubFeature: 127 127 + switch (wValue) { 128 128 + case C_HUB_OVER_CURRENT: 129 129 + case C_HUB_LOCAL_POWER: 130 130 + len = 0; 131 131 + break; 132 132 + 133 133 + default: 134 134 + return -EPIPE; 135 135 + } 136 136 + break; 137 137 + 138 138 + case SetPortFeature: 139 139 + if (wIndex > C67X00_PORTS) 140 140 + return -EPIPE; 141 141 + 142 142 + switch (wValue) { 143 143 + case USB_PORT_FEAT_SUSPEND: 144 144 + dev_dbg(c67x00_hcd_dev(c67x00), 145 145 + "SetPortFeature %d (SUSPEND)\n", port); 146 146 + len = 0; 147 147 + break; 148 148 + 149 149 + case USB_PORT_FEAT_RESET: 150 150 + c67x00_hub_reset_host_port(sie, port); 151 151 + len = 0; 152 152 + break; 153 153 + 154 154 + case USB_PORT_FEAT_POWER: 155 155 + /* Power always enabled */ 156 156 + len = 0; 157 157 + break; 158 158 + 159 159 + default: 160 160 + dev_dbg(c67x00_hcd_dev(c67x00), 161 161 + "%s: SetPortFeature %d (0x%04x) Error!\n", 162 162 + __func__, port, wValue); 163 163 + return -EPIPE; 164 164 + } 165 165 + break; 166 166 + 167 167 + case ClearPortFeature: 168 168 + if (wIndex > C67X00_PORTS) 169 169 + return -EPIPE; 170 170 + 171 171 + switch (wValue) { 172 172 + case USB_PORT_FEAT_ENABLE: 173 173 + /* Reset the port so that the c67x00 also notices the 174 174 + * disconnect */ 175 175 + c67x00_hub_reset_host_port(sie, port); 176 176 + len = 0; 177 177 + break; 178 178 + 179 179 + case USB_PORT_FEAT_C_ENABLE: 180 180 + dev_dbg(c67x00_hcd_dev(c67x00), 181 181 + "ClearPortFeature (%d): C_ENABLE\n", port); 182 182 + len = 0; 183 183 + break; 184 184 + 185 185 + case USB_PORT_FEAT_SUSPEND: 186 186 + dev_dbg(c67x00_hcd_dev(c67x00), 187 187 + "ClearPortFeature (%d): SUSPEND\n", port); 188 188 + len = 0; 189 189 + break; 190 190 + 191 191 + case USB_PORT_FEAT_C_SUSPEND: 192 192 + dev_dbg(c67x00_hcd_dev(c67x00), 193 193 + "ClearPortFeature (%d): C_SUSPEND\n", port); 194 194 + len = 0; 195 195 + break; 196 196 + 197 197 + case USB_PORT_FEAT_POWER: 198 198 + dev_dbg(c67x00_hcd_dev(c67x00), 199 199 + "ClearPortFeature (%d): POWER\n", port); 200 200 + return -EPIPE; 201 201 + 202 202 + case USB_PORT_FEAT_C_CONNECTION: 203 203 + c67x00_ll_usb_clear_status(sie, 204 204 + PORT_CONNECT_CHANGE(port)); 205 205 + len = 0; 206 206 + break; 207 207 + 208 208 + case USB_PORT_FEAT_C_OVER_CURRENT: 209 209 + dev_dbg(c67x00_hcd_dev(c67x00), 210 210 + "ClearPortFeature (%d): OVER_CURRENT\n", port); 211 211 + len = 0; 212 212 + break; 213 213 + 214 214 + case USB_PORT_FEAT_C_RESET: 215 215 + dev_dbg(c67x00_hcd_dev(c67x00), 216 216 + "ClearPortFeature (%d): C_RESET\n", port); 217 217 + len = 0; 218 218 + break; 219 219 + 220 220 + default: 221 221 + dev_dbg(c67x00_hcd_dev(c67x00), 222 222 + "%s: ClearPortFeature %d (0x%04x) Error!\n", 223 223 + __func__, port, wValue); 224 224 + return -EPIPE; 225 225 + } 226 226 + break; 227 227 + 228 228 + case GetHubDescriptor: 229 229 + len = min_t(unsigned int, sizeof(c67x00_hub_des), wLength); 230 230 + memcpy(buf, c67x00_hub_des, len); 231 231 + break; 232 232 + 233 233 + default: 234 234 + dev_dbg(c67x00_hcd_dev(c67x00), "%s: unknown\n", __func__); 235 235 + return -EPIPE; 236 236 + } 237 237 + 238 238 + return 0; 239 239 + } 240 240 + 241 241 + /* --------------------------------------------------------------------- 242 242 + * Main part of host controller driver 243 243 + */ 244 244 + 245 245 + /** 246 246 + * c67x00_hcd_irq 247 247 + * 248 248 + * This function is called from the interrupt handler in c67x00-drv.c 249 249 + */ 250 250 + static void c67x00_hcd_irq(struct c67x00_sie *sie, u16 int_status, u16 msg) 251 251 + { 252 252 + struct c67x00_hcd *c67x00 = sie->private_data; 253 253 + struct usb_hcd *hcd = c67x00_hcd_to_hcd(c67x00); 254 254 + 255 255 + /* Handle sie message flags */ 256 256 + if (msg) { 257 257 + if (msg & HUSB_TDListDone) 258 258 + c67x00_sched_kick(c67x00); 259 259 + else 260 260 + dev_warn(c67x00_hcd_dev(c67x00), 261 261 + "Unknown SIE msg flag(s): 0x%04x\n", msg); 262 262 + } 263 263 + 264 264 + if (unlikely(hcd->state == HC_STATE_HALT)) 265 265 + return; 266 266 + 267 267 + if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) 268 268 + return; 269 269 + 270 270 + /* Handle Start of frame events */ 271 271 + if (int_status & SOFEOP_FLG(sie->sie_num)) { 272 272 + c67x00_ll_usb_clear_status(sie, SOF_EOP_IRQ_FLG); 273 273 + c67x00_sched_kick(c67x00); 274 274 + set_bit(HCD_FLAG_SAW_IRQ, &hcd->flags); 275 275 + } 276 276 + } 277 277 + 278 278 + /** 279 279 + * c67x00_hcd_start: Host controller start hook 280 280 + */ 281 281 + static int c67x00_hcd_start(struct usb_hcd *hcd) 282 282 + { 283 283 + hcd->uses_new_polling = 1; 284 284 + hcd->state = HC_STATE_RUNNING; 285 285 + hcd->poll_rh = 1; 286 286 + 287 287 + return 0; 288 288 + } 289 289 + 290 290 + /** 291 291 + * c67x00_hcd_stop: Host controller stop hook 292 292 + */ 293 293 + static void c67x00_hcd_stop(struct usb_hcd *hcd) 294 294 + { 295 295 + /* Nothing to do */ 296 296 + } 297 297 + 298 298 + static int c67x00_hcd_get_frame(struct usb_hcd *hcd) 299 299 + { 300 300 + struct c67x00_hcd *c67x00 = hcd_to_c67x00_hcd(hcd); 301 301 + u16 temp_val; 302 302 + 303 303 + dev_dbg(c67x00_hcd_dev(c67x00), "%s\n", __func__); 304 304 + temp_val = c67x00_ll_husb_get_frame(c67x00->sie); 305 305 + temp_val &= HOST_FRAME_MASK; 306 306 + return temp_val ? (temp_val - 1) : HOST_FRAME_MASK; 307 307 + } 308 308 + 309 309 + static struct hc_driver c67x00_hc_driver = { 310 310 + .description = "c67x00-hcd", 311 311 + .product_desc = "Cypress C67X00 Host Controller", 312 312 + .hcd_priv_size = sizeof(struct c67x00_hcd), 313 313 + .flags = HCD_USB11 | HCD_MEMORY, 314 314 + 315 315 + /* 316 316 + * basic lifecycle operations 317 317 + */ 318 318 + .start = c67x00_hcd_start, 319 319 + .stop = c67x00_hcd_stop, 320 320 + 321 321 + /* 322 322 + * managing i/o requests and associated device resources 323 323 + */ 324 324 + .urb_enqueue = c67x00_urb_enqueue, 325 325 + .urb_dequeue = c67x00_urb_dequeue, 326 326 + .endpoint_disable = c67x00_endpoint_disable, 327 327 + 328 328 + /* 329 329 + * scheduling support 330 330 + */ 331 331 + .get_frame_number = c67x00_hcd_get_frame, 332 332 + 333 333 + /* 334 334 + * root hub support 335 335 + */ 336 336 + .hub_status_data = c67x00_hub_status_data, 337 337 + .hub_control = c67x00_hub_control, 338 338 + }; 339 339 + 340 340 + /* --------------------------------------------------------------------- 341 341 + * Setup/Teardown routines 342 342 + */ 343 343 + 344 344 + int c67x00_hcd_probe(struct c67x00_sie *sie) 345 345 + { 346 346 + struct c67x00_hcd *c67x00; 347 347 + struct usb_hcd *hcd; 348 348 + unsigned long flags; 349 349 + int retval; 350 350 + 351 351 + if (usb_disabled()) 352 352 + return -ENODEV; 353 353 + 354 354 + hcd = usb_create_hcd(&c67x00_hc_driver, sie_dev(sie), "c67x00_sie"); 355 355 + if (!hcd) { 356 356 + retval = -ENOMEM; 357 357 + goto err0; 358 358 + } 359 359 + c67x00 = hcd_to_c67x00_hcd(hcd); 360 360 + 361 361 + spin_lock_init(&c67x00->lock); 362 362 + c67x00->sie = sie; 363 363 + 364 364 + INIT_LIST_HEAD(&c67x00->list[PIPE_ISOCHRONOUS]); 365 365 + INIT_LIST_HEAD(&c67x00->list[PIPE_INTERRUPT]); 366 366 + INIT_LIST_HEAD(&c67x00->list[PIPE_CONTROL]); 367 367 + INIT_LIST_HEAD(&c67x00->list[PIPE_BULK]); 368 368 + c67x00->urb_count = 0; 369 369 + INIT_LIST_HEAD(&c67x00->td_list); 370 370 + c67x00->td_base_addr = CY_HCD_BUF_ADDR + SIE_TD_OFFSET(sie->sie_num); 371 371 + c67x00->buf_base_addr = CY_HCD_BUF_ADDR + SIE_BUF_OFFSET(sie->sie_num); 372 372 + c67x00->max_frame_bw = MAX_FRAME_BW_STD; 373 373 + 374 374 + c67x00_ll_husb_init_host_port(sie); 375 375 + 376 376 + init_completion(&c67x00->endpoint_disable); 377 377 + retval = c67x00_sched_start_scheduler(c67x00); 378 378 + if (retval) 379 379 + goto err1; 380 380 + 381 381 + retval = usb_add_hcd(hcd, 0, 0); 382 382 + if (retval) { 383 383 + dev_dbg(sie_dev(sie), "%s: usb_add_hcd returned %d\n", 384 384 + __func__, retval); 385 385 + goto err2; 386 386 + } 387 387 + 388 388 + spin_lock_irqsave(&sie->lock, flags); 389 389 + sie->private_data = c67x00; 390 390 + sie->irq = c67x00_hcd_irq; 391 391 + spin_unlock_irqrestore(&sie->lock, flags); 392 392 + 393 393 + return retval; 394 394 + 395 395 + err2: 396 396 + c67x00_sched_stop_scheduler(c67x00); 397 397 + err1: 398 398 + usb_put_hcd(hcd); 399 399 + err0: 400 400 + return retval; 401 401 + } 402 402 + 403 403 + /* may be called with controller, bus, and devices active */ 404 404 + void c67x00_hcd_remove(struct c67x00_sie *sie) 405 405 + { 406 406 + struct c67x00_hcd *c67x00 = sie->private_data; 407 407 + struct usb_hcd *hcd = c67x00_hcd_to_hcd(c67x00); 408 408 + 409 409 + c67x00_sched_stop_scheduler(c67x00); 410 410 + usb_remove_hcd(hcd); 411 411 + usb_put_hcd(hcd); 412 412 + }

+133

drivers/usb/c67x00/c67x00-hcd.h

reviewed

··· 1 1 + /* 2 2 + * c67x00-hcd.h: Cypress C67X00 USB HCD 3 3 + * 4 4 + * Copyright (C) 2006-2008 Barco N.V. 5 5 + * Derived from the Cypress cy7c67200/300 ezusb linux driver and 6 6 + * based on multiple host controller drivers inside the linux kernel. 7 7 + * 8 8 + * This program is free software; you can redistribute it and/or modify 9 9 + * it under the terms of the GNU General Public License as published by 10 10 + * the Free Software Foundation; either version 2 of the License, or 11 11 + * (at your option) any later version. 12 12 + * 13 13 + * This program is distributed in the hope that it will be useful, 14 14 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 15 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 16 + * GNU General Public License for more details. 17 17 + * 18 18 + * You should have received a copy of the GNU General Public License 19 19 + * along with this program; if not, write to the Free Software 20 20 + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 21 21 + * MA 02110-1301 USA. 22 22 + */ 23 23 + 24 24 + #ifndef _USB_C67X00_HCD_H 25 25 + #define _USB_C67X00_HCD_H 26 26 + 27 27 + #include <linux/kernel.h> 28 28 + #include <linux/spinlock.h> 29 29 + #include <linux/list.h> 30 30 + #include <linux/usb.h> 31 31 + #include "../core/hcd.h" 32 32 + #include "c67x00.h" 33 33 + 34 34 + /* 35 35 + * The following parameters depend on the CPU speed, bus speed, ... 36 36 + * These can be tuned for specific use cases, e.g. if isochronous transfers 37 37 + * are very important, bandwith can be sacrificed to guarantee that the 38 38 + * 1ms deadline will be met. 39 39 + * If bulk transfers are important, the MAX_FRAME_BW can be increased, 40 40 + * but some (or many) isochronous deadlines might not be met. 41 41 + * 42 42 + * The values are specified in bittime. 43 43 + */ 44 44 + 45 45 + /* 46 46 + * The current implementation switches between _STD (default) and _ISO (when 47 47 + * isochronous transfers are scheduled), in order to optimize the throughput 48 48 + * in normal cicrumstances, but also provide good isochronous behaviour. 49 49 + * 50 50 + * Bandwidth is described in bit time so with a 12MHz USB clock and 1ms 51 51 + * frames; there are 12000 bit times per frame. 52 52 + */ 53 53 + 54 54 + #define TOTAL_FRAME_BW 12000 55 55 + #define DEFAULT_EOT 2250 56 56 + 57 57 + #define MAX_FRAME_BW_STD (TOTAL_FRAME_BW - DEFAULT_EOT) 58 58 + #define MAX_FRAME_BW_ISO 2400 59 59 + 60 60 + /* 61 61 + * Periodic transfers may only use 90% of the full frame, but as 62 62 + * we currently don't even use 90% of the full frame, we may 63 63 + * use the full usable time for periodic transfers. 64 64 + */ 65 65 + #define MAX_PERIODIC_BW(full_bw) full_bw 66 66 + 67 67 + /* -------------------------------------------------------------------------- */ 68 68 + 69 69 + struct c67x00_hcd { 70 70 + spinlock_t lock; 71 71 + struct c67x00_sie *sie; 72 72 + unsigned int low_speed_ports; /* bitmask of low speed ports */ 73 73 + unsigned int urb_count; 74 74 + unsigned int urb_iso_count; 75 75 + 76 76 + struct list_head list[4]; /* iso, int, ctrl, bulk */ 77 77 + #if PIPE_BULK != 3 78 78 + #error "Sanity check failed, this code presumes PIPE_... to range from 0 to 3" 79 79 + #endif 80 80 + 81 81 + /* USB bandwidth allocated to td_list */ 82 82 + int bandwidth_allocated; 83 83 + /* USB bandwidth allocated for isoc/int transfer */ 84 84 + int periodic_bw_allocated; 85 85 + struct list_head td_list; 86 86 + int max_frame_bw; 87 87 + 88 88 + u16 td_base_addr; 89 89 + u16 buf_base_addr; 90 90 + u16 next_td_addr; 91 91 + u16 next_buf_addr; 92 92 + 93 93 + struct tasklet_struct tasklet; 94 94 + 95 95 + struct completion endpoint_disable; 96 96 + 97 97 + u16 current_frame; 98 98 + u16 last_frame; 99 99 + }; 100 100 + 101 101 + static inline struct c67x00_hcd *hcd_to_c67x00_hcd(struct usb_hcd *hcd) 102 102 + { 103 103 + return (struct c67x00_hcd *)(hcd->hcd_priv); 104 104 + } 105 105 + 106 106 + static inline struct usb_hcd *c67x00_hcd_to_hcd(struct c67x00_hcd *c67x00) 107 107 + { 108 108 + return container_of((void *)c67x00, struct usb_hcd, hcd_priv); 109 109 + } 110 110 + 111 111 + /* --------------------------------------------------------------------- 112 112 + * Functions used by c67x00-drv 113 113 + */ 114 114 + 115 115 + int c67x00_hcd_probe(struct c67x00_sie *sie); 116 116 + void c67x00_hcd_remove(struct c67x00_sie *sie); 117 117 + 118 118 + /* --------------------------------------------------------------------- 119 119 + * Transfer Descriptor scheduling functions 120 120 + */ 121 121 + int c67x00_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags); 122 122 + int c67x00_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status); 123 123 + void c67x00_endpoint_disable(struct usb_hcd *hcd, 124 124 + struct usb_host_endpoint *ep); 125 125 + 126 126 + void c67x00_hcd_msg_received(struct c67x00_sie *sie, u16 msg); 127 127 + void c67x00_sched_kick(struct c67x00_hcd *c67x00); 128 128 + int c67x00_sched_start_scheduler(struct c67x00_hcd *c67x00); 129 129 + void c67x00_sched_stop_scheduler(struct c67x00_hcd *c67x00); 130 130 + 131 131 + #define c67x00_hcd_dev(x) (c67x00_hcd_to_hcd(x)->self.controller) 132 132 + 133 133 + #endif /* _USB_C67X00_HCD_H */

+480

drivers/usb/c67x00/c67x00-ll-hpi.c

reviewed

··· 1 1 + /* 2 2 + * c67x00-ll-hpi.c: Cypress C67X00 USB Low level interface using HPI 3 3 + * 4 4 + * Copyright (C) 2006-2008 Barco N.V. 5 5 + * Derived from the Cypress cy7c67200/300 ezusb linux driver and 6 6 + * based on multiple host controller drivers inside the linux kernel. 7 7 + * 8 8 + * This program is free software; you can redistribute it and/or modify 9 9 + * it under the terms of the GNU General Public License as published by 10 10 + * the Free Software Foundation; either version 2 of the License, or 11 11 + * (at your option) any later version. 12 12 + * 13 13 + * This program is distributed in the hope that it will be useful, 14 14 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 15 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 16 + * GNU General Public License for more details. 17 17 + * 18 18 + * You should have received a copy of the GNU General Public License 19 19 + * along with this program; if not, write to the Free Software 20 20 + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 21 21 + * MA 02110-1301 USA. 22 22 + */ 23 23 + 24 24 + #include <asm/byteorder.h> 25 25 + #include <linux/io.h> 26 26 + #include <linux/usb/c67x00.h> 27 27 + #include "c67x00.h" 28 28 + 29 29 + #define COMM_REGS 14 30 30 + 31 31 + struct c67x00_lcp_int_data { 32 32 + u16 regs[COMM_REGS]; 33 33 + }; 34 34 + 35 35 + /* -------------------------------------------------------------------------- */ 36 36 + /* Interface definitions */ 37 37 + 38 38 + #define COMM_ACK 0x0FED 39 39 + #define COMM_NAK 0xDEAD 40 40 + 41 41 + #define COMM_RESET 0xFA50 42 42 + #define COMM_EXEC_INT 0xCE01 43 43 + #define COMM_INT_NUM 0x01C2 44 44 + 45 45 + /* Registers 0 to COMM_REGS-1 */ 46 46 + #define COMM_R(x) (0x01C4 + 2 * (x)) 47 47 + 48 48 + #define HUSB_SIE_pCurrentTDPtr(x) ((x) ? 0x01B2 : 0x01B0) 49 49 + #define HUSB_SIE_pTDListDone_Sem(x) ((x) ? 0x01B8 : 0x01B6) 50 50 + #define HUSB_pEOT 0x01B4 51 51 + 52 52 + /* Software interrupts */ 53 53 + /* 114, 115: */ 54 54 + #define HUSB_SIE_INIT_INT(x) ((x) ? 0x0073 : 0x0072) 55 55 + #define HUSB_RESET_INT 0x0074 56 56 + 57 57 + #define SUSB_INIT_INT 0x0071 58 58 + #define SUSB_INIT_INT_LOC (SUSB_INIT_INT * 2) 59 59 + 60 60 + /* ----------------------------------------------------------------------- 61 61 + * HPI implementation 62 62 + * 63 63 + * The c67x00 chip also support control via SPI or HSS serial 64 64 + * interfaces. However, this driver assumes that register access can 65 65 + * be performed from IRQ context. While this is a safe assuption with 66 66 + * the HPI interface, it is not true for the serial interfaces. 67 67 + */ 68 68 + 69 69 + /* HPI registers */ 70 70 + #define HPI_DATA 0 71 71 + #define HPI_MAILBOX 1 72 72 + #define HPI_ADDR 2 73 73 + #define HPI_STATUS 3 74 74 + 75 75 + static inline u16 hpi_read_reg(struct c67x00_device *dev, int reg) 76 76 + { 77 77 + return __raw_readw(dev->hpi.base + reg * dev->hpi.regstep); 78 78 + } 79 79 + 80 80 + static inline void hpi_write_reg(struct c67x00_device *dev, int reg, u16 value) 81 81 + { 82 82 + __raw_writew(value, dev->hpi.base + reg * dev->hpi.regstep); 83 83 + } 84 84 + 85 85 + static inline u16 hpi_read_word_nolock(struct c67x00_device *dev, u16 reg) 86 86 + { 87 87 + hpi_write_reg(dev, HPI_ADDR, reg); 88 88 + return hpi_read_reg(dev, HPI_DATA); 89 89 + } 90 90 + 91 91 + static u16 hpi_read_word(struct c67x00_device *dev, u16 reg) 92 92 + { 93 93 + u16 value; 94 94 + unsigned long flags; 95 95 + 96 96 + spin_lock_irqsave(&dev->hpi.lock, flags); 97 97 + value = hpi_read_word_nolock(dev, reg); 98 98 + spin_unlock_irqrestore(&dev->hpi.lock, flags); 99 99 + 100 100 + return value; 101 101 + } 102 102 + 103 103 + static void hpi_write_word_nolock(struct c67x00_device *dev, u16 reg, u16 value) 104 104 + { 105 105 + hpi_write_reg(dev, HPI_ADDR, reg); 106 106 + hpi_write_reg(dev, HPI_DATA, value); 107 107 + } 108 108 + 109 109 + static void hpi_write_word(struct c67x00_device *dev, u16 reg, u16 value) 110 110 + { 111 111 + unsigned long flags; 112 112 + 113 113 + spin_lock_irqsave(&dev->hpi.lock, flags); 114 114 + hpi_write_word_nolock(dev, reg, value); 115 115 + spin_unlock_irqrestore(&dev->hpi.lock, flags); 116 116 + } 117 117 + 118 118 + /* 119 119 + * Only data is little endian, addr has cpu endianess 120 120 + */ 121 121 + static void hpi_write_words_le16(struct c67x00_device *dev, u16 addr, 122 122 + u16 *data, u16 count) 123 123 + { 124 124 + unsigned long flags; 125 125 + int i; 126 126 + 127 127 + spin_lock_irqsave(&dev->hpi.lock, flags); 128 128 + 129 129 + hpi_write_reg(dev, HPI_ADDR, addr); 130 130 + for (i = 0; i < count; i++) 131 131 + hpi_write_reg(dev, HPI_DATA, cpu_to_le16(*data++)); 132 132 + 133 133 + spin_unlock_irqrestore(&dev->hpi.lock, flags); 134 134 + } 135 135 + 136 136 + /* 137 137 + * Only data is little endian, addr has cpu endianess 138 138 + */ 139 139 + static void hpi_read_words_le16(struct c67x00_device *dev, u16 addr, 140 140 + u16 *data, u16 count) 141 141 + { 142 142 + unsigned long flags; 143 143 + int i; 144 144 + 145 145 + spin_lock_irqsave(&dev->hpi.lock, flags); 146 146 + hpi_write_reg(dev, HPI_ADDR, addr); 147 147 + for (i = 0; i < count; i++) 148 148 + *data++ = le16_to_cpu(hpi_read_reg(dev, HPI_DATA)); 149 149 + 150 150 + spin_unlock_irqrestore(&dev->hpi.lock, flags); 151 151 + } 152 152 + 153 153 + static void hpi_set_bits(struct c67x00_device *dev, u16 reg, u16 mask) 154 154 + { 155 155 + u16 value; 156 156 + unsigned long flags; 157 157 + 158 158 + spin_lock_irqsave(&dev->hpi.lock, flags); 159 159 + value = hpi_read_word_nolock(dev, reg); 160 160 + hpi_write_word_nolock(dev, reg, value | mask); 161 161 + spin_unlock_irqrestore(&dev->hpi.lock, flags); 162 162 + } 163 163 + 164 164 + static void hpi_clear_bits(struct c67x00_device *dev, u16 reg, u16 mask) 165 165 + { 166 166 + u16 value; 167 167 + unsigned long flags; 168 168 + 169 169 + spin_lock_irqsave(&dev->hpi.lock, flags); 170 170 + value = hpi_read_word_nolock(dev, reg); 171 171 + hpi_write_word_nolock(dev, reg, value & ~mask); 172 172 + spin_unlock_irqrestore(&dev->hpi.lock, flags); 173 173 + } 174 174 + 175 175 + static u16 hpi_recv_mbox(struct c67x00_device *dev) 176 176 + { 177 177 + u16 value; 178 178 + unsigned long flags; 179 179 + 180 180 + spin_lock_irqsave(&dev->hpi.lock, flags); 181 181 + value = hpi_read_reg(dev, HPI_MAILBOX); 182 182 + spin_unlock_irqrestore(&dev->hpi.lock, flags); 183 183 + 184 184 + return value; 185 185 + } 186 186 + 187 187 + static u16 hpi_send_mbox(struct c67x00_device *dev, u16 value) 188 188 + { 189 189 + unsigned long flags; 190 190 + 191 191 + spin_lock_irqsave(&dev->hpi.lock, flags); 192 192 + hpi_write_reg(dev, HPI_MAILBOX, value); 193 193 + spin_unlock_irqrestore(&dev->hpi.lock, flags); 194 194 + 195 195 + return value; 196 196 + } 197 197 + 198 198 + u16 c67x00_ll_hpi_status(struct c67x00_device *dev) 199 199 + { 200 200 + u16 value; 201 201 + unsigned long flags; 202 202 + 203 203 + spin_lock_irqsave(&dev->hpi.lock, flags); 204 204 + value = hpi_read_reg(dev, HPI_STATUS); 205 205 + spin_unlock_irqrestore(&dev->hpi.lock, flags); 206 206 + 207 207 + return value; 208 208 + } 209 209 + 210 210 + void c67x00_ll_hpi_reg_init(struct c67x00_device *dev) 211 211 + { 212 212 + int i; 213 213 + 214 214 + hpi_recv_mbox(dev); 215 215 + c67x00_ll_hpi_status(dev); 216 216 + hpi_write_word(dev, HPI_IRQ_ROUTING_REG, 0); 217 217 + 218 218 + for (i = 0; i < C67X00_SIES; i++) { 219 219 + hpi_write_word(dev, SIEMSG_REG(i), 0); 220 220 + hpi_read_word(dev, SIEMSG_REG(i)); 221 221 + } 222 222 + } 223 223 + 224 224 + void c67x00_ll_hpi_enable_sofeop(struct c67x00_sie *sie) 225 225 + { 226 226 + hpi_set_bits(sie->dev, HPI_IRQ_ROUTING_REG, 227 227 + SOFEOP_TO_HPI_EN(sie->sie_num)); 228 228 + } 229 229 + 230 230 + void c67x00_ll_hpi_disable_sofeop(struct c67x00_sie *sie) 231 231 + { 232 232 + hpi_clear_bits(sie->dev, HPI_IRQ_ROUTING_REG, 233 233 + SOFEOP_TO_HPI_EN(sie->sie_num)); 234 234 + } 235 235 + 236 236 + /* -------------------------------------------------------------------------- */ 237 237 + /* Transactions */ 238 238 + 239 239 + static inline u16 ll_recv_msg(struct c67x00_device *dev) 240 240 + { 241 241 + u16 res; 242 242 + 243 243 + res = wait_for_completion_timeout(&dev->hpi.lcp.msg_received, 5 * HZ); 244 244 + WARN_ON(!res); 245 245 + 246 246 + return (res == 0) ? -EIO : 0; 247 247 + } 248 248 + 249 249 + /* -------------------------------------------------------------------------- */ 250 250 + /* General functions */ 251 251 + 252 252 + u16 c67x00_ll_fetch_siemsg(struct c67x00_device *dev, int sie_num) 253 253 + { 254 254 + u16 val; 255 255 + 256 256 + val = hpi_read_word(dev, SIEMSG_REG(sie_num)); 257 257 + /* clear register to allow next message */ 258 258 + hpi_write_word(dev, SIEMSG_REG(sie_num), 0); 259 259 + 260 260 + return val; 261 261 + } 262 262 + 263 263 + u16 c67x00_ll_get_usb_ctl(struct c67x00_sie *sie) 264 264 + { 265 265 + return hpi_read_word(sie->dev, USB_CTL_REG(sie->sie_num)); 266 266 + } 267 267 + 268 268 + /** 269 269 + * c67x00_ll_usb_clear_status - clear the USB status bits 270 270 + */ 271 271 + void c67x00_ll_usb_clear_status(struct c67x00_sie *sie, u16 bits) 272 272 + { 273 273 + hpi_write_word(sie->dev, USB_STAT_REG(sie->sie_num), bits); 274 274 + } 275 275 + 276 276 + u16 c67x00_ll_usb_get_status(struct c67x00_sie *sie) 277 277 + { 278 278 + return hpi_read_word(sie->dev, USB_STAT_REG(sie->sie_num)); 279 279 + } 280 280 + 281 281 + /* -------------------------------------------------------------------------- */ 282 282 + 283 283 + static int c67x00_comm_exec_int(struct c67x00_device *dev, u16 nr, 284 284 + struct c67x00_lcp_int_data *data) 285 285 + { 286 286 + int i, rc; 287 287 + 288 288 + mutex_lock(&dev->hpi.lcp.mutex); 289 289 + hpi_write_word(dev, COMM_INT_NUM, nr); 290 290 + for (i = 0; i < COMM_REGS; i++) 291 291 + hpi_write_word(dev, COMM_R(i), data->regs[i]); 292 292 + hpi_send_mbox(dev, COMM_EXEC_INT); 293 293 + rc = ll_recv_msg(dev); 294 294 + mutex_unlock(&dev->hpi.lcp.mutex); 295 295 + 296 296 + return rc; 297 297 + } 298 298 + 299 299 + /* -------------------------------------------------------------------------- */ 300 300 + /* Host specific functions */ 301 301 + 302 302 + void c67x00_ll_set_husb_eot(struct c67x00_device *dev, u16 value) 303 303 + { 304 304 + mutex_lock(&dev->hpi.lcp.mutex); 305 305 + hpi_write_word(dev, HUSB_pEOT, value); 306 306 + mutex_unlock(&dev->hpi.lcp.mutex); 307 307 + } 308 308 + 309 309 + static inline void c67x00_ll_husb_sie_init(struct c67x00_sie *sie) 310 310 + { 311 311 + struct c67x00_device *dev = sie->dev; 312 312 + struct c67x00_lcp_int_data data; 313 313 + int rc; 314 314 + 315 315 + rc = c67x00_comm_exec_int(dev, HUSB_SIE_INIT_INT(sie->sie_num), &data); 316 316 + BUG_ON(rc); /* No return path for error code; crash spectacularly */ 317 317 + } 318 318 + 319 319 + void c67x00_ll_husb_reset(struct c67x00_sie *sie, int port) 320 320 + { 321 321 + struct c67x00_device *dev = sie->dev; 322 322 + struct c67x00_lcp_int_data data; 323 323 + int rc; 324 324 + 325 325 + data.regs[0] = 50; /* Reset USB port for 50ms */ 326 326 + data.regs[1] = port | (sie->sie_num << 1); 327 327 + rc = c67x00_comm_exec_int(dev, HUSB_RESET_INT, &data); 328 328 + BUG_ON(rc); /* No return path for error code; crash spectacularly */ 329 329 + } 330 330 + 331 331 + void c67x00_ll_husb_set_current_td(struct c67x00_sie *sie, u16 addr) 332 332 + { 333 333 + hpi_write_word(sie->dev, HUSB_SIE_pCurrentTDPtr(sie->sie_num), addr); 334 334 + } 335 335 + 336 336 + u16 c67x00_ll_husb_get_current_td(struct c67x00_sie *sie) 337 337 + { 338 338 + return hpi_read_word(sie->dev, HUSB_SIE_pCurrentTDPtr(sie->sie_num)); 339 339 + } 340 340 + 341 341 + u16 c67x00_ll_husb_get_frame(struct c67x00_sie *sie) 342 342 + { 343 343 + return hpi_read_word(sie->dev, HOST_FRAME_REG(sie->sie_num)); 344 344 + } 345 345 + 346 346 + void c67x00_ll_husb_init_host_port(struct c67x00_sie *sie) 347 347 + { 348 348 + /* Set port into host mode */ 349 349 + hpi_set_bits(sie->dev, USB_CTL_REG(sie->sie_num), HOST_MODE); 350 350 + c67x00_ll_husb_sie_init(sie); 351 351 + /* Clear interrupts */ 352 352 + c67x00_ll_usb_clear_status(sie, HOST_STAT_MASK); 353 353 + /* Check */ 354 354 + if (!(hpi_read_word(sie->dev, USB_CTL_REG(sie->sie_num)) & HOST_MODE)) 355 355 + dev_warn(sie_dev(sie), 356 356 + "SIE %d not set to host mode\n", sie->sie_num); 357 357 + } 358 358 + 359 359 + void c67x00_ll_husb_reset_port(struct c67x00_sie *sie, int port) 360 360 + { 361 361 + /* Clear connect change */ 362 362 + c67x00_ll_usb_clear_status(sie, PORT_CONNECT_CHANGE(port)); 363 363 + 364 364 + /* Enable interrupts */ 365 365 + hpi_set_bits(sie->dev, HPI_IRQ_ROUTING_REG, 366 366 + SOFEOP_TO_CPU_EN(sie->sie_num)); 367 367 + hpi_set_bits(sie->dev, HOST_IRQ_EN_REG(sie->sie_num), 368 368 + SOF_EOP_IRQ_EN | DONE_IRQ_EN); 369 369 + 370 370 + /* Enable pull down transistors */ 371 371 + hpi_set_bits(sie->dev, USB_CTL_REG(sie->sie_num), PORT_RES_EN(port)); 372 372 + } 373 373 + 374 374 + /* -------------------------------------------------------------------------- */ 375 375 + 376 376 + void c67x00_ll_irq(struct c67x00_device *dev, u16 int_status) 377 377 + { 378 378 + if ((int_status & MBX_OUT_FLG) == 0) 379 379 + return; 380 380 + 381 381 + dev->hpi.lcp.last_msg = hpi_recv_mbox(dev); 382 382 + complete(&dev->hpi.lcp.msg_received); 383 383 + } 384 384 + 385 385 + /* -------------------------------------------------------------------------- */ 386 386 + 387 387 + int c67x00_ll_reset(struct c67x00_device *dev) 388 388 + { 389 389 + int rc; 390 390 + 391 391 + mutex_lock(&dev->hpi.lcp.mutex); 392 392 + hpi_send_mbox(dev, COMM_RESET); 393 393 + rc = ll_recv_msg(dev); 394 394 + mutex_unlock(&dev->hpi.lcp.mutex); 395 395 + 396 396 + return rc; 397 397 + } 398 398 + 399 399 + /* -------------------------------------------------------------------------- */ 400 400 + 401 401 + /** 402 402 + * c67x00_ll_write_mem_le16 - write into c67x00 memory 403 403 + * Only data is little endian, addr has cpu endianess. 404 404 + */ 405 405 + void c67x00_ll_write_mem_le16(struct c67x00_device *dev, u16 addr, 406 406 + void *data, int len) 407 407 + { 408 408 + u8 *buf = data; 409 409 + 410 410 + /* Sanity check */ 411 411 + if (addr + len > 0xffff) { 412 412 + dev_err(&dev->pdev->dev, 413 413 + "Trying to write beyond writable region!\n"); 414 414 + return; 415 415 + } 416 416 + 417 417 + if (addr & 0x01) { 418 418 + /* unaligned access */ 419 419 + u16 tmp; 420 420 + tmp = hpi_read_word(dev, addr - 1); 421 421 + tmp = (tmp & 0x00ff) | (*buf++ << 8); 422 422 + hpi_write_word(dev, addr - 1, tmp); 423 423 + addr++; 424 424 + len--; 425 425 + } 426 426 + 427 427 + hpi_write_words_le16(dev, addr, (u16 *)buf, len / 2); 428 428 + buf += len & ~0x01; 429 429 + addr += len & ~0x01; 430 430 + len &= 0x01; 431 431 + 432 432 + if (len) { 433 433 + u16 tmp; 434 434 + tmp = hpi_read_word(dev, addr); 435 435 + tmp = (tmp & 0xff00) | *buf; 436 436 + hpi_write_word(dev, addr, tmp); 437 437 + } 438 438 + } 439 439 + 440 440 + /** 441 441 + * c67x00_ll_read_mem_le16 - read from c67x00 memory 442 442 + * Only data is little endian, addr has cpu endianess. 443 443 + */ 444 444 + void c67x00_ll_read_mem_le16(struct c67x00_device *dev, u16 addr, 445 445 + void *data, int len) 446 446 + { 447 447 + u8 *buf = data; 448 448 + 449 449 + if (addr & 0x01) { 450 450 + /* unaligned access */ 451 451 + u16 tmp; 452 452 + tmp = hpi_read_word(dev, addr - 1); 453 453 + *buf++ = (tmp >> 8) & 0x00ff; 454 454 + addr++; 455 455 + len--; 456 456 + } 457 457 + 458 458 + hpi_read_words_le16(dev, addr, (u16 *)buf, len / 2); 459 459 + buf += len & ~0x01; 460 460 + addr += len & ~0x01; 461 461 + len &= 0x01; 462 462 + 463 463 + if (len) { 464 464 + u16 tmp; 465 465 + tmp = hpi_read_word(dev, addr); 466 466 + *buf = tmp & 0x00ff; 467 467 + } 468 468 + } 469 469 + 470 470 + /* -------------------------------------------------------------------------- */ 471 471 + 472 472 + void c67x00_ll_init(struct c67x00_device *dev) 473 473 + { 474 474 + mutex_init(&dev->hpi.lcp.mutex); 475 475 + init_completion(&dev->hpi.lcp.msg_received); 476 476 + } 477 477 + 478 478 + void c67x00_ll_release(struct c67x00_device *dev) 479 479 + { 480 480 + }

+1170

drivers/usb/c67x00/c67x00-sched.c

reviewed

··· 1 1 + /* 2 2 + * c67x00-sched.c: Cypress C67X00 USB Host Controller Driver - TD scheduling 3 3 + * 4 4 + * Copyright (C) 2006-2008 Barco N.V. 5 5 + * Derived from the Cypress cy7c67200/300 ezusb linux driver and 6 6 + * based on multiple host controller drivers inside the linux kernel. 7 7 + * 8 8 + * This program is free software; you can redistribute it and/or modify 9 9 + * it under the terms of the GNU General Public License as published by 10 10 + * the Free Software Foundation; either version 2 of the License, or 11 11 + * (at your option) any later version. 12 12 + * 13 13 + * This program is distributed in the hope that it will be useful, 14 14 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 15 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 16 + * GNU General Public License for more details. 17 17 + * 18 18 + * You should have received a copy of the GNU General Public License 19 19 + * along with this program; if not, write to the Free Software 20 20 + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 21 21 + * MA 02110-1301 USA. 22 22 + */ 23 23 + 24 24 + #include <linux/kthread.h> 25 25 + 26 26 + #include "c67x00.h" 27 27 + #include "c67x00-hcd.h" 28 28 + 29 29 + /* 30 30 + * These are the stages for a control urb, they are kept 31 31 + * in both urb->interval and td->privdata. 32 32 + */ 33 33 + #define SETUP_STAGE 0 34 34 + #define DATA_STAGE 1 35 35 + #define STATUS_STAGE 2 36 36 + 37 37 + /* -------------------------------------------------------------------------- */ 38 38 + 39 39 + /** 40 40 + * struct c67x00_ep_data: Host endpoint data structure 41 41 + */ 42 42 + struct c67x00_ep_data { 43 43 + struct list_head queue; 44 44 + struct list_head node; 45 45 + struct usb_host_endpoint *hep; 46 46 + struct usb_device *dev; 47 47 + u16 next_frame; /* For int/isoc transactions */ 48 48 + }; 49 49 + 50 50 + /** 51 51 + * struct c67x00_td 52 52 + * 53 53 + * Hardware parts are little endiannes, SW in CPU endianess. 54 54 + */ 55 55 + struct c67x00_td { 56 56 + /* HW specific part */ 57 57 + __le16 ly_base_addr; /* Bytes 0-1 */ 58 58 + __le16 port_length; /* Bytes 2-3 */ 59 59 + u8 pid_ep; /* Byte 4 */ 60 60 + u8 dev_addr; /* Byte 5 */ 61 61 + u8 ctrl_reg; /* Byte 6 */ 62 62 + u8 status; /* Byte 7 */ 63 63 + u8 retry_cnt; /* Byte 8 */ 64 64 + #define TT_OFFSET 2 65 65 + #define TT_CONTROL 0 66 66 + #define TT_ISOCHRONOUS 1 67 67 + #define TT_BULK 2 68 68 + #define TT_INTERRUPT 3 69 69 + u8 residue; /* Byte 9 */ 70 70 + __le16 next_td_addr; /* Bytes 10-11 */ 71 71 + /* SW part */ 72 72 + struct list_head td_list; 73 73 + u16 td_addr; 74 74 + void *data; 75 75 + struct urb *urb; 76 76 + unsigned long privdata; 77 77 + 78 78 + /* These are needed for handling the toggle bits: 79 79 + * an urb can be dequeued while a td is in progress 80 80 + * after checking the td, the toggle bit might need to 81 81 + * be fixed */ 82 82 + struct c67x00_ep_data *ep_data; 83 83 + unsigned int pipe; 84 84 + }; 85 85 + 86 86 + struct c67x00_urb_priv { 87 87 + struct list_head hep_node; 88 88 + struct urb *urb; 89 89 + int port; 90 90 + int cnt; /* packet number for isoc */ 91 91 + int status; 92 92 + struct c67x00_ep_data *ep_data; 93 93 + }; 94 94 + 95 95 + #define td_udev(td) ((td)->ep_data->dev) 96 96 + 97 97 + #define CY_TD_SIZE 12 98 98 + 99 99 + #define TD_PIDEP_OFFSET 0x04 100 100 + #define TD_PIDEPMASK_PID 0xF0 101 101 + #define TD_PIDEPMASK_EP 0x0F 102 102 + #define TD_PORTLENMASK_DL 0x02FF 103 103 + #define TD_PORTLENMASK_PN 0xC000 104 104 + 105 105 + #define TD_STATUS_OFFSET 0x07 106 106 + #define TD_STATUSMASK_ACK 0x01 107 107 + #define TD_STATUSMASK_ERR 0x02 108 108 + #define TD_STATUSMASK_TMOUT 0x04 109 109 + #define TD_STATUSMASK_SEQ 0x08 110 110 + #define TD_STATUSMASK_SETUP 0x10 111 111 + #define TD_STATUSMASK_OVF 0x20 112 112 + #define TD_STATUSMASK_NAK 0x40 113 113 + #define TD_STATUSMASK_STALL 0x80 114 114 + 115 115 + #define TD_ERROR_MASK (TD_STATUSMASK_ERR | TD_STATUSMASK_TMOUT | \ 116 116 + TD_STATUSMASK_STALL) 117 117 + 118 118 + #define TD_RETRYCNT_OFFSET 0x08 119 119 + #define TD_RETRYCNTMASK_ACT_FLG 0x10 120 120 + #define TD_RETRYCNTMASK_TX_TYPE 0x0C 121 121 + #define TD_RETRYCNTMASK_RTY_CNT 0x03 122 122 + 123 123 + #define TD_RESIDUE_OVERFLOW 0x80 124 124 + 125 125 + #define TD_PID_IN 0x90 126 126 + 127 127 + /* Residue: signed 8bits, neg -> OVERFLOW, pos -> UNDERFLOW */ 128 128 + #define td_residue(td) ((__s8)(td->residue)) 129 129 + #define td_ly_base_addr(td) (__le16_to_cpu((td)->ly_base_addr)) 130 130 + #define td_port_length(td) (__le16_to_cpu((td)->port_length)) 131 131 + #define td_next_td_addr(td) (__le16_to_cpu((td)->next_td_addr)) 132 132 + 133 133 + #define td_active(td) ((td)->retry_cnt & TD_RETRYCNTMASK_ACT_FLG) 134 134 + #define td_length(td) (td_port_length(td) & TD_PORTLENMASK_DL) 135 135 + 136 136 + #define td_sequence_ok(td) (!td->status || \ 137 137 + (!(td->status & TD_STATUSMASK_SEQ) == \ 138 138 + !(td->ctrl_reg & SEQ_SEL))) 139 139 + 140 140 + #define td_acked(td) (!td->status || \ 141 141 + (td->status & TD_STATUSMASK_ACK)) 142 142 + #define td_actual_bytes(td) (td_length(td) - td_residue(td)) 143 143 + 144 144 + /* -------------------------------------------------------------------------- */ 145 145 + 146 146 + #ifdef DEBUG 147 147 + 148 148 + /** 149 149 + * dbg_td - Dump the contents of the TD 150 150 + */ 151 151 + static void dbg_td(struct c67x00_hcd *c67x00, struct c67x00_td *td, char *msg) 152 152 + { 153 153 + struct device *dev = c67x00_hcd_dev(c67x00); 154 154 + 155 155 + dev_dbg(dev, "### %s at 0x%04x\n", msg, td->td_addr); 156 156 + dev_dbg(dev, "urb: 0x%p\n", td->urb); 157 157 + dev_dbg(dev, "endpoint: %4d\n", usb_pipeendpoint(td->pipe)); 158 158 + dev_dbg(dev, "pipeout: %4d\n", usb_pipeout(td->pipe)); 159 159 + dev_dbg(dev, "ly_base_addr: 0x%04x\n", td_ly_base_addr(td)); 160 160 + dev_dbg(dev, "port_length: 0x%04x\n", td_port_length(td)); 161 161 + dev_dbg(dev, "pid_ep: 0x%02x\n", td->pid_ep); 162 162 + dev_dbg(dev, "dev_addr: 0x%02x\n", td->dev_addr); 163 163 + dev_dbg(dev, "ctrl_reg: 0x%02x\n", td->ctrl_reg); 164 164 + dev_dbg(dev, "status: 0x%02x\n", td->status); 165 165 + dev_dbg(dev, "retry_cnt: 0x%02x\n", td->retry_cnt); 166 166 + dev_dbg(dev, "residue: 0x%02x\n", td->residue); 167 167 + dev_dbg(dev, "next_td_addr: 0x%04x\n", td_next_td_addr(td)); 168 168 + dev_dbg(dev, "data:"); 169 169 + print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 16, 1, 170 170 + td->data, td_length(td), 1); 171 171 + } 172 172 + #else /* DEBUG */ 173 173 + 174 174 + static inline void 175 175 + dbg_td(struct c67x00_hcd *c67x00, struct c67x00_td *td, char *msg) { } 176 176 + 177 177 + #endif /* DEBUG */ 178 178 + 179 179 + /* -------------------------------------------------------------------------- */ 180 180 + /* Helper functions */ 181 181 + 182 182 + static inline u16 c67x00_get_current_frame_number(struct c67x00_hcd *c67x00) 183 183 + { 184 184 + return c67x00_ll_husb_get_frame(c67x00->sie) & HOST_FRAME_MASK; 185 185 + } 186 186 + 187 187 + /** 188 188 + * frame_add 189 189 + * Software wraparound for framenumbers. 190 190 + */ 191 191 + static inline u16 frame_add(u16 a, u16 b) 192 192 + { 193 193 + return (a + b) & HOST_FRAME_MASK; 194 194 + } 195 195 + 196 196 + /** 197 197 + * frame_after - is frame a after frame b 198 198 + */ 199 199 + static inline int frame_after(u16 a, u16 b) 200 200 + { 201 201 + return ((HOST_FRAME_MASK + a - b) & HOST_FRAME_MASK) < 202 202 + (HOST_FRAME_MASK / 2); 203 203 + } 204 204 + 205 205 + /** 206 206 + * frame_after_eq - is frame a after or equal to frame b 207 207 + */ 208 208 + static inline int frame_after_eq(u16 a, u16 b) 209 209 + { 210 210 + return ((HOST_FRAME_MASK + 1 + a - b) & HOST_FRAME_MASK) < 211 211 + (HOST_FRAME_MASK / 2); 212 212 + } 213 213 + 214 214 + /* -------------------------------------------------------------------------- */ 215 215 + 216 216 + /** 217 217 + * c67x00_release_urb - remove link from all tds to this urb 218 218 + * Disconnects the urb from it's tds, so that it can be given back. 219 219 + * pre: urb->hcpriv != NULL 220 220 + */ 221 221 + static void c67x00_release_urb(struct c67x00_hcd *c67x00, struct urb *urb) 222 222 + { 223 223 + struct c67x00_td *td; 224 224 + struct c67x00_urb_priv *urbp; 225 225 + 226 226 + BUG_ON(!urb); 227 227 + 228 228 + c67x00->urb_count--; 229 229 + 230 230 + if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) { 231 231 + c67x00->urb_iso_count--; 232 232 + if (c67x00->urb_iso_count == 0) 233 233 + c67x00->max_frame_bw = MAX_FRAME_BW_STD; 234 234 + } 235 235 + 236 236 + /* TODO this might be not so efficient when we've got many urbs! 237 237 + * Alternatives: 238 238 + * * only clear when needed 239 239 + * * keep a list of tds with each urbp 240 240 + */ 241 241 + list_for_each_entry(td, &c67x00->td_list, td_list) 242 242 + if (urb == td->urb) 243 243 + td->urb = NULL; 244 244 + 245 245 + urbp = urb->hcpriv; 246 246 + urb->hcpriv = NULL; 247 247 + list_del(&urbp->hep_node); 248 248 + kfree(urbp); 249 249 + } 250 250 + 251 251 + /* -------------------------------------------------------------------------- */ 252 252 + 253 253 + static struct c67x00_ep_data * 254 254 + c67x00_ep_data_alloc(struct c67x00_hcd *c67x00, struct urb *urb) 255 255 + { 256 256 + struct usb_host_endpoint *hep = urb->ep; 257 257 + struct c67x00_ep_data *ep_data; 258 258 + int type; 259 259 + 260 260 + c67x00->current_frame = c67x00_get_current_frame_number(c67x00); 261 261 + 262 262 + /* Check if endpoint already has a c67x00_ep_data struct allocated */ 263 263 + if (hep->hcpriv) { 264 264 + ep_data = hep->hcpriv; 265 265 + if (frame_after(c67x00->current_frame, ep_data->next_frame)) 266 266 + ep_data->next_frame = 267 267 + frame_add(c67x00->current_frame, 1); 268 268 + return hep->hcpriv; 269 269 + } 270 270 + 271 271 + /* Allocate and initialize a new c67x00 endpoint data structure */ 272 272 + ep_data = kzalloc(sizeof(*ep_data), GFP_ATOMIC); 273 273 + if (!ep_data) 274 274 + return NULL; 275 275 + 276 276 + INIT_LIST_HEAD(&ep_data->queue); 277 277 + INIT_LIST_HEAD(&ep_data->node); 278 278 + ep_data->hep = hep; 279 279 + 280 280 + /* hold a reference to udev as long as this endpoint lives, 281 281 + * this is needed to possibly fix the data toggle */ 282 282 + ep_data->dev = usb_get_dev(urb->dev); 283 283 + hep->hcpriv = ep_data; 284 284 + 285 285 + /* For ISOC and INT endpoints, start ASAP: */ 286 286 + ep_data->next_frame = frame_add(c67x00->current_frame, 1); 287 287 + 288 288 + /* Add the endpoint data to one of the pipe lists; must be added 289 289 + in order of endpoint address */ 290 290 + type = usb_pipetype(urb->pipe); 291 291 + if (list_empty(&ep_data->node)) { 292 292 + list_add(&ep_data->node, &c67x00->list[type]); 293 293 + } else { 294 294 + struct c67x00_ep_data *prev; 295 295 + 296 296 + list_for_each_entry(prev, &c67x00->list[type], node) { 297 297 + if (prev->hep->desc.bEndpointAddress > 298 298 + hep->desc.bEndpointAddress) { 299 299 + list_add(&ep_data->node, prev->node.prev); 300 300 + break; 301 301 + } 302 302 + } 303 303 + } 304 304 + 305 305 + return ep_data; 306 306 + } 307 307 + 308 308 + static int c67x00_ep_data_free(struct usb_host_endpoint *hep) 309 309 + { 310 310 + struct c67x00_ep_data *ep_data = hep->hcpriv; 311 311 + 312 312 + if (!ep_data) 313 313 + return 0; 314 314 + 315 315 + if (!list_empty(&ep_data->queue)) 316 316 + return -EBUSY; 317 317 + 318 318 + usb_put_dev(ep_data->dev); 319 319 + list_del(&ep_data->queue); 320 320 + list_del(&ep_data->node); 321 321 + 322 322 + kfree(ep_data); 323 323 + hep->hcpriv = NULL; 324 324 + 325 325 + return 0; 326 326 + } 327 327 + 328 328 + void c67x00_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep) 329 329 + { 330 330 + struct c67x00_hcd *c67x00 = hcd_to_c67x00_hcd(hcd); 331 331 + unsigned long flags; 332 332 + 333 333 + if (!list_empty(&ep->urb_list)) 334 334 + dev_warn(c67x00_hcd_dev(c67x00), "error: urb list not empty\n"); 335 335 + 336 336 + spin_lock_irqsave(&c67x00->lock, flags); 337 337 + 338 338 + /* loop waiting for all transfers in the endpoint queue to complete */ 339 339 + while (c67x00_ep_data_free(ep)) { 340 340 + /* Drop the lock so we can sleep waiting for the hardware */ 341 341 + spin_unlock_irqrestore(&c67x00->lock, flags); 342 342 + 343 343 + /* it could happen that we reinitialize this completion, while 344 344 + * somebody was waiting for that completion. The timeout and 345 345 + * while loop handle such cases, but this might be improved */ 346 346 + INIT_COMPLETION(c67x00->endpoint_disable); 347 347 + c67x00_sched_kick(c67x00); 348 348 + wait_for_completion_timeout(&c67x00->endpoint_disable, 1 * HZ); 349 349 + 350 350 + spin_lock_irqsave(&c67x00->lock, flags); 351 351 + } 352 352 + 353 353 + spin_unlock_irqrestore(&c67x00->lock, flags); 354 354 + } 355 355 + 356 356 + /* -------------------------------------------------------------------------- */ 357 357 + 358 358 + static inline int get_root_port(struct usb_device *dev) 359 359 + { 360 360 + while (dev->parent->parent) 361 361 + dev = dev->parent; 362 362 + return dev->portnum; 363 363 + } 364 364 + 365 365 + int c67x00_urb_enqueue(struct usb_hcd *hcd, 366 366 + struct urb *urb, gfp_t mem_flags) 367 367 + { 368 368 + int ret; 369 369 + unsigned long flags; 370 370 + struct c67x00_urb_priv *urbp; 371 371 + struct c67x00_hcd *c67x00 = hcd_to_c67x00_hcd(hcd); 372 372 + int port = get_root_port(urb->dev)-1; 373 373 + 374 374 + spin_lock_irqsave(&c67x00->lock, flags); 375 375 + 376 376 + /* Make sure host controller is running */ 377 377 + if (!HC_IS_RUNNING(hcd->state)) { 378 378 + ret = -ENODEV; 379 379 + goto err_not_linked; 380 380 + } 381 381 + 382 382 + ret = usb_hcd_link_urb_to_ep(hcd, urb); 383 383 + if (ret) 384 384 + goto err_not_linked; 385 385 + 386 386 + /* Allocate and initialize urb private data */ 387 387 + urbp = kzalloc(sizeof(*urbp), mem_flags); 388 388 + if (!urbp) { 389 389 + ret = -ENOMEM; 390 390 + goto err_urbp; 391 391 + } 392 392 + 393 393 + INIT_LIST_HEAD(&urbp->hep_node); 394 394 + urbp->urb = urb; 395 395 + urbp->port = port; 396 396 + 397 397 + urbp->ep_data = c67x00_ep_data_alloc(c67x00, urb); 398 398 + 399 399 + if (!urbp->ep_data) { 400 400 + ret = -ENOMEM; 401 401 + goto err_epdata; 402 402 + } 403 403 + 404 404 + /* TODO claim bandwidth with usb_claim_bandwidth? 405 405 + * also release it somewhere! */ 406 406 + 407 407 + urb->hcpriv = urbp; 408 408 + 409 409 + urb->actual_length = 0; /* Nothing received/transmitted yet */ 410 410 + 411 411 + switch (usb_pipetype(urb->pipe)) { 412 412 + case PIPE_CONTROL: 413 413 + urb->interval = SETUP_STAGE; 414 414 + break; 415 415 + case PIPE_INTERRUPT: 416 416 + break; 417 417 + case PIPE_BULK: 418 418 + break; 419 419 + case PIPE_ISOCHRONOUS: 420 420 + if (c67x00->urb_iso_count == 0) 421 421 + c67x00->max_frame_bw = MAX_FRAME_BW_ISO; 422 422 + c67x00->urb_iso_count++; 423 423 + /* Assume always URB_ISO_ASAP, FIXME */ 424 424 + if (list_empty(&urbp->ep_data->queue)) 425 425 + urb->start_frame = urbp->ep_data->next_frame; 426 426 + else { 427 427 + /* Go right after the last one */ 428 428 + struct urb *last_urb; 429 429 + 430 430 + last_urb = list_entry(urbp->ep_data->queue.prev, 431 431 + struct c67x00_urb_priv, 432 432 + hep_node)->urb; 433 433 + urb->start_frame = 434 434 + frame_add(last_urb->start_frame, 435 435 + last_urb->number_of_packets * 436 436 + last_urb->interval); 437 437 + } 438 438 + urbp->cnt = 0; 439 439 + break; 440 440 + } 441 441 + 442 442 + /* Add the URB to the endpoint queue */ 443 443 + list_add_tail(&urbp->hep_node, &urbp->ep_data->queue); 444 444 + 445 445 + /* If this is the only URB, kick start the controller */ 446 446 + if (!c67x00->urb_count++) 447 447 + c67x00_ll_hpi_enable_sofeop(c67x00->sie); 448 448 + 449 449 + c67x00_sched_kick(c67x00); 450 450 + spin_unlock_irqrestore(&c67x00->lock, flags); 451 451 + 452 452 + return 0; 453 453 + 454 454 + err_epdata: 455 455 + kfree(urbp); 456 456 + err_urbp: 457 457 + usb_hcd_unlink_urb_from_ep(hcd, urb); 458 458 + err_not_linked: 459 459 + spin_unlock_irqrestore(&c67x00->lock, flags); 460 460 + 461 461 + return ret; 462 462 + } 463 463 + 464 464 + int c67x00_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) 465 465 + { 466 466 + struct c67x00_hcd *c67x00 = hcd_to_c67x00_hcd(hcd); 467 467 + unsigned long flags; 468 468 + int rc; 469 469 + 470 470 + spin_lock_irqsave(&c67x00->lock, flags); 471 471 + rc = usb_hcd_check_unlink_urb(hcd, urb, status); 472 472 + if (rc) 473 473 + goto done; 474 474 + 475 475 + c67x00_release_urb(c67x00, urb); 476 476 + usb_hcd_unlink_urb_from_ep(hcd, urb); 477 477 + 478 478 + spin_unlock(&c67x00->lock); 479 479 + usb_hcd_giveback_urb(hcd, urb, status); 480 480 + spin_lock(&c67x00->lock); 481 481 + 482 482 + spin_unlock_irqrestore(&c67x00->lock, flags); 483 483 + 484 484 + return 0; 485 485 + 486 486 + done: 487 487 + spin_unlock_irqrestore(&c67x00->lock, flags); 488 488 + return rc; 489 489 + } 490 490 + 491 491 + /* -------------------------------------------------------------------------- */ 492 492 + 493 493 + /* 494 494 + * pre: c67x00 locked, urb unlocked 495 495 + */ 496 496 + static void 497 497 + c67x00_giveback_urb(struct c67x00_hcd *c67x00, struct urb *urb, int status) 498 498 + { 499 499 + struct c67x00_urb_priv *urbp; 500 500 + 501 501 + if (!urb) 502 502 + return; 503 503 + 504 504 + urbp = urb->hcpriv; 505 505 + urbp->status = status; 506 506 + 507 507 + list_del_init(&urbp->hep_node); 508 508 + 509 509 + c67x00_release_urb(c67x00, urb); 510 510 + usb_hcd_unlink_urb_from_ep(c67x00_hcd_to_hcd(c67x00), urb); 511 511 + spin_unlock(&c67x00->lock); 512 512 + usb_hcd_giveback_urb(c67x00_hcd_to_hcd(c67x00), urb, urbp->status); 513 513 + spin_lock(&c67x00->lock); 514 514 + } 515 515 + 516 516 + /* -------------------------------------------------------------------------- */ 517 517 + 518 518 + static int c67x00_claim_frame_bw(struct c67x00_hcd *c67x00, struct urb *urb, 519 519 + int len, int periodic) 520 520 + { 521 521 + struct c67x00_urb_priv *urbp = urb->hcpriv; 522 522 + int bit_time; 523 523 + 524 524 + /* According to the C67x00 BIOS user manual, page 3-18,19, the 525 525 + * following calculations provide the full speed bit times for 526 526 + * a transaction. 527 527 + * 528 528 + * FS(in) = 112.5 + 9.36*BC + HOST_DELAY 529 529 + * FS(in,iso) = 90.5 + 9.36*BC + HOST_DELAY 530 530 + * FS(out) = 112.5 + 9.36*BC + HOST_DELAY 531 531 + * FS(out,iso) = 78.4 + 9.36*BC + HOST_DELAY 532 532 + * LS(in) = 802.4 + 75.78*BC + HOST_DELAY 533 533 + * LS(out) = 802.6 + 74.67*BC + HOST_DELAY 534 534 + * 535 535 + * HOST_DELAY == 106 for the c67200 and c67300. 536 536 + */ 537 537 + 538 538 + /* make calculations in 1/100 bit times to maintain resolution */ 539 539 + if (urbp->ep_data->dev->speed == USB_SPEED_LOW) { 540 540 + /* Low speed pipe */ 541 541 + if (usb_pipein(urb->pipe)) 542 542 + bit_time = 80240 + 7578*len; 543 543 + else 544 544 + bit_time = 80260 + 7467*len; 545 545 + } else { 546 546 + /* FS pipes */ 547 547 + if (usb_pipeisoc(urb->pipe)) 548 548 + bit_time = usb_pipein(urb->pipe) ? 9050 : 7840; 549 549 + else 550 550 + bit_time = 11250; 551 551 + bit_time += 936*len; 552 552 + } 553 553 + 554 554 + /* Scale back down to integer bit times. Use a host delay of 106. 555 555 + * (this is the only place it is used) */ 556 556 + bit_time = ((bit_time+50) / 100) + 106; 557 557 + 558 558 + if (unlikely(bit_time + c67x00->bandwidth_allocated >= 559 559 + c67x00->max_frame_bw)) 560 560 + return -EMSGSIZE; 561 561 + 562 562 + if (unlikely(c67x00->next_td_addr + CY_TD_SIZE >= 563 563 + c67x00->td_base_addr + SIE_TD_SIZE)) 564 564 + return -EMSGSIZE; 565 565 + 566 566 + if (unlikely(c67x00->next_buf_addr + len >= 567 567 + c67x00->buf_base_addr + SIE_TD_BUF_SIZE)) 568 568 + return -EMSGSIZE; 569 569 + 570 570 + if (periodic) { 571 571 + if (unlikely(bit_time + c67x00->periodic_bw_allocated >= 572 572 + MAX_PERIODIC_BW(c67x00->max_frame_bw))) 573 573 + return -EMSGSIZE; 574 574 + c67x00->periodic_bw_allocated += bit_time; 575 575 + } 576 576 + 577 577 + c67x00->bandwidth_allocated += bit_time; 578 578 + return 0; 579 579 + } 580 580 + 581 581 + /* -------------------------------------------------------------------------- */ 582 582 + 583 583 + /** 584 584 + * td_addr and buf_addr must be word aligned 585 585 + */ 586 586 + static int c67x00_create_td(struct c67x00_hcd *c67x00, struct urb *urb, 587 587 + void *data, int len, int pid, int toggle, 588 588 + unsigned long privdata) 589 589 + { 590 590 + struct c67x00_td *td; 591 591 + struct c67x00_urb_priv *urbp = urb->hcpriv; 592 592 + const __u8 active_flag = 1, retry_cnt = 1; 593 593 + __u8 cmd = 0; 594 594 + int tt = 0; 595 595 + 596 596 + if (c67x00_claim_frame_bw(c67x00, urb, len, usb_pipeisoc(urb->pipe) 597 597 + || usb_pipeint(urb->pipe))) 598 598 + return -EMSGSIZE; /* Not really an error, but expected */ 599 599 + 600 600 + td = kzalloc(sizeof(*td), GFP_ATOMIC); 601 601 + if (!td) 602 602 + return -ENOMEM; 603 603 + 604 604 + td->pipe = urb->pipe; 605 605 + td->ep_data = urbp->ep_data; 606 606 + 607 607 + if ((td_udev(td)->speed == USB_SPEED_LOW) && 608 608 + !(c67x00->low_speed_ports & (1 << urbp->port))) 609 609 + cmd |= PREAMBLE_EN; 610 610 + 611 611 + switch (usb_pipetype(td->pipe)) { 612 612 + case PIPE_ISOCHRONOUS: 613 613 + tt = TT_ISOCHRONOUS; 614 614 + cmd |= ISO_EN; 615 615 + break; 616 616 + case PIPE_CONTROL: 617 617 + tt = TT_CONTROL; 618 618 + break; 619 619 + case PIPE_BULK: 620 620 + tt = TT_BULK; 621 621 + break; 622 622 + case PIPE_INTERRUPT: 623 623 + tt = TT_INTERRUPT; 624 624 + break; 625 625 + } 626 626 + 627 627 + if (toggle) 628 628 + cmd |= SEQ_SEL; 629 629 + 630 630 + cmd |= ARM_EN; 631 631 + 632 632 + /* SW part */ 633 633 + td->td_addr = c67x00->next_td_addr; 634 634 + c67x00->next_td_addr = c67x00->next_td_addr + CY_TD_SIZE; 635 635 + 636 636 + /* HW part */ 637 637 + td->ly_base_addr = __cpu_to_le16(c67x00->next_buf_addr); 638 638 + td->port_length = __cpu_to_le16((c67x00->sie->sie_num << 15) | 639 639 + (urbp->port << 14) | (len & 0x3FF)); 640 640 + td->pid_ep = ((pid & 0xF) << TD_PIDEP_OFFSET) | 641 641 + (usb_pipeendpoint(td->pipe) & 0xF); 642 642 + td->dev_addr = usb_pipedevice(td->pipe) & 0x7F; 643 643 + td->ctrl_reg = cmd; 644 644 + td->status = 0; 645 645 + td->retry_cnt = (tt << TT_OFFSET) | (active_flag << 4) | retry_cnt; 646 646 + td->residue = 0; 647 647 + td->next_td_addr = __cpu_to_le16(c67x00->next_td_addr); 648 648 + 649 649 + /* SW part */ 650 650 + td->data = data; 651 651 + td->urb = urb; 652 652 + td->privdata = privdata; 653 653 + 654 654 + c67x00->next_buf_addr += (len + 1) & ~0x01; /* properly align */ 655 655 + 656 656 + list_add_tail(&td->td_list, &c67x00->td_list); 657 657 + return 0; 658 658 + } 659 659 + 660 660 + static inline void c67x00_release_td(struct c67x00_td *td) 661 661 + { 662 662 + list_del_init(&td->td_list); 663 663 + kfree(td); 664 664 + } 665 665 + 666 666 + /* -------------------------------------------------------------------------- */ 667 667 + 668 668 + static int c67x00_add_data_urb(struct c67x00_hcd *c67x00, struct urb *urb) 669 669 + { 670 670 + int remaining; 671 671 + int toggle; 672 672 + int pid; 673 673 + int ret = 0; 674 674 + int maxps; 675 675 + int need_empty; 676 676 + 677 677 + toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe), 678 678 + usb_pipeout(urb->pipe)); 679 679 + remaining = urb->transfer_buffer_length - urb->actual_length; 680 680 + 681 681 + maxps = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe)); 682 682 + 683 683 + need_empty = (urb->transfer_flags & URB_ZERO_PACKET) && 684 684 + usb_pipeout(urb->pipe) && !(remaining % maxps); 685 685 + 686 686 + while (remaining || need_empty) { 687 687 + int len; 688 688 + char *td_buf; 689 689 + 690 690 + len = (remaining > maxps) ? maxps : remaining; 691 691 + if (!len) 692 692 + need_empty = 0; 693 693 + 694 694 + pid = usb_pipeout(urb->pipe) ? USB_PID_OUT : USB_PID_IN; 695 695 + td_buf = urb->transfer_buffer + urb->transfer_buffer_length - 696 696 + remaining; 697 697 + ret = c67x00_create_td(c67x00, urb, td_buf, len, pid, toggle, 698 698 + DATA_STAGE); 699 699 + if (ret) 700 700 + return ret; /* td wasn't created */ 701 701 + 702 702 + toggle ^= 1; 703 703 + remaining -= len; 704 704 + if (usb_pipecontrol(urb->pipe)) 705 705 + break; 706 706 + } 707 707 + 708 708 + return 0; 709 709 + } 710 710 + 711 711 + /** 712 712 + * return 0 in case more bandwidth is available, else errorcode 713 713 + */ 714 714 + static int c67x00_add_ctrl_urb(struct c67x00_hcd *c67x00, struct urb *urb) 715 715 + { 716 716 + int ret; 717 717 + int pid; 718 718 + 719 719 + switch (urb->interval) { 720 720 + default: 721 721 + case SETUP_STAGE: 722 722 + ret = c67x00_create_td(c67x00, urb, urb->setup_packet, 723 723 + 8, USB_PID_SETUP, 0, SETUP_STAGE); 724 724 + if (ret) 725 725 + return ret; 726 726 + urb->interval = SETUP_STAGE; 727 727 + usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), 728 728 + usb_pipeout(urb->pipe), 1); 729 729 + break; 730 730 + case DATA_STAGE: 731 731 + if (urb->transfer_buffer_length) { 732 732 + ret = c67x00_add_data_urb(c67x00, urb); 733 733 + if (ret) 734 734 + return ret; 735 735 + break; 736 736 + } /* else fallthrough */ 737 737 + case STATUS_STAGE: 738 738 + pid = !usb_pipeout(urb->pipe) ? USB_PID_OUT : USB_PID_IN; 739 739 + ret = c67x00_create_td(c67x00, urb, NULL, 0, pid, 1, 740 740 + STATUS_STAGE); 741 741 + if (ret) 742 742 + return ret; 743 743 + break; 744 744 + } 745 745 + 746 746 + return 0; 747 747 + } 748 748 + 749 749 + /* 750 750 + * return 0 in case more bandwidth is available, else errorcode 751 751 + */ 752 752 + static int c67x00_add_int_urb(struct c67x00_hcd *c67x00, struct urb *urb) 753 753 + { 754 754 + struct c67x00_urb_priv *urbp = urb->hcpriv; 755 755 + 756 756 + if (frame_after_eq(c67x00->current_frame, urbp->ep_data->next_frame)) { 757 757 + urbp->ep_data->next_frame = 758 758 + frame_add(urbp->ep_data->next_frame, urb->interval); 759 759 + return c67x00_add_data_urb(c67x00, urb); 760 760 + } 761 761 + return 0; 762 762 + } 763 763 + 764 764 + static int c67x00_add_iso_urb(struct c67x00_hcd *c67x00, struct urb *urb) 765 765 + { 766 766 + struct c67x00_urb_priv *urbp = urb->hcpriv; 767 767 + 768 768 + if (frame_after_eq(c67x00->current_frame, urbp->ep_data->next_frame)) { 769 769 + char *td_buf; 770 770 + int len, pid, ret; 771 771 + 772 772 + BUG_ON(urbp->cnt >= urb->number_of_packets); 773 773 + 774 774 + td_buf = urb->transfer_buffer + 775 775 + urb->iso_frame_desc[urbp->cnt].offset; 776 776 + len = urb->iso_frame_desc[urbp->cnt].length; 777 777 + pid = usb_pipeout(urb->pipe) ? USB_PID_OUT : USB_PID_IN; 778 778 + 779 779 + ret = c67x00_create_td(c67x00, urb, td_buf, len, pid, 0, 780 780 + urbp->cnt); 781 781 + if (ret) { 782 782 + printk(KERN_DEBUG "create failed: %d\n", ret); 783 783 + urb->iso_frame_desc[urbp->cnt].actual_length = 0; 784 784 + urb->iso_frame_desc[urbp->cnt].status = ret; 785 785 + if (urbp->cnt + 1 == urb->number_of_packets) 786 786 + c67x00_giveback_urb(c67x00, urb, 0); 787 787 + } 788 788 + 789 789 + urbp->ep_data->next_frame = 790 790 + frame_add(urbp->ep_data->next_frame, urb->interval); 791 791 + urbp->cnt++; 792 792 + } 793 793 + return 0; 794 794 + } 795 795 + 796 796 + /* -------------------------------------------------------------------------- */ 797 797 + 798 798 + static void c67x00_fill_from_list(struct c67x00_hcd *c67x00, int type, 799 799 + int (*add)(struct c67x00_hcd *, struct urb *)) 800 800 + { 801 801 + struct c67x00_ep_data *ep_data; 802 802 + struct urb *urb; 803 803 + 804 804 + /* traverse every endpoint on the list */ 805 805 + list_for_each_entry(ep_data, &c67x00->list[type], node) { 806 806 + if (!list_empty(&ep_data->queue)) { 807 807 + /* and add the first urb */ 808 808 + /* isochronous transfer rely on this */ 809 809 + urb = list_entry(ep_data->queue.next, 810 810 + struct c67x00_urb_priv, 811 811 + hep_node)->urb; 812 812 + add(c67x00, urb); 813 813 + } 814 814 + } 815 815 + } 816 816 + 817 817 + static void c67x00_fill_frame(struct c67x00_hcd *c67x00) 818 818 + { 819 819 + struct c67x00_td *td, *ttd; 820 820 + 821 821 + /* Check if we can proceed */ 822 822 + if (!list_empty(&c67x00->td_list)) { 823 823 + dev_warn(c67x00_hcd_dev(c67x00), 824 824 + "TD list not empty! This should not happen!\n"); 825 825 + list_for_each_entry_safe(td, ttd, &c67x00->td_list, td_list) { 826 826 + dbg_td(c67x00, td, "Unprocessed td"); 827 827 + c67x00_release_td(td); 828 828 + } 829 829 + } 830 830 + 831 831 + /* Reinitialize variables */ 832 832 + c67x00->bandwidth_allocated = 0; 833 833 + c67x00->periodic_bw_allocated = 0; 834 834 + 835 835 + c67x00->next_td_addr = c67x00->td_base_addr; 836 836 + c67x00->next_buf_addr = c67x00->buf_base_addr; 837 837 + 838 838 + /* Fill the list */ 839 839 + c67x00_fill_from_list(c67x00, PIPE_ISOCHRONOUS, c67x00_add_iso_urb); 840 840 + c67x00_fill_from_list(c67x00, PIPE_INTERRUPT, c67x00_add_int_urb); 841 841 + c67x00_fill_from_list(c67x00, PIPE_CONTROL, c67x00_add_ctrl_urb); 842 842 + c67x00_fill_from_list(c67x00, PIPE_BULK, c67x00_add_data_urb); 843 843 + } 844 844 + 845 845 + /* -------------------------------------------------------------------------- */ 846 846 + 847 847 + /** 848 848 + * Get TD from C67X00 849 849 + */ 850 850 + static inline void 851 851 + c67x00_parse_td(struct c67x00_hcd *c67x00, struct c67x00_td *td) 852 852 + { 853 853 + c67x00_ll_read_mem_le16(c67x00->sie->dev, 854 854 + td->td_addr, td, CY_TD_SIZE); 855 855 + 856 856 + if (usb_pipein(td->pipe) && td_actual_bytes(td)) 857 857 + c67x00_ll_read_mem_le16(c67x00->sie->dev, td_ly_base_addr(td), 858 858 + td->data, td_actual_bytes(td)); 859 859 + } 860 860 + 861 861 + static int c67x00_td_to_error(struct c67x00_hcd *c67x00, struct c67x00_td *td) 862 862 + { 863 863 + if (td->status & TD_STATUSMASK_ERR) { 864 864 + dbg_td(c67x00, td, "ERROR_FLAG"); 865 865 + return -EILSEQ; 866 866 + } 867 867 + if (td->status & TD_STATUSMASK_STALL) { 868 868 + /* dbg_td(c67x00, td, "STALL"); */ 869 869 + return -EPIPE; 870 870 + } 871 871 + if (td->status & TD_STATUSMASK_TMOUT) { 872 872 + dbg_td(c67x00, td, "TIMEOUT"); 873 873 + return -ETIMEDOUT; 874 874 + } 875 875 + 876 876 + return 0; 877 877 + } 878 878 + 879 879 + static inline int c67x00_end_of_data(struct c67x00_td *td) 880 880 + { 881 881 + int maxps, need_empty, remaining; 882 882 + struct urb *urb = td->urb; 883 883 + int act_bytes; 884 884 + 885 885 + act_bytes = td_actual_bytes(td); 886 886 + 887 887 + if (unlikely(!act_bytes)) 888 888 + return 1; /* This was an empty packet */ 889 889 + 890 890 + maxps = usb_maxpacket(td_udev(td), td->pipe, usb_pipeout(td->pipe)); 891 891 + 892 892 + if (unlikely(act_bytes < maxps)) 893 893 + return 1; /* Smaller then full packet */ 894 894 + 895 895 + remaining = urb->transfer_buffer_length - urb->actual_length; 896 896 + need_empty = (urb->transfer_flags & URB_ZERO_PACKET) && 897 897 + usb_pipeout(urb->pipe) && !(remaining % maxps); 898 898 + 899 899 + if (unlikely(!remaining && !need_empty)) 900 900 + return 1; 901 901 + 902 902 + return 0; 903 903 + } 904 904 + 905 905 + /* -------------------------------------------------------------------------- */ 906 906 + 907 907 + /* Remove all td's from the list which come 908 908 + * after last_td and are meant for the same pipe. 909 909 + * This is used when a short packet has occured */ 910 910 + static inline void c67x00_clear_pipe(struct c67x00_hcd *c67x00, 911 911 + struct c67x00_td *last_td) 912 912 + { 913 913 + struct c67x00_td *td, *tmp; 914 914 + td = last_td; 915 915 + tmp = last_td; 916 916 + while (td->td_list.next != &c67x00->td_list) { 917 917 + td = list_entry(td->td_list.next, struct c67x00_td, td_list); 918 918 + if (td->pipe == last_td->pipe) { 919 919 + c67x00_release_td(td); 920 920 + td = tmp; 921 921 + } 922 922 + tmp = td; 923 923 + } 924 924 + } 925 925 + 926 926 + /* -------------------------------------------------------------------------- */ 927 927 + 928 928 + static void c67x00_handle_successful_td(struct c67x00_hcd *c67x00, 929 929 + struct c67x00_td *td) 930 930 + { 931 931 + struct urb *urb = td->urb; 932 932 + 933 933 + if (!urb) 934 934 + return; 935 935 + 936 936 + urb->actual_length += td_actual_bytes(td); 937 937 + 938 938 + switch (usb_pipetype(td->pipe)) { 939 939 + /* isochronous tds are handled separately */ 940 940 + case PIPE_CONTROL: 941 941 + switch (td->privdata) { 942 942 + case SETUP_STAGE: 943 943 + urb->interval = 944 944 + urb->transfer_buffer_length ? 945 945 + DATA_STAGE : STATUS_STAGE; 946 946 + /* Don't count setup_packet with normal data: */ 947 947 + urb->actual_length = 0; 948 948 + break; 949 949 + 950 950 + case DATA_STAGE: 951 951 + if (c67x00_end_of_data(td)) { 952 952 + urb->interval = STATUS_STAGE; 953 953 + c67x00_clear_pipe(c67x00, td); 954 954 + } 955 955 + break; 956 956 + 957 957 + case STATUS_STAGE: 958 958 + urb->interval = 0; 959 959 + c67x00_giveback_urb(c67x00, urb, 0); 960 960 + break; 961 961 + } 962 962 + break; 963 963 + 964 964 + case PIPE_INTERRUPT: 965 965 + case PIPE_BULK: 966 966 + if (unlikely(c67x00_end_of_data(td))) { 967 967 + c67x00_clear_pipe(c67x00, td); 968 968 + c67x00_giveback_urb(c67x00, urb, 0); 969 969 + } 970 970 + break; 971 971 + } 972 972 + } 973 973 + 974 974 + static void c67x00_handle_isoc(struct c67x00_hcd *c67x00, struct c67x00_td *td) 975 975 + { 976 976 + struct urb *urb = td->urb; 977 977 + struct c67x00_urb_priv *urbp; 978 978 + int cnt; 979 979 + 980 980 + if (!urb) 981 981 + return; 982 982 + 983 983 + urbp = urb->hcpriv; 984 984 + cnt = td->privdata; 985 985 + 986 986 + if (td->status & TD_ERROR_MASK) 987 987 + urb->error_count++; 988 988 + 989 989 + urb->iso_frame_desc[cnt].actual_length = td_actual_bytes(td); 990 990 + urb->iso_frame_desc[cnt].status = c67x00_td_to_error(c67x00, td); 991 991 + if (cnt + 1 == urb->number_of_packets) /* Last packet */ 992 992 + c67x00_giveback_urb(c67x00, urb, 0); 993 993 + } 994 994 + 995 995 + /* -------------------------------------------------------------------------- */ 996 996 + 997 997 + /** 998 998 + * c67x00_check_td_list - handle tds which have been processed by the c67x00 999 999 + * pre: current_td == 0 1000 1000 + */ 1001 1001 + static inline void c67x00_check_td_list(struct c67x00_hcd *c67x00) 1002 1002 + { 1003 1003 + struct c67x00_td *td, *tmp; 1004 1004 + struct urb *urb; 1005 1005 + int ack_ok; 1006 1006 + int clear_endpoint; 1007 1007 + 1008 1008 + list_for_each_entry_safe(td, tmp, &c67x00->td_list, td_list) { 1009 1009 + /* get the TD */ 1010 1010 + c67x00_parse_td(c67x00, td); 1011 1011 + urb = td->urb; /* urb can be NULL! */ 1012 1012 + ack_ok = 0; 1013 1013 + clear_endpoint = 1; 1014 1014 + 1015 1015 + /* Handle isochronous transfers separately */ 1016 1016 + if (usb_pipeisoc(td->pipe)) { 1017 1017 + clear_endpoint = 0; 1018 1018 + c67x00_handle_isoc(c67x00, td); 1019 1019 + goto cont; 1020 1020 + } 1021 1021 + 1022 1022 + /* When an error occurs, all td's for that pipe go into an 1023 1023 + * inactive state. This state matches successful transfers so 1024 1024 + * we must make sure not to service them. */ 1025 1025 + if (td->status & TD_ERROR_MASK) { 1026 1026 + c67x00_giveback_urb(c67x00, urb, 1027 1027 + c67x00_td_to_error(c67x00, td)); 1028 1028 + goto cont; 1029 1029 + } 1030 1030 + 1031 1031 + if ((td->status & TD_STATUSMASK_NAK) || !td_sequence_ok(td) || 1032 1032 + !td_acked(td)) 1033 1033 + goto cont; 1034 1034 + 1035 1035 + /* Sequence ok and acked, don't need to fix toggle */ 1036 1036 + ack_ok = 1; 1037 1037 + 1038 1038 + if (unlikely(td->status & TD_STATUSMASK_OVF)) { 1039 1039 + if (td_residue(td) & TD_RESIDUE_OVERFLOW) { 1040 1040 + /* Overflow */ 1041 1041 + c67x00_giveback_urb(c67x00, urb, -EOVERFLOW); 1042 1042 + goto cont; 1043 1043 + } 1044 1044 + } 1045 1045 + 1046 1046 + clear_endpoint = 0; 1047 1047 + c67x00_handle_successful_td(c67x00, td); 1048 1048 + 1049 1049 + cont: 1050 1050 + if (clear_endpoint) 1051 1051 + c67x00_clear_pipe(c67x00, td); 1052 1052 + if (ack_ok) 1053 1053 + usb_settoggle(td_udev(td), usb_pipeendpoint(td->pipe), 1054 1054 + usb_pipeout(td->pipe), 1055 1055 + !(td->ctrl_reg & SEQ_SEL)); 1056 1056 + /* next in list could have been removed, due to clear_pipe! */ 1057 1057 + tmp = list_entry(td->td_list.next, typeof(*td), td_list); 1058 1058 + c67x00_release_td(td); 1059 1059 + } 1060 1060 + } 1061 1061 + 1062 1062 + /* -------------------------------------------------------------------------- */ 1063 1063 + 1064 1064 + static inline int c67x00_all_tds_processed(struct c67x00_hcd *c67x00) 1065 1065 + { 1066 1066 + /* If all tds are processed, we can check the previous frame (if 1067 1067 + * there was any) and start our next frame. 1068 1068 + */ 1069 1069 + return !c67x00_ll_husb_get_current_td(c67x00->sie); 1070 1070 + } 1071 1071 + 1072 1072 + /** 1073 1073 + * Send td to C67X00 1074 1074 + */ 1075 1075 + static void c67x00_send_td(struct c67x00_hcd *c67x00, struct c67x00_td *td) 1076 1076 + { 1077 1077 + int len = td_length(td); 1078 1078 + 1079 1079 + if (len && ((td->pid_ep & TD_PIDEPMASK_PID) != TD_PID_IN)) 1080 1080 + c67x00_ll_write_mem_le16(c67x00->sie->dev, td_ly_base_addr(td), 1081 1081 + td->data, len); 1082 1082 + 1083 1083 + c67x00_ll_write_mem_le16(c67x00->sie->dev, 1084 1084 + td->td_addr, td, CY_TD_SIZE); 1085 1085 + } 1086 1086 + 1087 1087 + static void c67x00_send_frame(struct c67x00_hcd *c67x00) 1088 1088 + { 1089 1089 + struct c67x00_td *td; 1090 1090 + 1091 1091 + if (list_empty(&c67x00->td_list)) 1092 1092 + dev_warn(c67x00_hcd_dev(c67x00), 1093 1093 + "%s: td list should not be empty here!\n", 1094 1094 + __func__); 1095 1095 + 1096 1096 + list_for_each_entry(td, &c67x00->td_list, td_list) { 1097 1097 + if (td->td_list.next == &c67x00->td_list) 1098 1098 + td->next_td_addr = 0; /* Last td in list */ 1099 1099 + 1100 1100 + c67x00_send_td(c67x00, td); 1101 1101 + } 1102 1102 + 1103 1103 + c67x00_ll_husb_set_current_td(c67x00->sie, c67x00->td_base_addr); 1104 1104 + } 1105 1105 + 1106 1106 + /* -------------------------------------------------------------------------- */ 1107 1107 + 1108 1108 + /** 1109 1109 + * c67x00_do_work - Schedulers state machine 1110 1110 + */ 1111 1111 + static void c67x00_do_work(struct c67x00_hcd *c67x00) 1112 1112 + { 1113 1113 + spin_lock(&c67x00->lock); 1114 1114 + /* Make sure all tds are processed */ 1115 1115 + if (!c67x00_all_tds_processed(c67x00)) 1116 1116 + goto out; 1117 1117 + 1118 1118 + c67x00_check_td_list(c67x00); 1119 1119 + 1120 1120 + /* no td's are being processed (current == 0) 1121 1121 + * and all have been "checked" */ 1122 1122 + complete(&c67x00->endpoint_disable); 1123 1123 + 1124 1124 + if (!list_empty(&c67x00->td_list)) 1125 1125 + goto out; 1126 1126 + 1127 1127 + c67x00->current_frame = c67x00_get_current_frame_number(c67x00); 1128 1128 + if (c67x00->current_frame == c67x00->last_frame) 1129 1129 + goto out; /* Don't send tds in same frame */ 1130 1130 + c67x00->last_frame = c67x00->current_frame; 1131 1131 + 1132 1132 + /* If no urbs are scheduled, our work is done */ 1133 1133 + if (!c67x00->urb_count) { 1134 1134 + c67x00_ll_hpi_disable_sofeop(c67x00->sie); 1135 1135 + goto out; 1136 1136 + } 1137 1137 + 1138 1138 + c67x00_fill_frame(c67x00); 1139 1139 + if (!list_empty(&c67x00->td_list)) 1140 1140 + /* TD's have been added to the frame */ 1141 1141 + c67x00_send_frame(c67x00); 1142 1142 + 1143 1143 + out: 1144 1144 + spin_unlock(&c67x00->lock); 1145 1145 + } 1146 1146 + 1147 1147 + /* -------------------------------------------------------------------------- */ 1148 1148 + 1149 1149 + static void c67x00_sched_tasklet(unsigned long __c67x00) 1150 1150 + { 1151 1151 + struct c67x00_hcd *c67x00 = (struct c67x00_hcd *)__c67x00; 1152 1152 + c67x00_do_work(c67x00); 1153 1153 + } 1154 1154 + 1155 1155 + void c67x00_sched_kick(struct c67x00_hcd *c67x00) 1156 1156 + { 1157 1157 + tasklet_hi_schedule(&c67x00->tasklet); 1158 1158 + } 1159 1159 + 1160 1160 + int c67x00_sched_start_scheduler(struct c67x00_hcd *c67x00) 1161 1161 + { 1162 1162 + tasklet_init(&c67x00->tasklet, c67x00_sched_tasklet, 1163 1163 + (unsigned long)c67x00); 1164 1164 + return 0; 1165 1165 + } 1166 1166 + 1167 1167 + void c67x00_sched_stop_scheduler(struct c67x00_hcd *c67x00) 1168 1168 + { 1169 1169 + tasklet_kill(&c67x00->tasklet); 1170 1170 + }

+294

drivers/usb/c67x00/c67x00.h

reviewed

··· 1 1 + /* 2 2 + * c67x00.h: Cypress C67X00 USB register and field definitions 3 3 + * 4 4 + * Copyright (C) 2006-2008 Barco N.V. 5 5 + * Derived from the Cypress cy7c67200/300 ezusb linux driver and 6 6 + * based on multiple host controller drivers inside the linux kernel. 7 7 + * 8 8 + * This program is free software; you can redistribute it and/or modify 9 9 + * it under the terms of the GNU General Public License as published by 10 10 + * the Free Software Foundation; either version 2 of the License, or 11 11 + * (at your option) any later version. 12 12 + * 13 13 + * This program is distributed in the hope that it will be useful, 14 14 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 15 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 16 + * GNU General Public License for more details. 17 17 + * 18 18 + * You should have received a copy of the GNU General Public License 19 19 + * along with this program; if not, write to the Free Software 20 20 + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 21 21 + * MA 02110-1301 USA. 22 22 + */ 23 23 + 24 24 + #ifndef _USB_C67X00_H 25 25 + #define _USB_C67X00_H 26 26 + 27 27 + #include <linux/spinlock.h> 28 28 + #include <linux/platform_device.h> 29 29 + #include <linux/completion.h> 30 30 + #include <linux/mutex.h> 31 31 + 32 32 + /* --------------------------------------------------------------------- 33 33 + * Cypress C67x00 register definitions 34 34 + */ 35 35 + 36 36 + /* Hardware Revision Register */ 37 37 + #define HW_REV_REG 0xC004 38 38 + 39 39 + /* General USB registers */ 40 40 + /* ===================== */ 41 41 + 42 42 + /* USB Control Register */ 43 43 + #define USB_CTL_REG(x) ((x) ? 0xC0AA : 0xC08A) 44 44 + 45 45 + #define LOW_SPEED_PORT(x) ((x) ? 0x0800 : 0x0400) 46 46 + #define HOST_MODE 0x0200 47 47 + #define PORT_RES_EN(x) ((x) ? 0x0100 : 0x0080) 48 48 + #define SOF_EOP_EN(x) ((x) ? 0x0002 : 0x0001) 49 49 + 50 50 + /* USB status register - Notice it has different content in hcd/udc mode */ 51 51 + #define USB_STAT_REG(x) ((x) ? 0xC0B0 : 0xC090) 52 52 + 53 53 + #define EP0_IRQ_FLG 0x0001 54 54 + #define EP1_IRQ_FLG 0x0002 55 55 + #define EP2_IRQ_FLG 0x0004 56 56 + #define EP3_IRQ_FLG 0x0008 57 57 + #define EP4_IRQ_FLG 0x0010 58 58 + #define EP5_IRQ_FLG 0x0020 59 59 + #define EP6_IRQ_FLG 0x0040 60 60 + #define EP7_IRQ_FLG 0x0080 61 61 + #define RESET_IRQ_FLG 0x0100 62 62 + #define SOF_EOP_IRQ_FLG 0x0200 63 63 + #define ID_IRQ_FLG 0x4000 64 64 + #define VBUS_IRQ_FLG 0x8000 65 65 + 66 66 + /* USB Host only registers */ 67 67 + /* ======================= */ 68 68 + 69 69 + /* Host n Control Register */ 70 70 + #define HOST_CTL_REG(x) ((x) ? 0xC0A0 : 0xC080) 71 71 + 72 72 + #define PREAMBLE_EN 0x0080 /* Preamble enable */ 73 73 + #define SEQ_SEL 0x0040 /* Data Toggle Sequence Bit Select */ 74 74 + #define ISO_EN 0x0010 /* Isochronous enable */ 75 75 + #define ARM_EN 0x0001 /* Arm operation */ 76 76 + 77 77 + /* Host n Interrupt Enable Register */ 78 78 + #define HOST_IRQ_EN_REG(x) ((x) ? 0xC0AC : 0xC08C) 79 79 + 80 80 + #define SOF_EOP_IRQ_EN 0x0200 /* SOF/EOP Interrupt Enable */ 81 81 + #define SOF_EOP_TMOUT_IRQ_EN 0x0800 /* SOF/EOP Timeout Interrupt Enable */ 82 82 + #define ID_IRQ_EN 0x4000 /* ID interrupt enable */ 83 83 + #define VBUS_IRQ_EN 0x8000 /* VBUS interrupt enable */ 84 84 + #define DONE_IRQ_EN 0x0001 /* Done Interrupt Enable */ 85 85 + 86 86 + /* USB status register */ 87 87 + #define HOST_STAT_MASK 0x02FD 88 88 + #define PORT_CONNECT_CHANGE(x) ((x) ? 0x0020 : 0x0010) 89 89 + #define PORT_SE0_STATUS(x) ((x) ? 0x0008 : 0x0004) 90 90 + 91 91 + /* Host Frame Register */ 92 92 + #define HOST_FRAME_REG(x) ((x) ? 0xC0B6 : 0xC096) 93 93 + 94 94 + #define HOST_FRAME_MASK 0x07FF 95 95 + 96 96 + /* USB Peripheral only registers */ 97 97 + /* ============================= */ 98 98 + 99 99 + /* Device n Port Sel reg */ 100 100 + #define DEVICE_N_PORT_SEL(x) ((x) ? 0xC0A4 : 0xC084) 101 101 + 102 102 + /* Device n Interrupt Enable Register */ 103 103 + #define DEVICE_N_IRQ_EN_REG(x) ((x) ? 0xC0AC : 0xC08C) 104 104 + 105 105 + #define DEVICE_N_ENDPOINT_N_CTL_REG(dev, ep) ((dev) \ 106 106 + ? (0x0280 + (ep << 4)) \ 107 107 + : (0x0200 + (ep << 4))) 108 108 + #define DEVICE_N_ENDPOINT_N_STAT_REG(dev, ep) ((dev) \ 109 109 + ? (0x0286 + (ep << 4)) \ 110 110 + : (0x0206 + (ep << 4))) 111 111 + 112 112 + #define DEVICE_N_ADDRESS(dev) ((dev) ? (0xC0AE) : (0xC08E)) 113 113 + 114 114 + /* HPI registers */ 115 115 + /* ============= */ 116 116 + 117 117 + /* HPI Status register */ 118 118 + #define SOFEOP_FLG(x) (1 << ((x) ? 12 : 10)) 119 119 + #define SIEMSG_FLG(x) (1 << (4 + (x))) 120 120 + #define RESET_FLG(x) ((x) ? 0x0200 : 0x0002) 121 121 + #define DONE_FLG(x) (1 << (2 + (x))) 122 122 + #define RESUME_FLG(x) (1 << (6 + (x))) 123 123 + #define MBX_OUT_FLG 0x0001 /* Message out available */ 124 124 + #define MBX_IN_FLG 0x0100 125 125 + #define ID_FLG 0x4000 126 126 + #define VBUS_FLG 0x8000 127 127 + 128 128 + /* Interrupt routing register */ 129 129 + #define HPI_IRQ_ROUTING_REG 0x0142 130 130 + 131 131 + #define HPI_SWAP_ENABLE(x) ((x) ? 0x0100 : 0x0001) 132 132 + #define RESET_TO_HPI_ENABLE(x) ((x) ? 0x0200 : 0x0002) 133 133 + #define DONE_TO_HPI_ENABLE(x) ((x) ? 0x0008 : 0x0004) 134 134 + #define RESUME_TO_HPI_ENABLE(x) ((x) ? 0x0080 : 0x0040) 135 135 + #define SOFEOP_TO_HPI_EN(x) ((x) ? 0x2000 : 0x0800) 136 136 + #define SOFEOP_TO_CPU_EN(x) ((x) ? 0x1000 : 0x0400) 137 137 + #define ID_TO_HPI_ENABLE 0x4000 138 138 + #define VBUS_TO_HPI_ENABLE 0x8000 139 139 + 140 140 + /* SIE msg registers */ 141 141 + #define SIEMSG_REG(x) ((x) ? 0x0148 : 0x0144) 142 142 + 143 143 + #define HUSB_TDListDone 0x1000 144 144 + 145 145 + #define SUSB_EP0_MSG 0x0001 146 146 + #define SUSB_EP1_MSG 0x0002 147 147 + #define SUSB_EP2_MSG 0x0004 148 148 + #define SUSB_EP3_MSG 0x0008 149 149 + #define SUSB_EP4_MSG 0x0010 150 150 + #define SUSB_EP5_MSG 0x0020 151 151 + #define SUSB_EP6_MSG 0x0040 152 152 + #define SUSB_EP7_MSG 0x0080 153 153 + #define SUSB_RST_MSG 0x0100 154 154 + #define SUSB_SOF_MSG 0x0200 155 155 + #define SUSB_CFG_MSG 0x0400 156 156 + #define SUSB_SUS_MSG 0x0800 157 157 + #define SUSB_ID_MSG 0x4000 158 158 + #define SUSB_VBUS_MSG 0x8000 159 159 + 160 160 + /* BIOS interrupt routines */ 161 161 + 162 162 + #define SUSBx_RECEIVE_INT(x) ((x) ? 97 : 81) 163 163 + #define SUSBx_SEND_INT(x) ((x) ? 96 : 80) 164 164 + 165 165 + #define SUSBx_DEV_DESC_VEC(x) ((x) ? 0x00D4 : 0x00B4) 166 166 + #define SUSBx_CONF_DESC_VEC(x) ((x) ? 0x00D6 : 0x00B6) 167 167 + #define SUSBx_STRING_DESC_VEC(x) ((x) ? 0x00D8 : 0x00B8) 168 168 + 169 169 + #define CY_HCD_BUF_ADDR 0x500 /* Base address for host */ 170 170 + #define SIE_TD_SIZE 0x200 /* size of the td list */ 171 171 + #define SIE_TD_BUF_SIZE 0x400 /* size of the data buffer */ 172 172 + 173 173 + #define SIE_TD_OFFSET(host) ((host) ? (SIE_TD_SIZE+SIE_TD_BUF_SIZE) : 0) 174 174 + #define SIE_BUF_OFFSET(host) (SIE_TD_OFFSET(host) + SIE_TD_SIZE) 175 175 + 176 176 + /* Base address of HCD + 2 x TD_SIZE + 2 x TD_BUF_SIZE */ 177 177 + #define CY_UDC_REQ_HEADER_BASE 0x1100 178 178 + /* 8- byte request headers for IN/OUT transfers */ 179 179 + #define CY_UDC_REQ_HEADER_SIZE 8 180 180 + 181 181 + #define CY_UDC_REQ_HEADER_ADDR(ep_num) (CY_UDC_REQ_HEADER_BASE + \ 182 182 + ((ep_num) * CY_UDC_REQ_HEADER_SIZE)) 183 183 + #define CY_UDC_DESC_BASE_ADDRESS (CY_UDC_REQ_HEADER_ADDR(8)) 184 184 + 185 185 + #define CY_UDC_BIOS_REPLACE_BASE 0x1800 186 186 + #define CY_UDC_REQ_BUFFER_BASE 0x2000 187 187 + #define CY_UDC_REQ_BUFFER_SIZE 0x0400 188 188 + #define CY_UDC_REQ_BUFFER_ADDR(ep_num) (CY_UDC_REQ_BUFFER_BASE + \ 189 189 + ((ep_num) * CY_UDC_REQ_BUFFER_SIZE)) 190 190 + 191 191 + /* --------------------------------------------------------------------- 192 192 + * Driver data structures 193 193 + */ 194 194 + 195 195 + struct c67x00_device; 196 196 + 197 197 + /** 198 198 + * struct c67x00_sie - Common data associated with a SIE 199 199 + * @lock: lock to protect this struct and the associated chip registers 200 200 + * @private_data: subdriver dependent data 201 201 + * @irq: subdriver dependent irq handler, set NULL when not used 202 202 + * @dev: link to common driver structure 203 203 + * @sie_num: SIE number on chip, starting from 0 204 204 + * @mode: SIE mode (host/peripheral/otg/not used) 205 205 + */ 206 206 + struct c67x00_sie { 207 207 + /* Entries to be used by the subdrivers */ 208 208 + spinlock_t lock; /* protect this structure */ 209 209 + void *private_data; 210 210 + void (*irq) (struct c67x00_sie *sie, u16 int_status, u16 msg); 211 211 + 212 212 + /* Read only: */ 213 213 + struct c67x00_device *dev; 214 214 + int sie_num; 215 215 + int mode; 216 216 + }; 217 217 + 218 218 + #define sie_dev(s) (&(s)->dev->pdev->dev) 219 219 + 220 220 + /** 221 221 + * struct c67x00_lcp 222 222 + */ 223 223 + struct c67x00_lcp { 224 224 + /* Internal use only */ 225 225 + struct mutex mutex; 226 226 + struct completion msg_received; 227 227 + u16 last_msg; 228 228 + }; 229 229 + 230 230 + /* 231 231 + * struct c67x00_hpi 232 232 + */ 233 233 + struct c67x00_hpi { 234 234 + void __iomem *base; 235 235 + int regstep; 236 236 + spinlock_t lock; 237 237 + struct c67x00_lcp lcp; 238 238 + }; 239 239 + 240 240 + #define C67X00_SIES 2 241 241 + #define C67X00_PORTS 2 242 242 + 243 243 + /** 244 244 + * struct c67x00_device - Common data associated with a c67x00 instance 245 245 + * @hpi: hpi addresses 246 246 + * @sie: array of sie's on this chip 247 247 + * @pdev: platform device of instance 248 248 + * @pdata: configuration provided by the platform 249 249 + */ 250 250 + struct c67x00_device { 251 251 + struct c67x00_hpi hpi; 252 252 + struct c67x00_sie sie[C67X00_SIES]; 253 253 + struct platform_device *pdev; 254 254 + struct c67x00_platform_data *pdata; 255 255 + }; 256 256 + 257 257 + /* --------------------------------------------------------------------- 258 258 + * Low level interface functions 259 259 + */ 260 260 + 261 261 + /* Host Port Interface (HPI) functions */ 262 262 + u16 c67x00_ll_hpi_status(struct c67x00_device *dev); 263 263 + void c67x00_ll_hpi_reg_init(struct c67x00_device *dev); 264 264 + void c67x00_ll_hpi_enable_sofeop(struct c67x00_sie *sie); 265 265 + void c67x00_ll_hpi_disable_sofeop(struct c67x00_sie *sie); 266 266 + 267 267 + /* General functions */ 268 268 + u16 c67x00_ll_fetch_siemsg(struct c67x00_device *dev, int sie_num); 269 269 + u16 c67x00_ll_get_usb_ctl(struct c67x00_sie *sie); 270 270 + void c67x00_ll_usb_clear_status(struct c67x00_sie *sie, u16 bits); 271 271 + u16 c67x00_ll_usb_get_status(struct c67x00_sie *sie); 272 272 + void c67x00_ll_write_mem_le16(struct c67x00_device *dev, u16 addr, 273 273 + void *data, int len); 274 274 + void c67x00_ll_read_mem_le16(struct c67x00_device *dev, u16 addr, 275 275 + void *data, int len); 276 276 + 277 277 + /* Host specific functions */ 278 278 + void c67x00_ll_set_husb_eot(struct c67x00_device *dev, u16 value); 279 279 + void c67x00_ll_husb_reset(struct c67x00_sie *sie, int port); 280 280 + void c67x00_ll_husb_set_current_td(struct c67x00_sie *sie, u16 addr); 281 281 + u16 c67x00_ll_husb_get_current_td(struct c67x00_sie *sie); 282 282 + u16 c67x00_ll_husb_get_frame(struct c67x00_sie *sie); 283 283 + void c67x00_ll_husb_init_host_port(struct c67x00_sie *sie); 284 284 + void c67x00_ll_husb_reset_port(struct c67x00_sie *sie, int port); 285 285 + 286 286 + /* Called by c67x00_irq to handle lcp interrupts */ 287 287 + void c67x00_ll_irq(struct c67x00_device *dev, u16 int_status); 288 288 + 289 289 + /* Setup and teardown */ 290 290 + void c67x00_ll_init(struct c67x00_device *dev); 291 291 + void c67x00_ll_release(struct c67x00_device *dev); 292 292 + int c67x00_ll_reset(struct c67x00_device *dev); 293 293 + 294 294 + #endif /* _USB_C67X00_H */

+3 -1

drivers/usb/core/message.c

reviewed

··· 394 394 if (!io->urbs) 395 395 goto nomem; 396 396 397 397 - urb_flags = URB_NO_TRANSFER_DMA_MAP | URB_NO_INTERRUPT; 397 397 + urb_flags = URB_NO_INTERRUPT; 398 398 + if (dma) 399 399 + urb_flags |= URB_NO_TRANSFER_DMA_MAP; 398 400 if (usb_pipein(pipe)) 399 401 urb_flags |= URB_SHORT_NOT_OK; 400 402

+20

drivers/usb/gadget/Kconfig

reviewed

··· 231 231 However, this problem is improved if change a value of 232 232 NET_IP_ALIGN to 4. 233 233 234 234 + config USB_GADGET_PXA27X 235 235 + boolean "PXA 27x" 236 236 + depends on ARCH_PXA && PXA27x 237 237 + help 238 238 + Intel's PXA 27x series XScale ARM v5TE processors include 239 239 + an integrated full speed USB 1.1 device controller. 240 240 + 241 241 + It has up to 23 endpoints, as well as endpoint zero (for 242 242 + control transfers). 243 243 + 244 244 + Say "y" to link the driver statically, or "m" to build a 245 245 + dynamically linked module called "pxa27x_udc" and force all 246 246 + gadget drivers to also be dynamically linked. 247 247 + 248 248 + config USB_PXA27X 249 249 + tristate 250 250 + depends on USB_GADGET_PXA27X 251 251 + default USB_GADGET 252 252 + select USB_GADGET_SELECTED 253 253 + 234 254 config USB_GADGET_GOKU 235 255 boolean "Toshiba TC86C001 'Goku-S'" 236 256 depends on PCI

+1

drivers/usb/gadget/Makefile

reviewed

··· 9 9 obj-$(CONFIG_USB_NET2280) += net2280.o 10 10 obj-$(CONFIG_USB_AMD5536UDC) += amd5536udc.o 11 11 obj-$(CONFIG_USB_PXA2XX) += pxa2xx_udc.o 12 12 + obj-$(CONFIG_USB_PXA27X) += pxa27x_udc.o 12 13 obj-$(CONFIG_USB_GOKU) += goku_udc.o 13 14 obj-$(CONFIG_USB_OMAP) += omap_udc.o 14 15 obj-$(CONFIG_USB_LH7A40X) += lh7a40x_udc.o

+4 -4

drivers/usb/gadget/ether.c

reviewed

··· 235 235 #define DEV_CONFIG_CDC 236 236 #endif 237 237 238 238 - #ifdef CONFIG_USB_GADGET_PXA27X 239 239 - #define DEV_CONFIG_CDC 240 240 - #endif 241 241 - 242 238 #ifdef CONFIG_USB_GADGET_S3C2410 243 239 #define DEV_CONFIG_CDC 244 240 #endif ··· 263 267 * Anything that talks bulk (without notable bugs) can do this. 264 268 */ 265 269 #ifdef CONFIG_USB_GADGET_PXA2XX 270 270 + #define DEV_CONFIG_SUBSET 271 271 + #endif 272 272 + 273 273 + #ifdef CONFIG_USB_GADGET_PXA27X 266 274 #define DEV_CONFIG_SUBSET 267 275 #endif 268 276

+24 -1

drivers/usb/gadget/file_storage.c

reviewed

··· 2307 2307 return rc; 2308 2308 } 2309 2309 2310 2310 + static int wedge_bulk_in_endpoint(struct fsg_dev *fsg) 2311 2311 + { 2312 2312 + int rc; 2313 2313 + 2314 2314 + DBG(fsg, "bulk-in set wedge\n"); 2315 2315 + rc = usb_ep_set_wedge(fsg->bulk_in); 2316 2316 + if (rc == -EAGAIN) 2317 2317 + VDBG(fsg, "delayed bulk-in endpoint wedge\n"); 2318 2318 + while (rc != 0) { 2319 2319 + if (rc != -EAGAIN) { 2320 2320 + WARN(fsg, "usb_ep_set_wedge -> %d\n", rc); 2321 2321 + rc = 0; 2322 2322 + break; 2323 2323 + } 2324 2324 + 2325 2325 + /* Wait for a short time and then try again */ 2326 2326 + if (msleep_interruptible(100) != 0) 2327 2327 + return -EINTR; 2328 2328 + rc = usb_ep_set_wedge(fsg->bulk_in); 2329 2329 + } 2330 2330 + return rc; 2331 2331 + } 2332 2332 + 2310 2333 static int pad_with_zeros(struct fsg_dev *fsg) 2311 2334 { 2312 2335 struct fsg_buffhd *bh = fsg->next_buffhd_to_fill; ··· 2980 2957 * We aren't required to halt the OUT endpoint; instead 2981 2958 * we can simply accept and discard any data received 2982 2959 * until the next reset. */ 2983 2983 - halt_bulk_in_endpoint(fsg); 2960 2960 + wedge_bulk_in_endpoint(fsg); 2984 2961 set_bit(IGNORE_BULK_OUT, &fsg->atomic_bitflags); 2985 2962 return -EINVAL; 2986 2963 }

+2404

drivers/usb/gadget/pxa27x_udc.c

reviewed

··· 1 1 + /* 2 2 + * Handles the Intel 27x USB Device Controller (UDC) 3 3 + * 4 4 + * Inspired by original driver by Frank Becker, David Brownell, and others. 5 5 + * Copyright (C) 2008 Robert Jarzmik 6 6 + * 7 7 + * This program is free software; you can redistribute it and/or modify 8 8 + * it under the terms of the GNU General Public License as published by 9 9 + * the Free Software Foundation; either version 2 of the License, or 10 10 + * (at your option) any later version. 11 11 + * 12 12 + * This program is distributed in the hope that it will be useful, 13 13 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 14 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 15 + * GNU General Public License for more details. 16 16 + * 17 17 + * You should have received a copy of the GNU General Public License 18 18 + * along with this program; if not, write to the Free Software 19 19 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 20 20 + * 21 21 + */ 22 22 + #include <linux/module.h> 23 23 + #include <linux/kernel.h> 24 24 + #include <linux/types.h> 25 25 + #include <linux/version.h> 26 26 + #include <linux/errno.h> 27 27 + #include <linux/platform_device.h> 28 28 + #include <linux/delay.h> 29 29 + #include <linux/list.h> 30 30 + #include <linux/interrupt.h> 31 31 + #include <linux/proc_fs.h> 32 32 + #include <linux/clk.h> 33 33 + #include <linux/irq.h> 34 34 + 35 35 + #include <asm/byteorder.h> 36 36 + #include <asm/hardware.h> 37 37 + 38 38 + #include <linux/usb.h> 39 39 + #include <linux/usb/ch9.h> 40 40 + #include <linux/usb/gadget.h> 41 41 + 42 42 + #include <asm/arch/udc.h> 43 43 + 44 44 + #include "pxa27x_udc.h" 45 45 + 46 46 + /* 47 47 + * This driver handles the USB Device Controller (UDC) in Intel's PXA 27x 48 48 + * series processors. 49 49 + * 50 50 + * Such controller drivers work with a gadget driver. The gadget driver 51 51 + * returns descriptors, implements configuration and data protocols used 52 52 + * by the host to interact with this device, and allocates endpoints to 53 53 + * the different protocol interfaces. The controller driver virtualizes 54 54 + * usb hardware so that the gadget drivers will be more portable. 55 55 + * 56 56 + * This UDC hardware wants to implement a bit too much USB protocol. The 57 57 + * biggest issues are: that the endpoints have to be set up before the 58 58 + * controller can be enabled (minor, and not uncommon); and each endpoint 59 59 + * can only have one configuration, interface and alternative interface 60 60 + * number (major, and very unusual). Once set up, these cannot be changed 61 61 + * without a controller reset. 62 62 + * 63 63 + * The workaround is to setup all combinations necessary for the gadgets which 64 64 + * will work with this driver. This is done in pxa_udc structure, statically. 65 65 + * See pxa_udc, udc_usb_ep versus pxa_ep, and matching function find_pxa_ep. 66 66 + * (You could modify this if needed. Some drivers have a "fifo_mode" module 67 67 + * parameter to facilitate such changes.) 68 68 + * 69 69 + * The combinations have been tested with these gadgets : 70 70 + * - zero gadget 71 71 + * - file storage gadget 72 72 + * - ether gadget 73 73 + * 74 74 + * The driver doesn't use DMA, only IO access and IRQ callbacks. No use is 75 75 + * made of UDC's double buffering either. USB "On-The-Go" is not implemented. 76 76 + * 77 77 + * All the requests are handled the same way : 78 78 + * - the drivers tries to handle the request directly to the IO 79 79 + * - if the IO fifo is not big enough, the remaining is send/received in 80 80 + * interrupt handling. 81 81 + */ 82 82 + 83 83 + #define DRIVER_VERSION "2008-04-18" 84 84 + #define DRIVER_DESC "PXA 27x USB Device Controller driver" 85 85 + 86 86 + static const char driver_name[] = "pxa27x_udc"; 87 87 + static struct pxa_udc *the_controller; 88 88 + 89 89 + static void handle_ep(struct pxa_ep *ep); 90 90 + 91 91 + /* 92 92 + * Debug filesystem 93 93 + */ 94 94 + #ifdef CONFIG_USB_GADGET_DEBUG_FS 95 95 + 96 96 + #include <linux/debugfs.h> 97 97 + #include <linux/uaccess.h> 98 98 + #include <linux/seq_file.h> 99 99 + 100 100 + static int state_dbg_show(struct seq_file *s, void *p) 101 101 + { 102 102 + struct pxa_udc *udc = s->private; 103 103 + int pos = 0, ret; 104 104 + u32 tmp; 105 105 + 106 106 + ret = -ENODEV; 107 107 + if (!udc->driver) 108 108 + goto out; 109 109 + 110 110 + /* basic device status */ 111 111 + pos += seq_printf(s, DRIVER_DESC "\n" 112 112 + "%s version: %s\nGadget driver: %s\n", 113 113 + driver_name, DRIVER_VERSION, 114 114 + udc->driver ? udc->driver->driver.name : "(none)"); 115 115 + 116 116 + tmp = udc_readl(udc, UDCCR); 117 117 + pos += seq_printf(s, 118 118 + "udccr=0x%0x(%s%s%s%s%s%s%s%s%s%s), " 119 119 + "con=%d,inter=%d,altinter=%d\n", tmp, 120 120 + (tmp & UDCCR_OEN) ? " oen":"", 121 121 + (tmp & UDCCR_AALTHNP) ? " aalthnp":"", 122 122 + (tmp & UDCCR_AHNP) ? " rem" : "", 123 123 + (tmp & UDCCR_BHNP) ? " rstir" : "", 124 124 + (tmp & UDCCR_DWRE) ? " dwre" : "", 125 125 + (tmp & UDCCR_SMAC) ? " smac" : "", 126 126 + (tmp & UDCCR_EMCE) ? " emce" : "", 127 127 + (tmp & UDCCR_UDR) ? " udr" : "", 128 128 + (tmp & UDCCR_UDA) ? " uda" : "", 129 129 + (tmp & UDCCR_UDE) ? " ude" : "", 130 130 + (tmp & UDCCR_ACN) >> UDCCR_ACN_S, 131 131 + (tmp & UDCCR_AIN) >> UDCCR_AIN_S, 132 132 + (tmp & UDCCR_AAISN) >> UDCCR_AAISN_S); 133 133 + /* registers for device and ep0 */ 134 134 + pos += seq_printf(s, "udcicr0=0x%08x udcicr1=0x%08x\n", 135 135 + udc_readl(udc, UDCICR0), udc_readl(udc, UDCICR1)); 136 136 + pos += seq_printf(s, "udcisr0=0x%08x udcisr1=0x%08x\n", 137 137 + udc_readl(udc, UDCISR0), udc_readl(udc, UDCISR1)); 138 138 + pos += seq_printf(s, "udcfnr=%d\n", udc_readl(udc, UDCFNR)); 139 139 + pos += seq_printf(s, "irqs: reset=%lu, suspend=%lu, resume=%lu, " 140 140 + "reconfig=%lu\n", 141 141 + udc->stats.irqs_reset, udc->stats.irqs_suspend, 142 142 + udc->stats.irqs_resume, udc->stats.irqs_reconfig); 143 143 + 144 144 + ret = 0; 145 145 + out: 146 146 + return ret; 147 147 + } 148 148 + 149 149 + static int queues_dbg_show(struct seq_file *s, void *p) 150 150 + { 151 151 + struct pxa_udc *udc = s->private; 152 152 + struct pxa_ep *ep; 153 153 + struct pxa27x_request *req; 154 154 + int pos = 0, i, maxpkt, ret; 155 155 + 156 156 + ret = -ENODEV; 157 157 + if (!udc->driver) 158 158 + goto out; 159 159 + 160 160 + /* dump endpoint queues */ 161 161 + for (i = 0; i < NR_PXA_ENDPOINTS; i++) { 162 162 + ep = &udc->pxa_ep[i]; 163 163 + maxpkt = ep->fifo_size; 164 164 + pos += seq_printf(s, "%-12s max_pkt=%d %s\n", 165 165 + EPNAME(ep), maxpkt, "pio"); 166 166 + 167 167 + if (list_empty(&ep->queue)) { 168 168 + pos += seq_printf(s, "\t(nothing queued)\n"); 169 169 + continue; 170 170 + } 171 171 + 172 172 + list_for_each_entry(req, &ep->queue, queue) { 173 173 + pos += seq_printf(s, "\treq %p len %d/%d buf %p\n", 174 174 + &req->req, req->req.actual, 175 175 + req->req.length, req->req.buf); 176 176 + } 177 177 + } 178 178 + 179 179 + ret = 0; 180 180 + out: 181 181 + return ret; 182 182 + } 183 183 + 184 184 + static int eps_dbg_show(struct seq_file *s, void *p) 185 185 + { 186 186 + struct pxa_udc *udc = s->private; 187 187 + struct pxa_ep *ep; 188 188 + int pos = 0, i, ret; 189 189 + u32 tmp; 190 190 + 191 191 + ret = -ENODEV; 192 192 + if (!udc->driver) 193 193 + goto out; 194 194 + 195 195 + ep = &udc->pxa_ep[0]; 196 196 + tmp = udc_ep_readl(ep, UDCCSR); 197 197 + pos += seq_printf(s, "udccsr0=0x%03x(%s%s%s%s%s%s%s)\n", tmp, 198 198 + (tmp & UDCCSR0_SA) ? " sa" : "", 199 199 + (tmp & UDCCSR0_RNE) ? " rne" : "", 200 200 + (tmp & UDCCSR0_FST) ? " fst" : "", 201 201 + (tmp & UDCCSR0_SST) ? " sst" : "", 202 202 + (tmp & UDCCSR0_DME) ? " dme" : "", 203 203 + (tmp & UDCCSR0_IPR) ? " ipr" : "", 204 204 + (tmp & UDCCSR0_OPC) ? " opc" : ""); 205 205 + for (i = 0; i < NR_PXA_ENDPOINTS; i++) { 206 206 + ep = &udc->pxa_ep[i]; 207 207 + tmp = i? udc_ep_readl(ep, UDCCR) : udc_readl(udc, UDCCR); 208 208 + pos += seq_printf(s, "%-12s: " 209 209 + "IN %lu(%lu reqs), OUT %lu(%lu reqs), " 210 210 + "irqs=%lu, udccr=0x%08x, udccsr=0x%03x, " 211 211 + "udcbcr=%d\n", 212 212 + EPNAME(ep), 213 213 + ep->stats.in_bytes, ep->stats.in_ops, 214 214 + ep->stats.out_bytes, ep->stats.out_ops, 215 215 + ep->stats.irqs, 216 216 + tmp, udc_ep_readl(ep, UDCCSR), 217 217 + udc_ep_readl(ep, UDCBCR)); 218 218 + } 219 219 + 220 220 + ret = 0; 221 221 + out: 222 222 + return ret; 223 223 + } 224 224 + 225 225 + static int eps_dbg_open(struct inode *inode, struct file *file) 226 226 + { 227 227 + return single_open(file, eps_dbg_show, inode->i_private); 228 228 + } 229 229 + 230 230 + static int queues_dbg_open(struct inode *inode, struct file *file) 231 231 + { 232 232 + return single_open(file, queues_dbg_show, inode->i_private); 233 233 + } 234 234 + 235 235 + static int state_dbg_open(struct inode *inode, struct file *file) 236 236 + { 237 237 + return single_open(file, state_dbg_show, inode->i_private); 238 238 + } 239 239 + 240 240 + static const struct file_operations state_dbg_fops = { 241 241 + .owner = THIS_MODULE, 242 242 + .open = state_dbg_open, 243 243 + .llseek = seq_lseek, 244 244 + .read = seq_read, 245 245 + .release = single_release, 246 246 + }; 247 247 + 248 248 + static const struct file_operations queues_dbg_fops = { 249 249 + .owner = THIS_MODULE, 250 250 + .open = queues_dbg_open, 251 251 + .llseek = seq_lseek, 252 252 + .read = seq_read, 253 253 + .release = single_release, 254 254 + }; 255 255 + 256 256 + static const struct file_operations eps_dbg_fops = { 257 257 + .owner = THIS_MODULE, 258 258 + .open = eps_dbg_open, 259 259 + .llseek = seq_lseek, 260 260 + .read = seq_read, 261 261 + .release = single_release, 262 262 + }; 263 263 + 264 264 + static void pxa_init_debugfs(struct pxa_udc *udc) 265 265 + { 266 266 + struct dentry *root, *state, *queues, *eps; 267 267 + 268 268 + root = debugfs_create_dir(udc->gadget.name, NULL); 269 269 + if (IS_ERR(root) || !root) 270 270 + goto err_root; 271 271 + 272 272 + state = debugfs_create_file("udcstate", 0400, root, udc, 273 273 + &state_dbg_fops); 274 274 + if (!state) 275 275 + goto err_state; 276 276 + queues = debugfs_create_file("queues", 0400, root, udc, 277 277 + &queues_dbg_fops); 278 278 + if (!queues) 279 279 + goto err_queues; 280 280 + eps = debugfs_create_file("epstate", 0400, root, udc, 281 281 + &eps_dbg_fops); 282 282 + if (!queues) 283 283 + goto err_eps; 284 284 + 285 285 + udc->debugfs_root = root; 286 286 + udc->debugfs_state = state; 287 287 + udc->debugfs_queues = queues; 288 288 + udc->debugfs_eps = eps; 289 289 + return; 290 290 + err_eps: 291 291 + debugfs_remove(eps); 292 292 + err_queues: 293 293 + debugfs_remove(queues); 294 294 + err_state: 295 295 + debugfs_remove(root); 296 296 + err_root: 297 297 + dev_err(udc->dev, "debugfs is not available\n"); 298 298 + } 299 299 + 300 300 + static void pxa_cleanup_debugfs(struct pxa_udc *udc) 301 301 + { 302 302 + debugfs_remove(udc->debugfs_eps); 303 303 + debugfs_remove(udc->debugfs_queues); 304 304 + debugfs_remove(udc->debugfs_state); 305 305 + debugfs_remove(udc->debugfs_root); 306 306 + udc->debugfs_eps = NULL; 307 307 + udc->debugfs_queues = NULL; 308 308 + udc->debugfs_state = NULL; 309 309 + udc->debugfs_root = NULL; 310 310 + } 311 311 + 312 312 + #else 313 313 + static inline void pxa_init_debugfs(struct pxa_udc *udc) 314 314 + { 315 315 + } 316 316 + 317 317 + static inline void pxa_cleanup_debugfs(struct pxa_udc *udc) 318 318 + { 319 319 + } 320 320 + #endif 321 321 + 322 322 + /** 323 323 + * is_match_usb_pxa - check if usb_ep and pxa_ep match 324 324 + * @udc_usb_ep: usb endpoint 325 325 + * @ep: pxa endpoint 326 326 + * @config: configuration required in pxa_ep 327 327 + * @interface: interface required in pxa_ep 328 328 + * @altsetting: altsetting required in pxa_ep 329 329 + * 330 330 + * Returns 1 if all criteria match between pxa and usb endpoint, 0 otherwise 331 331 + */ 332 332 + static int is_match_usb_pxa(struct udc_usb_ep *udc_usb_ep, struct pxa_ep *ep, 333 333 + int config, int interface, int altsetting) 334 334 + { 335 335 + if (usb_endpoint_num(&udc_usb_ep->desc) != ep->addr) 336 336 + return 0; 337 337 + if (usb_endpoint_dir_in(&udc_usb_ep->desc) != ep->dir_in) 338 338 + return 0; 339 339 + if (usb_endpoint_type(&udc_usb_ep->desc) != ep->type) 340 340 + return 0; 341 341 + if ((ep->config != config) || (ep->interface != interface) 342 342 + || (ep->alternate != altsetting)) 343 343 + return 0; 344 344 + return 1; 345 345 + } 346 346 + 347 347 + /** 348 348 + * find_pxa_ep - find pxa_ep structure matching udc_usb_ep 349 349 + * @udc: pxa udc 350 350 + * @udc_usb_ep: udc_usb_ep structure 351 351 + * 352 352 + * Match udc_usb_ep and all pxa_ep available, to see if one matches. 353 353 + * This is necessary because of the strong pxa hardware restriction requiring 354 354 + * that once pxa endpoints are initialized, their configuration is freezed, and 355 355 + * no change can be made to their address, direction, or in which configuration, 356 356 + * interface or altsetting they are active ... which differs from more usual 357 357 + * models which have endpoints be roughly just addressable fifos, and leave 358 358 + * configuration events up to gadget drivers (like all control messages). 359 359 + * 360 360 + * Note that there is still a blurred point here : 361 361 + * - we rely on UDCCR register "active interface" and "active altsetting". 362 362 + * This is a nonsense in regard of USB spec, where multiple interfaces are 363 363 + * active at the same time. 364 364 + * - if we knew for sure that the pxa can handle multiple interface at the 365 365 + * same time, assuming Intel's Developer Guide is wrong, this function 366 366 + * should be reviewed, and a cache of couples (iface, altsetting) should 367 367 + * be kept in the pxa_udc structure. In this case this function would match 368 368 + * against the cache of couples instead of the "last altsetting" set up. 369 369 + * 370 370 + * Returns the matched pxa_ep structure or NULL if none found 371 371 + */ 372 372 + static struct pxa_ep *find_pxa_ep(struct pxa_udc *udc, 373 373 + struct udc_usb_ep *udc_usb_ep) 374 374 + { 375 375 + int i; 376 376 + struct pxa_ep *ep; 377 377 + int cfg = udc->config; 378 378 + int iface = udc->last_interface; 379 379 + int alt = udc->last_alternate; 380 380 + 381 381 + if (udc_usb_ep == &udc->udc_usb_ep[0]) 382 382 + return &udc->pxa_ep[0]; 383 383 + 384 384 + for (i = 1; i < NR_PXA_ENDPOINTS; i++) { 385 385 + ep = &udc->pxa_ep[i]; 386 386 + if (is_match_usb_pxa(udc_usb_ep, ep, cfg, iface, alt)) 387 387 + return ep; 388 388 + } 389 389 + return NULL; 390 390 + } 391 391 + 392 392 + /** 393 393 + * update_pxa_ep_matches - update pxa_ep cached values in all udc_usb_ep 394 394 + * @udc: pxa udc 395 395 + * 396 396 + * Context: in_interrupt() 397 397 + * 398 398 + * Updates all pxa_ep fields in udc_usb_ep structures, if this field was 399 399 + * previously set up (and is not NULL). The update is necessary is a 400 400 + * configuration change or altsetting change was issued by the USB host. 401 401 + */ 402 402 + static void update_pxa_ep_matches(struct pxa_udc *udc) 403 403 + { 404 404 + int i; 405 405 + struct udc_usb_ep *udc_usb_ep; 406 406 + 407 407 + for (i = 1; i < NR_USB_ENDPOINTS; i++) { 408 408 + udc_usb_ep = &udc->udc_usb_ep[i]; 409 409 + if (udc_usb_ep->pxa_ep) 410 410 + udc_usb_ep->pxa_ep = find_pxa_ep(udc, udc_usb_ep); 411 411 + } 412 412 + } 413 413 + 414 414 + /** 415 415 + * pio_irq_enable - Enables irq generation for one endpoint 416 416 + * @ep: udc endpoint 417 417 + */ 418 418 + static void pio_irq_enable(struct pxa_ep *ep) 419 419 + { 420 420 + struct pxa_udc *udc = ep->dev; 421 421 + int index = EPIDX(ep); 422 422 + u32 udcicr0 = udc_readl(udc, UDCICR0); 423 423 + u32 udcicr1 = udc_readl(udc, UDCICR1); 424 424 + 425 425 + if (index < 16) 426 426 + udc_writel(udc, UDCICR0, udcicr0 | (3 << (index * 2))); 427 427 + else 428 428 + udc_writel(udc, UDCICR1, udcicr1 | (3 << ((index - 16) * 2))); 429 429 + } 430 430 + 431 431 + /** 432 432 + * pio_irq_disable - Disables irq generation for one endpoint 433 433 + * @ep: udc endpoint 434 434 + * @index: endpoint number 435 435 + */ 436 436 + static void pio_irq_disable(struct pxa_ep *ep) 437 437 + { 438 438 + struct pxa_udc *udc = ep->dev; 439 439 + int index = EPIDX(ep); 440 440 + u32 udcicr0 = udc_readl(udc, UDCICR0); 441 441 + u32 udcicr1 = udc_readl(udc, UDCICR1); 442 442 + 443 443 + if (index < 16) 444 444 + udc_writel(udc, UDCICR0, udcicr0 & ~(3 << (index * 2))); 445 445 + else 446 446 + udc_writel(udc, UDCICR1, udcicr1 & ~(3 << ((index - 16) * 2))); 447 447 + } 448 448 + 449 449 + /** 450 450 + * udc_set_mask_UDCCR - set bits in UDCCR 451 451 + * @udc: udc device 452 452 + * @mask: bits to set in UDCCR 453 453 + * 454 454 + * Sets bits in UDCCR, leaving DME and FST bits as they were. 455 455 + */ 456 456 + static inline void udc_set_mask_UDCCR(struct pxa_udc *udc, int mask) 457 457 + { 458 458 + u32 udccr = udc_readl(udc, UDCCR); 459 459 + udc_writel(udc, UDCCR, 460 460 + (udccr & UDCCR_MASK_BITS) | (mask & UDCCR_MASK_BITS)); 461 461 + } 462 462 + 463 463 + /** 464 464 + * udc_clear_mask_UDCCR - clears bits in UDCCR 465 465 + * @udc: udc device 466 466 + * @mask: bit to clear in UDCCR 467 467 + * 468 468 + * Clears bits in UDCCR, leaving DME and FST bits as they were. 469 469 + */ 470 470 + static inline void udc_clear_mask_UDCCR(struct pxa_udc *udc, int mask) 471 471 + { 472 472 + u32 udccr = udc_readl(udc, UDCCR); 473 473 + udc_writel(udc, UDCCR, 474 474 + (udccr & UDCCR_MASK_BITS) & ~(mask & UDCCR_MASK_BITS)); 475 475 + } 476 476 + 477 477 + /** 478 478 + * ep_count_bytes_remain - get how many bytes in udc endpoint 479 479 + * @ep: udc endpoint 480 480 + * 481 481 + * Returns number of bytes in OUT fifos. Broken for IN fifos (-EOPNOTSUPP) 482 482 + */ 483 483 + static int ep_count_bytes_remain(struct pxa_ep *ep) 484 484 + { 485 485 + if (ep->dir_in) 486 486 + return -EOPNOTSUPP; 487 487 + return udc_ep_readl(ep, UDCBCR) & 0x3ff; 488 488 + } 489 489 + 490 490 + /** 491 491 + * ep_is_empty - checks if ep has byte ready for reading 492 492 + * @ep: udc endpoint 493 493 + * 494 494 + * If endpoint is the control endpoint, checks if there are bytes in the 495 495 + * control endpoint fifo. If endpoint is a data endpoint, checks if bytes 496 496 + * are ready for reading on OUT endpoint. 497 497 + * 498 498 + * Returns 0 if ep not empty, 1 if ep empty, -EOPNOTSUPP if IN endpoint 499 499 + */ 500 500 + static int ep_is_empty(struct pxa_ep *ep) 501 501 + { 502 502 + int ret; 503 503 + 504 504 + if (!is_ep0(ep) && ep->dir_in) 505 505 + return -EOPNOTSUPP; 506 506 + if (is_ep0(ep)) 507 507 + ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR0_RNE); 508 508 + else 509 509 + ret = !(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNE); 510 510 + return ret; 511 511 + } 512 512 + 513 513 + /** 514 514 + * ep_is_full - checks if ep has place to write bytes 515 515 + * @ep: udc endpoint 516 516 + * 517 517 + * If endpoint is not the control endpoint and is an IN endpoint, checks if 518 518 + * there is place to write bytes into the endpoint. 519 519 + * 520 520 + * Returns 0 if ep not full, 1 if ep full, -EOPNOTSUPP if OUT endpoint 521 521 + */ 522 522 + static int ep_is_full(struct pxa_ep *ep) 523 523 + { 524 524 + if (is_ep0(ep)) 525 525 + return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_IPR); 526 526 + if (!ep->dir_in) 527 527 + return -EOPNOTSUPP; 528 528 + return (!(udc_ep_readl(ep, UDCCSR) & UDCCSR_BNF)); 529 529 + } 530 530 + 531 531 + /** 532 532 + * epout_has_pkt - checks if OUT endpoint fifo has a packet available 533 533 + * @ep: pxa endpoint 534 534 + * 535 535 + * Returns 1 if a complete packet is available, 0 if not, -EOPNOTSUPP for IN ep. 536 536 + */ 537 537 + static int epout_has_pkt(struct pxa_ep *ep) 538 538 + { 539 539 + if (!is_ep0(ep) && ep->dir_in) 540 540 + return -EOPNOTSUPP; 541 541 + if (is_ep0(ep)) 542 542 + return (udc_ep_readl(ep, UDCCSR) & UDCCSR0_OPC); 543 543 + return (udc_ep_readl(ep, UDCCSR) & UDCCSR_PC); 544 544 + } 545 545 + 546 546 + /** 547 547 + * set_ep0state - Set ep0 automata state 548 548 + * @dev: udc device 549 549 + * @state: state 550 550 + */ 551 551 + static void set_ep0state(struct pxa_udc *udc, int state) 552 552 + { 553 553 + struct pxa_ep *ep = &udc->pxa_ep[0]; 554 554 + char *old_stname = EP0_STNAME(udc); 555 555 + 556 556 + udc->ep0state = state; 557 557 + ep_dbg(ep, "state=%s->%s, udccsr0=0x%03x, udcbcr=%d\n", old_stname, 558 558 + EP0_STNAME(udc), udc_ep_readl(ep, UDCCSR), 559 559 + udc_ep_readl(ep, UDCBCR)); 560 560 + } 561 561 + 562 562 + /** 563 563 + * ep0_idle - Put control endpoint into idle state 564 564 + * @dev: udc device 565 565 + */ 566 566 + static void ep0_idle(struct pxa_udc *dev) 567 567 + { 568 568 + set_ep0state(dev, WAIT_FOR_SETUP); 569 569 + } 570 570 + 571 571 + /** 572 572 + * inc_ep_stats_reqs - Update ep stats counts 573 573 + * @ep: physical endpoint 574 574 + * @req: usb request 575 575 + * @is_in: ep direction (USB_DIR_IN or 0) 576 576 + * 577 577 + */ 578 578 + static void inc_ep_stats_reqs(struct pxa_ep *ep, int is_in) 579 579 + { 580 580 + if (is_in) 581 581 + ep->stats.in_ops++; 582 582 + else 583 583 + ep->stats.out_ops++; 584 584 + } 585 585 + 586 586 + /** 587 587 + * inc_ep_stats_bytes - Update ep stats counts 588 588 + * @ep: physical endpoint 589 589 + * @count: bytes transfered on endpoint 590 590 + * @req: usb request 591 591 + * @is_in: ep direction (USB_DIR_IN or 0) 592 592 + */ 593 593 + static void inc_ep_stats_bytes(struct pxa_ep *ep, int count, int is_in) 594 594 + { 595 595 + if (is_in) 596 596 + ep->stats.in_bytes += count; 597 597 + else 598 598 + ep->stats.out_bytes += count; 599 599 + } 600 600 + 601 601 + /** 602 602 + * pxa_ep_setup - Sets up an usb physical endpoint 603 603 + * @ep: pxa27x physical endpoint 604 604 + * 605 605 + * Find the physical pxa27x ep, and setup its UDCCR 606 606 + */ 607 607 + static __init void pxa_ep_setup(struct pxa_ep *ep) 608 608 + { 609 609 + u32 new_udccr; 610 610 + 611 611 + new_udccr = ((ep->config << UDCCONR_CN_S) & UDCCONR_CN) 612 612 + | ((ep->interface << UDCCONR_IN_S) & UDCCONR_IN) 613 613 + | ((ep->alternate << UDCCONR_AISN_S) & UDCCONR_AISN) 614 614 + | ((EPADDR(ep) << UDCCONR_EN_S) & UDCCONR_EN) 615 615 + | ((EPXFERTYPE(ep) << UDCCONR_ET_S) & UDCCONR_ET) 616 616 + | ((ep->dir_in) ? UDCCONR_ED : 0) 617 617 + | ((ep->fifo_size << UDCCONR_MPS_S) & UDCCONR_MPS) 618 618 + | UDCCONR_EE; 619 619 + 620 620 + udc_ep_writel(ep, UDCCR, new_udccr); 621 621 + } 622 622 + 623 623 + /** 624 624 + * pxa_eps_setup - Sets up all usb physical endpoints 625 625 + * @dev: udc device 626 626 + * 627 627 + * Setup all pxa physical endpoints, except ep0 628 628 + */ 629 629 + static __init void pxa_eps_setup(struct pxa_udc *dev) 630 630 + { 631 631 + unsigned int i; 632 632 + 633 633 + dev_dbg(dev->dev, "%s: dev=%p\n", __func__, dev); 634 634 + 635 635 + for (i = 1; i < NR_PXA_ENDPOINTS; i++) 636 636 + pxa_ep_setup(&dev->pxa_ep[i]); 637 637 + } 638 638 + 639 639 + /** 640 640 + * pxa_ep_alloc_request - Allocate usb request 641 641 + * @_ep: usb endpoint 642 642 + * @gfp_flags: 643 643 + * 644 644 + * For the pxa27x, these can just wrap kmalloc/kfree. gadget drivers 645 645 + * must still pass correctly initialized endpoints, since other controller 646 646 + * drivers may care about how it's currently set up (dma issues etc). 647 647 + */ 648 648 + static struct usb_request * 649 649 + pxa_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) 650 650 + { 651 651 + struct pxa27x_request *req; 652 652 + 653 653 + req = kzalloc(sizeof *req, gfp_flags); 654 654 + if (!req || !_ep) 655 655 + return NULL; 656 656 + 657 657 + INIT_LIST_HEAD(&req->queue); 658 658 + req->in_use = 0; 659 659 + req->udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep); 660 660 + 661 661 + return &req->req; 662 662 + } 663 663 + 664 664 + /** 665 665 + * pxa_ep_free_request - Free usb request 666 666 + * @_ep: usb endpoint 667 667 + * @_req: usb request 668 668 + * 669 669 + * Wrapper around kfree to free _req 670 670 + */ 671 671 + static void pxa_ep_free_request(struct usb_ep *_ep, struct usb_request *_req) 672 672 + { 673 673 + struct pxa27x_request *req; 674 674 + 675 675 + req = container_of(_req, struct pxa27x_request, req); 676 676 + WARN_ON(!list_empty(&req->queue)); 677 677 + kfree(req); 678 678 + } 679 679 + 680 680 + /** 681 681 + * ep_add_request - add a request to the endpoint's queue 682 682 + * @ep: usb endpoint 683 683 + * @req: usb request 684 684 + * 685 685 + * Context: ep->lock held 686 686 + * 687 687 + * Queues the request in the endpoint's queue, and enables the interrupts 688 688 + * on the endpoint. 689 689 + */ 690 690 + static void ep_add_request(struct pxa_ep *ep, struct pxa27x_request *req) 691 691 + { 692 692 + if (unlikely(!req)) 693 693 + return; 694 694 + ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req, 695 695 + req->req.length, udc_ep_readl(ep, UDCCSR)); 696 696 + 697 697 + req->in_use = 1; 698 698 + list_add_tail(&req->queue, &ep->queue); 699 699 + pio_irq_enable(ep); 700 700 + } 701 701 + 702 702 + /** 703 703 + * ep_del_request - removes a request from the endpoint's queue 704 704 + * @ep: usb endpoint 705 705 + * @req: usb request 706 706 + * 707 707 + * Context: ep->lock held 708 708 + * 709 709 + * Unqueue the request from the endpoint's queue. If there are no more requests 710 710 + * on the endpoint, and if it's not the control endpoint, interrupts are 711 711 + * disabled on the endpoint. 712 712 + */ 713 713 + static void ep_del_request(struct pxa_ep *ep, struct pxa27x_request *req) 714 714 + { 715 715 + if (unlikely(!req)) 716 716 + return; 717 717 + ep_vdbg(ep, "req:%p, lg=%d, udccsr=0x%03x\n", req, 718 718 + req->req.length, udc_ep_readl(ep, UDCCSR)); 719 719 + 720 720 + list_del_init(&req->queue); 721 721 + req->in_use = 0; 722 722 + if (!is_ep0(ep) && list_empty(&ep->queue)) 723 723 + pio_irq_disable(ep); 724 724 + } 725 725 + 726 726 + /** 727 727 + * req_done - Complete an usb request 728 728 + * @ep: pxa physical endpoint 729 729 + * @req: pxa request 730 730 + * @status: usb request status sent to gadget API 731 731 + * 732 732 + * Context: ep->lock held 733 733 + * 734 734 + * Retire a pxa27x usb request. Endpoint must be locked. 735 735 + */ 736 736 + static void req_done(struct pxa_ep *ep, struct pxa27x_request *req, int status) 737 737 + { 738 738 + ep_del_request(ep, req); 739 739 + if (likely(req->req.status == -EINPROGRESS)) 740 740 + req->req.status = status; 741 741 + else 742 742 + status = req->req.status; 743 743 + 744 744 + if (status && status != -ESHUTDOWN) 745 745 + ep_dbg(ep, "complete req %p stat %d len %u/%u\n", 746 746 + &req->req, status, 747 747 + req->req.actual, req->req.length); 748 748 + 749 749 + req->req.complete(&req->udc_usb_ep->usb_ep, &req->req); 750 750 + } 751 751 + 752 752 + /** 753 753 + * ep_end_out_req - Ends control endpoint in request 754 754 + * @ep: physical endpoint 755 755 + * @req: pxa request 756 756 + * 757 757 + * Context: ep->lock held 758 758 + * 759 759 + * Ends endpoint in request (completes usb request). 760 760 + */ 761 761 + static void ep_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req) 762 762 + { 763 763 + inc_ep_stats_reqs(ep, !USB_DIR_IN); 764 764 + req_done(ep, req, 0); 765 765 + } 766 766 + 767 767 + /** 768 768 + * ep0_end_out_req - Ends control endpoint in request (ends data stage) 769 769 + * @ep: physical endpoint 770 770 + * @req: pxa request 771 771 + * 772 772 + * Context: ep->lock held 773 773 + * 774 774 + * Ends control endpoint in request (completes usb request), and puts 775 775 + * control endpoint into idle state 776 776 + */ 777 777 + static void ep0_end_out_req(struct pxa_ep *ep, struct pxa27x_request *req) 778 778 + { 779 779 + set_ep0state(ep->dev, OUT_STATUS_STAGE); 780 780 + ep_end_out_req(ep, req); 781 781 + ep0_idle(ep->dev); 782 782 + } 783 783 + 784 784 + /** 785 785 + * ep_end_in_req - Ends endpoint out request 786 786 + * @ep: physical endpoint 787 787 + * @req: pxa request 788 788 + * 789 789 + * Context: ep->lock held 790 790 + * 791 791 + * Ends endpoint out request (completes usb request). 792 792 + */ 793 793 + static void ep_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req) 794 794 + { 795 795 + inc_ep_stats_reqs(ep, USB_DIR_IN); 796 796 + req_done(ep, req, 0); 797 797 + } 798 798 + 799 799 + /** 800 800 + * ep0_end_in_req - Ends control endpoint out request (ends data stage) 801 801 + * @ep: physical endpoint 802 802 + * @req: pxa request 803 803 + * 804 804 + * Context: ep->lock held 805 805 + * 806 806 + * Ends control endpoint out request (completes usb request), and puts 807 807 + * control endpoint into status state 808 808 + */ 809 809 + static void ep0_end_in_req(struct pxa_ep *ep, struct pxa27x_request *req) 810 810 + { 811 811 + struct pxa_udc *udc = ep->dev; 812 812 + 813 813 + set_ep0state(udc, IN_STATUS_STAGE); 814 814 + ep_end_in_req(ep, req); 815 815 + } 816 816 + 817 817 + /** 818 818 + * nuke - Dequeue all requests 819 819 + * @ep: pxa endpoint 820 820 + * @status: usb request status 821 821 + * 822 822 + * Context: ep->lock held 823 823 + * 824 824 + * Dequeues all requests on an endpoint. As a side effect, interrupts will be 825 825 + * disabled on that endpoint (because no more requests). 826 826 + */ 827 827 + static void nuke(struct pxa_ep *ep, int status) 828 828 + { 829 829 + struct pxa27x_request *req; 830 830 + 831 831 + while (!list_empty(&ep->queue)) { 832 832 + req = list_entry(ep->queue.next, struct pxa27x_request, queue); 833 833 + req_done(ep, req, status); 834 834 + } 835 835 + } 836 836 + 837 837 + /** 838 838 + * read_packet - transfer 1 packet from an OUT endpoint into request 839 839 + * @ep: pxa physical endpoint 840 840 + * @req: usb request 841 841 + * 842 842 + * Takes bytes from OUT endpoint and transfers them info the usb request. 843 843 + * If there is less space in request than bytes received in OUT endpoint, 844 844 + * bytes are left in the OUT endpoint. 845 845 + * 846 846 + * Returns how many bytes were actually transfered 847 847 + */ 848 848 + static int read_packet(struct pxa_ep *ep, struct pxa27x_request *req) 849 849 + { 850 850 + u32 *buf; 851 851 + int bytes_ep, bufferspace, count, i; 852 852 + 853 853 + bytes_ep = ep_count_bytes_remain(ep); 854 854 + bufferspace = req->req.length - req->req.actual; 855 855 + 856 856 + buf = (u32 *)(req->req.buf + req->req.actual); 857 857 + prefetchw(buf); 858 858 + 859 859 + if (likely(!ep_is_empty(ep))) 860 860 + count = min(bytes_ep, bufferspace); 861 861 + else /* zlp */ 862 862 + count = 0; 863 863 + 864 864 + for (i = count; i > 0; i -= 4) 865 865 + *buf++ = udc_ep_readl(ep, UDCDR); 866 866 + req->req.actual += count; 867 867 + 868 868 + udc_ep_writel(ep, UDCCSR, UDCCSR_PC); 869 869 + 870 870 + return count; 871 871 + } 872 872 + 873 873 + /** 874 874 + * write_packet - transfer 1 packet from request into an IN endpoint 875 875 + * @ep: pxa physical endpoint 876 876 + * @req: usb request 877 877 + * @max: max bytes that fit into endpoint 878 878 + * 879 879 + * Takes bytes from usb request, and transfers them into the physical 880 880 + * endpoint. If there are no bytes to transfer, doesn't write anything 881 881 + * to physical endpoint. 882 882 + * 883 883 + * Returns how many bytes were actually transfered. 884 884 + */ 885 885 + static int write_packet(struct pxa_ep *ep, struct pxa27x_request *req, 886 886 + unsigned int max) 887 887 + { 888 888 + int length, count, remain, i; 889 889 + u32 *buf; 890 890 + u8 *buf_8; 891 891 + 892 892 + buf = (u32 *)(req->req.buf + req->req.actual); 893 893 + prefetch(buf); 894 894 + 895 895 + length = min(req->req.length - req->req.actual, max); 896 896 + req->req.actual += length; 897 897 + 898 898 + remain = length & 0x3; 899 899 + count = length & ~(0x3); 900 900 + for (i = count; i > 0 ; i -= 4) 901 901 + udc_ep_writel(ep, UDCDR, *buf++); 902 902 + 903 903 + buf_8 = (u8 *)buf; 904 904 + for (i = remain; i > 0; i--) 905 905 + udc_ep_writeb(ep, UDCDR, *buf_8++); 906 906 + 907 907 + ep_vdbg(ep, "length=%d+%d, udccsr=0x%03x\n", count, remain, 908 908 + udc_ep_readl(ep, UDCCSR)); 909 909 + 910 910 + return length; 911 911 + } 912 912 + 913 913 + /** 914 914 + * read_fifo - Transfer packets from OUT endpoint into usb request 915 915 + * @ep: pxa physical endpoint 916 916 + * @req: usb request 917 917 + * 918 918 + * Context: callable when in_interrupt() 919 919 + * 920 920 + * Unload as many packets as possible from the fifo we use for usb OUT 921 921 + * transfers and put them into the request. Caller should have made sure 922 922 + * there's at least one packet ready. 923 923 + * Doesn't complete the request, that's the caller's job 924 924 + * 925 925 + * Returns 1 if the request completed, 0 otherwise 926 926 + */ 927 927 + static int read_fifo(struct pxa_ep *ep, struct pxa27x_request *req) 928 928 + { 929 929 + int count, is_short, completed = 0; 930 930 + 931 931 + while (epout_has_pkt(ep)) { 932 932 + count = read_packet(ep, req); 933 933 + inc_ep_stats_bytes(ep, count, !USB_DIR_IN); 934 934 + 935 935 + is_short = (count < ep->fifo_size); 936 936 + ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n", 937 937 + udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "", 938 938 + &req->req, req->req.actual, req->req.length); 939 939 + 940 940 + /* completion */ 941 941 + if (is_short || req->req.actual == req->req.length) { 942 942 + completed = 1; 943 943 + break; 944 944 + } 945 945 + /* finished that packet. the next one may be waiting... */ 946 946 + } 947 947 + return completed; 948 948 + } 949 949 + 950 950 + /** 951 951 + * write_fifo - transfer packets from usb request into an IN endpoint 952 952 + * @ep: pxa physical endpoint 953 953 + * @req: pxa usb request 954 954 + * 955 955 + * Write to an IN endpoint fifo, as many packets as possible. 956 956 + * irqs will use this to write the rest later. 957 957 + * caller guarantees at least one packet buffer is ready (or a zlp). 958 958 + * Doesn't complete the request, that's the caller's job 959 959 + * 960 960 + * Returns 1 if request fully transfered, 0 if partial transfer 961 961 + */ 962 962 + static int write_fifo(struct pxa_ep *ep, struct pxa27x_request *req) 963 963 + { 964 964 + unsigned max; 965 965 + int count, is_short, is_last = 0, completed = 0, totcount = 0; 966 966 + u32 udccsr; 967 967 + 968 968 + max = ep->fifo_size; 969 969 + do { 970 970 + is_short = 0; 971 971 + 972 972 + udccsr = udc_ep_readl(ep, UDCCSR); 973 973 + if (udccsr & UDCCSR_PC) { 974 974 + ep_vdbg(ep, "Clearing Transmit Complete, udccsr=%x\n", 975 975 + udccsr); 976 976 + udc_ep_writel(ep, UDCCSR, UDCCSR_PC); 977 977 + } 978 978 + if (udccsr & UDCCSR_TRN) { 979 979 + ep_vdbg(ep, "Clearing Underrun on, udccsr=%x\n", 980 980 + udccsr); 981 981 + udc_ep_writel(ep, UDCCSR, UDCCSR_TRN); 982 982 + } 983 983 + 984 984 + count = write_packet(ep, req, max); 985 985 + inc_ep_stats_bytes(ep, count, USB_DIR_IN); 986 986 + totcount += count; 987 987 + 988 988 + /* last packet is usually short (or a zlp) */ 989 989 + if (unlikely(count < max)) { 990 990 + is_last = 1; 991 991 + is_short = 1; 992 992 + } else { 993 993 + if (likely(req->req.length > req->req.actual) 994 994 + || req->req.zero) 995 995 + is_last = 0; 996 996 + else 997 997 + is_last = 1; 998 998 + /* interrupt/iso maxpacket may not fill the fifo */ 999 999 + is_short = unlikely(max < ep->fifo_size); 1000 1000 + } 1001 1001 + 1002 1002 + if (is_short) 1003 1003 + udc_ep_writel(ep, UDCCSR, UDCCSR_SP); 1004 1004 + 1005 1005 + /* requests complete when all IN data is in the FIFO */ 1006 1006 + if (is_last) { 1007 1007 + completed = 1; 1008 1008 + break; 1009 1009 + } 1010 1010 + } while (!ep_is_full(ep)); 1011 1011 + 1012 1012 + ep_dbg(ep, "wrote count:%d bytes%s%s, left:%d req=%p\n", 1013 1013 + totcount, is_last ? "/L" : "", is_short ? "/S" : "", 1014 1014 + req->req.length - req->req.actual, &req->req); 1015 1015 + 1016 1016 + return completed; 1017 1017 + } 1018 1018 + 1019 1019 + /** 1020 1020 + * read_ep0_fifo - Transfer packets from control endpoint into usb request 1021 1021 + * @ep: control endpoint 1022 1022 + * @req: pxa usb request 1023 1023 + * 1024 1024 + * Special ep0 version of the above read_fifo. Reads as many bytes from control 1025 1025 + * endpoint as can be read, and stores them into usb request (limited by request 1026 1026 + * maximum length). 1027 1027 + * 1028 1028 + * Returns 0 if usb request only partially filled, 1 if fully filled 1029 1029 + */ 1030 1030 + static int read_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req) 1031 1031 + { 1032 1032 + int count, is_short, completed = 0; 1033 1033 + 1034 1034 + while (epout_has_pkt(ep)) { 1035 1035 + count = read_packet(ep, req); 1036 1036 + udc_ep_writel(ep, UDCCSR, UDCCSR0_OPC); 1037 1037 + inc_ep_stats_bytes(ep, count, !USB_DIR_IN); 1038 1038 + 1039 1039 + is_short = (count < ep->fifo_size); 1040 1040 + ep_dbg(ep, "read udccsr:%03x, count:%d bytes%s req %p %d/%d\n", 1041 1041 + udc_ep_readl(ep, UDCCSR), count, is_short ? "/S" : "", 1042 1042 + &req->req, req->req.actual, req->req.length); 1043 1043 + 1044 1044 + if (is_short || req->req.actual >= req->req.length) { 1045 1045 + completed = 1; 1046 1046 + break; 1047 1047 + } 1048 1048 + } 1049 1049 + 1050 1050 + return completed; 1051 1051 + } 1052 1052 + 1053 1053 + /** 1054 1054 + * write_ep0_fifo - Send a request to control endpoint (ep0 in) 1055 1055 + * @ep: control endpoint 1056 1056 + * @req: request 1057 1057 + * 1058 1058 + * Context: callable when in_interrupt() 1059 1059 + * 1060 1060 + * Sends a request (or a part of the request) to the control endpoint (ep0 in). 1061 1061 + * If the request doesn't fit, the remaining part will be sent from irq. 1062 1062 + * The request is considered fully written only if either : 1063 1063 + * - last write transfered all remaining bytes, but fifo was not fully filled 1064 1064 + * - last write was a 0 length write 1065 1065 + * 1066 1066 + * Returns 1 if request fully written, 0 if request only partially sent 1067 1067 + */ 1068 1068 + static int write_ep0_fifo(struct pxa_ep *ep, struct pxa27x_request *req) 1069 1069 + { 1070 1070 + unsigned count; 1071 1071 + int is_last, is_short; 1072 1072 + 1073 1073 + count = write_packet(ep, req, EP0_FIFO_SIZE); 1074 1074 + inc_ep_stats_bytes(ep, count, USB_DIR_IN); 1075 1075 + 1076 1076 + is_short = (count < EP0_FIFO_SIZE); 1077 1077 + is_last = ((count == 0) || (count < EP0_FIFO_SIZE)); 1078 1078 + 1079 1079 + /* Sends either a short packet or a 0 length packet */ 1080 1080 + if (unlikely(is_short)) 1081 1081 + udc_ep_writel(ep, UDCCSR, UDCCSR0_IPR); 1082 1082 + 1083 1083 + ep_dbg(ep, "in %d bytes%s%s, %d left, req=%p, udccsr0=0x%03x\n", 1084 1084 + count, is_short ? "/S" : "", is_last ? "/L" : "", 1085 1085 + req->req.length - req->req.actual, 1086 1086 + &req->req, udc_ep_readl(ep, UDCCSR)); 1087 1087 + 1088 1088 + return is_last; 1089 1089 + } 1090 1090 + 1091 1091 + /** 1092 1092 + * pxa_ep_queue - Queue a request into an IN endpoint 1093 1093 + * @_ep: usb endpoint 1094 1094 + * @_req: usb request 1095 1095 + * @gfp_flags: flags 1096 1096 + * 1097 1097 + * Context: normally called when !in_interrupt, but callable when in_interrupt() 1098 1098 + * in the special case of ep0 setup : 1099 1099 + * (irq->handle_ep0_ctrl_req->gadget_setup->pxa_ep_queue) 1100 1100 + * 1101 1101 + * Returns 0 if succedeed, error otherwise 1102 1102 + */ 1103 1103 + static int pxa_ep_queue(struct usb_ep *_ep, struct usb_request *_req, 1104 1104 + gfp_t gfp_flags) 1105 1105 + { 1106 1106 + struct udc_usb_ep *udc_usb_ep; 1107 1107 + struct pxa_ep *ep; 1108 1108 + struct pxa27x_request *req; 1109 1109 + struct pxa_udc *dev; 1110 1110 + unsigned long flags; 1111 1111 + int rc = 0; 1112 1112 + int is_first_req; 1113 1113 + unsigned length; 1114 1114 + 1115 1115 + req = container_of(_req, struct pxa27x_request, req); 1116 1116 + udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep); 1117 1117 + 1118 1118 + if (unlikely(!_req || !_req->complete || !_req->buf)) 1119 1119 + return -EINVAL; 1120 1120 + 1121 1121 + if (unlikely(!_ep)) 1122 1122 + return -EINVAL; 1123 1123 + 1124 1124 + dev = udc_usb_ep->dev; 1125 1125 + ep = udc_usb_ep->pxa_ep; 1126 1126 + if (unlikely(!ep)) 1127 1127 + return -EINVAL; 1128 1128 + 1129 1129 + dev = ep->dev; 1130 1130 + if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) { 1131 1131 + ep_dbg(ep, "bogus device state\n"); 1132 1132 + return -ESHUTDOWN; 1133 1133 + } 1134 1134 + 1135 1135 + /* iso is always one packet per request, that's the only way 1136 1136 + * we can report per-packet status. that also helps with dma. 1137 1137 + */ 1138 1138 + if (unlikely(EPXFERTYPE_is_ISO(ep) 1139 1139 + && req->req.length > ep->fifo_size)) 1140 1140 + return -EMSGSIZE; 1141 1141 + 1142 1142 + spin_lock_irqsave(&ep->lock, flags); 1143 1143 + 1144 1144 + is_first_req = list_empty(&ep->queue); 1145 1145 + ep_dbg(ep, "queue req %p(first=%s), len %d buf %p\n", 1146 1146 + _req, is_first_req ? "yes" : "no", 1147 1147 + _req->length, _req->buf); 1148 1148 + 1149 1149 + if (!ep->enabled) { 1150 1150 + _req->status = -ESHUTDOWN; 1151 1151 + rc = -ESHUTDOWN; 1152 1152 + goto out; 1153 1153 + } 1154 1154 + 1155 1155 + if (req->in_use) { 1156 1156 + ep_err(ep, "refusing to queue req %p (already queued)\n", req); 1157 1157 + goto out; 1158 1158 + } 1159 1159 + 1160 1160 + length = _req->length; 1161 1161 + _req->status = -EINPROGRESS; 1162 1162 + _req->actual = 0; 1163 1163 + 1164 1164 + ep_add_request(ep, req); 1165 1165 + 1166 1166 + if (is_ep0(ep)) { 1167 1167 + switch (dev->ep0state) { 1168 1168 + case WAIT_ACK_SET_CONF_INTERF: 1169 1169 + if (length == 0) { 1170 1170 + ep_end_in_req(ep, req); 1171 1171 + } else { 1172 1172 + ep_err(ep, "got a request of %d bytes while" 1173 1173 + "in state WATI_ACK_SET_CONF_INTERF\n", 1174 1174 + length); 1175 1175 + ep_del_request(ep, req); 1176 1176 + rc = -EL2HLT; 1177 1177 + } 1178 1178 + ep0_idle(ep->dev); 1179 1179 + break; 1180 1180 + case IN_DATA_STAGE: 1181 1181 + if (!ep_is_full(ep)) 1182 1182 + if (write_ep0_fifo(ep, req)) 1183 1183 + ep0_end_in_req(ep, req); 1184 1184 + break; 1185 1185 + case OUT_DATA_STAGE: 1186 1186 + if ((length == 0) || !epout_has_pkt(ep)) 1187 1187 + if (read_ep0_fifo(ep, req)) 1188 1188 + ep0_end_out_req(ep, req); 1189 1189 + break; 1190 1190 + default: 1191 1191 + ep_err(ep, "odd state %s to send me a request\n", 1192 1192 + EP0_STNAME(ep->dev)); 1193 1193 + ep_del_request(ep, req); 1194 1194 + rc = -EL2HLT; 1195 1195 + break; 1196 1196 + } 1197 1197 + } else { 1198 1198 + handle_ep(ep); 1199 1199 + } 1200 1200 + 1201 1201 + out: 1202 1202 + spin_unlock_irqrestore(&ep->lock, flags); 1203 1203 + return rc; 1204 1204 + } 1205 1205 + 1206 1206 + /** 1207 1207 + * pxa_ep_dequeue - Dequeue one request 1208 1208 + * @_ep: usb endpoint 1209 1209 + * @_req: usb request 1210 1210 + * 1211 1211 + * Return 0 if no error, -EINVAL or -ECONNRESET otherwise 1212 1212 + */ 1213 1213 + static int pxa_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) 1214 1214 + { 1215 1215 + struct pxa_ep *ep; 1216 1216 + struct udc_usb_ep *udc_usb_ep; 1217 1217 + struct pxa27x_request *req; 1218 1218 + unsigned long flags; 1219 1219 + int rc; 1220 1220 + 1221 1221 + if (!_ep) 1222 1222 + return -EINVAL; 1223 1223 + udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep); 1224 1224 + ep = udc_usb_ep->pxa_ep; 1225 1225 + if (!ep || is_ep0(ep)) 1226 1226 + return -EINVAL; 1227 1227 + 1228 1228 + spin_lock_irqsave(&ep->lock, flags); 1229 1229 + 1230 1230 + /* make sure it's actually queued on this endpoint */ 1231 1231 + list_for_each_entry(req, &ep->queue, queue) { 1232 1232 + if (&req->req == _req) 1233 1233 + break; 1234 1234 + } 1235 1235 + 1236 1236 + rc = -EINVAL; 1237 1237 + if (&req->req != _req) 1238 1238 + goto out; 1239 1239 + 1240 1240 + rc = 0; 1241 1241 + req_done(ep, req, -ECONNRESET); 1242 1242 + out: 1243 1243 + spin_unlock_irqrestore(&ep->lock, flags); 1244 1244 + return rc; 1245 1245 + } 1246 1246 + 1247 1247 + /** 1248 1248 + * pxa_ep_set_halt - Halts operations on one endpoint 1249 1249 + * @_ep: usb endpoint 1250 1250 + * @value: 1251 1251 + * 1252 1252 + * Returns 0 if no error, -EINVAL, -EROFS, -EAGAIN otherwise 1253 1253 + */ 1254 1254 + static int pxa_ep_set_halt(struct usb_ep *_ep, int value) 1255 1255 + { 1256 1256 + struct pxa_ep *ep; 1257 1257 + struct udc_usb_ep *udc_usb_ep; 1258 1258 + unsigned long flags; 1259 1259 + int rc; 1260 1260 + 1261 1261 + 1262 1262 + if (!_ep) 1263 1263 + return -EINVAL; 1264 1264 + udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep); 1265 1265 + ep = udc_usb_ep->pxa_ep; 1266 1266 + if (!ep || is_ep0(ep)) 1267 1267 + return -EINVAL; 1268 1268 + 1269 1269 + if (value == 0) { 1270 1270 + /* 1271 1271 + * This path (reset toggle+halt) is needed to implement 1272 1272 + * SET_INTERFACE on normal hardware. but it can't be 1273 1273 + * done from software on the PXA UDC, and the hardware 1274 1274 + * forgets to do it as part of SET_INTERFACE automagic. 1275 1275 + */ 1276 1276 + ep_dbg(ep, "only host can clear halt\n"); 1277 1277 + return -EROFS; 1278 1278 + } 1279 1279 + 1280 1280 + spin_lock_irqsave(&ep->lock, flags); 1281 1281 + 1282 1282 + rc = -EAGAIN; 1283 1283 + if (ep->dir_in && (ep_is_full(ep) || !list_empty(&ep->queue))) 1284 1284 + goto out; 1285 1285 + 1286 1286 + /* FST, FEF bits are the same for control and non control endpoints */ 1287 1287 + rc = 0; 1288 1288 + udc_ep_writel(ep, UDCCSR, UDCCSR_FST | UDCCSR_FEF); 1289 1289 + if (is_ep0(ep)) 1290 1290 + set_ep0state(ep->dev, STALL); 1291 1291 + 1292 1292 + out: 1293 1293 + spin_unlock_irqrestore(&ep->lock, flags); 1294 1294 + return rc; 1295 1295 + } 1296 1296 + 1297 1297 + /** 1298 1298 + * pxa_ep_fifo_status - Get how many bytes in physical endpoint 1299 1299 + * @_ep: usb endpoint 1300 1300 + * 1301 1301 + * Returns number of bytes in OUT fifos. Broken for IN fifos. 1302 1302 + */ 1303 1303 + static int pxa_ep_fifo_status(struct usb_ep *_ep) 1304 1304 + { 1305 1305 + struct pxa_ep *ep; 1306 1306 + struct udc_usb_ep *udc_usb_ep; 1307 1307 + 1308 1308 + if (!_ep) 1309 1309 + return -ENODEV; 1310 1310 + udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep); 1311 1311 + ep = udc_usb_ep->pxa_ep; 1312 1312 + if (!ep || is_ep0(ep)) 1313 1313 + return -ENODEV; 1314 1314 + 1315 1315 + if (ep->dir_in) 1316 1316 + return -EOPNOTSUPP; 1317 1317 + if (ep->dev->gadget.speed == USB_SPEED_UNKNOWN || ep_is_empty(ep)) 1318 1318 + return 0; 1319 1319 + else 1320 1320 + return ep_count_bytes_remain(ep) + 1; 1321 1321 + } 1322 1322 + 1323 1323 + /** 1324 1324 + * pxa_ep_fifo_flush - Flushes one endpoint 1325 1325 + * @_ep: usb endpoint 1326 1326 + * 1327 1327 + * Discards all data in one endpoint(IN or OUT), except control endpoint. 1328 1328 + */ 1329 1329 + static void pxa_ep_fifo_flush(struct usb_ep *_ep) 1330 1330 + { 1331 1331 + struct pxa_ep *ep; 1332 1332 + struct udc_usb_ep *udc_usb_ep; 1333 1333 + unsigned long flags; 1334 1334 + 1335 1335 + if (!_ep) 1336 1336 + return; 1337 1337 + udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep); 1338 1338 + ep = udc_usb_ep->pxa_ep; 1339 1339 + if (!ep || is_ep0(ep)) 1340 1340 + return; 1341 1341 + 1342 1342 + spin_lock_irqsave(&ep->lock, flags); 1343 1343 + 1344 1344 + if (unlikely(!list_empty(&ep->queue))) 1345 1345 + ep_dbg(ep, "called while queue list not empty\n"); 1346 1346 + ep_dbg(ep, "called\n"); 1347 1347 + 1348 1348 + /* for OUT, just read and discard the FIFO contents. */ 1349 1349 + if (!ep->dir_in) { 1350 1350 + while (!ep_is_empty(ep)) 1351 1351 + udc_ep_readl(ep, UDCDR); 1352 1352 + } else { 1353 1353 + /* most IN status is the same, but ISO can't stall */ 1354 1354 + udc_ep_writel(ep, UDCCSR, 1355 1355 + UDCCSR_PC | UDCCSR_FEF | UDCCSR_TRN 1356 1356 + | (EPXFERTYPE_is_ISO(ep) ? 0 : UDCCSR_SST)); 1357 1357 + } 1358 1358 + 1359 1359 + spin_unlock_irqrestore(&ep->lock, flags); 1360 1360 + 1361 1361 + return; 1362 1362 + } 1363 1363 + 1364 1364 + /** 1365 1365 + * pxa_ep_enable - Enables usb endpoint 1366 1366 + * @_ep: usb endpoint 1367 1367 + * @desc: usb endpoint descriptor 1368 1368 + * 1369 1369 + * Nothing much to do here, as ep configuration is done once and for all 1370 1370 + * before udc is enabled. After udc enable, no physical endpoint configuration 1371 1371 + * can be changed. 1372 1372 + * Function makes sanity checks and flushes the endpoint. 1373 1373 + */ 1374 1374 + static int pxa_ep_enable(struct usb_ep *_ep, 1375 1375 + const struct usb_endpoint_descriptor *desc) 1376 1376 + { 1377 1377 + struct pxa_ep *ep; 1378 1378 + struct udc_usb_ep *udc_usb_ep; 1379 1379 + struct pxa_udc *udc; 1380 1380 + 1381 1381 + if (!_ep || !desc) 1382 1382 + return -EINVAL; 1383 1383 + 1384 1384 + udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep); 1385 1385 + if (udc_usb_ep->pxa_ep) { 1386 1386 + ep = udc_usb_ep->pxa_ep; 1387 1387 + ep_warn(ep, "usb_ep %s already enabled, doing nothing\n", 1388 1388 + _ep->name); 1389 1389 + } else { 1390 1390 + ep = find_pxa_ep(udc_usb_ep->dev, udc_usb_ep); 1391 1391 + } 1392 1392 + 1393 1393 + if (!ep || is_ep0(ep)) { 1394 1394 + dev_err(udc_usb_ep->dev->dev, 1395 1395 + "unable to match pxa_ep for ep %s\n", 1396 1396 + _ep->name); 1397 1397 + return -EINVAL; 1398 1398 + } 1399 1399 + 1400 1400 + if ((desc->bDescriptorType != USB_DT_ENDPOINT) 1401 1401 + || (ep->type != usb_endpoint_type(desc))) { 1402 1402 + ep_err(ep, "type mismatch\n"); 1403 1403 + return -EINVAL; 1404 1404 + } 1405 1405 + 1406 1406 + if (ep->fifo_size < le16_to_cpu(desc->wMaxPacketSize)) { 1407 1407 + ep_err(ep, "bad maxpacket\n"); 1408 1408 + return -ERANGE; 1409 1409 + } 1410 1410 + 1411 1411 + udc_usb_ep->pxa_ep = ep; 1412 1412 + udc = ep->dev; 1413 1413 + 1414 1414 + if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) { 1415 1415 + ep_err(ep, "bogus device state\n"); 1416 1416 + return -ESHUTDOWN; 1417 1417 + } 1418 1418 + 1419 1419 + ep->enabled = 1; 1420 1420 + 1421 1421 + /* flush fifo (mostly for OUT buffers) */ 1422 1422 + pxa_ep_fifo_flush(_ep); 1423 1423 + 1424 1424 + ep_dbg(ep, "enabled\n"); 1425 1425 + return 0; 1426 1426 + } 1427 1427 + 1428 1428 + /** 1429 1429 + * pxa_ep_disable - Disable usb endpoint 1430 1430 + * @_ep: usb endpoint 1431 1431 + * 1432 1432 + * Same as for pxa_ep_enable, no physical endpoint configuration can be 1433 1433 + * changed. 1434 1434 + * Function flushes the endpoint and related requests. 1435 1435 + */ 1436 1436 + static int pxa_ep_disable(struct usb_ep *_ep) 1437 1437 + { 1438 1438 + struct pxa_ep *ep; 1439 1439 + struct udc_usb_ep *udc_usb_ep; 1440 1440 + unsigned long flags; 1441 1441 + 1442 1442 + if (!_ep) 1443 1443 + return -EINVAL; 1444 1444 + 1445 1445 + udc_usb_ep = container_of(_ep, struct udc_usb_ep, usb_ep); 1446 1446 + ep = udc_usb_ep->pxa_ep; 1447 1447 + if (!ep || is_ep0(ep) || !list_empty(&ep->queue)) 1448 1448 + return -EINVAL; 1449 1449 + 1450 1450 + spin_lock_irqsave(&ep->lock, flags); 1451 1451 + ep->enabled = 0; 1452 1452 + nuke(ep, -ESHUTDOWN); 1453 1453 + spin_unlock_irqrestore(&ep->lock, flags); 1454 1454 + 1455 1455 + pxa_ep_fifo_flush(_ep); 1456 1456 + udc_usb_ep->pxa_ep = NULL; 1457 1457 + 1458 1458 + ep_dbg(ep, "disabled\n"); 1459 1459 + return 0; 1460 1460 + } 1461 1461 + 1462 1462 + static struct usb_ep_ops pxa_ep_ops = { 1463 1463 + .enable = pxa_ep_enable, 1464 1464 + .disable = pxa_ep_disable, 1465 1465 + 1466 1466 + .alloc_request = pxa_ep_alloc_request, 1467 1467 + .free_request = pxa_ep_free_request, 1468 1468 + 1469 1469 + .queue = pxa_ep_queue, 1470 1470 + .dequeue = pxa_ep_dequeue, 1471 1471 + 1472 1472 + .set_halt = pxa_ep_set_halt, 1473 1473 + .fifo_status = pxa_ep_fifo_status, 1474 1474 + .fifo_flush = pxa_ep_fifo_flush, 1475 1475 + }; 1476 1476 + 1477 1477 + 1478 1478 + /** 1479 1479 + * pxa_udc_get_frame - Returns usb frame number 1480 1480 + * @_gadget: usb gadget 1481 1481 + */ 1482 1482 + static int pxa_udc_get_frame(struct usb_gadget *_gadget) 1483 1483 + { 1484 1484 + struct pxa_udc *udc = to_gadget_udc(_gadget); 1485 1485 + 1486 1486 + return (udc_readl(udc, UDCFNR) & 0x7ff); 1487 1487 + } 1488 1488 + 1489 1489 + /** 1490 1490 + * pxa_udc_wakeup - Force udc device out of suspend 1491 1491 + * @_gadget: usb gadget 1492 1492 + * 1493 1493 + * Returns 0 if succesfull, error code otherwise 1494 1494 + */ 1495 1495 + static int pxa_udc_wakeup(struct usb_gadget *_gadget) 1496 1496 + { 1497 1497 + struct pxa_udc *udc = to_gadget_udc(_gadget); 1498 1498 + 1499 1499 + /* host may not have enabled remote wakeup */ 1500 1500 + if ((udc_readl(udc, UDCCR) & UDCCR_DWRE) == 0) 1501 1501 + return -EHOSTUNREACH; 1502 1502 + udc_set_mask_UDCCR(udc, UDCCR_UDR); 1503 1503 + return 0; 1504 1504 + } 1505 1505 + 1506 1506 + static const struct usb_gadget_ops pxa_udc_ops = { 1507 1507 + .get_frame = pxa_udc_get_frame, 1508 1508 + .wakeup = pxa_udc_wakeup, 1509 1509 + /* current versions must always be self-powered */ 1510 1510 + }; 1511 1511 + 1512 1512 + /** 1513 1513 + * udc_disable - disable udc device controller 1514 1514 + * @udc: udc device 1515 1515 + * 1516 1516 + * Disables the udc device : disables clocks, udc interrupts, control endpoint 1517 1517 + * interrupts. 1518 1518 + */ 1519 1519 + static void udc_disable(struct pxa_udc *udc) 1520 1520 + { 1521 1521 + udc_writel(udc, UDCICR0, 0); 1522 1522 + udc_writel(udc, UDCICR1, 0); 1523 1523 + 1524 1524 + udc_clear_mask_UDCCR(udc, UDCCR_UDE); 1525 1525 + clk_disable(udc->clk); 1526 1526 + 1527 1527 + ep0_idle(udc); 1528 1528 + udc->gadget.speed = USB_SPEED_UNKNOWN; 1529 1529 + udc->mach->udc_command(PXA2XX_UDC_CMD_DISCONNECT); 1530 1530 + } 1531 1531 + 1532 1532 + /** 1533 1533 + * udc_init_data - Initialize udc device data structures 1534 1534 + * @dev: udc device 1535 1535 + * 1536 1536 + * Initializes gadget endpoint list, endpoints locks. No action is taken 1537 1537 + * on the hardware. 1538 1538 + */ 1539 1539 + static __init void udc_init_data(struct pxa_udc *dev) 1540 1540 + { 1541 1541 + int i; 1542 1542 + struct pxa_ep *ep; 1543 1543 + 1544 1544 + /* device/ep0 records init */ 1545 1545 + INIT_LIST_HEAD(&dev->gadget.ep_list); 1546 1546 + INIT_LIST_HEAD(&dev->gadget.ep0->ep_list); 1547 1547 + dev->udc_usb_ep[0].pxa_ep = &dev->pxa_ep[0]; 1548 1548 + ep0_idle(dev); 1549 1549 + strcpy(dev->dev->bus_id, ""); 1550 1550 + 1551 1551 + /* PXA endpoints init */ 1552 1552 + for (i = 0; i < NR_PXA_ENDPOINTS; i++) { 1553 1553 + ep = &dev->pxa_ep[i]; 1554 1554 + 1555 1555 + ep->enabled = is_ep0(ep); 1556 1556 + INIT_LIST_HEAD(&ep->queue); 1557 1557 + spin_lock_init(&ep->lock); 1558 1558 + } 1559 1559 + 1560 1560 + /* USB endpoints init */ 1561 1561 + for (i = 0; i < NR_USB_ENDPOINTS; i++) 1562 1562 + if (i != 0) 1563 1563 + list_add_tail(&dev->udc_usb_ep[i].usb_ep.ep_list, 1564 1564 + &dev->gadget.ep_list); 1565 1565 + } 1566 1566 + 1567 1567 + /** 1568 1568 + * udc_enable - Enables the udc device 1569 1569 + * @dev: udc device 1570 1570 + * 1571 1571 + * Enables the udc device : enables clocks, udc interrupts, control endpoint 1572 1572 + * interrupts, sets usb as UDC client and setups endpoints. 1573 1573 + */ 1574 1574 + static void udc_enable(struct pxa_udc *udc) 1575 1575 + { 1576 1576 + udc_writel(udc, UDCICR0, 0); 1577 1577 + udc_writel(udc, UDCICR1, 0); 1578 1578 + udc_writel(udc, UP2OCR, UP2OCR_HXOE); 1579 1579 + udc_clear_mask_UDCCR(udc, UDCCR_UDE); 1580 1580 + 1581 1581 + clk_enable(udc->clk); 1582 1582 + 1583 1583 + ep0_idle(udc); 1584 1584 + udc->gadget.speed = USB_SPEED_FULL; 1585 1585 + memset(&udc->stats, 0, sizeof(udc->stats)); 1586 1586 + 1587 1587 + udc_set_mask_UDCCR(udc, UDCCR_UDE); 1588 1588 + udelay(2); 1589 1589 + if (udc_readl(udc, UDCCR) & UDCCR_EMCE) 1590 1590 + dev_err(udc->dev, "Configuration errors, udc disabled\n"); 1591 1591 + 1592 1592 + /* 1593 1593 + * Caller must be able to sleep in order to cope with startup transients 1594 1594 + */ 1595 1595 + msleep(100); 1596 1596 + 1597 1597 + /* enable suspend/resume and reset irqs */ 1598 1598 + udc_writel(udc, UDCICR1, 1599 1599 + UDCICR1_IECC | UDCICR1_IERU 1600 1600 + | UDCICR1_IESU | UDCICR1_IERS); 1601 1601 + 1602 1602 + /* enable ep0 irqs */ 1603 1603 + pio_irq_enable(&udc->pxa_ep[0]); 1604 1604 + 1605 1605 + dev_info(udc->dev, "UDC connecting\n"); 1606 1606 + if (udc->mach->udc_command) 1607 1607 + udc->mach->udc_command(PXA2XX_UDC_CMD_CONNECT); 1608 1608 + } 1609 1609 + 1610 1610 + /** 1611 1611 + * usb_gadget_register_driver - Register gadget driver 1612 1612 + * @driver: gadget driver 1613 1613 + * 1614 1614 + * When a driver is successfully registered, it will receive control requests 1615 1615 + * including set_configuration(), which enables non-control requests. Then 1616 1616 + * usb traffic follows until a disconnect is reported. Then a host may connect 1617 1617 + * again, or the driver might get unbound. 1618 1618 + * 1619 1619 + * Returns 0 if no error, -EINVAL, -ENODEV, -EBUSY otherwise 1620 1620 + */ 1621 1621 + int usb_gadget_register_driver(struct usb_gadget_driver *driver) 1622 1622 + { 1623 1623 + struct pxa_udc *udc = the_controller; 1624 1624 + int retval; 1625 1625 + 1626 1626 + if (!driver || driver->speed != USB_SPEED_FULL || !driver->bind 1627 1627 + || !driver->disconnect || !driver->setup) 1628 1628 + return -EINVAL; 1629 1629 + if (!udc) 1630 1630 + return -ENODEV; 1631 1631 + if (udc->driver) 1632 1632 + return -EBUSY; 1633 1633 + 1634 1634 + /* first hook up the driver ... */ 1635 1635 + udc->driver = driver; 1636 1636 + udc->gadget.dev.driver = &driver->driver; 1637 1637 + 1638 1638 + retval = device_add(&udc->gadget.dev); 1639 1639 + if (retval) { 1640 1640 + dev_err(udc->dev, "device_add error %d\n", retval); 1641 1641 + goto add_fail; 1642 1642 + } 1643 1643 + retval = driver->bind(&udc->gadget); 1644 1644 + if (retval) { 1645 1645 + dev_err(udc->dev, "bind to driver %s --> error %d\n", 1646 1646 + driver->driver.name, retval); 1647 1647 + goto bind_fail; 1648 1648 + } 1649 1649 + dev_dbg(udc->dev, "registered gadget driver '%s'\n", 1650 1650 + driver->driver.name); 1651 1651 + 1652 1652 + udc_enable(udc); 1653 1653 + return 0; 1654 1654 + 1655 1655 + bind_fail: 1656 1656 + device_del(&udc->gadget.dev); 1657 1657 + add_fail: 1658 1658 + udc->driver = NULL; 1659 1659 + udc->gadget.dev.driver = NULL; 1660 1660 + return retval; 1661 1661 + } 1662 1662 + EXPORT_SYMBOL(usb_gadget_register_driver); 1663 1663 + 1664 1664 + 1665 1665 + /** 1666 1666 + * stop_activity - Stops udc endpoints 1667 1667 + * @udc: udc device 1668 1668 + * @driver: gadget driver 1669 1669 + * 1670 1670 + * Disables all udc endpoints (even control endpoint), report disconnect to 1671 1671 + * the gadget user. 1672 1672 + */ 1673 1673 + static void stop_activity(struct pxa_udc *udc, struct usb_gadget_driver *driver) 1674 1674 + { 1675 1675 + int i; 1676 1676 + 1677 1677 + /* don't disconnect drivers more than once */ 1678 1678 + if (udc->gadget.speed == USB_SPEED_UNKNOWN) 1679 1679 + driver = NULL; 1680 1680 + udc->gadget.speed = USB_SPEED_UNKNOWN; 1681 1681 + 1682 1682 + for (i = 0; i < NR_USB_ENDPOINTS; i++) 1683 1683 + pxa_ep_disable(&udc->udc_usb_ep[i].usb_ep); 1684 1684 + 1685 1685 + if (driver) 1686 1686 + driver->disconnect(&udc->gadget); 1687 1687 + } 1688 1688 + 1689 1689 + /** 1690 1690 + * usb_gadget_unregister_driver - Unregister the gadget driver 1691 1691 + * @driver: gadget driver 1692 1692 + * 1693 1693 + * Returns 0 if no error, -ENODEV, -EINVAL otherwise 1694 1694 + */ 1695 1695 + int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) 1696 1696 + { 1697 1697 + struct pxa_udc *udc = the_controller; 1698 1698 + 1699 1699 + if (!udc) 1700 1700 + return -ENODEV; 1701 1701 + if (!driver || driver != udc->driver || !driver->unbind) 1702 1702 + return -EINVAL; 1703 1703 + 1704 1704 + stop_activity(udc, driver); 1705 1705 + udc_disable(udc); 1706 1706 + 1707 1707 + driver->unbind(&udc->gadget); 1708 1708 + udc->driver = NULL; 1709 1709 + 1710 1710 + device_del(&udc->gadget.dev); 1711 1711 + 1712 1712 + dev_info(udc->dev, "unregistered gadget driver '%s'\n", 1713 1713 + driver->driver.name); 1714 1714 + return 0; 1715 1715 + } 1716 1716 + EXPORT_SYMBOL(usb_gadget_unregister_driver); 1717 1717 + 1718 1718 + /** 1719 1719 + * handle_ep0_ctrl_req - handle control endpoint control request 1720 1720 + * @udc: udc device 1721 1721 + * @req: control request 1722 1722 + */ 1723 1723 + static void handle_ep0_ctrl_req(struct pxa_udc *udc, 1724 1724 + struct pxa27x_request *req) 1725 1725 + { 1726 1726 + struct pxa_ep *ep = &udc->pxa_ep[0]; 1727 1727 + union { 1728 1728 + struct usb_ctrlrequest r; 1729 1729 + u32 word[2]; 1730 1730 + } u; 1731 1731 + int i; 1732 1732 + int have_extrabytes = 0; 1733 1733 + 1734 1734 + nuke(ep, -EPROTO); 1735 1735 + 1736 1736 + /* read SETUP packet */ 1737 1737 + for (i = 0; i < 2; i++) { 1738 1738 + if (unlikely(ep_is_empty(ep))) 1739 1739 + goto stall; 1740 1740 + u.word[i] = udc_ep_readl(ep, UDCDR); 1741 1741 + } 1742 1742 + 1743 1743 + have_extrabytes = !ep_is_empty(ep); 1744 1744 + while (!ep_is_empty(ep)) { 1745 1745 + i = udc_ep_readl(ep, UDCDR); 1746 1746 + ep_err(ep, "wrong to have extra bytes for setup : 0x%08x\n", i); 1747 1747 + } 1748 1748 + 1749 1749 + le16_to_cpus(&u.r.wValue); 1750 1750 + le16_to_cpus(&u.r.wIndex); 1751 1751 + le16_to_cpus(&u.r.wLength); 1752 1752 + 1753 1753 + ep_dbg(ep, "SETUP %02x.%02x v%04x i%04x l%04x\n", 1754 1754 + u.r.bRequestType, u.r.bRequest, 1755 1755 + u.r.wValue, u.r.wIndex, u.r.wLength); 1756 1756 + if (unlikely(have_extrabytes)) 1757 1757 + goto stall; 1758 1758 + 1759 1759 + if (u.r.bRequestType & USB_DIR_IN) 1760 1760 + set_ep0state(udc, IN_DATA_STAGE); 1761 1761 + else 1762 1762 + set_ep0state(udc, OUT_DATA_STAGE); 1763 1763 + 1764 1764 + /* Tell UDC to enter Data Stage */ 1765 1765 + udc_ep_writel(ep, UDCCSR, UDCCSR0_SA | UDCCSR0_OPC); 1766 1766 + 1767 1767 + i = udc->driver->setup(&udc->gadget, &u.r); 1768 1768 + if (i < 0) 1769 1769 + goto stall; 1770 1770 + out: 1771 1771 + return; 1772 1772 + stall: 1773 1773 + ep_dbg(ep, "protocol STALL, udccsr0=%03x err %d\n", 1774 1774 + udc_ep_readl(ep, UDCCSR), i); 1775 1775 + udc_ep_writel(ep, UDCCSR, UDCCSR0_FST | UDCCSR0_FTF); 1776 1776 + set_ep0state(udc, STALL); 1777 1777 + goto out; 1778 1778 + } 1779 1779 + 1780 1780 + /** 1781 1781 + * handle_ep0 - Handle control endpoint data transfers 1782 1782 + * @udc: udc device 1783 1783 + * @fifo_irq: 1 if triggered by fifo service type irq 1784 1784 + * @opc_irq: 1 if triggered by output packet complete type irq 1785 1785 + * 1786 1786 + * Context : when in_interrupt() or with ep->lock held 1787 1787 + * 1788 1788 + * Tries to transfer all pending request data into the endpoint and/or 1789 1789 + * transfer all pending data in the endpoint into usb requests. 1790 1790 + * Handles states of ep0 automata. 1791 1791 + * 1792 1792 + * PXA27x hardware handles several standard usb control requests without 1793 1793 + * driver notification. The requests fully handled by hardware are : 1794 1794 + * SET_ADDRESS, SET_FEATURE, CLEAR_FEATURE, GET_CONFIGURATION, GET_INTERFACE, 1795 1795 + * GET_STATUS 1796 1796 + * The requests handled by hardware, but with irq notification are : 1797 1797 + * SYNCH_FRAME, SET_CONFIGURATION, SET_INTERFACE 1798 1798 + * The remaining standard requests really handled by handle_ep0 are : 1799 1799 + * GET_DESCRIPTOR, SET_DESCRIPTOR, specific requests. 1800 1800 + * Requests standardized outside of USB 2.0 chapter 9 are handled more 1801 1801 + * uniformly, by gadget drivers. 1802 1802 + * 1803 1803 + * The control endpoint state machine is _not_ USB spec compliant, it's even 1804 1804 + * hardly compliant with Intel PXA270 developers guide. 1805 1805 + * The key points which inferred this state machine are : 1806 1806 + * - on every setup token, bit UDCCSR0_SA is raised and held until cleared by 1807 1807 + * software. 1808 1808 + * - on every OUT packet received, UDCCSR0_OPC is raised and held until 1809 1809 + * cleared by software. 1810 1810 + * - clearing UDCCSR0_OPC always flushes ep0. If in setup stage, never do it 1811 1811 + * before reading ep0. 1812 1812 + * - irq can be called on a "packet complete" event (opc_irq=1), while 1813 1813 + * UDCCSR0_OPC is not yet raised (delta can be as big as 100ms 1814 1814 + * from experimentation). 1815 1815 + * - as UDCCSR0_SA can be activated while in irq handling, and clearing 1816 1816 + * UDCCSR0_OPC would flush the setup data, we almost never clear UDCCSR0_OPC 1817 1817 + * => we never actually read the "status stage" packet of an IN data stage 1818 1818 + * => this is not documented in Intel documentation 1819 1819 + * - hardware as no idea of STATUS STAGE, it only handle SETUP STAGE and DATA 1820 1820 + * STAGE. The driver add STATUS STAGE to send last zero length packet in 1821 1821 + * OUT_STATUS_STAGE. 1822 1822 + * - special attention was needed for IN_STATUS_STAGE. If a packet complete 1823 1823 + * event is detected, we terminate the status stage without ackowledging the 1824 1824 + * packet (not to risk to loose a potential SETUP packet) 1825 1825 + */ 1826 1826 + static void handle_ep0(struct pxa_udc *udc, int fifo_irq, int opc_irq) 1827 1827 + { 1828 1828 + u32 udccsr0; 1829 1829 + struct pxa_ep *ep = &udc->pxa_ep[0]; 1830 1830 + struct pxa27x_request *req = NULL; 1831 1831 + int completed = 0; 1832 1832 + 1833 1833 + udccsr0 = udc_ep_readl(ep, UDCCSR); 1834 1834 + ep_dbg(ep, "state=%s, req=%p, udccsr0=0x%03x, udcbcr=%d, irq_msk=%x\n", 1835 1835 + EP0_STNAME(udc), req, udccsr0, udc_ep_readl(ep, UDCBCR), 1836 1836 + (fifo_irq << 1 | opc_irq)); 1837 1837 + 1838 1838 + if (!list_empty(&ep->queue)) 1839 1839 + req = list_entry(ep->queue.next, struct pxa27x_request, queue); 1840 1840 + 1841 1841 + if (udccsr0 & UDCCSR0_SST) { 1842 1842 + ep_dbg(ep, "clearing stall status\n"); 1843 1843 + nuke(ep, -EPIPE); 1844 1844 + udc_ep_writel(ep, UDCCSR, UDCCSR0_SST); 1845 1845 + ep0_idle(udc); 1846 1846 + } 1847 1847 + 1848 1848 + if (udccsr0 & UDCCSR0_SA) { 1849 1849 + nuke(ep, 0); 1850 1850 + set_ep0state(udc, SETUP_STAGE); 1851 1851 + } 1852 1852 + 1853 1853 + switch (udc->ep0state) { 1854 1854 + case WAIT_FOR_SETUP: 1855 1855 + /* 1856 1856 + * Hardware bug : beware, we cannot clear OPC, since we would 1857 1857 + * miss a potential OPC irq for a setup packet. 1858 1858 + * So, we only do ... nothing, and hope for a next irq with 1859 1859 + * UDCCSR0_SA set. 1860 1860 + */ 1861 1861 + break; 1862 1862 + case SETUP_STAGE: 1863 1863 + udccsr0 &= UDCCSR0_CTRL_REQ_MASK; 1864 1864 + if (likely(udccsr0 == UDCCSR0_CTRL_REQ_MASK)) 1865 1865 + handle_ep0_ctrl_req(udc, req); 1866 1866 + break; 1867 1867 + case IN_DATA_STAGE: /* GET_DESCRIPTOR */ 1868 1868 + if (epout_has_pkt(ep)) 1869 1869 + udc_ep_writel(ep, UDCCSR, UDCCSR0_OPC); 1870 1870 + if (req && !ep_is_full(ep)) 1871 1871 + completed = write_ep0_fifo(ep, req); 1872 1872 + if (completed) 1873 1873 + ep0_end_in_req(ep, req); 1874 1874 + break; 1875 1875 + case OUT_DATA_STAGE: /* SET_DESCRIPTOR */ 1876 1876 + if (epout_has_pkt(ep) && req) 1877 1877 + completed = read_ep0_fifo(ep, req); 1878 1878 + if (completed) 1879 1879 + ep0_end_out_req(ep, req); 1880 1880 + break; 1881 1881 + case STALL: 1882 1882 + udc_ep_writel(ep, UDCCSR, UDCCSR0_FST); 1883 1883 + break; 1884 1884 + case IN_STATUS_STAGE: 1885 1885 + /* 1886 1886 + * Hardware bug : beware, we cannot clear OPC, since we would 1887 1887 + * miss a potential PC irq for a setup packet. 1888 1888 + * So, we only put the ep0 into WAIT_FOR_SETUP state. 1889 1889 + */ 1890 1890 + if (opc_irq) 1891 1891 + ep0_idle(udc); 1892 1892 + break; 1893 1893 + case OUT_STATUS_STAGE: 1894 1894 + case WAIT_ACK_SET_CONF_INTERF: 1895 1895 + ep_warn(ep, "should never get in %s state here!!!\n", 1896 1896 + EP0_STNAME(ep->dev)); 1897 1897 + ep0_idle(udc); 1898 1898 + break; 1899 1899 + } 1900 1900 + } 1901 1901 + 1902 1902 + /** 1903 1903 + * handle_ep - Handle endpoint data tranfers 1904 1904 + * @ep: pxa physical endpoint 1905 1905 + * 1906 1906 + * Tries to transfer all pending request data into the endpoint and/or 1907 1907 + * transfer all pending data in the endpoint into usb requests. 1908 1908 + * 1909 1909 + * Is always called when in_interrupt() or with ep->lock held. 1910 1910 + */ 1911 1911 + static void handle_ep(struct pxa_ep *ep) 1912 1912 + { 1913 1913 + struct pxa27x_request *req; 1914 1914 + int completed; 1915 1915 + u32 udccsr; 1916 1916 + int is_in = ep->dir_in; 1917 1917 + int loop = 0; 1918 1918 + 1919 1919 + do { 1920 1920 + completed = 0; 1921 1921 + udccsr = udc_ep_readl(ep, UDCCSR); 1922 1922 + if (likely(!list_empty(&ep->queue))) 1923 1923 + req = list_entry(ep->queue.next, 1924 1924 + struct pxa27x_request, queue); 1925 1925 + else 1926 1926 + req = NULL; 1927 1927 + 1928 1928 + ep_dbg(ep, "req:%p, udccsr 0x%03x loop=%d\n", 1929 1929 + req, udccsr, loop++); 1930 1930 + 1931 1931 + if (unlikely(udccsr & (UDCCSR_SST | UDCCSR_TRN))) 1932 1932 + udc_ep_writel(ep, UDCCSR, 1933 1933 + udccsr & (UDCCSR_SST | UDCCSR_TRN)); 1934 1934 + if (!req) 1935 1935 + break; 1936 1936 + 1937 1937 + if (unlikely(is_in)) { 1938 1938 + if (likely(!ep_is_full(ep))) 1939 1939 + completed = write_fifo(ep, req); 1940 1940 + if (completed) 1941 1941 + ep_end_in_req(ep, req); 1942 1942 + } else { 1943 1943 + if (likely(epout_has_pkt(ep))) 1944 1944 + completed = read_fifo(ep, req); 1945 1945 + if (completed) 1946 1946 + ep_end_out_req(ep, req); 1947 1947 + } 1948 1948 + } while (completed); 1949 1949 + } 1950 1950 + 1951 1951 + /** 1952 1952 + * pxa27x_change_configuration - Handle SET_CONF usb request notification 1953 1953 + * @udc: udc device 1954 1954 + * @config: usb configuration 1955 1955 + * 1956 1956 + * Post the request to upper level. 1957 1957 + * Don't use any pxa specific harware configuration capabilities 1958 1958 + */ 1959 1959 + static void pxa27x_change_configuration(struct pxa_udc *udc, int config) 1960 1960 + { 1961 1961 + struct usb_ctrlrequest req ; 1962 1962 + 1963 1963 + dev_dbg(udc->dev, "config=%d\n", config); 1964 1964 + 1965 1965 + udc->config = config; 1966 1966 + udc->last_interface = 0; 1967 1967 + udc->last_alternate = 0; 1968 1968 + 1969 1969 + req.bRequestType = 0; 1970 1970 + req.bRequest = USB_REQ_SET_CONFIGURATION; 1971 1971 + req.wValue = config; 1972 1972 + req.wIndex = 0; 1973 1973 + req.wLength = 0; 1974 1974 + 1975 1975 + set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF); 1976 1976 + udc->driver->setup(&udc->gadget, &req); 1977 1977 + } 1978 1978 + 1979 1979 + /** 1980 1980 + * pxa27x_change_interface - Handle SET_INTERF usb request notification 1981 1981 + * @udc: udc device 1982 1982 + * @iface: interface number 1983 1983 + * @alt: alternate setting number 1984 1984 + * 1985 1985 + * Post the request to upper level. 1986 1986 + * Don't use any pxa specific harware configuration capabilities 1987 1987 + */ 1988 1988 + static void pxa27x_change_interface(struct pxa_udc *udc, int iface, int alt) 1989 1989 + { 1990 1990 + struct usb_ctrlrequest req; 1991 1991 + 1992 1992 + dev_dbg(udc->dev, "interface=%d, alternate setting=%d\n", iface, alt); 1993 1993 + 1994 1994 + udc->last_interface = iface; 1995 1995 + udc->last_alternate = alt; 1996 1996 + 1997 1997 + req.bRequestType = USB_RECIP_INTERFACE; 1998 1998 + req.bRequest = USB_REQ_SET_INTERFACE; 1999 1999 + req.wValue = alt; 2000 2000 + req.wIndex = iface; 2001 2001 + req.wLength = 0; 2002 2002 + 2003 2003 + set_ep0state(udc, WAIT_ACK_SET_CONF_INTERF); 2004 2004 + udc->driver->setup(&udc->gadget, &req); 2005 2005 + } 2006 2006 + 2007 2007 + /* 2008 2008 + * irq_handle_data - Handle data transfer 2009 2009 + * @irq: irq IRQ number 2010 2010 + * @udc: dev pxa_udc device structure 2011 2011 + * 2012 2012 + * Called from irq handler, transferts data to or from endpoint to queue 2013 2013 + */ 2014 2014 + static void irq_handle_data(int irq, struct pxa_udc *udc) 2015 2015 + { 2016 2016 + int i; 2017 2017 + struct pxa_ep *ep; 2018 2018 + u32 udcisr0 = udc_readl(udc, UDCISR0) & UDCCISR0_EP_MASK; 2019 2019 + u32 udcisr1 = udc_readl(udc, UDCISR1) & UDCCISR1_EP_MASK; 2020 2020 + 2021 2021 + if (udcisr0 & UDCISR_INT_MASK) { 2022 2022 + udc->pxa_ep[0].stats.irqs++; 2023 2023 + udc_writel(udc, UDCISR0, UDCISR_INT(0, UDCISR_INT_MASK)); 2024 2024 + handle_ep0(udc, !!(udcisr0 & UDCICR_FIFOERR), 2025 2025 + !!(udcisr0 & UDCICR_PKTCOMPL)); 2026 2026 + } 2027 2027 + 2028 2028 + udcisr0 >>= 2; 2029 2029 + for (i = 1; udcisr0 != 0 && i < 16; udcisr0 >>= 2, i++) { 2030 2030 + if (!(udcisr0 & UDCISR_INT_MASK)) 2031 2031 + continue; 2032 2032 + 2033 2033 + udc_writel(udc, UDCISR0, UDCISR_INT(i, UDCISR_INT_MASK)); 2034 2034 + ep = &udc->pxa_ep[i]; 2035 2035 + ep->stats.irqs++; 2036 2036 + handle_ep(ep); 2037 2037 + } 2038 2038 + 2039 2039 + for (i = 16; udcisr1 != 0 && i < 24; udcisr1 >>= 2, i++) { 2040 2040 + udc_writel(udc, UDCISR1, UDCISR_INT(i - 16, UDCISR_INT_MASK)); 2041 2041 + if (!(udcisr1 & UDCISR_INT_MASK)) 2042 2042 + continue; 2043 2043 + 2044 2044 + ep = &udc->pxa_ep[i]; 2045 2045 + ep->stats.irqs++; 2046 2046 + handle_ep(ep); 2047 2047 + } 2048 2048 + 2049 2049 + } 2050 2050 + 2051 2051 + /** 2052 2052 + * irq_udc_suspend - Handle IRQ "UDC Suspend" 2053 2053 + * @udc: udc device 2054 2054 + */ 2055 2055 + static void irq_udc_suspend(struct pxa_udc *udc) 2056 2056 + { 2057 2057 + udc_writel(udc, UDCISR1, UDCISR1_IRSU); 2058 2058 + udc->stats.irqs_suspend++; 2059 2059 + 2060 2060 + if (udc->gadget.speed != USB_SPEED_UNKNOWN 2061 2061 + && udc->driver && udc->driver->suspend) 2062 2062 + udc->driver->suspend(&udc->gadget); 2063 2063 + ep0_idle(udc); 2064 2064 + } 2065 2065 + 2066 2066 + /** 2067 2067 + * irq_udc_resume - Handle IRQ "UDC Resume" 2068 2068 + * @udc: udc device 2069 2069 + */ 2070 2070 + static void irq_udc_resume(struct pxa_udc *udc) 2071 2071 + { 2072 2072 + udc_writel(udc, UDCISR1, UDCISR1_IRRU); 2073 2073 + udc->stats.irqs_resume++; 2074 2074 + 2075 2075 + if (udc->gadget.speed != USB_SPEED_UNKNOWN 2076 2076 + && udc->driver && udc->driver->resume) 2077 2077 + udc->driver->resume(&udc->gadget); 2078 2078 + } 2079 2079 + 2080 2080 + /** 2081 2081 + * irq_udc_reconfig - Handle IRQ "UDC Change Configuration" 2082 2082 + * @udc: udc device 2083 2083 + */ 2084 2084 + static void irq_udc_reconfig(struct pxa_udc *udc) 2085 2085 + { 2086 2086 + unsigned config, interface, alternate, config_change; 2087 2087 + u32 udccr = udc_readl(udc, UDCCR); 2088 2088 + 2089 2089 + udc_writel(udc, UDCISR1, UDCISR1_IRCC); 2090 2090 + udc->stats.irqs_reconfig++; 2091 2091 + 2092 2092 + config = (udccr & UDCCR_ACN) >> UDCCR_ACN_S; 2093 2093 + config_change = (config != udc->config); 2094 2094 + pxa27x_change_configuration(udc, config); 2095 2095 + 2096 2096 + interface = (udccr & UDCCR_AIN) >> UDCCR_AIN_S; 2097 2097 + alternate = (udccr & UDCCR_AAISN) >> UDCCR_AAISN_S; 2098 2098 + pxa27x_change_interface(udc, interface, alternate); 2099 2099 + 2100 2100 + if (config_change) 2101 2101 + update_pxa_ep_matches(udc); 2102 2102 + udc_set_mask_UDCCR(udc, UDCCR_SMAC); 2103 2103 + } 2104 2104 + 2105 2105 + /** 2106 2106 + * irq_udc_reset - Handle IRQ "UDC Reset" 2107 2107 + * @udc: udc device 2108 2108 + */ 2109 2109 + static void irq_udc_reset(struct pxa_udc *udc) 2110 2110 + { 2111 2111 + u32 udccr = udc_readl(udc, UDCCR); 2112 2112 + struct pxa_ep *ep = &udc->pxa_ep[0]; 2113 2113 + 2114 2114 + dev_info(udc->dev, "USB reset\n"); 2115 2115 + udc_writel(udc, UDCISR1, UDCISR1_IRRS); 2116 2116 + udc->stats.irqs_reset++; 2117 2117 + 2118 2118 + if ((udccr & UDCCR_UDA) == 0) { 2119 2119 + dev_dbg(udc->dev, "USB reset start\n"); 2120 2120 + stop_activity(udc, udc->driver); 2121 2121 + } 2122 2122 + udc->gadget.speed = USB_SPEED_FULL; 2123 2123 + memset(&udc->stats, 0, sizeof udc->stats); 2124 2124 + 2125 2125 + nuke(ep, -EPROTO); 2126 2126 + udc_ep_writel(ep, UDCCSR, UDCCSR0_FTF | UDCCSR0_OPC); 2127 2127 + ep0_idle(udc); 2128 2128 + } 2129 2129 + 2130 2130 + /** 2131 2131 + * pxa_udc_irq - Main irq handler 2132 2132 + * @irq: irq number 2133 2133 + * @_dev: udc device 2134 2134 + * 2135 2135 + * Handles all udc interrupts 2136 2136 + */ 2137 2137 + static irqreturn_t pxa_udc_irq(int irq, void *_dev) 2138 2138 + { 2139 2139 + struct pxa_udc *udc = _dev; 2140 2140 + u32 udcisr0 = udc_readl(udc, UDCISR0); 2141 2141 + u32 udcisr1 = udc_readl(udc, UDCISR1); 2142 2142 + u32 udccr = udc_readl(udc, UDCCR); 2143 2143 + u32 udcisr1_spec; 2144 2144 + 2145 2145 + dev_vdbg(udc->dev, "Interrupt, UDCISR0:0x%08x, UDCISR1:0x%08x, " 2146 2146 + "UDCCR:0x%08x\n", udcisr0, udcisr1, udccr); 2147 2147 + 2148 2148 + udcisr1_spec = udcisr1 & 0xf8000000; 2149 2149 + if (unlikely(udcisr1_spec & UDCISR1_IRSU)) 2150 2150 + irq_udc_suspend(udc); 2151 2151 + if (unlikely(udcisr1_spec & UDCISR1_IRRU)) 2152 2152 + irq_udc_resume(udc); 2153 2153 + if (unlikely(udcisr1_spec & UDCISR1_IRCC)) 2154 2154 + irq_udc_reconfig(udc); 2155 2155 + if (unlikely(udcisr1_spec & UDCISR1_IRRS)) 2156 2156 + irq_udc_reset(udc); 2157 2157 + 2158 2158 + if ((udcisr0 & UDCCISR0_EP_MASK) | (udcisr1 & UDCCISR1_EP_MASK)) 2159 2159 + irq_handle_data(irq, udc); 2160 2160 + 2161 2161 + return IRQ_HANDLED; 2162 2162 + } 2163 2163 + 2164 2164 + static struct pxa_udc memory = { 2165 2165 + .gadget = { 2166 2166 + .ops = &pxa_udc_ops, 2167 2167 + .ep0 = &memory.udc_usb_ep[0].usb_ep, 2168 2168 + .name = driver_name, 2169 2169 + .dev = { 2170 2170 + .bus_id = "gadget", 2171 2171 + }, 2172 2172 + }, 2173 2173 + 2174 2174 + .udc_usb_ep = { 2175 2175 + USB_EP_CTRL, 2176 2176 + USB_EP_OUT_BULK(1), 2177 2177 + USB_EP_IN_BULK(2), 2178 2178 + USB_EP_IN_ISO(3), 2179 2179 + USB_EP_OUT_ISO(4), 2180 2180 + USB_EP_IN_INT(5), 2181 2181 + }, 2182 2182 + 2183 2183 + .pxa_ep = { 2184 2184 + PXA_EP_CTRL, 2185 2185 + /* Endpoints for gadget zero */ 2186 2186 + PXA_EP_OUT_BULK(1, 1, 3, 0, 0), 2187 2187 + PXA_EP_IN_BULK(2, 2, 3, 0, 0), 2188 2188 + /* Endpoints for ether gadget, file storage gadget */ 2189 2189 + PXA_EP_OUT_BULK(3, 1, 1, 0, 0), 2190 2190 + PXA_EP_IN_BULK(4, 2, 1, 0, 0), 2191 2191 + PXA_EP_IN_ISO(5, 3, 1, 0, 0), 2192 2192 + PXA_EP_OUT_ISO(6, 4, 1, 0, 0), 2193 2193 + PXA_EP_IN_INT(7, 5, 1, 0, 0), 2194 2194 + /* Endpoints for RNDIS, serial */ 2195 2195 + PXA_EP_OUT_BULK(8, 1, 2, 0, 0), 2196 2196 + PXA_EP_IN_BULK(9, 2, 2, 0, 0), 2197 2197 + PXA_EP_IN_INT(10, 5, 2, 0, 0), 2198 2198 + /* 2199 2199 + * All the following endpoints are only for completion. They 2200 2200 + * won't never work, as multiple interfaces are really broken on 2201 2201 + * the pxa. 2202 2202 + */ 2203 2203 + PXA_EP_OUT_BULK(11, 1, 2, 1, 0), 2204 2204 + PXA_EP_IN_BULK(12, 2, 2, 1, 0), 2205 2205 + /* Endpoint for CDC Ether */ 2206 2206 + PXA_EP_OUT_BULK(13, 1, 1, 1, 1), 2207 2207 + PXA_EP_IN_BULK(14, 2, 1, 1, 1), 2208 2208 + } 2209 2209 + }; 2210 2210 + 2211 2211 + /** 2212 2212 + * pxa_udc_probe - probes the udc device 2213 2213 + * @_dev: platform device 2214 2214 + * 2215 2215 + * Perform basic init : allocates udc clock, creates sysfs files, requests 2216 2216 + * irq. 2217 2217 + */ 2218 2218 + static int __init pxa_udc_probe(struct platform_device *pdev) 2219 2219 + { 2220 2220 + struct resource *regs; 2221 2221 + struct pxa_udc *udc = &memory; 2222 2222 + int retval; 2223 2223 + 2224 2224 + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2225 2225 + if (!regs) 2226 2226 + return -ENXIO; 2227 2227 + udc->irq = platform_get_irq(pdev, 0); 2228 2228 + if (udc->irq < 0) 2229 2229 + return udc->irq; 2230 2230 + 2231 2231 + udc->dev = &pdev->dev; 2232 2232 + udc->mach = pdev->dev.platform_data; 2233 2233 + 2234 2234 + udc->clk = clk_get(&pdev->dev, "UDCCLK"); 2235 2235 + if (IS_ERR(udc->clk)) { 2236 2236 + retval = PTR_ERR(udc->clk); 2237 2237 + goto err_clk; 2238 2238 + } 2239 2239 + 2240 2240 + retval = -ENOMEM; 2241 2241 + udc->regs = ioremap(regs->start, regs->end - regs->start + 1); 2242 2242 + if (!udc->regs) { 2243 2243 + dev_err(&pdev->dev, "Unable to map UDC I/O memory\n"); 2244 2244 + goto err_map; 2245 2245 + } 2246 2246 + 2247 2247 + device_initialize(&udc->gadget.dev); 2248 2248 + udc->gadget.dev.parent = &pdev->dev; 2249 2249 + udc->gadget.dev.dma_mask = NULL; 2250 2250 + 2251 2251 + the_controller = udc; 2252 2252 + platform_set_drvdata(pdev, udc); 2253 2253 + udc_init_data(udc); 2254 2254 + pxa_eps_setup(udc); 2255 2255 + 2256 2256 + /* irq setup after old hardware state is cleaned up */ 2257 2257 + retval = request_irq(udc->irq, pxa_udc_irq, 2258 2258 + IRQF_SHARED, driver_name, udc); 2259 2259 + if (retval != 0) { 2260 2260 + dev_err(udc->dev, "%s: can't get irq %i, err %d\n", 2261 2261 + driver_name, IRQ_USB, retval); 2262 2262 + goto err_irq; 2263 2263 + } 2264 2264 + 2265 2265 + pxa_init_debugfs(udc); 2266 2266 + return 0; 2267 2267 + err_irq: 2268 2268 + iounmap(udc->regs); 2269 2269 + err_map: 2270 2270 + clk_put(udc->clk); 2271 2271 + udc->clk = NULL; 2272 2272 + err_clk: 2273 2273 + return retval; 2274 2274 + } 2275 2275 + 2276 2276 + /** 2277 2277 + * pxa_udc_remove - removes the udc device driver 2278 2278 + * @_dev: platform device 2279 2279 + */ 2280 2280 + static int __exit pxa_udc_remove(struct platform_device *_dev) 2281 2281 + { 2282 2282 + struct pxa_udc *udc = platform_get_drvdata(_dev); 2283 2283 + 2284 2284 + usb_gadget_unregister_driver(udc->driver); 2285 2285 + free_irq(udc->irq, udc); 2286 2286 + pxa_cleanup_debugfs(udc); 2287 2287 + 2288 2288 + platform_set_drvdata(_dev, NULL); 2289 2289 + the_controller = NULL; 2290 2290 + clk_put(udc->clk); 2291 2291 + 2292 2292 + return 0; 2293 2293 + } 2294 2294 + 2295 2295 + static void pxa_udc_shutdown(struct platform_device *_dev) 2296 2296 + { 2297 2297 + struct pxa_udc *udc = platform_get_drvdata(_dev); 2298 2298 + 2299 2299 + udc_disable(udc); 2300 2300 + } 2301 2301 + 2302 2302 + #ifdef CONFIG_PM 2303 2303 + /** 2304 2304 + * pxa_udc_suspend - Suspend udc device 2305 2305 + * @_dev: platform device 2306 2306 + * @state: suspend state 2307 2307 + * 2308 2308 + * Suspends udc : saves configuration registers (UDCCR*), then disables the udc 2309 2309 + * device. 2310 2310 + */ 2311 2311 + static int pxa_udc_suspend(struct platform_device *_dev, pm_message_t state) 2312 2312 + { 2313 2313 + int i; 2314 2314 + struct pxa_udc *udc = platform_get_drvdata(_dev); 2315 2315 + struct pxa_ep *ep; 2316 2316 + 2317 2317 + ep = &udc->pxa_ep[0]; 2318 2318 + udc->udccsr0 = udc_ep_readl(ep, UDCCSR); 2319 2319 + for (i = 1; i < NR_PXA_ENDPOINTS; i++) { 2320 2320 + ep = &udc->pxa_ep[i]; 2321 2321 + ep->udccsr_value = udc_ep_readl(ep, UDCCSR); 2322 2322 + ep->udccr_value = udc_ep_readl(ep, UDCCR); 2323 2323 + ep_dbg(ep, "udccsr:0x%03x, udccr:0x%x\n", 2324 2324 + ep->udccsr_value, ep->udccr_value); 2325 2325 + } 2326 2326 + 2327 2327 + udc_disable(udc); 2328 2328 + 2329 2329 + return 0; 2330 2330 + } 2331 2331 + 2332 2332 + /** 2333 2333 + * pxa_udc_resume - Resume udc device 2334 2334 + * @_dev: platform device 2335 2335 + * 2336 2336 + * Resumes udc : restores configuration registers (UDCCR*), then enables the udc 2337 2337 + * device. 2338 2338 + */ 2339 2339 + static int pxa_udc_resume(struct platform_device *_dev) 2340 2340 + { 2341 2341 + int i; 2342 2342 + struct pxa_udc *udc = platform_get_drvdata(_dev); 2343 2343 + struct pxa_ep *ep; 2344 2344 + 2345 2345 + ep = &udc->pxa_ep[0]; 2346 2346 + udc_ep_writel(ep, UDCCSR, udc->udccsr0 & (UDCCSR0_FST | UDCCSR0_DME)); 2347 2347 + for (i = 1; i < NR_PXA_ENDPOINTS; i++) { 2348 2348 + ep = &udc->pxa_ep[i]; 2349 2349 + udc_ep_writel(ep, UDCCSR, ep->udccsr_value); 2350 2350 + udc_ep_writel(ep, UDCCR, ep->udccr_value); 2351 2351 + ep_dbg(ep, "udccsr:0x%03x, udccr:0x%x\n", 2352 2352 + ep->udccsr_value, ep->udccr_value); 2353 2353 + } 2354 2354 + 2355 2355 + udc_enable(udc); 2356 2356 + /* 2357 2357 + * We do not handle OTG yet. 2358 2358 + * 2359 2359 + * OTGPH bit is set when sleep mode is entered. 2360 2360 + * it indicates that OTG pad is retaining its state. 2361 2361 + * Upon exit from sleep mode and before clearing OTGPH, 2362 2362 + * Software must configure the USB OTG pad, UDC, and UHC 2363 2363 + * to the state they were in before entering sleep mode. 2364 2364 + * 2365 2365 + * Should be : PSSR |= PSSR_OTGPH; 2366 2366 + */ 2367 2367 + 2368 2368 + return 0; 2369 2369 + } 2370 2370 + #endif 2371 2371 + 2372 2372 + /* work with hotplug and coldplug */ 2373 2373 + MODULE_ALIAS("platform:pxa2xx-udc"); 2374 2374 + 2375 2375 + static struct platform_driver udc_driver = { 2376 2376 + .driver = { 2377 2377 + .name = "pxa2xx-udc", 2378 2378 + .owner = THIS_MODULE, 2379 2379 + }, 2380 2380 + .remove = __exit_p(pxa_udc_remove), 2381 2381 + .shutdown = pxa_udc_shutdown, 2382 2382 + #ifdef CONFIG_PM 2383 2383 + .suspend = pxa_udc_suspend, 2384 2384 + .resume = pxa_udc_resume 2385 2385 + #endif 2386 2386 + }; 2387 2387 + 2388 2388 + static int __init udc_init(void) 2389 2389 + { 2390 2390 + printk(KERN_INFO "%s: version %s\n", driver_name, DRIVER_VERSION); 2391 2391 + return platform_driver_probe(&udc_driver, pxa_udc_probe); 2392 2392 + } 2393 2393 + module_init(udc_init); 2394 2394 + 2395 2395 + 2396 2396 + static void __exit udc_exit(void) 2397 2397 + { 2398 2398 + platform_driver_unregister(&udc_driver); 2399 2399 + } 2400 2400 + module_exit(udc_exit); 2401 2401 + 2402 2402 + MODULE_DESCRIPTION(DRIVER_DESC); 2403 2403 + MODULE_AUTHOR("Robert Jarzmik"); 2404 2404 + MODULE_LICENSE("GPL");

+487

drivers/usb/gadget/pxa27x_udc.h

reviewed

··· 1 1 + /* 2 2 + * linux/drivers/usb/gadget/pxa27x_udc.h 3 3 + * Intel PXA27x on-chip full speed USB device controller 4 4 + * 5 5 + * Inspired by original driver by Frank Becker, David Brownell, and others. 6 6 + * Copyright (C) 2008 Robert Jarzmik 7 7 + * 8 8 + * This program is free software; you can redistribute it and/or modify 9 9 + * it under the terms of the GNU General Public License as published by 10 10 + * the Free Software Foundation; either version 2 of the License, or 11 11 + * (at your option) any later version. 12 12 + * 13 13 + * This program is distributed in the hope that it will be useful, 14 14 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 15 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 16 + * GNU General Public License for more details. 17 17 + * 18 18 + * You should have received a copy of the GNU General Public License 19 19 + * along with this program; if not, write to the Free Software 20 20 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 21 21 + */ 22 22 + 23 23 + #ifndef __LINUX_USB_GADGET_PXA27X_H 24 24 + #define __LINUX_USB_GADGET_PXA27X_H 25 25 + 26 26 + #include <linux/types.h> 27 27 + #include <linux/spinlock.h> 28 28 + #include <linux/io.h> 29 29 + 30 30 + /* 31 31 + * Register definitions 32 32 + */ 33 33 + /* Offsets */ 34 34 + #define UDCCR 0x0000 /* UDC Control Register */ 35 35 + #define UDCICR0 0x0004 /* UDC Interrupt Control Register0 */ 36 36 + #define UDCICR1 0x0008 /* UDC Interrupt Control Register1 */ 37 37 + #define UDCISR0 0x000C /* UDC Interrupt Status Register 0 */ 38 38 + #define UDCISR1 0x0010 /* UDC Interrupt Status Register 1 */ 39 39 + #define UDCFNR 0x0014 /* UDC Frame Number Register */ 40 40 + #define UDCOTGICR 0x0018 /* UDC On-The-Go interrupt control */ 41 41 + #define UP2OCR 0x0020 /* USB Port 2 Output Control register */ 42 42 + #define UP3OCR 0x0024 /* USB Port 3 Output Control register */ 43 43 + #define UDCCSRn(x) (0x0100 + ((x)<<2)) /* UDC Control/Status register */ 44 44 + #define UDCBCRn(x) (0x0200 + ((x)<<2)) /* UDC Byte Count Register */ 45 45 + #define UDCDRn(x) (0x0300 + ((x)<<2)) /* UDC Data Register */ 46 46 + #define UDCCRn(x) (0x0400 + ((x)<<2)) /* UDC Control Register */ 47 47 + 48 48 + #define UDCCR_OEN (1 << 31) /* On-the-Go Enable */ 49 49 + #define UDCCR_AALTHNP (1 << 30) /* A-device Alternate Host Negotiation 50 50 + Protocol Port Support */ 51 51 + #define UDCCR_AHNP (1 << 29) /* A-device Host Negotiation Protocol 52 52 + Support */ 53 53 + #define UDCCR_BHNP (1 << 28) /* B-device Host Negotiation Protocol 54 54 + Enable */ 55 55 + #define UDCCR_DWRE (1 << 16) /* Device Remote Wake-up Enable */ 56 56 + #define UDCCR_ACN (0x03 << 11) /* Active UDC configuration Number */ 57 57 + #define UDCCR_ACN_S 11 58 58 + #define UDCCR_AIN (0x07 << 8) /* Active UDC interface Number */ 59 59 + #define UDCCR_AIN_S 8 60 60 + #define UDCCR_AAISN (0x07 << 5) /* Active UDC Alternate Interface 61 61 + Setting Number */ 62 62 + #define UDCCR_AAISN_S 5 63 63 + #define UDCCR_SMAC (1 << 4) /* Switch Endpoint Memory to Active 64 64 + Configuration */ 65 65 + #define UDCCR_EMCE (1 << 3) /* Endpoint Memory Configuration 66 66 + Error */ 67 67 + #define UDCCR_UDR (1 << 2) /* UDC Resume */ 68 68 + #define UDCCR_UDA (1 << 1) /* UDC Active */ 69 69 + #define UDCCR_UDE (1 << 0) /* UDC Enable */ 70 70 + 71 71 + #define UDCICR_INT(n, intr) (((intr) & 0x03) << (((n) & 0x0F) * 2)) 72 72 + #define UDCICR1_IECC (1 << 31) /* IntEn - Configuration Change */ 73 73 + #define UDCICR1_IESOF (1 << 30) /* IntEn - Start of Frame */ 74 74 + #define UDCICR1_IERU (1 << 29) /* IntEn - Resume */ 75 75 + #define UDCICR1_IESU (1 << 28) /* IntEn - Suspend */ 76 76 + #define UDCICR1_IERS (1 << 27) /* IntEn - Reset */ 77 77 + #define UDCICR_FIFOERR (1 << 1) /* FIFO Error interrupt for EP */ 78 78 + #define UDCICR_PKTCOMPL (1 << 0) /* Packet Complete interrupt for EP */ 79 79 + #define UDCICR_INT_MASK (UDCICR_FIFOERR | UDCICR_PKTCOMPL) 80 80 + 81 81 + #define UDCISR_INT(n, intr) (((intr) & 0x03) << (((n) & 0x0F) * 2)) 82 82 + #define UDCISR1_IRCC (1 << 31) /* IntReq - Configuration Change */ 83 83 + #define UDCISR1_IRSOF (1 << 30) /* IntReq - Start of Frame */ 84 84 + #define UDCISR1_IRRU (1 << 29) /* IntReq - Resume */ 85 85 + #define UDCISR1_IRSU (1 << 28) /* IntReq - Suspend */ 86 86 + #define UDCISR1_IRRS (1 << 27) /* IntReq - Reset */ 87 87 + #define UDCISR_INT_MASK (UDCICR_FIFOERR | UDCICR_PKTCOMPL) 88 88 + 89 89 + #define UDCOTGICR_IESF (1 << 24) /* OTG SET_FEATURE command recvd */ 90 90 + #define UDCOTGICR_IEXR (1 << 17) /* Extra Transciever Interrupt 91 91 + Rising Edge Interrupt Enable */ 92 92 + #define UDCOTGICR_IEXF (1 << 16) /* Extra Transciever Interrupt 93 93 + Falling Edge Interrupt Enable */ 94 94 + #define UDCOTGICR_IEVV40R (1 << 9) /* OTG Vbus Valid 4.0V Rising Edge 95 95 + Interrupt Enable */ 96 96 + #define UDCOTGICR_IEVV40F (1 << 8) /* OTG Vbus Valid 4.0V Falling Edge 97 97 + Interrupt Enable */ 98 98 + #define UDCOTGICR_IEVV44R (1 << 7) /* OTG Vbus Valid 4.4V Rising Edge 99 99 + Interrupt Enable */ 100 100 + #define UDCOTGICR_IEVV44F (1 << 6) /* OTG Vbus Valid 4.4V Falling Edge 101 101 + Interrupt Enable */ 102 102 + #define UDCOTGICR_IESVR (1 << 5) /* OTG Session Valid Rising Edge 103 103 + Interrupt Enable */ 104 104 + #define UDCOTGICR_IESVF (1 << 4) /* OTG Session Valid Falling Edge 105 105 + Interrupt Enable */ 106 106 + #define UDCOTGICR_IESDR (1 << 3) /* OTG A-Device SRP Detect Rising 107 107 + Edge Interrupt Enable */ 108 108 + #define UDCOTGICR_IESDF (1 << 2) /* OTG A-Device SRP Detect Falling 109 109 + Edge Interrupt Enable */ 110 110 + #define UDCOTGICR_IEIDR (1 << 1) /* OTG ID Change Rising Edge 111 111 + Interrupt Enable */ 112 112 + #define UDCOTGICR_IEIDF (1 << 0) /* OTG ID Change Falling Edge 113 113 + Interrupt Enable */ 114 114 + 115 115 + /* Host Port 2 field bits */ 116 116 + #define UP2OCR_CPVEN (1 << 0) /* Charge Pump Vbus Enable */ 117 117 + #define UP2OCR_CPVPE (1 << 1) /* Charge Pump Vbus Pulse Enable */ 118 118 + /* Transceiver enablers */ 119 119 + #define UP2OCR_DPPDE (1 << 2) /* D+ Pull Down Enable */ 120 120 + #define UP2OCR_DMPDE (1 << 3) /* D- Pull Down Enable */ 121 121 + #define UP2OCR_DPPUE (1 << 4) /* D+ Pull Up Enable */ 122 122 + #define UP2OCR_DMPUE (1 << 5) /* D- Pull Up Enable */ 123 123 + #define UP2OCR_DPPUBE (1 << 6) /* D+ Pull Up Bypass Enable */ 124 124 + #define UP2OCR_DMPUBE (1 << 7) /* D- Pull Up Bypass Enable */ 125 125 + #define UP2OCR_EXSP (1 << 8) /* External Transceiver Speed Control */ 126 126 + #define UP2OCR_EXSUS (1 << 9) /* External Transceiver Speed Enable */ 127 127 + #define UP2OCR_IDON (1 << 10) /* OTG ID Read Enable */ 128 128 + #define UP2OCR_HXS (1 << 16) /* Transceiver Output Select */ 129 129 + #define UP2OCR_HXOE (1 << 17) /* Transceiver Output Enable */ 130 130 + #define UP2OCR_SEOS (1 << 24) /* Single-Ended Output Select */ 131 131 + 132 132 + #define UDCCSR0_SA (1 << 7) /* Setup Active */ 133 133 + #define UDCCSR0_RNE (1 << 6) /* Receive FIFO Not Empty */ 134 134 + #define UDCCSR0_FST (1 << 5) /* Force Stall */ 135 135 + #define UDCCSR0_SST (1 << 4) /* Sent Stall */ 136 136 + #define UDCCSR0_DME (1 << 3) /* DMA Enable */ 137 137 + #define UDCCSR0_FTF (1 << 2) /* Flush Transmit FIFO */ 138 138 + #define UDCCSR0_IPR (1 << 1) /* IN Packet Ready */ 139 139 + #define UDCCSR0_OPC (1 << 0) /* OUT Packet Complete */ 140 140 + 141 141 + #define UDCCSR_DPE (1 << 9) /* Data Packet Error */ 142 142 + #define UDCCSR_FEF (1 << 8) /* Flush Endpoint FIFO */ 143 143 + #define UDCCSR_SP (1 << 7) /* Short Packet Control/Status */ 144 144 + #define UDCCSR_BNE (1 << 6) /* Buffer Not Empty (IN endpoints) */ 145 145 + #define UDCCSR_BNF (1 << 6) /* Buffer Not Full (OUT endpoints) */ 146 146 + #define UDCCSR_FST (1 << 5) /* Force STALL */ 147 147 + #define UDCCSR_SST (1 << 4) /* Sent STALL */ 148 148 + #define UDCCSR_DME (1 << 3) /* DMA Enable */ 149 149 + #define UDCCSR_TRN (1 << 2) /* Tx/Rx NAK */ 150 150 + #define UDCCSR_PC (1 << 1) /* Packet Complete */ 151 151 + #define UDCCSR_FS (1 << 0) /* FIFO needs service */ 152 152 + 153 153 + #define UDCCONR_CN (0x03 << 25) /* Configuration Number */ 154 154 + #define UDCCONR_CN_S 25 155 155 + #define UDCCONR_IN (0x07 << 22) /* Interface Number */ 156 156 + #define UDCCONR_IN_S 22 157 157 + #define UDCCONR_AISN (0x07 << 19) /* Alternate Interface Number */ 158 158 + #define UDCCONR_AISN_S 19 159 159 + #define UDCCONR_EN (0x0f << 15) /* Endpoint Number */ 160 160 + #define UDCCONR_EN_S 15 161 161 + #define UDCCONR_ET (0x03 << 13) /* Endpoint Type: */ 162 162 + #define UDCCONR_ET_S 13 163 163 + #define UDCCONR_ET_INT (0x03 << 13) /* Interrupt */ 164 164 + #define UDCCONR_ET_BULK (0x02 << 13) /* Bulk */ 165 165 + #define UDCCONR_ET_ISO (0x01 << 13) /* Isochronous */ 166 166 + #define UDCCONR_ET_NU (0x00 << 13) /* Not used */ 167 167 + #define UDCCONR_ED (1 << 12) /* Endpoint Direction */ 168 168 + #define UDCCONR_MPS (0x3ff << 2) /* Maximum Packet Size */ 169 169 + #define UDCCONR_MPS_S 2 170 170 + #define UDCCONR_DE (1 << 1) /* Double Buffering Enable */ 171 171 + #define UDCCONR_EE (1 << 0) /* Endpoint Enable */ 172 172 + 173 173 + #define UDCCR_MASK_BITS (UDCCR_OEN | UDCCR_SMAC | UDCCR_UDR | UDCCR_UDE) 174 174 + #define UDCCSR_WR_MASK (UDCCSR_DME | UDCCSR_FST) 175 175 + #define UDC_FNR_MASK (0x7ff) 176 176 + #define UDC_BCR_MASK (0x3ff) 177 177 + 178 178 + /* 179 179 + * UDCCR = UDC Endpoint Configuration Registers 180 180 + * UDCCSR = UDC Control/Status Register for this EP 181 181 + * UDCBCR = UDC Byte Count Remaining (contents of OUT fifo) 182 182 + * UDCDR = UDC Endpoint Data Register (the fifo) 183 183 + */ 184 184 + #define ofs_UDCCR(ep) (UDCCRn(ep->idx)) 185 185 + #define ofs_UDCCSR(ep) (UDCCSRn(ep->idx)) 186 186 + #define ofs_UDCBCR(ep) (UDCBCRn(ep->idx)) 187 187 + #define ofs_UDCDR(ep) (UDCDRn(ep->idx)) 188 188 + 189 189 + /* Register access macros */ 190 190 + #define udc_ep_readl(ep, reg) \ 191 191 + __raw_readl((ep)->dev->regs + ofs_##reg(ep)) 192 192 + #define udc_ep_writel(ep, reg, value) \ 193 193 + __raw_writel((value), ep->dev->regs + ofs_##reg(ep)) 194 194 + #define udc_ep_readb(ep, reg) \ 195 195 + __raw_readb((ep)->dev->regs + ofs_##reg(ep)) 196 196 + #define udc_ep_writeb(ep, reg, value) \ 197 197 + __raw_writeb((value), ep->dev->regs + ofs_##reg(ep)) 198 198 + #define udc_readl(dev, reg) \ 199 199 + __raw_readl((dev)->regs + (reg)) 200 200 + #define udc_writel(udc, reg, value) \ 201 201 + __raw_writel((value), (udc)->regs + (reg)) 202 202 + 203 203 + #define UDCCSR_MASK (UDCCSR_FST | UDCCSR_DME) 204 204 + #define UDCCISR0_EP_MASK ~0 205 205 + #define UDCCISR1_EP_MASK 0xffff 206 206 + #define UDCCSR0_CTRL_REQ_MASK (UDCCSR0_OPC | UDCCSR0_SA | UDCCSR0_RNE) 207 207 + 208 208 + #define EPIDX(ep) (ep->idx) 209 209 + #define EPADDR(ep) (ep->addr) 210 210 + #define EPXFERTYPE(ep) (ep->type) 211 211 + #define EPNAME(ep) (ep->name) 212 212 + #define is_ep0(ep) (!ep->idx) 213 213 + #define EPXFERTYPE_is_ISO(ep) (EPXFERTYPE(ep) == USB_ENDPOINT_XFER_ISOC) 214 214 + 215 215 + /* 216 216 + * Endpoint definitions 217 217 + * 218 218 + * Once enabled, pxa endpoint configuration is freezed, and cannot change 219 219 + * unless a reset happens or the udc is disabled. 220 220 + * Therefore, we must define all pxa potential endpoint definitions needed for 221 221 + * all gadget and set them up before the udc is enabled. 222 222 + * 223 223 + * As the architecture chosen is fully static, meaning the pxa endpoint 224 224 + * configurations are set up once and for all, we must provide a way to match 225 225 + * one usb endpoint (usb_ep) to several pxa endpoints. The reason is that gadget 226 226 + * layer autoconf doesn't choose the usb_ep endpoint on (config, interface, alt) 227 227 + * criteria, while the pxa architecture requires that. 228 228 + * 229 229 + * The solution is to define several pxa endpoints matching one usb_ep. Ex: 230 230 + * - "ep1-in" matches pxa endpoint EPA (which is an IN ep at addr 1, when 231 231 + * the udc talks on (config=3, interface=0, alt=0) 232 232 + * - "ep1-in" matches pxa endpoint EPB (which is an IN ep at addr 1, when 233 233 + * the udc talks on (config=3, interface=0, alt=1) 234 234 + * - "ep1-in" matches pxa endpoint EPC (which is an IN ep at addr 1, when 235 235 + * the udc talks on (config=2, interface=0, alt=0) 236 236 + * 237 237 + * We'll define the pxa endpoint by its index (EPA => idx=1, EPB => idx=2, ...) 238 238 + */ 239 239 + 240 240 + /* 241 241 + * Endpoint definition helpers 242 242 + */ 243 243 + #define USB_EP_DEF(addr, bname, dir, type, maxpkt) \ 244 244 + { .usb_ep = { .name = bname, .ops = &pxa_ep_ops, .maxpacket = maxpkt, }, \ 245 245 + .desc = { .bEndpointAddress = addr | (dir ? USB_DIR_IN : 0), \ 246 246 + .bmAttributes = type, \ 247 247 + .wMaxPacketSize = maxpkt, }, \ 248 248 + .dev = &memory \ 249 249 + } 250 250 + #define USB_EP_BULK(addr, bname, dir) \ 251 251 + USB_EP_DEF(addr, bname, dir, USB_ENDPOINT_XFER_BULK, BULK_FIFO_SIZE) 252 252 + #define USB_EP_ISO(addr, bname, dir) \ 253 253 + USB_EP_DEF(addr, bname, dir, USB_ENDPOINT_XFER_ISOC, ISO_FIFO_SIZE) 254 254 + #define USB_EP_INT(addr, bname, dir) \ 255 255 + USB_EP_DEF(addr, bname, dir, USB_ENDPOINT_XFER_INT, INT_FIFO_SIZE) 256 256 + #define USB_EP_IN_BULK(n) USB_EP_BULK(n, "ep" #n "in-bulk", 1) 257 257 + #define USB_EP_OUT_BULK(n) USB_EP_BULK(n, "ep" #n "out-bulk", 0) 258 258 + #define USB_EP_IN_ISO(n) USB_EP_ISO(n, "ep" #n "in-iso", 1) 259 259 + #define USB_EP_OUT_ISO(n) USB_EP_ISO(n, "ep" #n "out-iso", 0) 260 260 + #define USB_EP_IN_INT(n) USB_EP_INT(n, "ep" #n "in-int", 1) 261 261 + #define USB_EP_CTRL USB_EP_DEF(0, "ep0", 0, 0, EP0_FIFO_SIZE) 262 262 + 263 263 + #define PXA_EP_DEF(_idx, _addr, dir, _type, maxpkt, _config, iface, altset) \ 264 264 + { \ 265 265 + .dev = &memory, \ 266 266 + .name = "ep" #_idx, \ 267 267 + .idx = _idx, .enabled = 0, \ 268 268 + .dir_in = dir, .addr = _addr, \ 269 269 + .config = _config, .interface = iface, .alternate = altset, \ 270 270 + .type = _type, .fifo_size = maxpkt, \ 271 271 + } 272 272 + #define PXA_EP_BULK(_idx, addr, dir, config, iface, alt) \ 273 273 + PXA_EP_DEF(_idx, addr, dir, USB_ENDPOINT_XFER_BULK, BULK_FIFO_SIZE, \ 274 274 + config, iface, alt) 275 275 + #define PXA_EP_ISO(_idx, addr, dir, config, iface, alt) \ 276 276 + PXA_EP_DEF(_idx, addr, dir, USB_ENDPOINT_XFER_ISOC, ISO_FIFO_SIZE, \ 277 277 + config, iface, alt) 278 278 + #define PXA_EP_INT(_idx, addr, dir, config, iface, alt) \ 279 279 + PXA_EP_DEF(_idx, addr, dir, USB_ENDPOINT_XFER_INT, INT_FIFO_SIZE, \ 280 280 + config, iface, alt) 281 281 + #define PXA_EP_IN_BULK(i, adr, c, f, a) PXA_EP_BULK(i, adr, 1, c, f, a) 282 282 + #define PXA_EP_OUT_BULK(i, adr, c, f, a) PXA_EP_BULK(i, adr, 0, c, f, a) 283 283 + #define PXA_EP_IN_ISO(i, adr, c, f, a) PXA_EP_ISO(i, adr, 1, c, f, a) 284 284 + #define PXA_EP_OUT_ISO(i, adr, c, f, a) PXA_EP_ISO(i, adr, 0, c, f, a) 285 285 + #define PXA_EP_IN_INT(i, adr, c, f, a) PXA_EP_INT(i, adr, 1, c, f, a) 286 286 + #define PXA_EP_CTRL PXA_EP_DEF(0, 0, 0, 0, EP0_FIFO_SIZE, 0, 0, 0) 287 287 + 288 288 + struct pxa27x_udc; 289 289 + 290 290 + struct stats { 291 291 + unsigned long in_ops; 292 292 + unsigned long out_ops; 293 293 + unsigned long in_bytes; 294 294 + unsigned long out_bytes; 295 295 + unsigned long irqs; 296 296 + }; 297 297 + 298 298 + /** 299 299 + * struct udc_usb_ep - container of each usb_ep structure 300 300 + * @usb_ep: usb endpoint 301 301 + * @desc: usb descriptor, especially type and address 302 302 + * @dev: udc managing this endpoint 303 303 + * @pxa_ep: matching pxa_ep (cache of find_pxa_ep() call) 304 304 + */ 305 305 + struct udc_usb_ep { 306 306 + struct usb_ep usb_ep; 307 307 + struct usb_endpoint_descriptor desc; 308 308 + struct pxa_udc *dev; 309 309 + struct pxa_ep *pxa_ep; 310 310 + }; 311 311 + 312 312 + /** 313 313 + * struct pxa_ep - pxa endpoint 314 314 + * @dev: udc device 315 315 + * @queue: requests queue 316 316 + * @lock: lock to pxa_ep data (queues and stats) 317 317 + * @enabled: true when endpoint enabled (not stopped by gadget layer) 318 318 + * @idx: endpoint index (1 => epA, 2 => epB, ..., 24 => epX) 319 319 + * @name: endpoint name (for trace/debug purpose) 320 320 + * @dir_in: 1 if IN endpoint, 0 if OUT endpoint 321 321 + * @addr: usb endpoint number 322 322 + * @config: configuration in which this endpoint is active 323 323 + * @interface: interface in which this endpoint is active 324 324 + * @alternate: altsetting in which this endpoitn is active 325 325 + * @fifo_size: max packet size in the endpoint fifo 326 326 + * @type: endpoint type (bulk, iso, int, ...) 327 327 + * @udccsr_value: save register of UDCCSR0 for suspend/resume 328 328 + * @udccr_value: save register of UDCCR for suspend/resume 329 329 + * @stats: endpoint statistics 330 330 + * 331 331 + * The *PROBLEM* is that pxa's endpoint configuration scheme is both misdesigned 332 332 + * (cares about config/interface/altsetting, thus placing needless limits on 333 333 + * device capability) and full of implementation bugs forcing it to be set up 334 334 + * for use more or less like a pxa255. 335 335 + * 336 336 + * As we define the pxa_ep statically, we must guess all needed pxa_ep for all 337 337 + * gadget which may work with this udc driver. 338 338 + */ 339 339 + struct pxa_ep { 340 340 + struct pxa_udc *dev; 341 341 + 342 342 + struct list_head queue; 343 343 + spinlock_t lock; /* Protects this structure */ 344 344 + /* (queues, stats) */ 345 345 + unsigned enabled:1; 346 346 + 347 347 + unsigned idx:5; 348 348 + char *name; 349 349 + 350 350 + /* 351 351 + * Specific pxa endpoint data, needed for hardware initialization 352 352 + */ 353 353 + unsigned dir_in:1; 354 354 + unsigned addr:3; 355 355 + unsigned config:2; 356 356 + unsigned interface:3; 357 357 + unsigned alternate:3; 358 358 + unsigned fifo_size; 359 359 + unsigned type; 360 360 + 361 361 + #ifdef CONFIG_PM 362 362 + u32 udccsr_value; 363 363 + u32 udccr_value; 364 364 + #endif 365 365 + struct stats stats; 366 366 + }; 367 367 + 368 368 + /** 369 369 + * struct pxa27x_request - container of each usb_request structure 370 370 + * @req: usb request 371 371 + * @udc_usb_ep: usb endpoint the request was submitted on 372 372 + * @in_use: sanity check if request already queued on an pxa_ep 373 373 + * @queue: linked list of requests, linked on pxa_ep->queue 374 374 + */ 375 375 + struct pxa27x_request { 376 376 + struct usb_request req; 377 377 + struct udc_usb_ep *udc_usb_ep; 378 378 + unsigned in_use:1; 379 379 + struct list_head queue; 380 380 + }; 381 381 + 382 382 + enum ep0_state { 383 383 + WAIT_FOR_SETUP, 384 384 + SETUP_STAGE, 385 385 + IN_DATA_STAGE, 386 386 + OUT_DATA_STAGE, 387 387 + IN_STATUS_STAGE, 388 388 + OUT_STATUS_STAGE, 389 389 + STALL, 390 390 + WAIT_ACK_SET_CONF_INTERF 391 391 + }; 392 392 + 393 393 + static char *ep0_state_name[] = { 394 394 + "WAIT_FOR_SETUP", "SETUP_STAGE", "IN_DATA_STAGE", "OUT_DATA_STAGE", 395 395 + "IN_STATUS_STAGE", "OUT_STATUS_STAGE", "STALL", 396 396 + "WAIT_ACK_SET_CONF_INTERF" 397 397 + }; 398 398 + #define EP0_STNAME(udc) ep0_state_name[(udc)->ep0state] 399 399 + 400 400 + #define EP0_FIFO_SIZE 16U 401 401 + #define BULK_FIFO_SIZE 64U 402 402 + #define ISO_FIFO_SIZE 256U 403 403 + #define INT_FIFO_SIZE 16U 404 404 + 405 405 + struct udc_stats { 406 406 + unsigned long irqs_reset; 407 407 + unsigned long irqs_suspend; 408 408 + unsigned long irqs_resume; 409 409 + unsigned long irqs_reconfig; 410 410 + }; 411 411 + 412 412 + #define NR_USB_ENDPOINTS (1 + 5) /* ep0 + ep1in-bulk + .. + ep3in-iso */ 413 413 + #define NR_PXA_ENDPOINTS (1 + 14) /* ep0 + epA + epB + .. + epX */ 414 414 + 415 415 + /** 416 416 + * struct pxa_udc - udc structure 417 417 + * @regs: mapped IO space 418 418 + * @irq: udc irq 419 419 + * @clk: udc clock 420 420 + * @usb_gadget: udc gadget structure 421 421 + * @driver: bound gadget (zero, g_ether, g_file_storage, ...) 422 422 + * @dev: device 423 423 + * @mach: machine info, used to activate specific GPIO 424 424 + * @ep0state: control endpoint state machine state 425 425 + * @stats: statistics on udc usage 426 426 + * @udc_usb_ep: array of usb endpoints offered by the gadget 427 427 + * @pxa_ep: array of pxa available endpoints 428 428 + * @config: UDC active configuration 429 429 + * @last_interface: UDC interface of the last SET_INTERFACE host request 430 430 + * @last_alternate: UDC altsetting of the last SET_INTERFACE host request 431 431 + * @udccsr0: save of udccsr0 in case of suspend 432 432 + * @debugfs_root: root entry of debug filesystem 433 433 + * @debugfs_state: debugfs entry for "udcstate" 434 434 + * @debugfs_queues: debugfs entry for "queues" 435 435 + * @debugfs_eps: debugfs entry for "epstate" 436 436 + */ 437 437 + struct pxa_udc { 438 438 + void __iomem *regs; 439 439 + int irq; 440 440 + struct clk *clk; 441 441 + 442 442 + struct usb_gadget gadget; 443 443 + struct usb_gadget_driver *driver; 444 444 + struct device *dev; 445 445 + struct pxa2xx_udc_mach_info *mach; 446 446 + 447 447 + enum ep0_state ep0state; 448 448 + struct udc_stats stats; 449 449 + 450 450 + struct udc_usb_ep udc_usb_ep[NR_USB_ENDPOINTS]; 451 451 + struct pxa_ep pxa_ep[NR_PXA_ENDPOINTS]; 452 452 + 453 453 + unsigned config:2; 454 454 + unsigned last_interface:3; 455 455 + unsigned last_alternate:3; 456 456 + 457 457 + #ifdef CONFIG_PM 458 458 + unsigned udccsr0; 459 459 + #endif 460 460 + #ifdef CONFIG_USB_GADGET_DEBUG_FS 461 461 + struct dentry *debugfs_root; 462 462 + struct dentry *debugfs_state; 463 463 + struct dentry *debugfs_queues; 464 464 + struct dentry *debugfs_eps; 465 465 + #endif 466 466 + }; 467 467 + 468 468 + static inline struct pxa_udc *to_gadget_udc(struct usb_gadget *gadget) 469 469 + { 470 470 + return container_of(gadget, struct pxa_udc, gadget); 471 471 + } 472 472 + 473 473 + /* 474 474 + * Debugging/message support 475 475 + */ 476 476 + #define ep_dbg(ep, fmt, arg...) \ 477 477 + dev_dbg(ep->dev->dev, "%s:%s: " fmt, EPNAME(ep), __func__, ## arg) 478 478 + #define ep_vdbg(ep, fmt, arg...) \ 479 479 + dev_vdbg(ep->dev->dev, "%s:%s: " fmt, EPNAME(ep), __func__, ## arg) 480 480 + #define ep_err(ep, fmt, arg...) \ 481 481 + dev_err(ep->dev->dev, "%s:%s: " fmt, EPNAME(ep), __func__, ## arg) 482 482 + #define ep_info(ep, fmt, arg...) \ 483 483 + dev_info(ep->dev->dev, "%s:%s: " fmt, EPNAME(ep), __func__, ## arg) 484 484 + #define ep_warn(ep, fmt, arg...) \ 485 485 + dev_warn(ep->dev->dev, "%s:%s:" fmt, EPNAME(ep), __func__, ## arg) 486 486 + 487 487 + #endif /* __LINUX_USB_GADGET_PXA27X_H */

+73 -17

drivers/usb/gadget/serial.c

reviewed

··· 135 135 int port_in_use; /* open/close in progress */ 136 136 wait_queue_head_t port_write_wait;/* waiting to write */ 137 137 struct gs_buf *port_write_buf; 138 138 - struct usb_cdc_line_coding port_line_coding; 138 138 + struct usb_cdc_line_coding port_line_coding; /* 8-N-1 etc */ 139 139 + u16 port_handshake_bits; 140 140 + #define RS232_RTS (1 << 1) 141 141 + #define RS232_DTE (1 << 0) 139 142 }; 140 143 141 144 /* the device structure holds info for the USB device */ ··· 202 199 static int gs_setup_class(struct usb_gadget *gadget, 203 200 const struct usb_ctrlrequest *ctrl); 204 201 static void gs_setup_complete(struct usb_ep *ep, struct usb_request *req); 202 202 + static void gs_setup_complete_set_line_coding(struct usb_ep *ep, 203 203 + struct usb_request *req); 205 204 static void gs_disconnect(struct usb_gadget *gadget); 206 205 static int gs_set_config(struct gs_dev *dev, unsigned config); 207 206 static void gs_reset_config(struct gs_dev *dev); ··· 411 406 .bLength = sizeof(gs_acm_descriptor), 412 407 .bDescriptorType = USB_DT_CS_INTERFACE, 413 408 .bDescriptorSubType = USB_CDC_ACM_TYPE, 414 414 - .bmCapabilities = 0, 409 409 + .bmCapabilities = (1 << 1), 415 410 }; 416 411 417 412 static const struct usb_cdc_union_desc gs_union_desc = { ··· 1507 1502 u16 wValue = le16_to_cpu(ctrl->wValue); 1508 1503 u16 wLength = le16_to_cpu(ctrl->wLength); 1509 1504 1505 1505 + req->complete = gs_setup_complete; 1506 1506 + 1510 1507 switch (ctrl->bRequestType & USB_TYPE_MASK) { 1511 1508 case USB_TYPE_STANDARD: 1512 1509 ret = gs_setup_standard(gadget,ctrl); ··· 1686 1679 1687 1680 switch (ctrl->bRequest) { 1688 1681 case USB_CDC_REQ_SET_LINE_CODING: 1689 1689 - /* FIXME Submit req to read the data; have its completion 1690 1690 - * handler copy that data to port->port_line_coding (iff 1691 1691 - * it's valid) and maybe pass it on. Until then, fail. 1692 1692 - */ 1693 1693 - pr_warning("gs_setup: set_line_coding " 1694 1694 - "unuspported\n"); 1682 1682 + if (wLength != sizeof(struct usb_cdc_line_coding)) 1683 1683 + break; 1684 1684 + ret = wLength; 1685 1685 + req->complete = gs_setup_complete_set_line_coding; 1695 1686 break; 1696 1687 1697 1688 case USB_CDC_REQ_GET_LINE_CODING: 1698 1698 - port = dev->dev_port[0]; /* ACM only has one port */ 1699 1699 - ret = min(wLength, 1700 1700 - (u16)sizeof(struct usb_cdc_line_coding)); 1689 1689 + ret = min_t(int, wLength, sizeof(struct usb_cdc_line_coding)); 1701 1690 if (port) { 1702 1691 spin_lock(&port->port_lock); 1703 1692 memcpy(req->buf, &port->port_line_coding, ret); ··· 1702 1699 break; 1703 1700 1704 1701 case USB_CDC_REQ_SET_CONTROL_LINE_STATE: 1705 1705 - /* FIXME Submit req to read the data; have its completion 1706 1706 - * handler use that to set the state (iff it's valid) and 1707 1707 - * maybe pass it on. Until then, fail. 1708 1708 - */ 1709 1709 - pr_warning("gs_setup: set_control_line_state " 1710 1710 - "unuspported\n"); 1702 1702 + if (wLength != 0) 1703 1703 + break; 1704 1704 + ret = 0; 1705 1705 + if (port) { 1706 1706 + /* REVISIT: we currently just remember this data. 1707 1707 + * If we change that, update whatever hardware needs 1708 1708 + * updating. 1709 1709 + */ 1710 1710 + spin_lock(&port->port_lock); 1711 1711 + port->port_handshake_bits = wValue; 1712 1712 + spin_unlock(&port->port_lock); 1713 1713 + } 1711 1714 break; 1712 1715 1713 1716 default: 1717 1717 + /* NOTE: strictly speaking, we should accept AT-commands 1718 1718 + * using SEND_ENCPSULATED_COMMAND/GET_ENCAPSULATED_RESPONSE. 1719 1719 + * But our call management descriptor says we don't handle 1720 1720 + * call management, so we should be able to get by without 1721 1721 + * handling those "required" commands (except by stalling). 1722 1722 + */ 1714 1723 pr_err("gs_setup: unknown class request, " 1715 1724 "type=%02x, request=%02x, value=%04x, " 1716 1725 "index=%04x, length=%d\n", ··· 1732 1717 } 1733 1718 1734 1719 return ret; 1720 1720 + } 1721 1721 + 1722 1722 + static void gs_setup_complete_set_line_coding(struct usb_ep *ep, 1723 1723 + struct usb_request *req) 1724 1724 + { 1725 1725 + struct gs_dev *dev = ep->driver_data; 1726 1726 + struct gs_port *port = dev->dev_port[0]; /* ACM only has one port */ 1727 1727 + 1728 1728 + switch (req->status) { 1729 1729 + case 0: 1730 1730 + /* normal completion */ 1731 1731 + if (req->actual != sizeof(port->port_line_coding)) 1732 1732 + usb_ep_set_halt(ep); 1733 1733 + else if (port) { 1734 1734 + struct usb_cdc_line_coding *value = req->buf; 1735 1735 + 1736 1736 + /* REVISIT: we currently just remember this data. 1737 1737 + * If we change that, (a) validate it first, then 1738 1738 + * (b) update whatever hardware needs updating. 1739 1739 + */ 1740 1740 + spin_lock(&port->port_lock); 1741 1741 + port->port_line_coding = *value; 1742 1742 + spin_unlock(&port->port_lock); 1743 1743 + } 1744 1744 + break; 1745 1745 + 1746 1746 + case -ESHUTDOWN: 1747 1747 + /* disconnect */ 1748 1748 + gs_free_req(ep, req); 1749 1749 + break; 1750 1750 + 1751 1751 + default: 1752 1752 + /* unexpected */ 1753 1753 + break; 1754 1754 + } 1755 1755 + return; 1735 1756 } 1736 1757 1737 1758 /* ··· 1956 1905 goto exit_reset_config; 1957 1906 } 1958 1907 } 1908 1908 + 1909 1909 + /* REVISIT the ACM mode should be able to actually *issue* some 1910 1910 + * notifications, for at least serial state change events if 1911 1911 + * not also for network connection; say so in bmCapabilities. 1912 1912 + */ 1959 1913 1960 1914 pr_info("gs_set_config: %s configured, %s speed %s config\n", 1961 1915 GS_LONG_NAME,

+175 -195

drivers/usb/gadget/zero.c

reviewed

··· 23 23 /* 24 24 * Gadget Zero only needs two bulk endpoints, and is an example of how you 25 25 * can write a hardware-agnostic gadget driver running inside a USB device. 26 26 - * 27 27 - * Hardware details are visible (see CONFIG_USB_ZERO_* below) but don't 28 28 - * affect most of the driver. 26 26 + * Some hardware details are visible, but don't affect most of the driver. 29 27 * 30 28 * Use it with the Linux host/master side "usbtest" driver to get a basic 31 29 * functional test of your device-side usb stack, or with "usb-skeleton". ··· 35 37 * buflen=N default N=4096, buffer size used 36 38 * qlen=N default N=32, how many buffers in the loopback queue 37 39 * loopdefault default false, list loopback config first 40 40 + * autoresume=N default N=0, seconds before triggering remote wakeup 38 41 * 39 42 * Many drivers will only have one configuration, letting them be much 40 43 * simpler if they also don't support high speed operation (like this ··· 61 62 62 63 /*-------------------------------------------------------------------------*/ 63 64 64 64 - #define DRIVER_VERSION "Lughnasadh, 2007" 65 65 + #define DRIVER_VERSION "Earth Day 2008" 65 66 66 66 - static const char shortname [] = "zero"; 67 67 - static const char longname [] = "Gadget Zero"; 67 67 + static const char shortname[] = "zero"; 68 68 + static const char longname[] = "Gadget Zero"; 68 69 69 69 - static const char source_sink [] = "source and sink data"; 70 70 - static const char loopback [] = "loop input to output"; 70 70 + static const char source_sink[] = "source and sink data"; 71 71 + static const char loopback[] = "loop input to output"; 71 72 72 73 /*-------------------------------------------------------------------------*/ 73 74 ··· 119 120 static unsigned qlen = 32; 120 121 static unsigned pattern = 0; 121 122 122 122 - module_param (buflen, uint, S_IRUGO); 123 123 - module_param (qlen, uint, S_IRUGO); 124 124 - module_param (pattern, uint, S_IRUGO|S_IWUSR); 123 123 + module_param(buflen, uint, S_IRUGO); 124 124 + module_param(qlen, uint, S_IRUGO); 125 125 + module_param(pattern, uint, S_IRUGO|S_IWUSR); 125 126 126 127 /* 127 128 * if it's nonzero, autoresume says how many seconds to wait 128 129 * before trying to wake up the host after suspend. 129 130 */ 130 131 static unsigned autoresume = 0; 131 131 - module_param (autoresume, uint, 0); 132 132 + module_param(autoresume, uint, 0); 132 133 133 134 /* 134 135 * Normally the "loopback" configuration is second (index 1) so ··· 137 138 * Or controllers (like superh) that only support one config. 138 139 */ 139 140 static int loopdefault = 0; 140 140 - 141 141 - module_param (loopdefault, bool, S_IRUGO|S_IWUSR); 141 141 + module_param(loopdefault, bool, S_IRUGO|S_IWUSR); 142 142 143 143 /*-------------------------------------------------------------------------*/ 144 144 ··· 174 176 #define CONFIG_SOURCE_SINK 3 175 177 #define CONFIG_LOOPBACK 2 176 178 177 177 - static struct usb_device_descriptor 178 178 - device_desc = { 179 179 + static struct usb_device_descriptor device_desc = { 179 180 .bLength = sizeof device_desc, 180 181 .bDescriptorType = USB_DT_DEVICE, 181 182 182 182 - .bcdUSB = __constant_cpu_to_le16 (0x0200), 183 183 + .bcdUSB = __constant_cpu_to_le16(0x0200), 183 184 .bDeviceClass = USB_CLASS_VENDOR_SPEC, 184 185 185 185 - .idVendor = __constant_cpu_to_le16 (DRIVER_VENDOR_NUM), 186 186 - .idProduct = __constant_cpu_to_le16 (DRIVER_PRODUCT_NUM), 186 186 + .idVendor = __constant_cpu_to_le16(DRIVER_VENDOR_NUM), 187 187 + .idProduct = __constant_cpu_to_le16(DRIVER_PRODUCT_NUM), 187 188 .iManufacturer = STRING_MANUFACTURER, 188 189 .iProduct = STRING_PRODUCT, 189 190 .iSerialNumber = STRING_SERIAL, 190 191 .bNumConfigurations = 2, 191 192 }; 192 193 193 193 - static struct usb_config_descriptor 194 194 - source_sink_config = { 194 194 + static struct usb_config_descriptor source_sink_config = { 195 195 .bLength = sizeof source_sink_config, 196 196 .bDescriptorType = USB_DT_CONFIG, 197 197 ··· 201 205 .bMaxPower = 1, /* self-powered */ 202 206 }; 203 207 204 204 - static struct usb_config_descriptor 205 205 - loopback_config = { 208 208 + static struct usb_config_descriptor loopback_config = { 206 209 .bLength = sizeof loopback_config, 207 210 .bDescriptorType = USB_DT_CONFIG, 208 211 ··· 213 218 .bMaxPower = 1, /* self-powered */ 214 219 }; 215 220 216 216 - static struct usb_otg_descriptor 217 217 - otg_descriptor = { 221 221 + static struct usb_otg_descriptor otg_descriptor = { 218 222 .bLength = sizeof otg_descriptor, 219 223 .bDescriptorType = USB_DT_OTG, 220 224 ··· 222 228 223 229 /* one interface in each configuration */ 224 230 225 225 - static const struct usb_interface_descriptor 226 226 - source_sink_intf = { 231 231 + static const struct usb_interface_descriptor source_sink_intf = { 227 232 .bLength = sizeof source_sink_intf, 228 233 .bDescriptorType = USB_DT_INTERFACE, 229 234 ··· 231 238 .iInterface = STRING_SOURCE_SINK, 232 239 }; 233 240 234 234 - static const struct usb_interface_descriptor 235 235 - loopback_intf = { 241 241 + static const struct usb_interface_descriptor loopback_intf = { 236 242 .bLength = sizeof loopback_intf, 237 243 .bDescriptorType = USB_DT_INTERFACE, 238 244 ··· 242 250 243 251 /* two full speed bulk endpoints; their use is config-dependent */ 244 252 245 245 - static struct usb_endpoint_descriptor 246 246 - fs_source_desc = { 253 253 + static struct usb_endpoint_descriptor fs_source_desc = { 247 254 .bLength = USB_DT_ENDPOINT_SIZE, 248 255 .bDescriptorType = USB_DT_ENDPOINT, 249 256 ··· 250 259 .bmAttributes = USB_ENDPOINT_XFER_BULK, 251 260 }; 252 261 253 253 - static struct usb_endpoint_descriptor 254 254 - fs_sink_desc = { 262 262 + static struct usb_endpoint_descriptor fs_sink_desc = { 255 263 .bLength = USB_DT_ENDPOINT_SIZE, 256 264 .bDescriptorType = USB_DT_ENDPOINT, 257 265 ··· 258 268 .bmAttributes = USB_ENDPOINT_XFER_BULK, 259 269 }; 260 270 261 261 - static const struct usb_descriptor_header *fs_source_sink_function [] = { 271 271 + static const struct usb_descriptor_header *fs_source_sink_function[] = { 262 272 (struct usb_descriptor_header *) &otg_descriptor, 263 273 (struct usb_descriptor_header *) &source_sink_intf, 264 274 (struct usb_descriptor_header *) &fs_sink_desc, ··· 266 276 NULL, 267 277 }; 268 278 269 269 - static const struct usb_descriptor_header *fs_loopback_function [] = { 279 279 + static const struct usb_descriptor_header *fs_loopback_function[] = { 270 280 (struct usb_descriptor_header *) &otg_descriptor, 271 281 (struct usb_descriptor_header *) &loopback_intf, 272 282 (struct usb_descriptor_header *) &fs_sink_desc, ··· 283 293 * for the config descriptor. 284 294 */ 285 295 286 286 - static struct usb_endpoint_descriptor 287 287 - hs_source_desc = { 296 296 + static struct usb_endpoint_descriptor hs_source_desc = { 288 297 .bLength = USB_DT_ENDPOINT_SIZE, 289 298 .bDescriptorType = USB_DT_ENDPOINT, 290 299 291 300 .bmAttributes = USB_ENDPOINT_XFER_BULK, 292 292 - .wMaxPacketSize = __constant_cpu_to_le16 (512), 301 301 + .wMaxPacketSize = __constant_cpu_to_le16(512), 293 302 }; 294 303 295 295 - static struct usb_endpoint_descriptor 296 296 - hs_sink_desc = { 304 304 + static struct usb_endpoint_descriptor hs_sink_desc = { 297 305 .bLength = USB_DT_ENDPOINT_SIZE, 298 306 .bDescriptorType = USB_DT_ENDPOINT, 299 307 300 308 .bmAttributes = USB_ENDPOINT_XFER_BULK, 301 301 - .wMaxPacketSize = __constant_cpu_to_le16 (512), 309 309 + .wMaxPacketSize = __constant_cpu_to_le16(512), 302 310 }; 303 311 304 304 - static struct usb_qualifier_descriptor 305 305 - dev_qualifier = { 312 312 + static struct usb_qualifier_descriptor dev_qualifier = { 306 313 .bLength = sizeof dev_qualifier, 307 314 .bDescriptorType = USB_DT_DEVICE_QUALIFIER, 308 315 309 309 - .bcdUSB = __constant_cpu_to_le16 (0x0200), 316 316 + .bcdUSB = __constant_cpu_to_le16(0x0200), 310 317 .bDeviceClass = USB_CLASS_VENDOR_SPEC, 311 318 312 319 .bNumConfigurations = 2, 313 320 }; 314 321 315 315 - static const struct usb_descriptor_header *hs_source_sink_function [] = { 322 322 + static const struct usb_descriptor_header *hs_source_sink_function[] = { 316 323 (struct usb_descriptor_header *) &otg_descriptor, 317 324 (struct usb_descriptor_header *) &source_sink_intf, 318 325 (struct usb_descriptor_header *) &hs_source_desc, ··· 317 330 NULL, 318 331 }; 319 332 320 320 - static const struct usb_descriptor_header *hs_loopback_function [] = { 333 333 + static const struct usb_descriptor_header *hs_loopback_function[] = { 321 334 (struct usb_descriptor_header *) &otg_descriptor, 322 335 (struct usb_descriptor_header *) &loopback_intf, 323 336 (struct usb_descriptor_header *) &hs_source_desc, ··· 342 355 343 356 344 357 /* static strings, in UTF-8 */ 345 345 - static struct usb_string strings [] = { 358 358 + static struct usb_string strings[] = { 346 359 { STRING_MANUFACTURER, manufacturer, }, 347 360 { STRING_PRODUCT, longname, }, 348 361 { STRING_SERIAL, serial, }, ··· 351 364 { } /* end of list */ 352 365 }; 353 366 354 354 - static struct usb_gadget_strings stringtab = { 367 367 + static struct usb_gadget_strings stringtab = { 355 368 .language = 0x0409, /* en-us */ 356 369 .strings = strings, 357 370 }; ··· 374 387 * high bandwidth modes at high speed. (Maybe work like Intel's test 375 388 * device?) 376 389 */ 377 377 - static int 378 378 - config_buf (struct usb_gadget *gadget, 390 390 + static int config_buf(struct usb_gadget *gadget, 379 391 u8 *buf, u8 type, unsigned index) 380 392 { 381 393 int is_source_sink; ··· 405 419 if (!gadget_is_otg(gadget)) 406 420 function++; 407 421 408 408 - len = usb_gadget_config_buf (is_source_sink 422 422 + len = usb_gadget_config_buf(is_source_sink 409 423 ? &source_sink_config 410 424 : &loopback_config, 411 425 buf, USB_BUFSIZ, function); ··· 417 431 418 432 /*-------------------------------------------------------------------------*/ 419 433 420 420 - static struct usb_request * 421 421 - alloc_ep_req (struct usb_ep *ep, unsigned length) 434 434 + static struct usb_request *alloc_ep_req(struct usb_ep *ep, unsigned length) 422 435 { 423 436 struct usb_request *req; 424 437 425 425 - req = usb_ep_alloc_request (ep, GFP_ATOMIC); 438 438 + req = usb_ep_alloc_request(ep, GFP_ATOMIC); 426 439 if (req) { 427 440 req->length = length; 428 441 req->buf = kmalloc(length, GFP_ATOMIC); 429 442 if (!req->buf) { 430 430 - usb_ep_free_request (ep, req); 443 443 + usb_ep_free_request(ep, req); 431 444 req = NULL; 432 445 } 433 446 } 434 447 return req; 435 448 } 436 449 437 437 - static void free_ep_req (struct usb_ep *ep, struct usb_request *req) 450 450 + static void free_ep_req(struct usb_ep *ep, struct usb_request *req) 438 451 { 439 452 kfree(req->buf); 440 440 - usb_ep_free_request (ep, req); 453 453 + usb_ep_free_request(ep, req); 441 454 } 442 455 443 456 /*-------------------------------------------------------------------------*/ ··· 457 472 /* optionally require specific source/sink data patterns */ 458 473 459 474 static int 460 460 - check_read_data ( 475 475 + check_read_data( 461 476 struct zero_dev *dev, 462 477 struct usb_ep *ep, 463 478 struct usb_request *req ··· 483 498 continue; 484 499 break; 485 500 } 486 486 - ERROR (dev, "bad OUT byte, buf [%d] = %d\n", i, *buf); 487 487 - usb_ep_set_halt (ep); 501 501 + ERROR(dev, "bad OUT byte, buf[%d] = %d\n", i, *buf); 502 502 + usb_ep_set_halt(ep); 488 503 return -EINVAL; 489 504 } 490 505 return 0; ··· 497 512 498 513 switch (pattern) { 499 514 case 0: 500 500 - memset (req->buf, 0, req->length); 515 515 + memset(req->buf, 0, req->length); 501 516 break; 502 517 case 1: 503 518 for (i = 0; i < req->length; i++) ··· 510 525 * irq delay between end of one request and start of the next. 511 526 * that prevents using hardware dma queues. 512 527 */ 513 513 - static void source_sink_complete (struct usb_ep *ep, struct usb_request *req) 528 528 + static void source_sink_complete(struct usb_ep *ep, struct usb_request *req) 514 529 { 515 530 struct zero_dev *dev = ep->driver_data; 516 531 int status = req->status; ··· 519 534 520 535 case 0: /* normal completion? */ 521 536 if (ep == dev->out_ep) { 522 522 - check_read_data (dev, ep, req); 523 523 - memset (req->buf, 0x55, req->length); 537 537 + check_read_data(dev, ep, req); 538 538 + memset(req->buf, 0x55, req->length); 524 539 } else 525 540 reinit_write_data(ep, req); 526 541 break; ··· 529 544 case -ECONNABORTED: /* hardware forced ep reset */ 530 545 case -ECONNRESET: /* request dequeued */ 531 546 case -ESHUTDOWN: /* disconnect from host */ 532 532 - VDBG (dev, "%s gone (%d), %d/%d\n", ep->name, status, 547 547 + VDBG(dev, "%s gone (%d), %d/%d\n", ep->name, status, 533 548 req->actual, req->length); 534 549 if (ep == dev->out_ep) 535 535 - check_read_data (dev, ep, req); 536 536 - free_ep_req (ep, req); 550 550 + check_read_data(dev, ep, req); 551 551 + free_ep_req(ep, req); 537 552 return; 538 553 539 554 case -EOVERFLOW: /* buffer overrun on read means that ··· 542 557 */ 543 558 default: 544 559 #if 1 545 545 - DBG (dev, "%s complete --> %d, %d/%d\n", ep->name, 560 560 + DBG(dev, "%s complete --> %d, %d/%d\n", ep->name, 546 561 status, req->actual, req->length); 547 562 #endif 548 563 case -EREMOTEIO: /* short read */ 549 564 break; 550 565 } 551 566 552 552 - status = usb_ep_queue (ep, req, GFP_ATOMIC); 567 567 + status = usb_ep_queue(ep, req, GFP_ATOMIC); 553 568 if (status) { 554 554 - ERROR (dev, "kill %s: resubmit %d bytes --> %d\n", 569 569 + ERROR(dev, "kill %s: resubmit %d bytes --> %d\n", 555 570 ep->name, req->length, status); 556 556 - usb_ep_set_halt (ep); 571 571 + usb_ep_set_halt(ep); 557 572 /* FIXME recover later ... somehow */ 558 573 } 559 574 } ··· 563 578 struct usb_request *req; 564 579 int status; 565 580 566 566 - req = alloc_ep_req (ep, buflen); 581 581 + req = alloc_ep_req(ep, buflen); 567 582 if (!req) 568 583 return NULL; 569 584 570 570 - memset (req->buf, 0, req->length); 585 585 + memset(req->buf, 0, req->length); 571 586 req->complete = source_sink_complete; 572 587 573 573 - if (strcmp (ep->name, EP_IN_NAME) == 0) 588 588 + if (strcmp(ep->name, EP_IN_NAME) == 0) 574 589 reinit_write_data(ep, req); 575 590 else 576 576 - memset (req->buf, 0x55, req->length); 591 591 + memset(req->buf, 0x55, req->length); 577 592 578 593 status = usb_ep_queue(ep, req, GFP_ATOMIC); 579 594 if (status) { 580 595 struct zero_dev *dev = ep->driver_data; 581 596 582 582 - ERROR (dev, "start %s --> %d\n", ep->name, status); 583 583 - free_ep_req (ep, req); 597 597 + ERROR(dev, "start %s --> %d\n", ep->name, status); 598 598 + free_ep_req(ep, req); 584 599 req = NULL; 585 600 } 586 601 ··· 593 608 struct usb_ep *ep; 594 609 struct usb_gadget *gadget = dev->gadget; 595 610 596 596 - gadget_for_each_ep (ep, gadget) { 611 611 + gadget_for_each_ep(ep, gadget) { 597 612 const struct usb_endpoint_descriptor *d; 598 613 599 614 /* one endpoint writes (sources) zeroes in (to the host) */ 600 600 - if (strcmp (ep->name, EP_IN_NAME) == 0) { 601 601 - d = ep_desc (gadget, &hs_source_desc, &fs_source_desc); 602 602 - result = usb_ep_enable (ep, d); 615 615 + if (strcmp(ep->name, EP_IN_NAME) == 0) { 616 616 + d = ep_desc(gadget, &hs_source_desc, &fs_source_desc); 617 617 + result = usb_ep_enable(ep, d); 603 618 if (result == 0) { 604 619 ep->driver_data = dev; 605 620 if (source_sink_start_ep(ep) != NULL) { 606 621 dev->in_ep = ep; 607 622 continue; 608 623 } 609 609 - usb_ep_disable (ep); 624 624 + usb_ep_disable(ep); 610 625 result = -EIO; 611 626 } 612 627 613 628 /* one endpoint reads (sinks) anything out (from the host) */ 614 614 - } else if (strcmp (ep->name, EP_OUT_NAME) == 0) { 615 615 - d = ep_desc (gadget, &hs_sink_desc, &fs_sink_desc); 616 616 - result = usb_ep_enable (ep, d); 629 629 + } else if (strcmp(ep->name, EP_OUT_NAME) == 0) { 630 630 + d = ep_desc(gadget, &hs_sink_desc, &fs_sink_desc); 631 631 + result = usb_ep_enable(ep, d); 617 632 if (result == 0) { 618 633 ep->driver_data = dev; 619 634 if (source_sink_start_ep(ep) != NULL) { 620 635 dev->out_ep = ep; 621 636 continue; 622 637 } 623 623 - usb_ep_disable (ep); 638 638 + usb_ep_disable(ep); 624 639 result = -EIO; 625 640 } 626 641 ··· 629 644 continue; 630 645 631 646 /* stop on error */ 632 632 - ERROR (dev, "can't start %s, result %d\n", ep->name, result); 647 647 + ERROR(dev, "can't start %s, result %d\n", ep->name, result); 633 648 break; 634 649 } 635 650 if (result == 0) 636 636 - DBG (dev, "buflen %d\n", buflen); 651 651 + DBG(dev, "buflen %d\n", buflen); 637 652 638 653 /* caller is responsible for cleanup on error */ 639 654 return result; ··· 641 656 642 657 /*-------------------------------------------------------------------------*/ 643 658 644 644 - static void loopback_complete (struct usb_ep *ep, struct usb_request *req) 659 659 + static void loopback_complete(struct usb_ep *ep, struct usb_request *req) 645 660 { 646 661 struct zero_dev *dev = ep->driver_data; 647 662 int status = req->status; ··· 653 668 /* loop this OUT packet back IN to the host */ 654 669 req->zero = (req->actual < req->length); 655 670 req->length = req->actual; 656 656 - status = usb_ep_queue (dev->in_ep, req, GFP_ATOMIC); 671 671 + status = usb_ep_queue(dev->in_ep, req, GFP_ATOMIC); 657 672 if (status == 0) 658 673 return; 659 674 660 675 /* "should never get here" */ 661 661 - ERROR (dev, "can't loop %s to %s: %d\n", 676 676 + ERROR(dev, "can't loop %s to %s: %d\n", 662 677 ep->name, dev->in_ep->name, 663 678 status); 664 679 } 665 680 666 681 /* queue the buffer for some later OUT packet */ 667 682 req->length = buflen; 668 668 - status = usb_ep_queue (dev->out_ep, req, GFP_ATOMIC); 683 683 + status = usb_ep_queue(dev->out_ep, req, GFP_ATOMIC); 669 684 if (status == 0) 670 685 return; 671 686 ··· 673 688 /* FALLTHROUGH */ 674 689 675 690 default: 676 676 - ERROR (dev, "%s loop complete --> %d, %d/%d\n", ep->name, 691 691 + ERROR(dev, "%s loop complete --> %d, %d/%d\n", ep->name, 677 692 status, req->actual, req->length); 678 693 /* FALLTHROUGH */ 679 694 ··· 685 700 case -ECONNABORTED: /* hardware forced ep reset */ 686 701 case -ECONNRESET: /* request dequeued */ 687 702 case -ESHUTDOWN: /* disconnect from host */ 688 688 - free_ep_req (ep, req); 703 703 + free_ep_req(ep, req); 689 704 return; 690 705 } 691 706 } ··· 696 711 struct usb_ep *ep; 697 712 struct usb_gadget *gadget = dev->gadget; 698 713 699 699 - gadget_for_each_ep (ep, gadget) { 714 714 + gadget_for_each_ep(ep, gadget) { 700 715 const struct usb_endpoint_descriptor *d; 701 716 702 717 /* one endpoint writes data back IN to the host */ 703 703 - if (strcmp (ep->name, EP_IN_NAME) == 0) { 704 704 - d = ep_desc (gadget, &hs_source_desc, &fs_source_desc); 705 705 - result = usb_ep_enable (ep, d); 718 718 + if (strcmp(ep->name, EP_IN_NAME) == 0) { 719 719 + d = ep_desc(gadget, &hs_source_desc, &fs_source_desc); 720 720 + result = usb_ep_enable(ep, d); 706 721 if (result == 0) { 707 722 ep->driver_data = dev; 708 723 dev->in_ep = ep; ··· 710 725 } 711 726 712 727 /* one endpoint just reads OUT packets */ 713 713 - } else if (strcmp (ep->name, EP_OUT_NAME) == 0) { 714 714 - d = ep_desc (gadget, &hs_sink_desc, &fs_sink_desc); 715 715 - result = usb_ep_enable (ep, d); 728 728 + } else if (strcmp(ep->name, EP_OUT_NAME) == 0) { 729 729 + d = ep_desc(gadget, &hs_sink_desc, &fs_sink_desc); 730 730 + result = usb_ep_enable(ep, d); 716 731 if (result == 0) { 717 732 ep->driver_data = dev; 718 733 dev->out_ep = ep; ··· 724 739 continue; 725 740 726 741 /* stop on error */ 727 727 - ERROR (dev, "can't enable %s, result %d\n", ep->name, result); 742 742 + ERROR(dev, "can't enable %s, result %d\n", ep->name, result); 728 743 break; 729 744 } 730 745 ··· 738 753 739 754 ep = dev->out_ep; 740 755 for (i = 0; i < qlen && result == 0; i++) { 741 741 - req = alloc_ep_req (ep, buflen); 756 756 + req = alloc_ep_req(ep, buflen); 742 757 if (req) { 743 758 req->complete = loopback_complete; 744 744 - result = usb_ep_queue (ep, req, GFP_ATOMIC); 759 759 + result = usb_ep_queue(ep, req, GFP_ATOMIC); 745 760 if (result) 746 746 - DBG (dev, "%s queue req --> %d\n", 761 761 + DBG(dev, "%s queue req --> %d\n", 747 762 ep->name, result); 748 763 } else 749 764 result = -ENOMEM; 750 765 } 751 766 } 752 767 if (result == 0) 753 753 - DBG (dev, "qlen %d, buflen %d\n", qlen, buflen); 768 768 + DBG(dev, "qlen %d, buflen %d\n", qlen, buflen); 754 769 755 770 /* caller is responsible for cleanup on error */ 756 771 return result; ··· 758 773 759 774 /*-------------------------------------------------------------------------*/ 760 775 761 761 - static void zero_reset_config (struct zero_dev *dev) 776 776 + static void zero_reset_config(struct zero_dev *dev) 762 777 { 763 778 if (dev->config == 0) 764 779 return; 765 780 766 766 - DBG (dev, "reset config\n"); 781 781 + DBG(dev, "reset config\n"); 767 782 768 783 /* just disable endpoints, forcing completion of pending i/o. 769 784 * all our completion handlers free their requests in this case. 770 785 */ 771 786 if (dev->in_ep) { 772 772 - usb_ep_disable (dev->in_ep); 787 787 + usb_ep_disable(dev->in_ep); 773 788 dev->in_ep = NULL; 774 789 } 775 790 if (dev->out_ep) { 776 776 - usb_ep_disable (dev->out_ep); 791 791 + usb_ep_disable(dev->out_ep); 777 792 dev->out_ep = NULL; 778 793 } 779 794 dev->config = 0; 780 780 - del_timer (&dev->resume); 795 795 + del_timer(&dev->resume); 781 796 } 782 797 783 798 /* change our operational config. this code must agree with the code ··· 798 813 if (number == dev->config) 799 814 return 0; 800 815 801 801 - if (gadget_is_sa1100 (gadget) && dev->config) { 816 816 + if (gadget_is_sa1100(gadget) && dev->config) { 802 817 /* tx fifo is full, but we can't clear it...*/ 803 818 ERROR(dev, "can't change configurations\n"); 804 819 return -ESPIPE; 805 820 } 806 806 - zero_reset_config (dev); 821 821 + zero_reset_config(dev); 807 822 808 823 switch (number) { 809 824 case CONFIG_SOURCE_SINK: ··· 822 837 if (!result && (!dev->in_ep || !dev->out_ep)) 823 838 result = -ENODEV; 824 839 if (result) 825 825 - zero_reset_config (dev); 840 840 + zero_reset_config(dev); 826 841 else { 827 842 char *speed; 828 843 ··· 834 849 } 835 850 836 851 dev->config = number; 837 837 - INFO (dev, "%s speed config #%d: %s\n", speed, number, 852 852 + INFO(dev, "%s speed config #%d: %s\n", speed, number, 838 853 (number == CONFIG_SOURCE_SINK) 839 854 ? source_sink : loopback); 840 855 } ··· 843 858 844 859 /*-------------------------------------------------------------------------*/ 845 860 846 846 - static void zero_setup_complete (struct usb_ep *ep, struct usb_request *req) 861 861 + static void zero_setup_complete(struct usb_ep *ep, struct usb_request *req) 847 862 { 848 863 if (req->status || req->actual != req->length) 849 849 - DBG ((struct zero_dev *) ep->driver_data, 864 864 + DBG((struct zero_dev *) ep->driver_data, 850 865 "setup complete --> %d, %d/%d\n", 851 866 req->status, req->actual, req->length); 852 867 } ··· 859 874 * the work is in config-specific setup. 860 875 */ 861 876 static int 862 862 - zero_setup (struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl) 877 877 + zero_setup(struct usb_gadget *gadget, const struct usb_ctrlrequest *ctrl) 863 878 { 864 864 - struct zero_dev *dev = get_gadget_data (gadget); 879 879 + struct zero_dev *dev = get_gadget_data(gadget); 865 880 struct usb_request *req = dev->req; 866 881 int value = -EOPNOTSUPP; 867 882 u16 w_index = le16_to_cpu(ctrl->wIndex); ··· 880 895 switch (w_value >> 8) { 881 896 882 897 case USB_DT_DEVICE: 883 883 - value = min (w_length, (u16) sizeof device_desc); 884 884 - memcpy (req->buf, &device_desc, value); 898 898 + value = min(w_length, (u16) sizeof device_desc); 899 899 + memcpy(req->buf, &device_desc, value); 885 900 break; 886 901 case USB_DT_DEVICE_QUALIFIER: 887 902 if (!gadget_is_dualspeed(gadget)) 888 903 break; 889 889 - value = min (w_length, (u16) sizeof dev_qualifier); 890 890 - memcpy (req->buf, &dev_qualifier, value); 904 904 + value = min(w_length, (u16) sizeof dev_qualifier); 905 905 + memcpy(req->buf, &dev_qualifier, value); 891 906 break; 892 907 893 908 case USB_DT_OTHER_SPEED_CONFIG: ··· 895 910 break; 896 911 // FALLTHROUGH 897 912 case USB_DT_CONFIG: 898 898 - value = config_buf (gadget, req->buf, 913 913 + value = config_buf(gadget, req->buf, 899 914 w_value >> 8, 900 915 w_value & 0xff); 901 916 if (value >= 0) 902 902 - value = min (w_length, (u16) value); 917 917 + value = min(w_length, (u16) value); 903 918 break; 904 919 905 920 case USB_DT_STRING: ··· 908 923 * add string tables for other languages, using 909 924 * any UTF-8 characters 910 925 */ 911 911 - value = usb_gadget_get_string (&stringtab, 926 926 + value = usb_gadget_get_string(&stringtab, 912 927 w_value & 0xff, req->buf); 913 928 if (value >= 0) 914 914 - value = min (w_length, (u16) value); 929 929 + value = min(w_length, (u16) value); 915 930 break; 916 931 } 917 932 break; ··· 921 936 if (ctrl->bRequestType != 0) 922 937 goto unknown; 923 938 if (gadget->a_hnp_support) 924 924 - DBG (dev, "HNP available\n"); 939 939 + DBG(dev, "HNP available\n"); 925 940 else if (gadget->a_alt_hnp_support) 926 926 - DBG (dev, "HNP needs a different root port\n"); 941 941 + DBG(dev, "HNP needs a different root port\n"); 927 942 else 928 928 - VDBG (dev, "HNP inactive\n"); 929 929 - spin_lock (&dev->lock); 943 943 + VDBG(dev, "HNP inactive\n"); 944 944 + spin_lock(&dev->lock); 930 945 value = zero_set_config(dev, w_value); 931 931 - spin_unlock (&dev->lock); 946 946 + spin_unlock(&dev->lock); 932 947 break; 933 948 case USB_REQ_GET_CONFIGURATION: 934 949 if (ctrl->bRequestType != USB_DIR_IN) 935 950 goto unknown; 936 951 *(u8 *)req->buf = dev->config; 937 937 - value = min (w_length, (u16) 1); 952 952 + value = min(w_length, (u16) 1); 938 953 break; 939 954 940 955 /* until we add altsetting support, or other interfaces, ··· 944 959 case USB_REQ_SET_INTERFACE: 945 960 if (ctrl->bRequestType != USB_RECIP_INTERFACE) 946 961 goto unknown; 947 947 - spin_lock (&dev->lock); 962 962 + spin_lock(&dev->lock); 948 963 if (dev->config && w_index == 0 && w_value == 0) { 949 964 u8 config = dev->config; 950 965 ··· 955 970 * if we had more than one interface we couldn't 956 971 * use this "reset the config" shortcut. 957 972 */ 958 958 - zero_reset_config (dev); 973 973 + zero_reset_config(dev); 959 974 zero_set_config(dev, config); 960 975 value = 0; 961 976 } 962 962 - spin_unlock (&dev->lock); 977 977 + spin_unlock(&dev->lock); 963 978 break; 964 979 case USB_REQ_GET_INTERFACE: 965 980 if (ctrl->bRequestType != (USB_DIR_IN|USB_RECIP_INTERFACE)) ··· 971 986 break; 972 987 } 973 988 *(u8 *)req->buf = 0; 974 974 - value = min (w_length, (u16) 1); 989 989 + value = min(w_length, (u16) 1); 975 990 break; 976 991 977 992 /* ··· 1003 1018 1004 1019 default: 1005 1020 unknown: 1006 1006 - VDBG (dev, 1021 1021 + VDBG(dev, 1007 1022 "unknown control req%02x.%02x v%04x i%04x l%d\n", 1008 1023 ctrl->bRequestType, ctrl->bRequest, 1009 1024 w_value, w_index, w_length); ··· 1013 1028 if (value >= 0) { 1014 1029 req->length = value; 1015 1030 req->zero = value < w_length; 1016 1016 - value = usb_ep_queue (gadget->ep0, req, GFP_ATOMIC); 1031 1031 + value = usb_ep_queue(gadget->ep0, req, GFP_ATOMIC); 1017 1032 if (value < 0) { 1018 1018 - DBG (dev, "ep_queue --> %d\n", value); 1033 1033 + DBG(dev, "ep_queue --> %d\n", value); 1019 1034 req->status = 0; 1020 1020 - zero_setup_complete (gadget->ep0, req); 1035 1035 + zero_setup_complete(gadget->ep0, req); 1021 1036 } 1022 1037 } 1023 1038 ··· 1025 1040 return value; 1026 1041 } 1027 1042 1028 1028 - static void 1029 1029 - zero_disconnect (struct usb_gadget *gadget) 1043 1043 + static void zero_disconnect(struct usb_gadget *gadget) 1030 1044 { 1031 1031 - struct zero_dev *dev = get_gadget_data (gadget); 1045 1045 + struct zero_dev *dev = get_gadget_data(gadget); 1032 1046 unsigned long flags; 1033 1047 1034 1034 - spin_lock_irqsave (&dev->lock, flags); 1035 1035 - zero_reset_config (dev); 1048 1048 + spin_lock_irqsave(&dev->lock, flags); 1049 1049 + zero_reset_config(dev); 1036 1050 1037 1051 /* a more significant application might have some non-usb 1038 1052 * activities to quiesce here, saving resources like power 1039 1053 * or pushing the notification up a network stack. 1040 1054 */ 1041 1041 - spin_unlock_irqrestore (&dev->lock, flags); 1055 1055 + spin_unlock_irqrestore(&dev->lock, flags); 1042 1056 1043 1057 /* next we may get setup() calls to enumerate new connections; 1044 1058 * or an unbind() during shutdown (including removing module). 1045 1059 */ 1046 1060 } 1047 1061 1048 1048 - static void 1049 1049 - zero_autoresume (unsigned long _dev) 1062 1062 + static void zero_autoresume(unsigned long _dev) 1050 1063 { 1051 1064 struct zero_dev *dev = (struct zero_dev *) _dev; 1052 1065 int status; ··· 1053 1070 * more significant than just a timer firing... 1054 1071 */ 1055 1072 if (dev->gadget->speed != USB_SPEED_UNKNOWN) { 1056 1056 - status = usb_gadget_wakeup (dev->gadget); 1057 1057 - DBG (dev, "wakeup --> %d\n", status); 1073 1073 + status = usb_gadget_wakeup(dev->gadget); 1074 1074 + DBG(dev, "wakeup --> %d\n", status); 1058 1075 } 1059 1076 } 1060 1077 1061 1078 /*-------------------------------------------------------------------------*/ 1062 1079 1063 1063 - static void /* __init_or_exit */ 1064 1064 - zero_unbind (struct usb_gadget *gadget) 1080 1080 + static void zero_unbind(struct usb_gadget *gadget) 1065 1081 { 1066 1066 - struct zero_dev *dev = get_gadget_data (gadget); 1082 1082 + struct zero_dev *dev = get_gadget_data(gadget); 1067 1083 1068 1068 - DBG (dev, "unbind\n"); 1084 1084 + DBG(dev, "unbind\n"); 1069 1085 1070 1086 /* we've already been disconnected ... no i/o is active */ 1071 1087 if (dev->req) { 1072 1088 dev->req->length = USB_BUFSIZ; 1073 1073 - free_ep_req (gadget->ep0, dev->req); 1089 1089 + free_ep_req(gadget->ep0, dev->req); 1074 1090 } 1075 1075 - del_timer_sync (&dev->resume); 1076 1076 - kfree (dev); 1077 1077 - set_gadget_data (gadget, NULL); 1091 1091 + del_timer_sync(&dev->resume); 1092 1092 + kfree(dev); 1093 1093 + set_gadget_data(gadget, NULL); 1078 1094 } 1079 1095 1080 1080 - static int __init 1081 1081 - zero_bind (struct usb_gadget *gadget) 1096 1096 + static int __init zero_bind(struct usb_gadget *gadget) 1082 1097 { 1083 1098 struct zero_dev *dev; 1084 1099 struct usb_ep *ep; ··· 1092 1111 * autoconfigure on any sane usb controller driver, 1093 1112 * but there may also be important quirks to address. 1094 1113 */ 1095 1095 - usb_ep_autoconfig_reset (gadget); 1096 1096 - ep = usb_ep_autoconfig (gadget, &fs_source_desc); 1114 1114 + usb_ep_autoconfig_reset(gadget); 1115 1115 + ep = usb_ep_autoconfig(gadget, &fs_source_desc); 1097 1116 if (!ep) { 1098 1117 autoconf_fail: 1099 1118 pr_err("%s: can't autoconfigure on %s\n", ··· 1103 1122 EP_IN_NAME = ep->name; 1104 1123 ep->driver_data = ep; /* claim */ 1105 1124 1106 1106 - ep = usb_ep_autoconfig (gadget, &fs_sink_desc); 1125 1125 + ep = usb_ep_autoconfig(gadget, &fs_sink_desc); 1107 1126 if (!ep) 1108 1127 goto autoconf_fail; 1109 1128 EP_OUT_NAME = ep->name; 1110 1129 ep->driver_data = ep; /* claim */ 1111 1130 1112 1112 - gcnum = usb_gadget_controller_number (gadget); 1131 1131 + gcnum = usb_gadget_controller_number(gadget); 1113 1132 if (gcnum >= 0) 1114 1114 - device_desc.bcdDevice = cpu_to_le16 (0x0200 + gcnum); 1133 1133 + device_desc.bcdDevice = cpu_to_le16(0x0200 + gcnum); 1115 1134 else { 1116 1135 /* gadget zero is so simple (for now, no altsettings) that 1117 1136 * it SHOULD NOT have problems with bulk-capable hardware. ··· 1122 1141 */ 1123 1142 pr_warning("%s: controller '%s' not recognized\n", 1124 1143 shortname, gadget->name); 1125 1125 - device_desc.bcdDevice = __constant_cpu_to_le16 (0x9999); 1144 1144 + device_desc.bcdDevice = __constant_cpu_to_le16(0x9999); 1126 1145 } 1127 1146 1128 1147 ··· 1130 1149 dev = kzalloc(sizeof(*dev), GFP_KERNEL); 1131 1150 if (!dev) 1132 1151 return -ENOMEM; 1133 1133 - spin_lock_init (&dev->lock); 1152 1152 + spin_lock_init(&dev->lock); 1134 1153 dev->gadget = gadget; 1135 1135 - set_gadget_data (gadget, dev); 1154 1154 + set_gadget_data(gadget, dev); 1155 1155 + 1156 1156 + init_timer(&dev->resume); 1157 1157 + dev->resume.function = zero_autoresume; 1158 1158 + dev->resume.data = (unsigned long) dev; 1136 1159 1137 1160 /* preallocate control response and buffer */ 1138 1138 - dev->req = usb_ep_alloc_request (gadget->ep0, GFP_KERNEL); 1161 1161 + dev->req = usb_ep_alloc_request(gadget->ep0, GFP_KERNEL); 1139 1162 if (!dev->req) 1140 1163 goto enomem; 1141 1164 dev->req->buf = kmalloc(USB_BUFSIZ, GFP_KERNEL); ··· 1167 1182 loopback_config.bmAttributes |= USB_CONFIG_ATT_WAKEUP; 1168 1183 } 1169 1184 1170 1170 - usb_gadget_set_selfpowered (gadget); 1185 1185 + usb_gadget_set_selfpowered(gadget); 1171 1186 1172 1172 - init_timer (&dev->resume); 1173 1173 - dev->resume.function = zero_autoresume; 1174 1174 - dev->resume.data = (unsigned long) dev; 1175 1187 if (autoresume) { 1176 1188 source_sink_config.bmAttributes |= USB_CONFIG_ATT_WAKEUP; 1177 1189 loopback_config.bmAttributes |= USB_CONFIG_ATT_WAKEUP; ··· 1176 1194 1177 1195 gadget->ep0->driver_data = dev; 1178 1196 1179 1179 - INFO (dev, "%s, version: " DRIVER_VERSION "\n", longname); 1180 1180 - INFO (dev, "using %s, OUT %s IN %s\n", gadget->name, 1197 1197 + INFO(dev, "%s, version: " DRIVER_VERSION "\n", longname); 1198 1198 + INFO(dev, "using %s, OUT %s IN %s\n", gadget->name, 1181 1199 EP_OUT_NAME, EP_IN_NAME); 1182 1200 1183 1183 - snprintf (manufacturer, sizeof manufacturer, "%s %s with %s", 1201 1201 + snprintf(manufacturer, sizeof manufacturer, "%s %s with %s", 1184 1202 init_utsname()->sysname, init_utsname()->release, 1185 1203 gadget->name); 1186 1204 1187 1205 return 0; 1188 1206 1189 1207 enomem: 1190 1190 - zero_unbind (gadget); 1208 1208 + zero_unbind(gadget); 1191 1209 return -ENOMEM; 1192 1210 } 1193 1211 1194 1212 /*-------------------------------------------------------------------------*/ 1195 1213 1196 1196 - static void 1197 1197 - zero_suspend (struct usb_gadget *gadget) 1214 1214 + static void zero_suspend(struct usb_gadget *gadget) 1198 1215 { 1199 1199 - struct zero_dev *dev = get_gadget_data (gadget); 1216 1216 + struct zero_dev *dev = get_gadget_data(gadget); 1200 1217 1201 1218 if (gadget->speed == USB_SPEED_UNKNOWN) 1202 1219 return; 1203 1220 1204 1221 if (autoresume) { 1205 1205 - mod_timer (&dev->resume, jiffies + (HZ * autoresume)); 1206 1206 - DBG (dev, "suspend, wakeup in %d seconds\n", autoresume); 1222 1222 + mod_timer(&dev->resume, jiffies + (HZ * autoresume)); 1223 1223 + DBG(dev, "suspend, wakeup in %d seconds\n", autoresume); 1207 1224 } else 1208 1208 - DBG (dev, "suspend\n"); 1225 1225 + DBG(dev, "suspend\n"); 1209 1226 } 1210 1227 1211 1211 - static void 1212 1212 - zero_resume (struct usb_gadget *gadget) 1228 1228 + static void zero_resume(struct usb_gadget *gadget) 1213 1229 { 1214 1214 - struct zero_dev *dev = get_gadget_data (gadget); 1230 1230 + struct zero_dev *dev = get_gadget_data(gadget); 1215 1231 1216 1216 - DBG (dev, "resume\n"); 1217 1217 - del_timer (&dev->resume); 1232 1232 + DBG(dev, "resume\n"); 1233 1233 + del_timer(&dev->resume); 1218 1234 } 1219 1235 1220 1236 ··· 1244 1264 MODULE_LICENSE("GPL"); 1245 1265 1246 1266 1247 1247 - static int __init init (void) 1267 1267 + static int __init init(void) 1248 1268 { 1249 1249 - return usb_gadget_register_driver (&zero_driver); 1269 1269 + return usb_gadget_register_driver(&zero_driver); 1250 1270 } 1251 1251 - module_init (init); 1271 1271 + module_init(init); 1252 1272 1253 1253 - static void __exit cleanup (void) 1273 1273 + static void __exit cleanup(void) 1254 1274 { 1255 1255 - usb_gadget_unregister_driver (&zero_driver); 1275 1275 + usb_gadget_unregister_driver(&zero_driver); 1256 1276 } 1257 1257 - module_exit (cleanup); 1277 1277 + module_exit(cleanup); 1258 1278

+39

drivers/usb/host/Kconfig

reviewed

··· 4 4 comment "USB Host Controller Drivers" 5 5 depends on USB 6 6 7 7 + config USB_C67X00_HCD 8 8 + tristate "Cypress C67x00 HCD support" 9 9 + depends on USB 10 10 + help 11 11 + The Cypress C67x00 (EZ-Host/EZ-OTG) chips are dual-role 12 12 + host/peripheral/OTG USB controllers. 13 13 + 14 14 + Enable this option to support this chip in host controller mode. 15 15 + If unsure, say N. 16 16 + 17 17 + To compile this driver as a module, choose M here: the 18 18 + module will be called c67x00. 19 19 + 7 20 config USB_EHCI_HCD 8 21 tristate "EHCI HCD (USB 2.0) support" 9 22 depends on USB && USB_ARCH_HAS_EHCI ··· 107 94 108 95 To compile this driver as a module, choose M here: the 109 96 module will be called isp116x-hcd. 97 97 + 98 98 + config USB_ISP1760_HCD 99 99 + tristate "ISP 1760 HCD support" 100 100 + depends on USB && EXPERIMENTAL 101 101 + ---help--- 102 102 + The ISP1760 chip is a USB 2.0 host controller. 103 103 + 104 104 + This driver does not support isochronous transfers or OTG. 105 105 + 106 106 + To compile this driver as a module, choose M here: the 107 107 + module will be called isp1760-hcd. 108 108 + 109 109 + config USB_ISP1760_PCI 110 110 + bool "Support for the PCI bus" 111 111 + depends on USB_ISP1760_HCD && PCI 112 112 + ---help--- 113 113 + Enables support for the device present on the PCI bus. 114 114 + This should only be required if you happen to have the eval kit from 115 115 + NXP and you are going to test it. 116 116 + 117 117 + config USB_ISP1760_OF 118 118 + bool "Support for the OF platform bus" 119 119 + depends on USB_ISP1760_HCD && OF 120 120 + ---help--- 121 121 + Enables support for the device present on the PowerPC 122 122 + OpenFirmware platform bus. 110 123 111 124 config USB_OHCI_HCD 112 125 tristate "OHCI HCD support"

+3 -1

drivers/usb/host/Makefile

reviewed

··· 6 6 EXTRA_CFLAGS += -DDEBUG 7 7 endif 8 8 9 9 + isp1760-objs := isp1760-hcd.o isp1760-if.o 10 10 + 9 11 obj-$(CONFIG_PCI) += pci-quirks.o 10 12 11 13 obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o ··· 18 16 obj-$(CONFIG_USB_SL811_CS) += sl811_cs.o 19 17 obj-$(CONFIG_USB_U132_HCD) += u132-hcd.o 20 18 obj-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o 21 21 - 19 19 + obj-$(CONFIG_USB_ISP1760_HCD) += isp1760.o

+2231

drivers/usb/host/isp1760-hcd.c

reviewed

··· 1 1 + /* 2 2 + * Driver for the NXP ISP1760 chip 3 3 + * 4 4 + * However, the code might contain some bugs. What doesn't work for sure is: 5 5 + * - ISO 6 6 + * - OTG 7 7 + e The interrupt line is configured as active low, level. 8 8 + * 9 9 + * (c) 2007 Sebastian Siewior <bigeasy@linutronix.de> 10 10 + * 11 11 + */ 12 12 + #include <linux/module.h> 13 13 + #include <linux/kernel.h> 14 14 + #include <linux/slab.h> 15 15 + #include <linux/list.h> 16 16 + #include <linux/usb.h> 17 17 + #include <linux/debugfs.h> 18 18 + #include <linux/uaccess.h> 19 19 + #include <linux/io.h> 20 20 + #include <asm/unaligned.h> 21 21 + 22 22 + #include "../core/hcd.h" 23 23 + #include "isp1760-hcd.h" 24 24 + 25 25 + static struct kmem_cache *qtd_cachep; 26 26 + static struct kmem_cache *qh_cachep; 27 27 + 28 28 + struct isp1760_hcd { 29 29 + u32 hcs_params; 30 30 + spinlock_t lock; 31 31 + struct inter_packet_info atl_ints[32]; 32 32 + struct inter_packet_info int_ints[32]; 33 33 + struct memory_chunk memory_pool[BLOCKS]; 34 34 + 35 35 + /* periodic schedule support */ 36 36 + #define DEFAULT_I_TDPS 1024 37 37 + unsigned periodic_size; 38 38 + unsigned i_thresh; 39 39 + unsigned long reset_done; 40 40 + unsigned long next_statechange; 41 41 + }; 42 42 + 43 43 + static inline struct isp1760_hcd *hcd_to_priv(struct usb_hcd *hcd) 44 44 + { 45 45 + return (struct isp1760_hcd *) (hcd->hcd_priv); 46 46 + } 47 47 + static inline struct usb_hcd *priv_to_hcd(struct isp1760_hcd *priv) 48 48 + { 49 49 + return container_of((void *) priv, struct usb_hcd, hcd_priv); 50 50 + } 51 51 + 52 52 + /* Section 2.2 Host Controller Capability Registers */ 53 53 + #define HC_LENGTH(p) (((p)>>00)&0x00ff) /* bits 7:0 */ 54 54 + #define HC_VERSION(p) (((p)>>16)&0xffff) /* bits 31:16 */ 55 55 + #define HCS_INDICATOR(p) ((p)&(1 << 16)) /* true: has port indicators */ 56 56 + #define HCS_PPC(p) ((p)&(1 << 4)) /* true: port power control */ 57 57 + #define HCS_N_PORTS(p) (((p)>>0)&0xf) /* bits 3:0, ports on HC */ 58 58 + #define HCC_ISOC_CACHE(p) ((p)&(1 << 7)) /* true: can cache isoc frame */ 59 59 + #define HCC_ISOC_THRES(p) (((p)>>4)&0x7) /* bits 6:4, uframes cached */ 60 60 + 61 61 + /* Section 2.3 Host Controller Operational Registers */ 62 62 + #define CMD_LRESET (1<<7) /* partial reset (no ports, etc) */ 63 63 + #define CMD_RESET (1<<1) /* reset HC not bus */ 64 64 + #define CMD_RUN (1<<0) /* start/stop HC */ 65 65 + #define STS_PCD (1<<2) /* port change detect */ 66 66 + #define FLAG_CF (1<<0) /* true: we'll support "high speed" */ 67 67 + 68 68 + #define PORT_OWNER (1<<13) /* true: companion hc owns this port */ 69 69 + #define PORT_POWER (1<<12) /* true: has power (see PPC) */ 70 70 + #define PORT_USB11(x) (((x) & (3 << 10)) == (1 << 10)) /* USB 1.1 device */ 71 71 + #define PORT_RESET (1<<8) /* reset port */ 72 72 + #define PORT_SUSPEND (1<<7) /* suspend port */ 73 73 + #define PORT_RESUME (1<<6) /* resume it */ 74 74 + #define PORT_PE (1<<2) /* port enable */ 75 75 + #define PORT_CSC (1<<1) /* connect status change */ 76 76 + #define PORT_CONNECT (1<<0) /* device connected */ 77 77 + #define PORT_RWC_BITS (PORT_CSC) 78 78 + 79 79 + struct isp1760_qtd { 80 80 + struct isp1760_qtd *hw_next; 81 81 + u8 packet_type; 82 82 + u8 toggle; 83 83 + 84 84 + void *data_buffer; 85 85 + /* the rest is HCD-private */ 86 86 + struct list_head qtd_list; 87 87 + struct urb *urb; 88 88 + size_t length; 89 89 + 90 90 + /* isp special*/ 91 91 + u32 status; 92 92 + #define URB_COMPLETE_NOTIFY (1 << 0) 93 93 + #define URB_ENQUEUED (1 << 1) 94 94 + #define URB_TYPE_ATL (1 << 2) 95 95 + #define URB_TYPE_INT (1 << 3) 96 96 + }; 97 97 + 98 98 + struct isp1760_qh { 99 99 + /* first part defined by EHCI spec */ 100 100 + struct list_head qtd_list; 101 101 + struct isp1760_hcd *priv; 102 102 + 103 103 + /* periodic schedule info */ 104 104 + unsigned short period; /* polling interval */ 105 105 + struct usb_device *dev; 106 106 + 107 107 + u32 toggle; 108 108 + u32 ping; 109 109 + }; 110 110 + 111 111 + #define ehci_port_speed(priv, portsc) (1 << USB_PORT_FEAT_HIGHSPEED) 112 112 + 113 113 + static unsigned int isp1760_readl(__u32 __iomem *regs) 114 114 + { 115 115 + return readl(regs); 116 116 + } 117 117 + 118 118 + static void isp1760_writel(const unsigned int val, __u32 __iomem *regs) 119 119 + { 120 120 + writel(val, regs); 121 121 + } 122 122 + 123 123 + /* 124 124 + * The next two copy via MMIO data to/from the device. memcpy_{to|from}io() 125 125 + * doesn't quite work because some people have to enforce 32-bit access 126 126 + */ 127 127 + static void priv_read_copy(struct isp1760_hcd *priv, u32 *src, 128 128 + __u32 __iomem *dst, u32 offset, u32 len) 129 129 + { 130 130 + struct usb_hcd *hcd = priv_to_hcd(priv); 131 131 + u32 val; 132 132 + u8 *buff8; 133 133 + 134 134 + if (!src) { 135 135 + printk(KERN_ERR "ERROR: buffer: %p len: %d\n", src, len); 136 136 + return; 137 137 + } 138 138 + isp1760_writel(offset, hcd->regs + HC_MEMORY_REG); 139 139 + /* XXX 140 140 + * 90nsec delay, the spec says something how this could be avoided. 141 141 + */ 142 142 + mdelay(1); 143 143 + 144 144 + while (len >= 4) { 145 145 + *src = __raw_readl(dst); 146 146 + len -= 4; 147 147 + src++; 148 148 + dst++; 149 149 + } 150 150 + 151 151 + if (!len) 152 152 + return; 153 153 + 154 154 + /* in case we have 3, 2 or 1 by left. The dst buffer may not be fully 155 155 + * allocated. 156 156 + */ 157 157 + val = isp1760_readl(dst); 158 158 + 159 159 + buff8 = (u8 *)src; 160 160 + while (len) { 161 161 + 162 162 + *buff8 = val; 163 163 + val >>= 8; 164 164 + len--; 165 165 + buff8++; 166 166 + } 167 167 + } 168 168 + 169 169 + static void priv_write_copy(const struct isp1760_hcd *priv, const u32 *src, 170 170 + __u32 __iomem *dst, u32 len) 171 171 + { 172 172 + while (len >= 4) { 173 173 + __raw_writel(*src, dst); 174 174 + len -= 4; 175 175 + src++; 176 176 + dst++; 177 177 + } 178 178 + 179 179 + if (!len) 180 180 + return; 181 181 + /* in case we have 3, 2 or 1 by left. The buffer is allocated and the 182 182 + * extra bytes should not be read by the HW 183 183 + */ 184 184 + 185 185 + __raw_writel(*src, dst); 186 186 + } 187 187 + 188 188 + /* memory management of the 60kb on the chip from 0x1000 to 0xffff */ 189 189 + static void init_memory(struct isp1760_hcd *priv) 190 190 + { 191 191 + int i; 192 192 + u32 payload; 193 193 + 194 194 + payload = 0x1000; 195 195 + for (i = 0; i < BLOCK_1_NUM; i++) { 196 196 + priv->memory_pool[i].start = payload; 197 197 + priv->memory_pool[i].size = BLOCK_1_SIZE; 198 198 + priv->memory_pool[i].free = 1; 199 199 + payload += priv->memory_pool[i].size; 200 200 + } 201 201 + 202 202 + 203 203 + for (i = BLOCK_1_NUM; i < BLOCK_1_NUM + BLOCK_2_NUM; i++) { 204 204 + priv->memory_pool[i].start = payload; 205 205 + priv->memory_pool[i].size = BLOCK_2_SIZE; 206 206 + priv->memory_pool[i].free = 1; 207 207 + payload += priv->memory_pool[i].size; 208 208 + } 209 209 + 210 210 + 211 211 + for (i = BLOCK_1_NUM + BLOCK_2_NUM; i < BLOCKS; i++) { 212 212 + priv->memory_pool[i].start = payload; 213 213 + priv->memory_pool[i].size = BLOCK_3_SIZE; 214 214 + priv->memory_pool[i].free = 1; 215 215 + payload += priv->memory_pool[i].size; 216 216 + } 217 217 + 218 218 + BUG_ON(payload - priv->memory_pool[i - 1].size > PAYLOAD_SIZE); 219 219 + } 220 220 + 221 221 + static u32 alloc_mem(struct isp1760_hcd *priv, u32 size) 222 222 + { 223 223 + int i; 224 224 + 225 225 + if (!size) 226 226 + return ISP1760_NULL_POINTER; 227 227 + 228 228 + for (i = 0; i < BLOCKS; i++) { 229 229 + if (priv->memory_pool[i].size >= size && 230 230 + priv->memory_pool[i].free) { 231 231 + 232 232 + priv->memory_pool[i].free = 0; 233 233 + return priv->memory_pool[i].start; 234 234 + } 235 235 + } 236 236 + 237 237 + printk(KERN_ERR "ISP1760 MEM: can not allocate %d bytes of memory\n", 238 238 + size); 239 239 + printk(KERN_ERR "Current memory map:\n"); 240 240 + for (i = 0; i < BLOCKS; i++) { 241 241 + printk(KERN_ERR "Pool %2d size %4d status: %d\n", 242 242 + i, priv->memory_pool[i].size, 243 243 + priv->memory_pool[i].free); 244 244 + } 245 245 + /* XXX maybe -ENOMEM could be possible */ 246 246 + BUG(); 247 247 + return 0; 248 248 + } 249 249 + 250 250 + static void free_mem(struct isp1760_hcd *priv, u32 mem) 251 251 + { 252 252 + int i; 253 253 + 254 254 + if (mem == ISP1760_NULL_POINTER) 255 255 + return; 256 256 + 257 257 + for (i = 0; i < BLOCKS; i++) { 258 258 + if (priv->memory_pool[i].start == mem) { 259 259 + 260 260 + BUG_ON(priv->memory_pool[i].free); 261 261 + 262 262 + priv->memory_pool[i].free = 1; 263 263 + return ; 264 264 + } 265 265 + } 266 266 + 267 267 + printk(KERN_ERR "Trying to free not-here-allocated memory :%08x\n", 268 268 + mem); 269 269 + BUG(); 270 270 + } 271 271 + 272 272 + static void isp1760_init_regs(struct usb_hcd *hcd) 273 273 + { 274 274 + isp1760_writel(0, hcd->regs + HC_BUFFER_STATUS_REG); 275 275 + isp1760_writel(NO_TRANSFER_ACTIVE, hcd->regs + 276 276 + HC_ATL_PTD_SKIPMAP_REG); 277 277 + isp1760_writel(NO_TRANSFER_ACTIVE, hcd->regs + 278 278 + HC_INT_PTD_SKIPMAP_REG); 279 279 + isp1760_writel(NO_TRANSFER_ACTIVE, hcd->regs + 280 280 + HC_ISO_PTD_SKIPMAP_REG); 281 281 + 282 282 + isp1760_writel(~NO_TRANSFER_ACTIVE, hcd->regs + 283 283 + HC_ATL_PTD_DONEMAP_REG); 284 284 + isp1760_writel(~NO_TRANSFER_ACTIVE, hcd->regs + 285 285 + HC_INT_PTD_DONEMAP_REG); 286 286 + isp1760_writel(~NO_TRANSFER_ACTIVE, hcd->regs + 287 287 + HC_ISO_PTD_DONEMAP_REG); 288 288 + } 289 289 + 290 290 + static int handshake(struct isp1760_hcd *priv, void __iomem *ptr, 291 291 + u32 mask, u32 done, int usec) 292 292 + { 293 293 + u32 result; 294 294 + 295 295 + do { 296 296 + result = isp1760_readl(ptr); 297 297 + if (result == ~0) 298 298 + return -ENODEV; 299 299 + result &= mask; 300 300 + if (result == done) 301 301 + return 0; 302 302 + udelay(1); 303 303 + usec--; 304 304 + } while (usec > 0); 305 305 + return -ETIMEDOUT; 306 306 + } 307 307 + 308 308 + /* reset a non-running (STS_HALT == 1) controller */ 309 309 + static int ehci_reset(struct isp1760_hcd *priv) 310 310 + { 311 311 + int retval; 312 312 + struct usb_hcd *hcd = priv_to_hcd(priv); 313 313 + u32 command = isp1760_readl(hcd->regs + HC_USBCMD); 314 314 + 315 315 + command |= CMD_RESET; 316 316 + isp1760_writel(command, hcd->regs + HC_USBCMD); 317 317 + hcd->state = HC_STATE_HALT; 318 318 + priv->next_statechange = jiffies; 319 319 + retval = handshake(priv, hcd->regs + HC_USBCMD, 320 320 + CMD_RESET, 0, 250 * 1000); 321 321 + return retval; 322 322 + } 323 323 + 324 324 + static void qh_destroy(struct isp1760_qh *qh) 325 325 + { 326 326 + BUG_ON(!list_empty(&qh->qtd_list)); 327 327 + kmem_cache_free(qh_cachep, qh); 328 328 + } 329 329 + 330 330 + static struct isp1760_qh *isp1760_qh_alloc(struct isp1760_hcd *priv, 331 331 + gfp_t flags) 332 332 + { 333 333 + struct isp1760_qh *qh; 334 334 + 335 335 + qh = kmem_cache_zalloc(qh_cachep, flags); 336 336 + if (!qh) 337 337 + return qh; 338 338 + 339 339 + INIT_LIST_HEAD(&qh->qtd_list); 340 340 + qh->priv = priv; 341 341 + return qh; 342 342 + } 343 343 + 344 344 + /* magic numbers that can affect system performance */ 345 345 + #define EHCI_TUNE_CERR 3 /* 0-3 qtd retries; 0 == don't stop */ 346 346 + #define EHCI_TUNE_RL_HS 4 /* nak throttle; see 4.9 */ 347 347 + #define EHCI_TUNE_RL_TT 0 348 348 + #define EHCI_TUNE_MULT_HS 1 /* 1-3 transactions/uframe; 4.10.3 */ 349 349 + #define EHCI_TUNE_MULT_TT 1 350 350 + #define EHCI_TUNE_FLS 2 /* (small) 256 frame schedule */ 351 351 + 352 352 + /* one-time init, only for memory state */ 353 353 + static int priv_init(struct usb_hcd *hcd) 354 354 + { 355 355 + struct isp1760_hcd *priv = hcd_to_priv(hcd); 356 356 + u32 hcc_params; 357 357 + 358 358 + spin_lock_init(&priv->lock); 359 359 + 360 360 + /* 361 361 + * hw default: 1K periodic list heads, one per frame. 362 362 + * periodic_size can shrink by USBCMD update if hcc_params allows. 363 363 + */ 364 364 + priv->periodic_size = DEFAULT_I_TDPS; 365 365 + 366 366 + /* controllers may cache some of the periodic schedule ... */ 367 367 + hcc_params = isp1760_readl(hcd->regs + HC_HCCPARAMS); 368 368 + /* full frame cache */ 369 369 + if (HCC_ISOC_CACHE(hcc_params)) 370 370 + priv->i_thresh = 8; 371 371 + else /* N microframes cached */ 372 372 + priv->i_thresh = 2 + HCC_ISOC_THRES(hcc_params); 373 373 + 374 374 + return 0; 375 375 + } 376 376 + 377 377 + static int isp1760_hc_setup(struct usb_hcd *hcd) 378 378 + { 379 379 + struct isp1760_hcd *priv = hcd_to_priv(hcd); 380 380 + int result; 381 381 + u32 scratch; 382 382 + 383 383 + isp1760_writel(0xdeadbabe, hcd->regs + HC_SCRATCH_REG); 384 384 + scratch = isp1760_readl(hcd->regs + HC_SCRATCH_REG); 385 385 + if (scratch != 0xdeadbabe) { 386 386 + printk(KERN_ERR "ISP1760: Scratch test failed.\n"); 387 387 + return -ENODEV; 388 388 + } 389 389 + 390 390 + /* pre reset */ 391 391 + isp1760_init_regs(hcd); 392 392 + 393 393 + /* reset */ 394 394 + isp1760_writel(SW_RESET_RESET_ALL, hcd->regs + HC_RESET_REG); 395 395 + mdelay(100); 396 396 + 397 397 + isp1760_writel(SW_RESET_RESET_HC, hcd->regs + HC_RESET_REG); 398 398 + mdelay(100); 399 399 + 400 400 + result = ehci_reset(priv); 401 401 + if (result) 402 402 + return result; 403 403 + 404 404 + /* Step 11 passed */ 405 405 + 406 406 + isp1760_writel(INTERRUPT_ENABLE_MASK, hcd->regs + HC_INTERRUPT_REG); 407 407 + isp1760_writel(INTERRUPT_ENABLE_MASK, hcd->regs + HC_INTERRUPT_ENABLE); 408 408 + 409 409 + /* ATL reset */ 410 410 + scratch = isp1760_readl(hcd->regs + HC_HW_MODE_CTRL); 411 411 + isp1760_writel(scratch | ALL_ATX_RESET, hcd->regs + HC_HW_MODE_CTRL); 412 412 + mdelay(10); 413 413 + isp1760_writel(scratch, hcd->regs + HC_HW_MODE_CTRL); 414 414 + 415 415 + isp1760_writel(PORT1_POWER | PORT1_INIT2, hcd->regs + HC_PORT1_CTRL); 416 416 + mdelay(10); 417 417 + 418 418 + priv->hcs_params = isp1760_readl(hcd->regs + HC_HCSPARAMS); 419 419 + 420 420 + return priv_init(hcd); 421 421 + } 422 422 + 423 423 + static void isp1760_init_maps(struct usb_hcd *hcd) 424 424 + { 425 425 + /*set last maps, for iso its only 1, else 32 tds bitmap*/ 426 426 + isp1760_writel(0x80000000, hcd->regs + HC_ATL_PTD_LASTPTD_REG); 427 427 + isp1760_writel(0x80000000, hcd->regs + HC_INT_PTD_LASTPTD_REG); 428 428 + isp1760_writel(0x00000001, hcd->regs + HC_ISO_PTD_LASTPTD_REG); 429 429 + } 430 430 + 431 431 + static void isp1760_enable_interrupts(struct usb_hcd *hcd) 432 432 + { 433 433 + isp1760_writel(0, hcd->regs + HC_ATL_IRQ_MASK_AND_REG); 434 434 + isp1760_writel(0, hcd->regs + HC_ATL_IRQ_MASK_OR_REG); 435 435 + isp1760_writel(0, hcd->regs + HC_INT_IRQ_MASK_AND_REG); 436 436 + isp1760_writel(0, hcd->regs + HC_INT_IRQ_MASK_OR_REG); 437 437 + isp1760_writel(0, hcd->regs + HC_ISO_IRQ_MASK_AND_REG); 438 438 + isp1760_writel(0xffffffff, hcd->regs + HC_ISO_IRQ_MASK_OR_REG); 439 439 + /* step 23 passed */ 440 440 + } 441 441 + 442 442 + static int isp1760_run(struct usb_hcd *hcd) 443 443 + { 444 444 + struct isp1760_hcd *priv = hcd_to_priv(hcd); 445 445 + int retval; 446 446 + u32 temp; 447 447 + u32 command; 448 448 + u32 chipid; 449 449 + 450 450 + hcd->uses_new_polling = 1; 451 451 + hcd->poll_rh = 0; 452 452 + 453 453 + hcd->state = HC_STATE_RUNNING; 454 454 + isp1760_enable_interrupts(hcd); 455 455 + temp = isp1760_readl(hcd->regs + HC_HW_MODE_CTRL); 456 456 + temp |= FINAL_HW_CONFIG; 457 457 + isp1760_writel(temp, hcd->regs + HC_HW_MODE_CTRL); 458 458 + 459 459 + command = isp1760_readl(hcd->regs + HC_USBCMD); 460 460 + command &= ~(CMD_LRESET|CMD_RESET); 461 461 + command |= CMD_RUN; 462 462 + isp1760_writel(command, hcd->regs + HC_USBCMD); 463 463 + 464 464 + retval = handshake(priv, hcd->regs + HC_USBCMD, CMD_RUN, CMD_RUN, 465 465 + 250 * 1000); 466 466 + if (retval) 467 467 + return retval; 468 468 + 469 469 + /* 470 470 + * XXX 471 471 + * Spec says to write FLAG_CF as last config action, priv code grabs 472 472 + * the semaphore while doing so. 473 473 + */ 474 474 + down_write(&ehci_cf_port_reset_rwsem); 475 475 + isp1760_writel(FLAG_CF, hcd->regs + HC_CONFIGFLAG); 476 476 + 477 477 + retval = handshake(priv, hcd->regs + HC_CONFIGFLAG, FLAG_CF, FLAG_CF, 478 478 + 250 * 1000); 479 479 + up_write(&ehci_cf_port_reset_rwsem); 480 480 + if (retval) 481 481 + return retval; 482 482 + 483 483 + chipid = isp1760_readl(hcd->regs + HC_CHIP_ID_REG); 484 484 + isp1760_info(priv, "USB ISP %04x HW rev. %d started\n", chipid & 0xffff, 485 485 + chipid >> 16); 486 486 + 487 487 + /* PTD Register Init Part 2, Step 28 */ 488 488 + /* enable INTs */ 489 489 + isp1760_init_maps(hcd); 490 490 + 491 491 + /* GRR this is run-once init(), being done every time the HC starts. 492 492 + * So long as they're part of class devices, we can't do it init() 493 493 + * since the class device isn't created that early. 494 494 + */ 495 495 + return 0; 496 496 + } 497 497 + 498 498 + static u32 base_to_chip(u32 base) 499 499 + { 500 500 + return ((base - 0x400) >> 3); 501 501 + } 502 502 + 503 503 + static void transform_into_atl(struct isp1760_hcd *priv, struct isp1760_qh *qh, 504 504 + struct isp1760_qtd *qtd, struct urb *urb, 505 505 + u32 payload, struct ptd *ptd) 506 506 + { 507 507 + u32 dw0; 508 508 + u32 dw1; 509 509 + u32 dw2; 510 510 + u32 dw3; 511 511 + u32 maxpacket; 512 512 + u32 multi; 513 513 + u32 pid_code; 514 514 + u32 rl = RL_COUNTER; 515 515 + u32 nak = NAK_COUNTER; 516 516 + 517 517 + /* according to 3.6.2, max packet len can not be > 0x400 */ 518 518 + maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe)); 519 519 + multi = 1 + ((maxpacket >> 11) & 0x3); 520 520 + maxpacket &= 0x7ff; 521 521 + 522 522 + /* DW0 */ 523 523 + dw0 = PTD_VALID; 524 524 + dw0 |= PTD_LENGTH(qtd->length); 525 525 + dw0 |= PTD_MAXPACKET(maxpacket); 526 526 + dw0 |= PTD_ENDPOINT(usb_pipeendpoint(urb->pipe)); 527 527 + dw1 = usb_pipeendpoint(urb->pipe) >> 1; 528 528 + 529 529 + /* DW1 */ 530 530 + dw1 |= PTD_DEVICE_ADDR(usb_pipedevice(urb->pipe)); 531 531 + 532 532 + pid_code = qtd->packet_type; 533 533 + dw1 |= PTD_PID_TOKEN(pid_code); 534 534 + 535 535 + if (usb_pipebulk(urb->pipe)) 536 536 + dw1 |= PTD_TRANS_BULK; 537 537 + else if (usb_pipeint(urb->pipe)) 538 538 + dw1 |= PTD_TRANS_INT; 539 539 + 540 540 + if (urb->dev->speed != USB_SPEED_HIGH) { 541 541 + /* split transaction */ 542 542 + 543 543 + dw1 |= PTD_TRANS_SPLIT; 544 544 + if (urb->dev->speed == USB_SPEED_LOW) 545 545 + dw1 |= PTD_SE_USB_LOSPEED; 546 546 + 547 547 + dw1 |= PTD_PORT_NUM(urb->dev->ttport); 548 548 + dw1 |= PTD_HUB_NUM(urb->dev->tt->hub->devnum); 549 549 + 550 550 + /* SE bit for Split INT transfers */ 551 551 + if (usb_pipeint(urb->pipe) && 552 552 + (urb->dev->speed == USB_SPEED_LOW)) 553 553 + dw1 |= 2 << 16; 554 554 + 555 555 + dw3 = 0; 556 556 + rl = 0; 557 557 + nak = 0; 558 558 + } else { 559 559 + dw0 |= PTD_MULTI(multi); 560 560 + if (usb_pipecontrol(urb->pipe) || usb_pipebulk(urb->pipe)) 561 561 + dw3 = qh->ping; 562 562 + else 563 563 + dw3 = 0; 564 564 + } 565 565 + /* DW2 */ 566 566 + dw2 = 0; 567 567 + dw2 |= PTD_DATA_START_ADDR(base_to_chip(payload)); 568 568 + dw2 |= PTD_RL_CNT(rl); 569 569 + dw3 |= PTD_NAC_CNT(nak); 570 570 + 571 571 + /* DW3 */ 572 572 + if (usb_pipecontrol(urb->pipe)) 573 573 + dw3 |= PTD_DATA_TOGGLE(qtd->toggle); 574 574 + else 575 575 + dw3 |= qh->toggle; 576 576 + 577 577 + 578 578 + dw3 |= PTD_ACTIVE; 579 579 + /* Cerr */ 580 580 + dw3 |= PTD_CERR(ERR_COUNTER); 581 581 + 582 582 + memset(ptd, 0, sizeof(*ptd)); 583 583 + 584 584 + ptd->dw0 = cpu_to_le32(dw0); 585 585 + ptd->dw1 = cpu_to_le32(dw1); 586 586 + ptd->dw2 = cpu_to_le32(dw2); 587 587 + ptd->dw3 = cpu_to_le32(dw3); 588 588 + } 589 589 + 590 590 + static void transform_add_int(struct isp1760_hcd *priv, struct isp1760_qh *qh, 591 591 + struct isp1760_qtd *qtd, struct urb *urb, 592 592 + u32 payload, struct ptd *ptd) 593 593 + { 594 594 + u32 maxpacket; 595 595 + u32 multi; 596 596 + u32 numberofusofs; 597 597 + u32 i; 598 598 + u32 usofmask, usof; 599 599 + u32 period; 600 600 + 601 601 + maxpacket = usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe)); 602 602 + multi = 1 + ((maxpacket >> 11) & 0x3); 603 603 + maxpacket &= 0x7ff; 604 604 + /* length of the data per uframe */ 605 605 + maxpacket = multi * maxpacket; 606 606 + 607 607 + numberofusofs = urb->transfer_buffer_length / maxpacket; 608 608 + if (urb->transfer_buffer_length % maxpacket) 609 609 + numberofusofs += 1; 610 610 + 611 611 + usofmask = 1; 612 612 + usof = 0; 613 613 + for (i = 0; i < numberofusofs; i++) { 614 614 + usof |= usofmask; 615 615 + usofmask <<= 1; 616 616 + } 617 617 + 618 618 + if (urb->dev->speed != USB_SPEED_HIGH) { 619 619 + /* split */ 620 620 + ptd->dw5 = __constant_cpu_to_le32(0x1c); 621 621 + 622 622 + if (qh->period >= 32) 623 623 + period = qh->period / 2; 624 624 + else 625 625 + period = qh->period; 626 626 + 627 627 + } else { 628 628 + 629 629 + if (qh->period >= 8) 630 630 + period = qh->period/8; 631 631 + else 632 632 + period = qh->period; 633 633 + 634 634 + if (period >= 32) 635 635 + period = 16; 636 636 + 637 637 + if (qh->period >= 8) { 638 638 + /* millisecond period */ 639 639 + period = (period << 3); 640 640 + } else { 641 641 + /* usof based tranmsfers */ 642 642 + /* minimum 4 usofs */ 643 643 + usof = 0x11; 644 644 + } 645 645 + } 646 646 + 647 647 + ptd->dw2 |= cpu_to_le32(period); 648 648 + ptd->dw4 = cpu_to_le32(usof); 649 649 + } 650 650 + 651 651 + static void transform_into_int(struct isp1760_hcd *priv, struct isp1760_qh *qh, 652 652 + struct isp1760_qtd *qtd, struct urb *urb, 653 653 + u32 payload, struct ptd *ptd) 654 654 + { 655 655 + transform_into_atl(priv, qh, qtd, urb, payload, ptd); 656 656 + transform_add_int(priv, qh, qtd, urb, payload, ptd); 657 657 + } 658 658 + 659 659 + static int qtd_fill(struct isp1760_qtd *qtd, void *databuffer, size_t len, 660 660 + u32 token) 661 661 + { 662 662 + int count; 663 663 + 664 664 + qtd->data_buffer = databuffer; 665 665 + qtd->packet_type = GET_QTD_TOKEN_TYPE(token); 666 666 + qtd->toggle = GET_DATA_TOGGLE(token); 667 667 + 668 668 + if (len > HC_ATL_PL_SIZE) 669 669 + count = HC_ATL_PL_SIZE; 670 670 + else 671 671 + count = len; 672 672 + 673 673 + qtd->length = count; 674 674 + return count; 675 675 + } 676 676 + 677 677 + static int check_error(struct ptd *ptd) 678 678 + { 679 679 + int error = 0; 680 680 + u32 dw3; 681 681 + 682 682 + dw3 = le32_to_cpu(ptd->dw3); 683 683 + if (dw3 & DW3_HALT_BIT) 684 684 + error = -EPIPE; 685 685 + 686 686 + if (dw3 & DW3_ERROR_BIT) { 687 687 + printk(KERN_ERR "error bit is set in DW3\n"); 688 688 + error = -EPIPE; 689 689 + } 690 690 + 691 691 + if (dw3 & DW3_QTD_ACTIVE) { 692 692 + printk(KERN_ERR "transfer active bit is set DW3\n"); 693 693 + printk(KERN_ERR "nak counter: %d, rl: %d\n", (dw3 >> 19) & 0xf, 694 694 + (le32_to_cpu(ptd->dw2) >> 25) & 0xf); 695 695 + } 696 696 + 697 697 + return error; 698 698 + } 699 699 + 700 700 + static void check_int_err_status(u32 dw4) 701 701 + { 702 702 + u32 i; 703 703 + 704 704 + dw4 >>= 8; 705 705 + 706 706 + for (i = 0; i < 8; i++) { 707 707 + switch (dw4 & 0x7) { 708 708 + case INT_UNDERRUN: 709 709 + printk(KERN_ERR "ERROR: under run , %d\n", i); 710 710 + break; 711 711 + 712 712 + case INT_EXACT: 713 713 + printk(KERN_ERR "ERROR: transaction error, %d\n", i); 714 714 + break; 715 715 + 716 716 + case INT_BABBLE: 717 717 + printk(KERN_ERR "ERROR: babble error, %d\n", i); 718 718 + break; 719 719 + } 720 720 + dw4 >>= 3; 721 721 + } 722 722 + } 723 723 + 724 724 + static void enqueue_one_qtd(struct isp1760_qtd *qtd, struct isp1760_hcd *priv, 725 725 + u32 payload) 726 726 + { 727 727 + u32 token; 728 728 + struct usb_hcd *hcd = priv_to_hcd(priv); 729 729 + 730 730 + token = qtd->packet_type; 731 731 + 732 732 + if (qtd->length && (qtd->length <= HC_ATL_PL_SIZE)) { 733 733 + switch (token) { 734 734 + case IN_PID: 735 735 + break; 736 736 + case OUT_PID: 737 737 + case SETUP_PID: 738 738 + priv_write_copy(priv, qtd->data_buffer, 739 739 + hcd->regs + payload, 740 740 + qtd->length); 741 741 + } 742 742 + } 743 743 + } 744 744 + 745 745 + static void enqueue_one_atl_qtd(u32 atl_regs, u32 payload, 746 746 + struct isp1760_hcd *priv, struct isp1760_qh *qh, 747 747 + struct urb *urb, u32 slot, struct isp1760_qtd *qtd) 748 748 + { 749 749 + struct ptd ptd; 750 750 + struct usb_hcd *hcd = priv_to_hcd(priv); 751 751 + 752 752 + transform_into_atl(priv, qh, qtd, urb, payload, &ptd); 753 753 + priv_write_copy(priv, (u32 *)&ptd, hcd->regs + atl_regs, sizeof(ptd)); 754 754 + enqueue_one_qtd(qtd, priv, payload); 755 755 + 756 756 + priv->atl_ints[slot].urb = urb; 757 757 + priv->atl_ints[slot].qh = qh; 758 758 + priv->atl_ints[slot].qtd = qtd; 759 759 + priv->atl_ints[slot].data_buffer = qtd->data_buffer; 760 760 + priv->atl_ints[slot].payload = payload; 761 761 + qtd->status |= URB_ENQUEUED | URB_TYPE_ATL; 762 762 + qtd->status |= slot << 16; 763 763 + } 764 764 + 765 765 + static void enqueue_one_int_qtd(u32 int_regs, u32 payload, 766 766 + struct isp1760_hcd *priv, struct isp1760_qh *qh, 767 767 + struct urb *urb, u32 slot, struct isp1760_qtd *qtd) 768 768 + { 769 769 + struct ptd ptd; 770 770 + struct usb_hcd *hcd = priv_to_hcd(priv); 771 771 + 772 772 + transform_into_int(priv, qh, qtd, urb, payload, &ptd); 773 773 + priv_write_copy(priv, (u32 *)&ptd, hcd->regs + int_regs, sizeof(ptd)); 774 774 + enqueue_one_qtd(qtd, priv, payload); 775 775 + 776 776 + priv->int_ints[slot].urb = urb; 777 777 + priv->int_ints[slot].qh = qh; 778 778 + priv->int_ints[slot].qtd = qtd; 779 779 + priv->int_ints[slot].data_buffer = qtd->data_buffer; 780 780 + priv->int_ints[slot].payload = payload; 781 781 + qtd->status |= URB_ENQUEUED | URB_TYPE_INT; 782 782 + qtd->status |= slot << 16; 783 783 + } 784 784 + 785 785 + void enqueue_an_ATL_packet(struct usb_hcd *hcd, struct isp1760_qh *qh, 786 786 + struct isp1760_qtd *qtd) 787 787 + { 788 788 + struct isp1760_hcd *priv = hcd_to_priv(hcd); 789 789 + u32 skip_map, or_map; 790 790 + u32 queue_entry; 791 791 + u32 slot; 792 792 + u32 atl_regs, payload; 793 793 + u32 buffstatus; 794 794 + 795 795 + skip_map = isp1760_readl(hcd->regs + HC_ATL_PTD_SKIPMAP_REG); 796 796 + 797 797 + BUG_ON(!skip_map); 798 798 + slot = __ffs(skip_map); 799 799 + queue_entry = 1 << slot; 800 800 + 801 801 + atl_regs = ATL_REGS_OFFSET + slot * sizeof(struct ptd); 802 802 + 803 803 + payload = alloc_mem(priv, qtd->length); 804 804 + 805 805 + enqueue_one_atl_qtd(atl_regs, payload, priv, qh, qtd->urb, slot, qtd); 806 806 + 807 807 + or_map = isp1760_readl(hcd->regs + HC_ATL_IRQ_MASK_OR_REG); 808 808 + or_map |= queue_entry; 809 809 + isp1760_writel(or_map, hcd->regs + HC_ATL_IRQ_MASK_OR_REG); 810 810 + 811 811 + skip_map &= ~queue_entry; 812 812 + isp1760_writel(skip_map, hcd->regs + HC_ATL_PTD_SKIPMAP_REG); 813 813 + 814 814 + buffstatus = isp1760_readl(hcd->regs + HC_BUFFER_STATUS_REG); 815 815 + buffstatus |= ATL_BUFFER; 816 816 + isp1760_writel(buffstatus, hcd->regs + HC_BUFFER_STATUS_REG); 817 817 + } 818 818 + 819 819 + void enqueue_an_INT_packet(struct usb_hcd *hcd, struct isp1760_qh *qh, 820 820 + struct isp1760_qtd *qtd) 821 821 + { 822 822 + struct isp1760_hcd *priv = hcd_to_priv(hcd); 823 823 + u32 skip_map, or_map; 824 824 + u32 queue_entry; 825 825 + u32 slot; 826 826 + u32 int_regs, payload; 827 827 + u32 buffstatus; 828 828 + 829 829 + skip_map = isp1760_readl(hcd->regs + HC_INT_PTD_SKIPMAP_REG); 830 830 + 831 831 + BUG_ON(!skip_map); 832 832 + slot = __ffs(skip_map); 833 833 + queue_entry = 1 << slot; 834 834 + 835 835 + int_regs = INT_REGS_OFFSET + slot * sizeof(struct ptd); 836 836 + 837 837 + payload = alloc_mem(priv, qtd->length); 838 838 + 839 839 + enqueue_one_int_qtd(int_regs, payload, priv, qh, qtd->urb, slot, qtd); 840 840 + 841 841 + or_map = isp1760_readl(hcd->regs + HC_INT_IRQ_MASK_OR_REG); 842 842 + or_map |= queue_entry; 843 843 + isp1760_writel(or_map, hcd->regs + HC_INT_IRQ_MASK_OR_REG); 844 844 + 845 845 + skip_map &= ~queue_entry; 846 846 + isp1760_writel(skip_map, hcd->regs + HC_INT_PTD_SKIPMAP_REG); 847 847 + 848 848 + buffstatus = isp1760_readl(hcd->regs + HC_BUFFER_STATUS_REG); 849 849 + buffstatus |= INT_BUFFER; 850 850 + isp1760_writel(buffstatus, hcd->regs + HC_BUFFER_STATUS_REG); 851 851 + } 852 852 + 853 853 + static void isp1760_urb_done(struct isp1760_hcd *priv, struct urb *urb, int status) 854 854 + __releases(priv->lock) 855 855 + __acquires(priv->lock) 856 856 + { 857 857 + if (!urb->unlinked) { 858 858 + if (status == -EINPROGRESS) 859 859 + status = 0; 860 860 + } 861 861 + 862 862 + /* complete() can reenter this HCD */ 863 863 + usb_hcd_unlink_urb_from_ep(priv_to_hcd(priv), urb); 864 864 + spin_unlock(&priv->lock); 865 865 + usb_hcd_giveback_urb(priv_to_hcd(priv), urb, status); 866 866 + spin_lock(&priv->lock); 867 867 + } 868 868 + 869 869 + static void isp1760_qtd_free(struct isp1760_qtd *qtd) 870 870 + { 871 871 + kmem_cache_free(qtd_cachep, qtd); 872 872 + } 873 873 + 874 874 + static struct isp1760_qtd *clean_this_qtd(struct isp1760_qtd *qtd) 875 875 + { 876 876 + struct isp1760_qtd *tmp_qtd; 877 877 + 878 878 + tmp_qtd = qtd->hw_next; 879 879 + list_del(&qtd->qtd_list); 880 880 + isp1760_qtd_free(qtd); 881 881 + return tmp_qtd; 882 882 + } 883 883 + 884 884 + /* 885 885 + * Remove this QTD from the QH list and free its memory. If this QTD 886 886 + * isn't the last one than remove also his successor(s). 887 887 + * Returns the QTD which is part of an new URB and should be enqueued. 888 888 + */ 889 889 + static struct isp1760_qtd *clean_up_qtdlist(struct isp1760_qtd *qtd) 890 890 + { 891 891 + struct isp1760_qtd *tmp_qtd; 892 892 + int last_one; 893 893 + 894 894 + do { 895 895 + tmp_qtd = qtd->hw_next; 896 896 + last_one = qtd->status & URB_COMPLETE_NOTIFY; 897 897 + list_del(&qtd->qtd_list); 898 898 + isp1760_qtd_free(qtd); 899 899 + qtd = tmp_qtd; 900 900 + } while (!last_one && qtd); 901 901 + 902 902 + return qtd; 903 903 + } 904 904 + 905 905 + static void do_atl_int(struct usb_hcd *usb_hcd) 906 906 + { 907 907 + struct isp1760_hcd *priv = hcd_to_priv(usb_hcd); 908 908 + u32 done_map, skip_map; 909 909 + struct ptd ptd; 910 910 + struct urb *urb = NULL; 911 911 + u32 atl_regs_base; 912 912 + u32 atl_regs; 913 913 + u32 queue_entry; 914 914 + u32 payload; 915 915 + u32 length; 916 916 + u32 or_map; 917 917 + u32 status = -EINVAL; 918 918 + int error; 919 919 + struct isp1760_qtd *qtd; 920 920 + struct isp1760_qh *qh; 921 921 + u32 rl; 922 922 + u32 nakcount; 923 923 + 924 924 + done_map = isp1760_readl(usb_hcd->regs + 925 925 + HC_ATL_PTD_DONEMAP_REG); 926 926 + skip_map = isp1760_readl(usb_hcd->regs + 927 927 + HC_ATL_PTD_SKIPMAP_REG); 928 928 + 929 929 + or_map = isp1760_readl(usb_hcd->regs + HC_ATL_IRQ_MASK_OR_REG); 930 930 + or_map &= ~done_map; 931 931 + isp1760_writel(or_map, usb_hcd->regs + HC_ATL_IRQ_MASK_OR_REG); 932 932 + 933 933 + atl_regs_base = ATL_REGS_OFFSET; 934 934 + while (done_map) { 935 935 + u32 dw1; 936 936 + u32 dw2; 937 937 + u32 dw3; 938 938 + 939 939 + status = 0; 940 940 + 941 941 + queue_entry = __ffs(done_map); 942 942 + done_map &= ~(1 << queue_entry); 943 943 + skip_map |= 1 << queue_entry; 944 944 + 945 945 + atl_regs = atl_regs_base + queue_entry * sizeof(struct ptd); 946 946 + 947 947 + urb = priv->atl_ints[queue_entry].urb; 948 948 + qtd = priv->atl_ints[queue_entry].qtd; 949 949 + qh = priv->atl_ints[queue_entry].qh; 950 950 + payload = priv->atl_ints[queue_entry].payload; 951 951 + 952 952 + if (!qh) { 953 953 + printk(KERN_ERR "qh is 0\n"); 954 954 + continue; 955 955 + } 956 956 + priv_read_copy(priv, (u32 *)&ptd, usb_hcd->regs + atl_regs, 957 957 + atl_regs, sizeof(ptd)); 958 958 + 959 959 + dw1 = le32_to_cpu(ptd.dw1); 960 960 + dw2 = le32_to_cpu(ptd.dw2); 961 961 + dw3 = le32_to_cpu(ptd.dw3); 962 962 + rl = (dw2 >> 25) & 0x0f; 963 963 + nakcount = (dw3 >> 19) & 0xf; 964 964 + 965 965 + /* Transfer Error, *but* active and no HALT -> reload */ 966 966 + if ((dw3 & DW3_ERROR_BIT) && (dw3 & DW3_QTD_ACTIVE) && 967 967 + !(dw3 & DW3_HALT_BIT)) { 968 968 + 969 969 + /* according to ppriv code, we have to 970 970 + * reload this one if trasfered bytes != requested bytes 971 971 + * else act like everything went smooth.. 972 972 + * XXX This just doesn't feel right and hasn't 973 973 + * triggered so far. 974 974 + */ 975 975 + 976 976 + length = PTD_XFERRED_LENGTH(dw3); 977 977 + printk(KERN_ERR "Should reload now.... transfered %d " 978 978 + "of %zu\n", length, qtd->length); 979 979 + BUG(); 980 980 + } 981 981 + 982 982 + if (!nakcount && (dw3 & DW3_QTD_ACTIVE)) { 983 983 + u32 buffstatus; 984 984 + 985 985 + /* XXX 986 986 + * NAKs are handled in HW by the chip. Usually if the 987 987 + * device is not able to send data fast enough. 988 988 + * This did not trigger for a long time now. 989 989 + */ 990 990 + printk(KERN_ERR "Reloading ptd %p/%p... qh %p readed: " 991 991 + "%d of %d done: %08x cur: %08x\n", qtd, 992 992 + urb, qh, PTD_XFERRED_LENGTH(dw3), 993 993 + qtd->length, done_map, 994 994 + (1 << queue_entry)); 995 995 + 996 996 + /* RL counter = ERR counter */ 997 997 + dw3 &= ~(0xf << 19); 998 998 + dw3 |= rl << 19; 999 999 + dw3 &= ~(3 << (55 - 32)); 1000 1000 + dw3 |= ERR_COUNTER << (55 - 32); 1001 1001 + 1002 1002 + /* 1003 1003 + * It is not needed to write skip map back because it 1004 1004 + * is unchanged. Just make sure that this entry is 1005 1005 + * unskipped once it gets written to the HW. 1006 1006 + */ 1007 1007 + skip_map &= ~(1 << queue_entry); 1008 1008 + or_map = isp1760_readl(usb_hcd->regs + 1009 1009 + HC_ATL_IRQ_MASK_OR_REG); 1010 1010 + or_map |= 1 << queue_entry; 1011 1011 + isp1760_writel(or_map, usb_hcd->regs + 1012 1012 + HC_ATL_IRQ_MASK_OR_REG); 1013 1013 + 1014 1014 + ptd.dw3 = cpu_to_le32(dw3); 1015 1015 + priv_write_copy(priv, (u32 *)&ptd, usb_hcd->regs + 1016 1016 + atl_regs, sizeof(ptd)); 1017 1017 + 1018 1018 + ptd.dw0 |= __constant_cpu_to_le32(PTD_VALID); 1019 1019 + priv_write_copy(priv, (u32 *)&ptd, usb_hcd->regs + 1020 1020 + atl_regs, sizeof(ptd)); 1021 1021 + 1022 1022 + buffstatus = isp1760_readl(usb_hcd->regs + 1023 1023 + HC_BUFFER_STATUS_REG); 1024 1024 + buffstatus |= ATL_BUFFER; 1025 1025 + isp1760_writel(buffstatus, usb_hcd->regs + 1026 1026 + HC_BUFFER_STATUS_REG); 1027 1027 + continue; 1028 1028 + } 1029 1029 + 1030 1030 + error = check_error(&ptd); 1031 1031 + if (error) { 1032 1032 + status = error; 1033 1033 + priv->atl_ints[queue_entry].qh->toggle = 0; 1034 1034 + priv->atl_ints[queue_entry].qh->ping = 0; 1035 1035 + urb->status = -EPIPE; 1036 1036 + 1037 1037 + #if 0 1038 1038 + printk(KERN_ERR "Error in %s().\n", __func__); 1039 1039 + printk(KERN_ERR "IN dw0: %08x dw1: %08x dw2: %08x " 1040 1040 + "dw3: %08x dw4: %08x dw5: %08x dw6: " 1041 1041 + "%08x dw7: %08x\n", 1042 1042 + ptd.dw0, ptd.dw1, ptd.dw2, ptd.dw3, 1043 1043 + ptd.dw4, ptd.dw5, ptd.dw6, ptd.dw7); 1044 1044 + #endif 1045 1045 + } else { 1046 1046 + if (usb_pipetype(urb->pipe) == PIPE_BULK) { 1047 1047 + priv->atl_ints[queue_entry].qh->toggle = dw3 & 1048 1048 + (1 << 25); 1049 1049 + priv->atl_ints[queue_entry].qh->ping = dw3 & 1050 1050 + (1 << 26); 1051 1051 + } 1052 1052 + } 1053 1053 + 1054 1054 + length = PTD_XFERRED_LENGTH(dw3); 1055 1055 + if (length) { 1056 1056 + switch (DW1_GET_PID(dw1)) { 1057 1057 + case IN_PID: 1058 1058 + priv_read_copy(priv, 1059 1059 + priv->atl_ints[queue_entry].data_buffer, 1060 1060 + usb_hcd->regs + payload, payload, 1061 1061 + length); 1062 1062 + 1063 1063 + case OUT_PID: 1064 1064 + 1065 1065 + urb->actual_length += length; 1066 1066 + 1067 1067 + case SETUP_PID: 1068 1068 + break; 1069 1069 + } 1070 1070 + } 1071 1071 + 1072 1072 + priv->atl_ints[queue_entry].data_buffer = NULL; 1073 1073 + priv->atl_ints[queue_entry].urb = NULL; 1074 1074 + priv->atl_ints[queue_entry].qtd = NULL; 1075 1075 + priv->atl_ints[queue_entry].qh = NULL; 1076 1076 + 1077 1077 + free_mem(priv, payload); 1078 1078 + 1079 1079 + isp1760_writel(skip_map, usb_hcd->regs + 1080 1080 + HC_ATL_PTD_SKIPMAP_REG); 1081 1081 + 1082 1082 + if (urb->status == -EPIPE) { 1083 1083 + /* HALT was received */ 1084 1084 + 1085 1085 + qtd = clean_up_qtdlist(qtd); 1086 1086 + isp1760_urb_done(priv, urb, urb->status); 1087 1087 + 1088 1088 + } else if (usb_pipebulk(urb->pipe) && (length < qtd->length)) { 1089 1089 + /* short BULK received */ 1090 1090 + 1091 1091 + printk(KERN_ERR "short bulk, %d instead %d\n", length, 1092 1092 + qtd->length); 1093 1093 + if (urb->transfer_flags & URB_SHORT_NOT_OK) { 1094 1094 + urb->status = -EREMOTEIO; 1095 1095 + printk(KERN_ERR "not okey\n"); 1096 1096 + } 1097 1097 + 1098 1098 + if (urb->status == -EINPROGRESS) 1099 1099 + urb->status = 0; 1100 1100 + 1101 1101 + qtd = clean_up_qtdlist(qtd); 1102 1102 + 1103 1103 + isp1760_urb_done(priv, urb, urb->status); 1104 1104 + 1105 1105 + } else if (qtd->status & URB_COMPLETE_NOTIFY) { 1106 1106 + /* that was the last qtd of that URB */ 1107 1107 + 1108 1108 + if (urb->status == -EINPROGRESS) 1109 1109 + urb->status = 0; 1110 1110 + 1111 1111 + qtd = clean_this_qtd(qtd); 1112 1112 + isp1760_urb_done(priv, urb, urb->status); 1113 1113 + 1114 1114 + } else { 1115 1115 + /* next QTD of this URB */ 1116 1116 + 1117 1117 + qtd = clean_this_qtd(qtd); 1118 1118 + BUG_ON(!qtd); 1119 1119 + } 1120 1120 + 1121 1121 + if (qtd) 1122 1122 + enqueue_an_ATL_packet(usb_hcd, qh, qtd); 1123 1123 + 1124 1124 + skip_map = isp1760_readl(usb_hcd->regs + 1125 1125 + HC_ATL_PTD_SKIPMAP_REG); 1126 1126 + } 1127 1127 + } 1128 1128 + 1129 1129 + static void do_intl_int(struct usb_hcd *usb_hcd) 1130 1130 + { 1131 1131 + struct isp1760_hcd *priv = hcd_to_priv(usb_hcd); 1132 1132 + u32 done_map, skip_map; 1133 1133 + struct ptd ptd; 1134 1134 + struct urb *urb = NULL; 1135 1135 + u32 int_regs; 1136 1136 + u32 int_regs_base; 1137 1137 + u32 payload; 1138 1138 + u32 length; 1139 1139 + u32 or_map; 1140 1140 + int error; 1141 1141 + u32 queue_entry; 1142 1142 + struct isp1760_qtd *qtd; 1143 1143 + struct isp1760_qh *qh; 1144 1144 + 1145 1145 + done_map = isp1760_readl(usb_hcd->regs + 1146 1146 + HC_INT_PTD_DONEMAP_REG); 1147 1147 + skip_map = isp1760_readl(usb_hcd->regs + 1148 1148 + HC_INT_PTD_SKIPMAP_REG); 1149 1149 + 1150 1150 + or_map = isp1760_readl(usb_hcd->regs + HC_INT_IRQ_MASK_OR_REG); 1151 1151 + or_map &= ~done_map; 1152 1152 + isp1760_writel(or_map, usb_hcd->regs + HC_INT_IRQ_MASK_OR_REG); 1153 1153 + 1154 1154 + int_regs_base = INT_REGS_OFFSET; 1155 1155 + 1156 1156 + while (done_map) { 1157 1157 + u32 dw1; 1158 1158 + u32 dw3; 1159 1159 + 1160 1160 + queue_entry = __ffs(done_map); 1161 1161 + done_map &= ~(1 << queue_entry); 1162 1162 + skip_map |= 1 << queue_entry; 1163 1163 + 1164 1164 + int_regs = int_regs_base + queue_entry * sizeof(struct ptd); 1165 1165 + urb = priv->int_ints[queue_entry].urb; 1166 1166 + qtd = priv->int_ints[queue_entry].qtd; 1167 1167 + qh = priv->int_ints[queue_entry].qh; 1168 1168 + payload = priv->int_ints[queue_entry].payload; 1169 1169 + 1170 1170 + if (!qh) { 1171 1171 + printk(KERN_ERR "(INT) qh is 0\n"); 1172 1172 + continue; 1173 1173 + } 1174 1174 + 1175 1175 + priv_read_copy(priv, (u32 *)&ptd, usb_hcd->regs + int_regs, 1176 1176 + int_regs, sizeof(ptd)); 1177 1177 + dw1 = le32_to_cpu(ptd.dw1); 1178 1178 + dw3 = le32_to_cpu(ptd.dw3); 1179 1179 + check_int_err_status(le32_to_cpu(ptd.dw4)); 1180 1180 + 1181 1181 + error = check_error(&ptd); 1182 1182 + if (error) { 1183 1183 + #if 0 1184 1184 + printk(KERN_ERR "Error in %s().\n", __func__); 1185 1185 + printk(KERN_ERR "IN dw0: %08x dw1: %08x dw2: %08x " 1186 1186 + "dw3: %08x dw4: %08x dw5: %08x dw6: " 1187 1187 + "%08x dw7: %08x\n", 1188 1188 + ptd.dw0, ptd.dw1, ptd.dw2, ptd.dw3, 1189 1189 + ptd.dw4, ptd.dw5, ptd.dw6, ptd.dw7); 1190 1190 + #endif 1191 1191 + urb->status = -EPIPE; 1192 1192 + priv->int_ints[queue_entry].qh->toggle = 0; 1193 1193 + priv->int_ints[queue_entry].qh->ping = 0; 1194 1194 + 1195 1195 + } else { 1196 1196 + priv->int_ints[queue_entry].qh->toggle = 1197 1197 + dw3 & (1 << 25); 1198 1198 + priv->int_ints[queue_entry].qh->ping = dw3 & (1 << 26); 1199 1199 + } 1200 1200 + 1201 1201 + if (urb->dev->speed != USB_SPEED_HIGH) 1202 1202 + length = PTD_XFERRED_LENGTH_LO(dw3); 1203 1203 + else 1204 1204 + length = PTD_XFERRED_LENGTH(dw3); 1205 1205 + 1206 1206 + if (length) { 1207 1207 + switch (DW1_GET_PID(dw1)) { 1208 1208 + case IN_PID: 1209 1209 + priv_read_copy(priv, 1210 1210 + priv->int_ints[queue_entry].data_buffer, 1211 1211 + usb_hcd->regs + payload , payload, 1212 1212 + length); 1213 1213 + case OUT_PID: 1214 1214 + 1215 1215 + urb->actual_length += length; 1216 1216 + 1217 1217 + case SETUP_PID: 1218 1218 + break; 1219 1219 + } 1220 1220 + } 1221 1221 + 1222 1222 + priv->int_ints[queue_entry].data_buffer = NULL; 1223 1223 + priv->int_ints[queue_entry].urb = NULL; 1224 1224 + priv->int_ints[queue_entry].qtd = NULL; 1225 1225 + priv->int_ints[queue_entry].qh = NULL; 1226 1226 + 1227 1227 + isp1760_writel(skip_map, usb_hcd->regs + 1228 1228 + HC_INT_PTD_SKIPMAP_REG); 1229 1229 + free_mem(priv, payload); 1230 1230 + 1231 1231 + if (urb->status == -EPIPE) { 1232 1232 + /* HALT received */ 1233 1233 + 1234 1234 + qtd = clean_up_qtdlist(qtd); 1235 1235 + isp1760_urb_done(priv, urb, urb->status); 1236 1236 + 1237 1237 + } else if (qtd->status & URB_COMPLETE_NOTIFY) { 1238 1238 + 1239 1239 + if (urb->status == -EINPROGRESS) 1240 1240 + urb->status = 0; 1241 1241 + 1242 1242 + qtd = clean_this_qtd(qtd); 1243 1243 + isp1760_urb_done(priv, urb, urb->status); 1244 1244 + 1245 1245 + } else { 1246 1246 + /* next QTD of this URB */ 1247 1247 + 1248 1248 + qtd = clean_this_qtd(qtd); 1249 1249 + BUG_ON(!qtd); 1250 1250 + } 1251 1251 + 1252 1252 + if (qtd) 1253 1253 + enqueue_an_INT_packet(usb_hcd, qh, qtd); 1254 1254 + 1255 1255 + skip_map = isp1760_readl(usb_hcd->regs + 1256 1256 + HC_INT_PTD_SKIPMAP_REG); 1257 1257 + } 1258 1258 + } 1259 1259 + 1260 1260 + #define max_packet(wMaxPacketSize) ((wMaxPacketSize) & 0x07ff) 1261 1261 + static struct isp1760_qh *qh_make(struct isp1760_hcd *priv, struct urb *urb, 1262 1262 + gfp_t flags) 1263 1263 + { 1264 1264 + struct isp1760_qh *qh; 1265 1265 + int is_input, type; 1266 1266 + 1267 1267 + qh = isp1760_qh_alloc(priv, flags); 1268 1268 + if (!qh) 1269 1269 + return qh; 1270 1270 + 1271 1271 + /* 1272 1272 + * init endpoint/device data for this QH 1273 1273 + */ 1274 1274 + is_input = usb_pipein(urb->pipe); 1275 1275 + type = usb_pipetype(urb->pipe); 1276 1276 + 1277 1277 + if (type == PIPE_INTERRUPT) { 1278 1278 + 1279 1279 + if (urb->dev->speed == USB_SPEED_HIGH) { 1280 1280 + 1281 1281 + qh->period = urb->interval >> 3; 1282 1282 + if (qh->period == 0 && urb->interval != 1) { 1283 1283 + /* NOTE interval 2 or 4 uframes could work. 1284 1284 + * But interval 1 scheduling is simpler, and 1285 1285 + * includes high bandwidth. 1286 1286 + */ 1287 1287 + printk(KERN_ERR "intr period %d uframes, NYET!", 1288 1288 + urb->interval); 1289 1289 + qh_destroy(qh); 1290 1290 + return NULL; 1291 1291 + } 1292 1292 + } else { 1293 1293 + qh->period = urb->interval; 1294 1294 + } 1295 1295 + } 1296 1296 + 1297 1297 + /* support for tt scheduling, and access to toggles */ 1298 1298 + qh->dev = urb->dev; 1299 1299 + 1300 1300 + if (!usb_pipecontrol(urb->pipe)) 1301 1301 + usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe), !is_input, 1302 1302 + 1); 1303 1303 + return qh; 1304 1304 + } 1305 1305 + 1306 1306 + /* 1307 1307 + * For control/bulk/interrupt, return QH with these TDs appended. 1308 1308 + * Allocates and initializes the QH if necessary. 1309 1309 + * Returns null if it can't allocate a QH it needs to. 1310 1310 + * If the QH has TDs (urbs) already, that's great. 1311 1311 + */ 1312 1312 + static struct isp1760_qh *qh_append_tds(struct isp1760_hcd *priv, 1313 1313 + struct urb *urb, struct list_head *qtd_list, int epnum, 1314 1314 + void **ptr) 1315 1315 + { 1316 1316 + struct isp1760_qh *qh; 1317 1317 + struct isp1760_qtd *qtd; 1318 1318 + struct isp1760_qtd *prev_qtd; 1319 1319 + 1320 1320 + qh = (struct isp1760_qh *)*ptr; 1321 1321 + if (!qh) { 1322 1322 + /* can't sleep here, we have priv->lock... */ 1323 1323 + qh = qh_make(priv, urb, GFP_ATOMIC); 1324 1324 + if (!qh) 1325 1325 + return qh; 1326 1326 + *ptr = qh; 1327 1327 + } 1328 1328 + 1329 1329 + qtd = list_entry(qtd_list->next, struct isp1760_qtd, 1330 1330 + qtd_list); 1331 1331 + if (!list_empty(&qh->qtd_list)) 1332 1332 + prev_qtd = list_entry(qh->qtd_list.prev, 1333 1333 + struct isp1760_qtd, qtd_list); 1334 1334 + else 1335 1335 + prev_qtd = NULL; 1336 1336 + 1337 1337 + list_splice(qtd_list, qh->qtd_list.prev); 1338 1338 + if (prev_qtd) { 1339 1339 + BUG_ON(prev_qtd->hw_next); 1340 1340 + prev_qtd->hw_next = qtd; 1341 1341 + } 1342 1342 + 1343 1343 + urb->hcpriv = qh; 1344 1344 + return qh; 1345 1345 + } 1346 1346 + 1347 1347 + static void qtd_list_free(struct isp1760_hcd *priv, struct urb *urb, 1348 1348 + struct list_head *qtd_list) 1349 1349 + { 1350 1350 + struct list_head *entry, *temp; 1351 1351 + 1352 1352 + list_for_each_safe(entry, temp, qtd_list) { 1353 1353 + struct isp1760_qtd *qtd; 1354 1354 + 1355 1355 + qtd = list_entry(entry, struct isp1760_qtd, qtd_list); 1356 1356 + list_del(&qtd->qtd_list); 1357 1357 + isp1760_qtd_free(qtd); 1358 1358 + } 1359 1359 + } 1360 1360 + 1361 1361 + static int isp1760_prepare_enqueue(struct isp1760_hcd *priv, struct urb *urb, 1362 1362 + struct list_head *qtd_list, gfp_t mem_flags, packet_enqueue *p) 1363 1363 + { 1364 1364 + struct isp1760_qtd *qtd; 1365 1365 + int epnum; 1366 1366 + unsigned long flags; 1367 1367 + struct isp1760_qh *qh = NULL; 1368 1368 + int rc; 1369 1369 + int qh_busy; 1370 1370 + 1371 1371 + qtd = list_entry(qtd_list->next, struct isp1760_qtd, qtd_list); 1372 1372 + epnum = urb->ep->desc.bEndpointAddress; 1373 1373 + 1374 1374 + spin_lock_irqsave(&priv->lock, flags); 1375 1375 + if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &priv_to_hcd(priv)->flags)) { 1376 1376 + rc = -ESHUTDOWN; 1377 1377 + goto done; 1378 1378 + } 1379 1379 + rc = usb_hcd_link_urb_to_ep(priv_to_hcd(priv), urb); 1380 1380 + if (rc) 1381 1381 + goto done; 1382 1382 + 1383 1383 + qh = urb->ep->hcpriv; 1384 1384 + if (qh) 1385 1385 + qh_busy = !list_empty(&qh->qtd_list); 1386 1386 + else 1387 1387 + qh_busy = 0; 1388 1388 + 1389 1389 + qh = qh_append_tds(priv, urb, qtd_list, epnum, &urb->ep->hcpriv); 1390 1390 + if (!qh) { 1391 1391 + usb_hcd_unlink_urb_from_ep(priv_to_hcd(priv), urb); 1392 1392 + rc = -ENOMEM; 1393 1393 + goto done; 1394 1394 + } 1395 1395 + 1396 1396 + if (!qh_busy) 1397 1397 + p(priv_to_hcd(priv), qh, qtd); 1398 1398 + 1399 1399 + done: 1400 1400 + spin_unlock_irqrestore(&priv->lock, flags); 1401 1401 + if (!qh) 1402 1402 + qtd_list_free(priv, urb, qtd_list); 1403 1403 + return rc; 1404 1404 + } 1405 1405 + 1406 1406 + static struct isp1760_qtd *isp1760_qtd_alloc(struct isp1760_hcd *priv, 1407 1407 + gfp_t flags) 1408 1408 + { 1409 1409 + struct isp1760_qtd *qtd; 1410 1410 + 1411 1411 + qtd = kmem_cache_zalloc(qtd_cachep, flags); 1412 1412 + if (qtd) 1413 1413 + INIT_LIST_HEAD(&qtd->qtd_list); 1414 1414 + 1415 1415 + return qtd; 1416 1416 + } 1417 1417 + 1418 1418 + /* 1419 1419 + * create a list of filled qtds for this URB; won't link into qh. 1420 1420 + */ 1421 1421 + static struct list_head *qh_urb_transaction(struct isp1760_hcd *priv, 1422 1422 + struct urb *urb, struct list_head *head, gfp_t flags) 1423 1423 + { 1424 1424 + struct isp1760_qtd *qtd, *qtd_prev; 1425 1425 + void *buf; 1426 1426 + int len, maxpacket; 1427 1427 + int is_input; 1428 1428 + u32 token; 1429 1429 + 1430 1430 + /* 1431 1431 + * URBs map to sequences of QTDs: one logical transaction 1432 1432 + */ 1433 1433 + qtd = isp1760_qtd_alloc(priv, flags); 1434 1434 + if (!qtd) 1435 1435 + return NULL; 1436 1436 + 1437 1437 + list_add_tail(&qtd->qtd_list, head); 1438 1438 + qtd->urb = urb; 1439 1439 + urb->status = -EINPROGRESS; 1440 1440 + 1441 1441 + token = 0; 1442 1442 + /* for split transactions, SplitXState initialized to zero */ 1443 1443 + 1444 1444 + len = urb->transfer_buffer_length; 1445 1445 + is_input = usb_pipein(urb->pipe); 1446 1446 + if (usb_pipecontrol(urb->pipe)) { 1447 1447 + /* SETUP pid */ 1448 1448 + qtd_fill(qtd, urb->setup_packet, 1449 1449 + sizeof(struct usb_ctrlrequest), 1450 1450 + token | SETUP_PID); 1451 1451 + 1452 1452 + /* ... and always at least one more pid */ 1453 1453 + token ^= DATA_TOGGLE; 1454 1454 + qtd_prev = qtd; 1455 1455 + qtd = isp1760_qtd_alloc(priv, flags); 1456 1456 + if (!qtd) 1457 1457 + goto cleanup; 1458 1458 + qtd->urb = urb; 1459 1459 + qtd_prev->hw_next = qtd; 1460 1460 + list_add_tail(&qtd->qtd_list, head); 1461 1461 + 1462 1462 + /* for zero length DATA stages, STATUS is always IN */ 1463 1463 + if (len == 0) 1464 1464 + token |= IN_PID; 1465 1465 + } 1466 1466 + 1467 1467 + /* 1468 1468 + * data transfer stage: buffer setup 1469 1469 + */ 1470 1470 + buf = urb->transfer_buffer; 1471 1471 + 1472 1472 + if (is_input) 1473 1473 + token |= IN_PID; 1474 1474 + else 1475 1475 + token |= OUT_PID; 1476 1476 + 1477 1477 + maxpacket = max_packet(usb_maxpacket(urb->dev, urb->pipe, !is_input)); 1478 1478 + 1479 1479 + /* 1480 1480 + * buffer gets wrapped in one or more qtds; 1481 1481 + * last one may be "short" (including zero len) 1482 1482 + * and may serve as a control status ack 1483 1483 + */ 1484 1484 + for (;;) { 1485 1485 + int this_qtd_len; 1486 1486 + 1487 1487 + if (!buf && len) { 1488 1488 + /* XXX This looks like usb storage / SCSI bug */ 1489 1489 + printk(KERN_ERR "buf is null, dma is %08lx len is %d\n", 1490 1490 + (long unsigned)urb->transfer_dma, len); 1491 1491 + WARN_ON(1); 1492 1492 + } 1493 1493 + 1494 1494 + this_qtd_len = qtd_fill(qtd, buf, len, token); 1495 1495 + len -= this_qtd_len; 1496 1496 + buf += this_qtd_len; 1497 1497 + 1498 1498 + /* qh makes control packets use qtd toggle; maybe switch it */ 1499 1499 + if ((maxpacket & (this_qtd_len + (maxpacket - 1))) == 0) 1500 1500 + token ^= DATA_TOGGLE; 1501 1501 + 1502 1502 + if (len <= 0) 1503 1503 + break; 1504 1504 + 1505 1505 + qtd_prev = qtd; 1506 1506 + qtd = isp1760_qtd_alloc(priv, flags); 1507 1507 + if (!qtd) 1508 1508 + goto cleanup; 1509 1509 + qtd->urb = urb; 1510 1510 + qtd_prev->hw_next = qtd; 1511 1511 + list_add_tail(&qtd->qtd_list, head); 1512 1512 + } 1513 1513 + 1514 1514 + /* 1515 1515 + * control requests may need a terminating data "status" ack; 1516 1516 + * bulk ones may need a terminating short packet (zero length). 1517 1517 + */ 1518 1518 + if (urb->transfer_buffer_length != 0) { 1519 1519 + int one_more = 0; 1520 1520 + 1521 1521 + if (usb_pipecontrol(urb->pipe)) { 1522 1522 + one_more = 1; 1523 1523 + /* "in" <--> "out" */ 1524 1524 + token ^= IN_PID; 1525 1525 + /* force DATA1 */ 1526 1526 + token |= DATA_TOGGLE; 1527 1527 + } else if (usb_pipebulk(urb->pipe) 1528 1528 + && (urb->transfer_flags & URB_ZERO_PACKET) 1529 1529 + && !(urb->transfer_buffer_length % maxpacket)) { 1530 1530 + one_more = 1; 1531 1531 + } 1532 1532 + if (one_more) { 1533 1533 + qtd_prev = qtd; 1534 1534 + qtd = isp1760_qtd_alloc(priv, flags); 1535 1535 + if (!qtd) 1536 1536 + goto cleanup; 1537 1537 + qtd->urb = urb; 1538 1538 + qtd_prev->hw_next = qtd; 1539 1539 + list_add_tail(&qtd->qtd_list, head); 1540 1540 + 1541 1541 + /* never any data in such packets */ 1542 1542 + qtd_fill(qtd, NULL, 0, token); 1543 1543 + } 1544 1544 + } 1545 1545 + 1546 1546 + qtd->status = URB_COMPLETE_NOTIFY; 1547 1547 + return head; 1548 1548 + 1549 1549 + cleanup: 1550 1550 + qtd_list_free(priv, urb, head); 1551 1551 + return NULL; 1552 1552 + } 1553 1553 + 1554 1554 + static int isp1760_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, 1555 1555 + gfp_t mem_flags) 1556 1556 + { 1557 1557 + struct isp1760_hcd *priv = hcd_to_priv(hcd); 1558 1558 + struct list_head qtd_list; 1559 1559 + packet_enqueue *pe; 1560 1560 + 1561 1561 + INIT_LIST_HEAD(&qtd_list); 1562 1562 + 1563 1563 + switch (usb_pipetype(urb->pipe)) { 1564 1564 + case PIPE_CONTROL: 1565 1565 + case PIPE_BULK: 1566 1566 + 1567 1567 + if (!qh_urb_transaction(priv, urb, &qtd_list, mem_flags)) 1568 1568 + return -ENOMEM; 1569 1569 + pe = enqueue_an_ATL_packet; 1570 1570 + break; 1571 1571 + 1572 1572 + case PIPE_INTERRUPT: 1573 1573 + if (!qh_urb_transaction(priv, urb, &qtd_list, mem_flags)) 1574 1574 + return -ENOMEM; 1575 1575 + pe = enqueue_an_INT_packet; 1576 1576 + break; 1577 1577 + 1578 1578 + case PIPE_ISOCHRONOUS: 1579 1579 + printk(KERN_ERR "PIPE_ISOCHRONOUS ain't supported\n"); 1580 1580 + default: 1581 1581 + return -EPIPE; 1582 1582 + } 1583 1583 + 1584 1584 + isp1760_prepare_enqueue(priv, urb, &qtd_list, mem_flags, pe); 1585 1585 + return 0; 1586 1586 + } 1587 1587 + 1588 1588 + static int isp1760_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, 1589 1589 + int status) 1590 1590 + { 1591 1591 + struct isp1760_hcd *priv = hcd_to_priv(hcd); 1592 1592 + struct inter_packet_info *ints; 1593 1593 + u32 i; 1594 1594 + u32 reg_base, or_reg, skip_reg; 1595 1595 + int flags; 1596 1596 + struct ptd ptd; 1597 1597 + 1598 1598 + switch (usb_pipetype(urb->pipe)) { 1599 1599 + case PIPE_ISOCHRONOUS: 1600 1600 + return -EPIPE; 1601 1601 + break; 1602 1602 + 1603 1603 + case PIPE_INTERRUPT: 1604 1604 + ints = priv->int_ints; 1605 1605 + reg_base = INT_REGS_OFFSET; 1606 1606 + or_reg = HC_INT_IRQ_MASK_OR_REG; 1607 1607 + skip_reg = HC_INT_PTD_SKIPMAP_REG; 1608 1608 + break; 1609 1609 + 1610 1610 + default: 1611 1611 + ints = priv->atl_ints; 1612 1612 + reg_base = ATL_REGS_OFFSET; 1613 1613 + or_reg = HC_ATL_IRQ_MASK_OR_REG; 1614 1614 + skip_reg = HC_ATL_PTD_SKIPMAP_REG; 1615 1615 + break; 1616 1616 + } 1617 1617 + 1618 1618 + memset(&ptd, 0, sizeof(ptd)); 1619 1619 + spin_lock_irqsave(&priv->lock, flags); 1620 1620 + 1621 1621 + for (i = 0; i < 32; i++) { 1622 1622 + if (ints->urb == urb) { 1623 1623 + u32 skip_map; 1624 1624 + u32 or_map; 1625 1625 + struct isp1760_qtd *qtd; 1626 1626 + 1627 1627 + skip_map = isp1760_readl(hcd->regs + skip_reg); 1628 1628 + skip_map |= 1 << i; 1629 1629 + isp1760_writel(skip_map, hcd->regs + skip_reg); 1630 1630 + 1631 1631 + or_map = isp1760_readl(hcd->regs + or_reg); 1632 1632 + or_map &= ~(1 << i); 1633 1633 + isp1760_writel(or_map, hcd->regs + or_reg); 1634 1634 + 1635 1635 + priv_write_copy(priv, (u32 *)&ptd, hcd->regs + reg_base 1636 1636 + + i * sizeof(ptd), sizeof(ptd)); 1637 1637 + qtd = ints->qtd; 1638 1638 + 1639 1639 + clean_up_qtdlist(qtd); 1640 1640 + 1641 1641 + free_mem(priv, ints->payload); 1642 1642 + 1643 1643 + ints->urb = NULL; 1644 1644 + ints->qh = NULL; 1645 1645 + ints->qtd = NULL; 1646 1646 + ints->data_buffer = NULL; 1647 1647 + ints->payload = 0; 1648 1648 + 1649 1649 + isp1760_urb_done(priv, urb, status); 1650 1650 + break; 1651 1651 + } 1652 1652 + ints++; 1653 1653 + } 1654 1654 + 1655 1655 + spin_unlock_irqrestore(&priv->lock, flags); 1656 1656 + return 0; 1657 1657 + } 1658 1658 + 1659 1659 + static irqreturn_t isp1760_irq(struct usb_hcd *usb_hcd) 1660 1660 + { 1661 1661 + struct isp1760_hcd *priv = hcd_to_priv(usb_hcd); 1662 1662 + u32 imask; 1663 1663 + irqreturn_t irqret = IRQ_NONE; 1664 1664 + 1665 1665 + spin_lock(&priv->lock); 1666 1666 + 1667 1667 + if (!(usb_hcd->state & HC_STATE_RUNNING)) 1668 1668 + goto leave; 1669 1669 + 1670 1670 + imask = isp1760_readl(usb_hcd->regs + HC_INTERRUPT_REG); 1671 1671 + if (unlikely(!imask)) 1672 1672 + goto leave; 1673 1673 + 1674 1674 + isp1760_writel(imask, usb_hcd->regs + HC_INTERRUPT_REG); 1675 1675 + if (imask & HC_ATL_INT) 1676 1676 + do_atl_int(usb_hcd); 1677 1677 + 1678 1678 + if (imask & HC_INTL_INT) 1679 1679 + do_intl_int(usb_hcd); 1680 1680 + 1681 1681 + irqret = IRQ_HANDLED; 1682 1682 + leave: 1683 1683 + spin_unlock(&priv->lock); 1684 1684 + return irqret; 1685 1685 + } 1686 1686 + 1687 1687 + static int isp1760_hub_status_data(struct usb_hcd *hcd, char *buf) 1688 1688 + { 1689 1689 + struct isp1760_hcd *priv = hcd_to_priv(hcd); 1690 1690 + u32 temp, status = 0; 1691 1691 + u32 mask; 1692 1692 + int retval = 1; 1693 1693 + unsigned long flags; 1694 1694 + 1695 1695 + /* if !USB_SUSPEND, root hub timers won't get shut down ... */ 1696 1696 + if (!HC_IS_RUNNING(hcd->state)) 1697 1697 + return 0; 1698 1698 + 1699 1699 + /* init status to no-changes */ 1700 1700 + buf[0] = 0; 1701 1701 + mask = PORT_CSC; 1702 1702 + 1703 1703 + spin_lock_irqsave(&priv->lock, flags); 1704 1704 + temp = isp1760_readl(hcd->regs + HC_PORTSC1); 1705 1705 + 1706 1706 + if (temp & PORT_OWNER) { 1707 1707 + if (temp & PORT_CSC) { 1708 1708 + temp &= ~PORT_CSC; 1709 1709 + isp1760_writel(temp, hcd->regs + HC_PORTSC1); 1710 1710 + goto done; 1711 1711 + } 1712 1712 + } 1713 1713 + 1714 1714 + /* 1715 1715 + * Return status information even for ports with OWNER set. 1716 1716 + * Otherwise khubd wouldn't see the disconnect event when a 1717 1717 + * high-speed device is switched over to the companion 1718 1718 + * controller by the user. 1719 1719 + */ 1720 1720 + 1721 1721 + if ((temp & mask) != 0 1722 1722 + || ((temp & PORT_RESUME) != 0 1723 1723 + && time_after_eq(jiffies, 1724 1724 + priv->reset_done))) { 1725 1725 + buf [0] |= 1 << (0 + 1); 1726 1726 + status = STS_PCD; 1727 1727 + } 1728 1728 + /* FIXME autosuspend idle root hubs */ 1729 1729 + done: 1730 1730 + spin_unlock_irqrestore(&priv->lock, flags); 1731 1731 + return status ? retval : 0; 1732 1732 + } 1733 1733 + 1734 1734 + static void isp1760_hub_descriptor(struct isp1760_hcd *priv, 1735 1735 + struct usb_hub_descriptor *desc) 1736 1736 + { 1737 1737 + int ports = HCS_N_PORTS(priv->hcs_params); 1738 1738 + u16 temp; 1739 1739 + 1740 1740 + desc->bDescriptorType = 0x29; 1741 1741 + /* priv 1.0, 2.3.9 says 20ms max */ 1742 1742 + desc->bPwrOn2PwrGood = 10; 1743 1743 + desc->bHubContrCurrent = 0; 1744 1744 + 1745 1745 + desc->bNbrPorts = ports; 1746 1746 + temp = 1 + (ports / 8); 1747 1747 + desc->bDescLength = 7 + 2 * temp; 1748 1748 + 1749 1749 + /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */ 1750 1750 + memset(&desc->bitmap[0], 0, temp); 1751 1751 + memset(&desc->bitmap[temp], 0xff, temp); 1752 1752 + 1753 1753 + /* per-port overcurrent reporting */ 1754 1754 + temp = 0x0008; 1755 1755 + if (HCS_PPC(priv->hcs_params)) 1756 1756 + /* per-port power control */ 1757 1757 + temp |= 0x0001; 1758 1758 + else 1759 1759 + /* no power switching */ 1760 1760 + temp |= 0x0002; 1761 1761 + desc->wHubCharacteristics = cpu_to_le16(temp); 1762 1762 + } 1763 1763 + 1764 1764 + #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E) 1765 1765 + 1766 1766 + static int check_reset_complete(struct isp1760_hcd *priv, int index, 1767 1767 + u32 __iomem *status_reg, int port_status) 1768 1768 + { 1769 1769 + if (!(port_status & PORT_CONNECT)) 1770 1770 + return port_status; 1771 1771 + 1772 1772 + /* if reset finished and it's still not enabled -- handoff */ 1773 1773 + if (!(port_status & PORT_PE)) { 1774 1774 + 1775 1775 + printk(KERN_ERR "port %d full speed --> companion\n", 1776 1776 + index + 1); 1777 1777 + 1778 1778 + port_status |= PORT_OWNER; 1779 1779 + port_status &= ~PORT_RWC_BITS; 1780 1780 + isp1760_writel(port_status, status_reg); 1781 1781 + 1782 1782 + } else 1783 1783 + printk(KERN_ERR "port %d high speed\n", index + 1); 1784 1784 + 1785 1785 + return port_status; 1786 1786 + } 1787 1787 + 1788 1788 + static int isp1760_hub_control(struct usb_hcd *hcd, u16 typeReq, 1789 1789 + u16 wValue, u16 wIndex, char *buf, u16 wLength) 1790 1790 + { 1791 1791 + struct isp1760_hcd *priv = hcd_to_priv(hcd); 1792 1792 + int ports = HCS_N_PORTS(priv->hcs_params); 1793 1793 + u32 __iomem *status_reg = hcd->regs + HC_PORTSC1; 1794 1794 + u32 temp, status; 1795 1795 + unsigned long flags; 1796 1796 + int retval = 0; 1797 1797 + unsigned selector; 1798 1798 + 1799 1799 + /* 1800 1800 + * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR. 1801 1801 + * HCS_INDICATOR may say we can change LEDs to off/amber/green. 1802 1802 + * (track current state ourselves) ... blink for diagnostics, 1803 1803 + * power, "this is the one", etc. EHCI spec supports this. 1804 1804 + */ 1805 1805 + 1806 1806 + spin_lock_irqsave(&priv->lock, flags); 1807 1807 + switch (typeReq) { 1808 1808 + case ClearHubFeature: 1809 1809 + switch (wValue) { 1810 1810 + case C_HUB_LOCAL_POWER: 1811 1811 + case C_HUB_OVER_CURRENT: 1812 1812 + /* no hub-wide feature/status flags */ 1813 1813 + break; 1814 1814 + default: 1815 1815 + goto error; 1816 1816 + } 1817 1817 + break; 1818 1818 + case ClearPortFeature: 1819 1819 + if (!wIndex || wIndex > ports) 1820 1820 + goto error; 1821 1821 + wIndex--; 1822 1822 + temp = isp1760_readl(status_reg); 1823 1823 + 1824 1824 + /* 1825 1825 + * Even if OWNER is set, so the port is owned by the 1826 1826 + * companion controller, khubd needs to be able to clear 1827 1827 + * the port-change status bits (especially 1828 1828 + * USB_PORT_FEAT_C_CONNECTION). 1829 1829 + */ 1830 1830 + 1831 1831 + switch (wValue) { 1832 1832 + case USB_PORT_FEAT_ENABLE: 1833 1833 + isp1760_writel(temp & ~PORT_PE, status_reg); 1834 1834 + break; 1835 1835 + case USB_PORT_FEAT_C_ENABLE: 1836 1836 + /* XXX error? */ 1837 1837 + break; 1838 1838 + case USB_PORT_FEAT_SUSPEND: 1839 1839 + if (temp & PORT_RESET) 1840 1840 + goto error; 1841 1841 + 1842 1842 + if (temp & PORT_SUSPEND) { 1843 1843 + if ((temp & PORT_PE) == 0) 1844 1844 + goto error; 1845 1845 + /* resume signaling for 20 msec */ 1846 1846 + temp &= ~(PORT_RWC_BITS); 1847 1847 + isp1760_writel(temp | PORT_RESUME, 1848 1848 + status_reg); 1849 1849 + priv->reset_done = jiffies + 1850 1850 + msecs_to_jiffies(20); 1851 1851 + } 1852 1852 + break; 1853 1853 + case USB_PORT_FEAT_C_SUSPEND: 1854 1854 + /* we auto-clear this feature */ 1855 1855 + break; 1856 1856 + case USB_PORT_FEAT_POWER: 1857 1857 + if (HCS_PPC(priv->hcs_params)) 1858 1858 + isp1760_writel(temp & ~PORT_POWER, status_reg); 1859 1859 + break; 1860 1860 + case USB_PORT_FEAT_C_CONNECTION: 1861 1861 + isp1760_writel(temp | PORT_CSC, 1862 1862 + status_reg); 1863 1863 + break; 1864 1864 + case USB_PORT_FEAT_C_OVER_CURRENT: 1865 1865 + /* XXX error ?*/ 1866 1866 + break; 1867 1867 + case USB_PORT_FEAT_C_RESET: 1868 1868 + /* GetPortStatus clears reset */ 1869 1869 + break; 1870 1870 + default: 1871 1871 + goto error; 1872 1872 + } 1873 1873 + isp1760_readl(hcd->regs + HC_USBCMD); 1874 1874 + break; 1875 1875 + case GetHubDescriptor: 1876 1876 + isp1760_hub_descriptor(priv, (struct usb_hub_descriptor *) 1877 1877 + buf); 1878 1878 + break; 1879 1879 + case GetHubStatus: 1880 1880 + /* no hub-wide feature/status flags */ 1881 1881 + memset(buf, 0, 4); 1882 1882 + break; 1883 1883 + case GetPortStatus: 1884 1884 + if (!wIndex || wIndex > ports) 1885 1885 + goto error; 1886 1886 + wIndex--; 1887 1887 + status = 0; 1888 1888 + temp = isp1760_readl(status_reg); 1889 1889 + 1890 1890 + /* wPortChange bits */ 1891 1891 + if (temp & PORT_CSC) 1892 1892 + status |= 1 << USB_PORT_FEAT_C_CONNECTION; 1893 1893 + 1894 1894 + 1895 1895 + /* whoever resumes must GetPortStatus to complete it!! */ 1896 1896 + if (temp & PORT_RESUME) { 1897 1897 + printk(KERN_ERR "Port resume should be skipped.\n"); 1898 1898 + 1899 1899 + /* Remote Wakeup received? */ 1900 1900 + if (!priv->reset_done) { 1901 1901 + /* resume signaling for 20 msec */ 1902 1902 + priv->reset_done = jiffies 1903 1903 + + msecs_to_jiffies(20); 1904 1904 + /* check the port again */ 1905 1905 + mod_timer(&priv_to_hcd(priv)->rh_timer, 1906 1906 + priv->reset_done); 1907 1907 + } 1908 1908 + 1909 1909 + /* resume completed? */ 1910 1910 + else if (time_after_eq(jiffies, 1911 1911 + priv->reset_done)) { 1912 1912 + status |= 1 << USB_PORT_FEAT_C_SUSPEND; 1913 1913 + priv->reset_done = 0; 1914 1914 + 1915 1915 + /* stop resume signaling */ 1916 1916 + temp = isp1760_readl(status_reg); 1917 1917 + isp1760_writel( 1918 1918 + temp & ~(PORT_RWC_BITS | PORT_RESUME), 1919 1919 + status_reg); 1920 1920 + retval = handshake(priv, status_reg, 1921 1921 + PORT_RESUME, 0, 2000 /* 2msec */); 1922 1922 + if (retval != 0) { 1923 1923 + isp1760_err(priv, 1924 1924 + "port %d resume error %d\n", 1925 1925 + wIndex + 1, retval); 1926 1926 + goto error; 1927 1927 + } 1928 1928 + temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10)); 1929 1929 + } 1930 1930 + } 1931 1931 + 1932 1932 + /* whoever resets must GetPortStatus to complete it!! */ 1933 1933 + if ((temp & PORT_RESET) 1934 1934 + && time_after_eq(jiffies, 1935 1935 + priv->reset_done)) { 1936 1936 + status |= 1 << USB_PORT_FEAT_C_RESET; 1937 1937 + priv->reset_done = 0; 1938 1938 + 1939 1939 + /* force reset to complete */ 1940 1940 + isp1760_writel(temp & ~PORT_RESET, 1941 1941 + status_reg); 1942 1942 + /* REVISIT: some hardware needs 550+ usec to clear 1943 1943 + * this bit; seems too long to spin routinely... 1944 1944 + */ 1945 1945 + retval = handshake(priv, status_reg, 1946 1946 + PORT_RESET, 0, 750); 1947 1947 + if (retval != 0) { 1948 1948 + isp1760_err(priv, "port %d reset error %d\n", 1949 1949 + wIndex + 1, retval); 1950 1950 + goto error; 1951 1951 + } 1952 1952 + 1953 1953 + /* see what we found out */ 1954 1954 + temp = check_reset_complete(priv, wIndex, status_reg, 1955 1955 + isp1760_readl(status_reg)); 1956 1956 + } 1957 1957 + /* 1958 1958 + * Even if OWNER is set, there's no harm letting khubd 1959 1959 + * see the wPortStatus values (they should all be 0 except 1960 1960 + * for PORT_POWER anyway). 1961 1961 + */ 1962 1962 + 1963 1963 + if (temp & PORT_OWNER) 1964 1964 + printk(KERN_ERR "Warning: PORT_OWNER is set\n"); 1965 1965 + 1966 1966 + if (temp & PORT_CONNECT) { 1967 1967 + status |= 1 << USB_PORT_FEAT_CONNECTION; 1968 1968 + /* status may be from integrated TT */ 1969 1969 + status |= ehci_port_speed(priv, temp); 1970 1970 + } 1971 1971 + if (temp & PORT_PE) 1972 1972 + status |= 1 << USB_PORT_FEAT_ENABLE; 1973 1973 + if (temp & (PORT_SUSPEND|PORT_RESUME)) 1974 1974 + status |= 1 << USB_PORT_FEAT_SUSPEND; 1975 1975 + if (temp & PORT_RESET) 1976 1976 + status |= 1 << USB_PORT_FEAT_RESET; 1977 1977 + if (temp & PORT_POWER) 1978 1978 + status |= 1 << USB_PORT_FEAT_POWER; 1979 1979 + 1980 1980 + put_unaligned(cpu_to_le32(status), (__le32 *) buf); 1981 1981 + break; 1982 1982 + case SetHubFeature: 1983 1983 + switch (wValue) { 1984 1984 + case C_HUB_LOCAL_POWER: 1985 1985 + case C_HUB_OVER_CURRENT: 1986 1986 + /* no hub-wide feature/status flags */ 1987 1987 + break; 1988 1988 + default: 1989 1989 + goto error; 1990 1990 + } 1991 1991 + break; 1992 1992 + case SetPortFeature: 1993 1993 + selector = wIndex >> 8; 1994 1994 + wIndex &= 0xff; 1995 1995 + if (!wIndex || wIndex > ports) 1996 1996 + goto error; 1997 1997 + wIndex--; 1998 1998 + temp = isp1760_readl(status_reg); 1999 1999 + if (temp & PORT_OWNER) 2000 2000 + break; 2001 2001 + 2002 2002 + /* temp &= ~PORT_RWC_BITS; */ 2003 2003 + switch (wValue) { 2004 2004 + case USB_PORT_FEAT_ENABLE: 2005 2005 + isp1760_writel(temp | PORT_PE, status_reg); 2006 2006 + break; 2007 2007 + 2008 2008 + case USB_PORT_FEAT_SUSPEND: 2009 2009 + if ((temp & PORT_PE) == 0 2010 2010 + || (temp & PORT_RESET) != 0) 2011 2011 + goto error; 2012 2012 + 2013 2013 + isp1760_writel(temp | PORT_SUSPEND, status_reg); 2014 2014 + break; 2015 2015 + case USB_PORT_FEAT_POWER: 2016 2016 + if (HCS_PPC(priv->hcs_params)) 2017 2017 + isp1760_writel(temp | PORT_POWER, 2018 2018 + status_reg); 2019 2019 + break; 2020 2020 + case USB_PORT_FEAT_RESET: 2021 2021 + if (temp & PORT_RESUME) 2022 2022 + goto error; 2023 2023 + /* line status bits may report this as low speed, 2024 2024 + * which can be fine if this root hub has a 2025 2025 + * transaction translator built in. 2026 2026 + */ 2027 2027 + if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT 2028 2028 + && PORT_USB11(temp)) { 2029 2029 + temp |= PORT_OWNER; 2030 2030 + } else { 2031 2031 + temp |= PORT_RESET; 2032 2032 + temp &= ~PORT_PE; 2033 2033 + 2034 2034 + /* 2035 2035 + * caller must wait, then call GetPortStatus 2036 2036 + * usb 2.0 spec says 50 ms resets on root 2037 2037 + */ 2038 2038 + priv->reset_done = jiffies + 2039 2039 + msecs_to_jiffies(50); 2040 2040 + } 2041 2041 + isp1760_writel(temp, status_reg); 2042 2042 + break; 2043 2043 + default: 2044 2044 + goto error; 2045 2045 + } 2046 2046 + isp1760_readl(hcd->regs + HC_USBCMD); 2047 2047 + break; 2048 2048 + 2049 2049 + default: 2050 2050 + error: 2051 2051 + /* "stall" on error */ 2052 2052 + retval = -EPIPE; 2053 2053 + } 2054 2054 + spin_unlock_irqrestore(&priv->lock, flags); 2055 2055 + return retval; 2056 2056 + } 2057 2057 + 2058 2058 + static void isp1760_endpoint_disable(struct usb_hcd *usb_hcd, 2059 2059 + struct usb_host_endpoint *ep) 2060 2060 + { 2061 2061 + struct isp1760_hcd *priv = hcd_to_priv(usb_hcd); 2062 2062 + struct isp1760_qh *qh; 2063 2063 + struct isp1760_qtd *qtd; 2064 2064 + u32 flags; 2065 2065 + 2066 2066 + spin_lock_irqsave(&priv->lock, flags); 2067 2067 + qh = ep->hcpriv; 2068 2068 + if (!qh) 2069 2069 + goto out; 2070 2070 + 2071 2071 + ep->hcpriv = NULL; 2072 2072 + do { 2073 2073 + /* more than entry might get removed */ 2074 2074 + if (list_empty(&qh->qtd_list)) 2075 2075 + break; 2076 2076 + 2077 2077 + qtd = list_first_entry(&qh->qtd_list, struct isp1760_qtd, 2078 2078 + qtd_list); 2079 2079 + 2080 2080 + if (qtd->status & URB_ENQUEUED) { 2081 2081 + 2082 2082 + spin_unlock_irqrestore(&priv->lock, flags); 2083 2083 + isp1760_urb_dequeue(usb_hcd, qtd->urb, -ECONNRESET); 2084 2084 + spin_lock_irqsave(&priv->lock, flags); 2085 2085 + } else { 2086 2086 + struct urb *urb; 2087 2087 + 2088 2088 + urb = qtd->urb; 2089 2089 + clean_up_qtdlist(qtd); 2090 2090 + isp1760_urb_done(priv, urb, -ECONNRESET); 2091 2091 + } 2092 2092 + } while (1); 2093 2093 + 2094 2094 + qh_destroy(qh); 2095 2095 + /* remove requests and leak them. 2096 2096 + * ATL are pretty fast done, INT could take a while... 2097 2097 + * The latter shoule be removed 2098 2098 + */ 2099 2099 + out: 2100 2100 + spin_unlock_irqrestore(&priv->lock, flags); 2101 2101 + } 2102 2102 + 2103 2103 + static int isp1760_get_frame(struct usb_hcd *hcd) 2104 2104 + { 2105 2105 + struct isp1760_hcd *priv = hcd_to_priv(hcd); 2106 2106 + u32 fr; 2107 2107 + 2108 2108 + fr = isp1760_readl(hcd->regs + HC_FRINDEX); 2109 2109 + return (fr >> 3) % priv->periodic_size; 2110 2110 + } 2111 2111 + 2112 2112 + static void isp1760_stop(struct usb_hcd *hcd) 2113 2113 + { 2114 2114 + struct isp1760_hcd *priv = hcd_to_priv(hcd); 2115 2115 + 2116 2116 + isp1760_hub_control(hcd, ClearPortFeature, USB_PORT_FEAT_POWER, 1, 2117 2117 + NULL, 0); 2118 2118 + mdelay(20); 2119 2119 + 2120 2120 + spin_lock_irq(&priv->lock); 2121 2121 + ehci_reset(priv); 2122 2122 + /* Disable IRQ */ 2123 2123 + isp1760_writel(HW_DATA_BUS_32BIT, hcd->regs + HC_HW_MODE_CTRL); 2124 2124 + spin_unlock_irq(&priv->lock); 2125 2125 + 2126 2126 + isp1760_writel(0, hcd->regs + HC_CONFIGFLAG); 2127 2127 + } 2128 2128 + 2129 2129 + static void isp1760_shutdown(struct usb_hcd *hcd) 2130 2130 + { 2131 2131 + u32 command; 2132 2132 + 2133 2133 + isp1760_stop(hcd); 2134 2134 + isp1760_writel(HW_DATA_BUS_32BIT, hcd->regs + HC_HW_MODE_CTRL); 2135 2135 + 2136 2136 + command = isp1760_readl(hcd->regs + HC_USBCMD); 2137 2137 + command &= ~CMD_RUN; 2138 2138 + isp1760_writel(command, hcd->regs + HC_USBCMD); 2139 2139 + } 2140 2140 + 2141 2141 + static const struct hc_driver isp1760_hc_driver = { 2142 2142 + .description = "isp1760-hcd", 2143 2143 + .product_desc = "NXP ISP1760 USB Host Controller", 2144 2144 + .hcd_priv_size = sizeof(struct isp1760_hcd), 2145 2145 + .irq = isp1760_irq, 2146 2146 + .flags = HCD_MEMORY | HCD_USB2, 2147 2147 + .reset = isp1760_hc_setup, 2148 2148 + .start = isp1760_run, 2149 2149 + .stop = isp1760_stop, 2150 2150 + .shutdown = isp1760_shutdown, 2151 2151 + .urb_enqueue = isp1760_urb_enqueue, 2152 2152 + .urb_dequeue = isp1760_urb_dequeue, 2153 2153 + .endpoint_disable = isp1760_endpoint_disable, 2154 2154 + .get_frame_number = isp1760_get_frame, 2155 2155 + .hub_status_data = isp1760_hub_status_data, 2156 2156 + .hub_control = isp1760_hub_control, 2157 2157 + }; 2158 2158 + 2159 2159 + int __init init_kmem_once(void) 2160 2160 + { 2161 2161 + qtd_cachep = kmem_cache_create("isp1760_qtd", 2162 2162 + sizeof(struct isp1760_qtd), 0, SLAB_TEMPORARY | 2163 2163 + SLAB_MEM_SPREAD, NULL); 2164 2164 + 2165 2165 + if (!qtd_cachep) 2166 2166 + return -ENOMEM; 2167 2167 + 2168 2168 + qh_cachep = kmem_cache_create("isp1760_qh", sizeof(struct isp1760_qh), 2169 2169 + 0, SLAB_TEMPORARY | SLAB_MEM_SPREAD, NULL); 2170 2170 + 2171 2171 + if (!qh_cachep) { 2172 2172 + kmem_cache_destroy(qtd_cachep); 2173 2173 + return -ENOMEM; 2174 2174 + } 2175 2175 + 2176 2176 + return 0; 2177 2177 + } 2178 2178 + 2179 2179 + void deinit_kmem_cache(void) 2180 2180 + { 2181 2181 + kmem_cache_destroy(qtd_cachep); 2182 2182 + kmem_cache_destroy(qh_cachep); 2183 2183 + } 2184 2184 + 2185 2185 + struct usb_hcd *isp1760_register(u64 res_start, u64 res_len, int irq, 2186 2186 + u64 irqflags, struct device *dev, const char *busname) 2187 2187 + { 2188 2188 + struct usb_hcd *hcd; 2189 2189 + struct isp1760_hcd *priv; 2190 2190 + int ret; 2191 2191 + 2192 2192 + if (usb_disabled()) 2193 2193 + return ERR_PTR(-ENODEV); 2194 2194 + 2195 2195 + /* prevent usb-core allocating DMA pages */ 2196 2196 + dev->dma_mask = NULL; 2197 2197 + 2198 2198 + hcd = usb_create_hcd(&isp1760_hc_driver, dev, dev->bus_id); 2199 2199 + if (!hcd) 2200 2200 + return ERR_PTR(-ENOMEM); 2201 2201 + 2202 2202 + priv = hcd_to_priv(hcd); 2203 2203 + init_memory(priv); 2204 2204 + hcd->regs = ioremap(res_start, res_len); 2205 2205 + if (!hcd->regs) { 2206 2206 + ret = -EIO; 2207 2207 + goto err_put; 2208 2208 + } 2209 2209 + 2210 2210 + ret = usb_add_hcd(hcd, irq, irqflags); 2211 2211 + if (ret) 2212 2212 + goto err_unmap; 2213 2213 + 2214 2214 + hcd->irq = irq; 2215 2215 + hcd->rsrc_start = res_start; 2216 2216 + hcd->rsrc_len = res_len; 2217 2217 + 2218 2218 + return hcd; 2219 2219 + 2220 2220 + err_unmap: 2221 2221 + iounmap(hcd->regs); 2222 2222 + 2223 2223 + err_put: 2224 2224 + usb_put_hcd(hcd); 2225 2225 + 2226 2226 + return ERR_PTR(ret); 2227 2227 + } 2228 2228 + 2229 2229 + MODULE_DESCRIPTION("Driver for the ISP1760 USB-controller from NXP"); 2230 2230 + MODULE_AUTHOR("Sebastian Siewior <bigeasy@linuxtronix.de>"); 2231 2231 + MODULE_LICENSE("GPL v2");

+206

drivers/usb/host/isp1760-hcd.h

reviewed

··· 1 1 + #ifndef _ISP1760_HCD_H_ 2 2 + #define _ISP1760_HCD_H_ 3 3 + 4 4 + /* exports for if */ 5 5 + struct usb_hcd *isp1760_register(u64 res_start, u64 res_len, int irq, 6 6 + u64 irqflags, struct device *dev, const char *busname); 7 7 + int init_kmem_once(void); 8 8 + void deinit_kmem_cache(void); 9 9 + 10 10 + /* EHCI capability registers */ 11 11 + #define HC_CAPLENGTH 0x00 12 12 + #define HC_HCSPARAMS 0x04 13 13 + #define HC_HCCPARAMS 0x08 14 14 + 15 15 + /* EHCI operational registers */ 16 16 + #define HC_USBCMD 0x20 17 17 + #define HC_USBSTS 0x24 18 18 + #define HC_FRINDEX 0x2c 19 19 + #define HC_CONFIGFLAG 0x60 20 20 + #define HC_PORTSC1 0x64 21 21 + #define HC_ISO_PTD_DONEMAP_REG 0x130 22 22 + #define HC_ISO_PTD_SKIPMAP_REG 0x134 23 23 + #define HC_ISO_PTD_LASTPTD_REG 0x138 24 24 + #define HC_INT_PTD_DONEMAP_REG 0x140 25 25 + #define HC_INT_PTD_SKIPMAP_REG 0x144 26 26 + #define HC_INT_PTD_LASTPTD_REG 0x148 27 27 + #define HC_ATL_PTD_DONEMAP_REG 0x150 28 28 + #define HC_ATL_PTD_SKIPMAP_REG 0x154 29 29 + #define HC_ATL_PTD_LASTPTD_REG 0x158 30 30 + 31 31 + /* Configuration Register */ 32 32 + #define HC_HW_MODE_CTRL 0x300 33 33 + #define ALL_ATX_RESET (1 << 31) 34 34 + #define HW_DATA_BUS_32BIT (1 << 8) 35 35 + #define HW_DACK_POL_HIGH (1 << 6) 36 36 + #define HW_DREQ_POL_HIGH (1 << 5) 37 37 + #define HW_INTR_HIGH_ACT (1 << 2) 38 38 + #define HW_INTR_EDGE_TRIG (1 << 1) 39 39 + #define HW_GLOBAL_INTR_EN (1 << 0) 40 40 + 41 41 + #define HC_CHIP_ID_REG 0x304 42 42 + #define HC_SCRATCH_REG 0x308 43 43 + 44 44 + #define HC_RESET_REG 0x30c 45 45 + #define SW_RESET_RESET_HC (1 << 1) 46 46 + #define SW_RESET_RESET_ALL (1 << 0) 47 47 + 48 48 + #define HC_BUFFER_STATUS_REG 0x334 49 49 + #define ATL_BUFFER 0x1 50 50 + #define INT_BUFFER 0x2 51 51 + #define ISO_BUFFER 0x4 52 52 + #define BUFFER_MAP 0x7 53 53 + 54 54 + #define HC_MEMORY_REG 0x33c 55 55 + #define HC_PORT1_CTRL 0x374 56 56 + #define PORT1_POWER (3 << 3) 57 57 + #define PORT1_INIT1 (1 << 7) 58 58 + #define PORT1_INIT2 (1 << 23) 59 59 + 60 60 + /* Interrupt Register */ 61 61 + #define HC_INTERRUPT_REG 0x310 62 62 + 63 63 + #define HC_INTERRUPT_ENABLE 0x314 64 64 + #define INTERRUPT_ENABLE_MASK (HC_INTL_INT | HC_ATL_INT | HC_EOT_INT) 65 65 + #define FINAL_HW_CONFIG (HW_GLOBAL_INTR_EN | HW_DATA_BUS_32BIT) 66 66 + 67 67 + #define HC_ISO_INT (1 << 9) 68 68 + #define HC_ATL_INT (1 << 8) 69 69 + #define HC_INTL_INT (1 << 7) 70 70 + #define HC_EOT_INT (1 << 3) 71 71 + #define HC_SOT_INT (1 << 1) 72 72 + 73 73 + #define HC_ISO_IRQ_MASK_OR_REG 0x318 74 74 + #define HC_INT_IRQ_MASK_OR_REG 0x31C 75 75 + #define HC_ATL_IRQ_MASK_OR_REG 0x320 76 76 + #define HC_ISO_IRQ_MASK_AND_REG 0x324 77 77 + #define HC_INT_IRQ_MASK_AND_REG 0x328 78 78 + #define HC_ATL_IRQ_MASK_AND_REG 0x32C 79 79 + 80 80 + /* Register sets */ 81 81 + #define HC_BEGIN_OF_ATL 0x0c00 82 82 + #define HC_BEGIN_OF_INT 0x0800 83 83 + #define HC_BEGIN_OF_ISO 0x0400 84 84 + #define HC_BEGIN_OF_PAYLOAD 0x1000 85 85 + 86 86 + /* urb state*/ 87 87 + #define DELETE_URB (0x0008) 88 88 + #define NO_TRANSFER_ACTIVE (0xffffffff) 89 89 + 90 90 + #define ATL_REGS_OFFSET (0xc00) 91 91 + #define INT_REGS_OFFSET (0x800) 92 92 + 93 93 + /* Philips Transfer Descriptor (PTD) */ 94 94 + struct ptd { 95 95 + __le32 dw0; 96 96 + __le32 dw1; 97 97 + __le32 dw2; 98 98 + __le32 dw3; 99 99 + __le32 dw4; 100 100 + __le32 dw5; 101 101 + __le32 dw6; 102 102 + __le32 dw7; 103 103 + }; 104 104 + 105 105 + struct inter_packet_info { 106 106 + void *data_buffer; 107 107 + u32 payload; 108 108 + #define PTD_FIRE_NEXT (1 << 0) 109 109 + #define PTD_URB_FINISHED (1 << 1) 110 110 + struct urb *urb; 111 111 + struct isp1760_qh *qh; 112 112 + struct isp1760_qtd *qtd; 113 113 + }; 114 114 + 115 115 + 116 116 + typedef void (packet_enqueue)(struct usb_hcd *hcd, struct isp1760_qh *qh, 117 117 + struct isp1760_qtd *qtd); 118 118 + 119 119 + #define isp1760_info(priv, fmt, args...) \ 120 120 + dev_info(priv_to_hcd(priv)->self.controller, fmt, ##args) 121 121 + 122 122 + #define isp1760_err(priv, fmt, args...) \ 123 123 + dev_err(priv_to_hcd(priv)->self.controller, fmt, ##args) 124 124 + 125 125 + /* chip memory management */ 126 126 + struct memory_chunk { 127 127 + unsigned int start; 128 128 + unsigned int size; 129 129 + unsigned int free; 130 130 + }; 131 131 + 132 132 + /* 133 133 + * 60kb divided in: 134 134 + * - 32 blocks @ 256 bytes 135 135 + * - 20 blocks @ 1024 bytes 136 136 + * - 4 blocks @ 8192 bytes 137 137 + */ 138 138 + 139 139 + #define BLOCK_1_NUM 32 140 140 + #define BLOCK_2_NUM 20 141 141 + #define BLOCK_3_NUM 4 142 142 + 143 143 + #define BLOCK_1_SIZE 256 144 144 + #define BLOCK_2_SIZE 1024 145 145 + #define BLOCK_3_SIZE 8192 146 146 + #define BLOCKS (BLOCK_1_NUM + BLOCK_2_NUM + BLOCK_3_NUM) 147 147 + #define PAYLOAD_SIZE 0xf000 148 148 + 149 149 + /* I saw if some reloads if the pointer was negative */ 150 150 + #define ISP1760_NULL_POINTER (0x400) 151 151 + 152 152 + /* ATL */ 153 153 + /* DW0 */ 154 154 + #define PTD_VALID 1 155 155 + #define PTD_LENGTH(x) (((u32) x) << 3) 156 156 + #define PTD_MAXPACKET(x) (((u32) x) << 18) 157 157 + #define PTD_MULTI(x) (((u32) x) << 29) 158 158 + #define PTD_ENDPOINT(x) (((u32) x) << 31) 159 159 + /* DW1 */ 160 160 + #define PTD_DEVICE_ADDR(x) (((u32) x) << 3) 161 161 + #define PTD_PID_TOKEN(x) (((u32) x) << 10) 162 162 + #define PTD_TRANS_BULK ((u32) 2 << 12) 163 163 + #define PTD_TRANS_INT ((u32) 3 << 12) 164 164 + #define PTD_TRANS_SPLIT ((u32) 1 << 14) 165 165 + #define PTD_SE_USB_LOSPEED ((u32) 2 << 16) 166 166 + #define PTD_PORT_NUM(x) (((u32) x) << 18) 167 167 + #define PTD_HUB_NUM(x) (((u32) x) << 25) 168 168 + #define PTD_PING(x) (((u32) x) << 26) 169 169 + /* DW2 */ 170 170 + #define PTD_RL_CNT(x) (((u32) x) << 25) 171 171 + #define PTD_DATA_START_ADDR(x) (((u32) x) << 8) 172 172 + #define BASE_ADDR 0x1000 173 173 + /* DW3 */ 174 174 + #define PTD_CERR(x) (((u32) x) << 23) 175 175 + #define PTD_NAC_CNT(x) (((u32) x) << 19) 176 176 + #define PTD_ACTIVE ((u32) 1 << 31) 177 177 + #define PTD_DATA_TOGGLE(x) (((u32) x) << 25) 178 178 + 179 179 + #define DW3_HALT_BIT (1 << 30) 180 180 + #define DW3_ERROR_BIT (1 << 28) 181 181 + #define DW3_QTD_ACTIVE (1 << 31) 182 182 + 183 183 + #define INT_UNDERRUN (1 << 2) 184 184 + #define INT_BABBLE (1 << 1) 185 185 + #define INT_EXACT (1 << 0) 186 186 + 187 187 + #define DW1_GET_PID(x) (((x) >> 10) & 0x3) 188 188 + #define PTD_XFERRED_LENGTH(x) ((x) & 0x7fff) 189 189 + #define PTD_XFERRED_LENGTH_LO(x) ((x) & 0x7ff) 190 190 + 191 191 + #define SETUP_PID (2) 192 192 + #define IN_PID (1) 193 193 + #define OUT_PID (0) 194 194 + #define GET_QTD_TOKEN_TYPE(x) ((x) & 0x3) 195 195 + 196 196 + #define DATA_TOGGLE (1 << 31) 197 197 + #define GET_DATA_TOGGLE(x) ((x) >> 31) 198 198 + 199 199 + /* Errata 1 */ 200 200 + #define RL_COUNTER (0) 201 201 + #define NAK_COUNTER (0) 202 202 + #define ERR_COUNTER (2) 203 203 + 204 204 + #define HC_ATL_PL_SIZE (8192) 205 205 + 206 206 + #endif

+298

drivers/usb/host/isp1760-if.c

reviewed

··· 1 1 + /* 2 2 + * Glue code for the ISP1760 driver and bus 3 3 + * Currently there is support for 4 4 + * - OpenFirmware 5 5 + * - PCI 6 6 + * 7 7 + * (c) 2007 Sebastian Siewior <bigeasy@linutronix.de> 8 8 + * 9 9 + */ 10 10 + 11 11 + #include <linux/usb.h> 12 12 + #include <linux/io.h> 13 13 + 14 14 + #include "../core/hcd.h" 15 15 + #include "isp1760-hcd.h" 16 16 + 17 17 + #ifdef CONFIG_USB_ISP1760_OF 18 18 + #include <linux/of.h> 19 19 + #include <linux/of_platform.h> 20 20 + #endif 21 21 + 22 22 + #ifdef CONFIG_USB_ISP1760_PCI 23 23 + #include <linux/pci.h> 24 24 + #endif 25 25 + 26 26 + #ifdef CONFIG_USB_ISP1760_OF 27 27 + static int of_isp1760_probe(struct of_device *dev, 28 28 + const struct of_device_id *match) 29 29 + { 30 30 + struct usb_hcd *hcd; 31 31 + struct device_node *dp = dev->node; 32 32 + struct resource *res; 33 33 + struct resource memory; 34 34 + struct of_irq oirq; 35 35 + int virq; 36 36 + u64 res_len; 37 37 + int ret; 38 38 + 39 39 + ret = of_address_to_resource(dp, 0, &memory); 40 40 + if (ret) 41 41 + return -ENXIO; 42 42 + 43 43 + res = request_mem_region(memory.start, memory.end - memory.start + 1, 44 44 + dev->dev.bus_id); 45 45 + if (!res) 46 46 + return -EBUSY; 47 47 + 48 48 + res_len = memory.end - memory.start + 1; 49 49 + 50 50 + if (of_irq_map_one(dp, 0, &oirq)) { 51 51 + ret = -ENODEV; 52 52 + goto release_reg; 53 53 + } 54 54 + 55 55 + virq = irq_create_of_mapping(oirq.controller, oirq.specifier, 56 56 + oirq.size); 57 57 + 58 58 + hcd = isp1760_register(memory.start, res_len, virq, 59 59 + IRQF_SHARED | IRQF_DISABLED, &dev->dev, dev->dev.bus_id); 60 60 + if (IS_ERR(hcd)) { 61 61 + ret = PTR_ERR(hcd); 62 62 + goto release_reg; 63 63 + } 64 64 + 65 65 + dev_set_drvdata(&dev->dev, hcd); 66 66 + return ret; 67 67 + 68 68 + release_reg: 69 69 + release_mem_region(memory.start, memory.end - memory.start + 1); 70 70 + return ret; 71 71 + } 72 72 + 73 73 + static int of_isp1760_remove(struct of_device *dev) 74 74 + { 75 75 + struct usb_hcd *hcd = dev_get_drvdata(&dev->dev); 76 76 + 77 77 + dev_set_drvdata(&dev->dev, NULL); 78 78 + 79 79 + usb_remove_hcd(hcd); 80 80 + iounmap(hcd->regs); 81 81 + release_mem_region(hcd->rsrc_start, hcd->rsrc_len); 82 82 + usb_put_hcd(hcd); 83 83 + return 0; 84 84 + } 85 85 + 86 86 + static struct of_device_id of_isp1760_match[] = { 87 87 + { 88 88 + .compatible = "nxp,usb-isp1760", 89 89 + }, 90 90 + { }, 91 91 + }; 92 92 + MODULE_DEVICE_TABLE(of, of_isp1760_match); 93 93 + 94 94 + static struct of_platform_driver isp1760_of_driver = { 95 95 + .name = "nxp-isp1760", 96 96 + .match_table = of_isp1760_match, 97 97 + .probe = of_isp1760_probe, 98 98 + .remove = of_isp1760_remove, 99 99 + }; 100 100 + #endif 101 101 + 102 102 + #ifdef CONFIG_USB_ISP1760_PCI 103 103 + static u32 nxp_pci_io_base; 104 104 + static u32 iolength; 105 105 + static u32 pci_mem_phy0; 106 106 + static u32 length; 107 107 + static u8 *chip_addr; 108 108 + static u8 *iobase; 109 109 + 110 110 + static int __devinit isp1761_pci_probe(struct pci_dev *dev, 111 111 + const struct pci_device_id *id) 112 112 + { 113 113 + u8 latency, limit; 114 114 + __u32 reg_data; 115 115 + int retry_count; 116 116 + int length; 117 117 + int status = 1; 118 118 + struct usb_hcd *hcd; 119 119 + 120 120 + if (usb_disabled()) 121 121 + return -ENODEV; 122 122 + 123 123 + if (pci_enable_device(dev) < 0) 124 124 + return -ENODEV; 125 125 + 126 126 + if (!dev->irq) 127 127 + return -ENODEV; 128 128 + 129 129 + /* Grab the PLX PCI mem maped port start address we need */ 130 130 + nxp_pci_io_base = pci_resource_start(dev, 0); 131 131 + iolength = pci_resource_len(dev, 0); 132 132 + 133 133 + if (!request_mem_region(nxp_pci_io_base, iolength, "ISP1761 IO MEM")) { 134 134 + printk(KERN_ERR "request region #1\n"); 135 135 + return -EBUSY; 136 136 + } 137 137 + 138 138 + iobase = ioremap_nocache(nxp_pci_io_base, iolength); 139 139 + if (!iobase) { 140 140 + printk(KERN_ERR "ioremap #1\n"); 141 141 + release_mem_region(nxp_pci_io_base, iolength); 142 142 + return -ENOMEM; 143 143 + } 144 144 + /* Grab the PLX PCI shared memory of the ISP 1761 we need */ 145 145 + pci_mem_phy0 = pci_resource_start(dev, 3); 146 146 + length = pci_resource_len(dev, 3); 147 147 + 148 148 + if (length < 0xffff) { 149 149 + printk(KERN_ERR "memory length for this resource is less than " 150 150 + "required\n"); 151 151 + release_mem_region(nxp_pci_io_base, iolength); 152 152 + iounmap(iobase); 153 153 + return -ENOMEM; 154 154 + } 155 155 + 156 156 + if (!request_mem_region(pci_mem_phy0, length, "ISP-PCI")) { 157 157 + printk(KERN_ERR "host controller already in use\n"); 158 158 + release_mem_region(nxp_pci_io_base, iolength); 159 159 + iounmap(iobase); 160 160 + return -EBUSY; 161 161 + } 162 162 + 163 163 + /* bad pci latencies can contribute to overruns */ 164 164 + pci_read_config_byte(dev, PCI_LATENCY_TIMER, &latency); 165 165 + if (latency) { 166 166 + pci_read_config_byte(dev, PCI_MAX_LAT, &limit); 167 167 + if (limit && limit < latency) 168 168 + pci_write_config_byte(dev, PCI_LATENCY_TIMER, limit); 169 169 + } 170 170 + 171 171 + /* Try to check whether we can access Scratch Register of 172 172 + * Host Controller or not. The initial PCI access is retried until 173 173 + * local init for the PCI bridge is completed 174 174 + */ 175 175 + retry_count = 20; 176 176 + reg_data = 0; 177 177 + while ((reg_data != 0xFACE) && retry_count) { 178 178 + /*by default host is in 16bit mode, so 179 179 + * io operations at this stage must be 16 bit 180 180 + * */ 181 181 + writel(0xface, chip_addr + HC_SCRATCH_REG); 182 182 + udelay(100); 183 183 + reg_data = readl(chip_addr + HC_SCRATCH_REG); 184 184 + retry_count--; 185 185 + } 186 186 + 187 187 + /* Host Controller presence is detected by writing to scratch register 188 188 + * and reading back and checking the contents are same or not 189 189 + */ 190 190 + if (reg_data != 0xFACE) { 191 191 + err("scratch register mismatch %x", reg_data); 192 192 + goto clean; 193 193 + } 194 194 + 195 195 + pci_set_master(dev); 196 196 + 197 197 + status = readl(iobase + 0x68); 198 198 + status |= 0x900; 199 199 + writel(status, iobase + 0x68); 200 200 + 201 201 + dev->dev.dma_mask = NULL; 202 202 + hcd = isp1760_register(pci_mem_phy0, length, dev->irq, 203 203 + IRQF_SHARED | IRQF_DISABLED, &dev->dev, dev->dev.bus_id); 204 204 + pci_set_drvdata(dev, hcd); 205 205 + if (!hcd) 206 206 + return 0; 207 207 + clean: 208 208 + status = -ENODEV; 209 209 + iounmap(iobase); 210 210 + release_mem_region(pci_mem_phy0, length); 211 211 + release_mem_region(nxp_pci_io_base, iolength); 212 212 + return status; 213 213 + } 214 214 + static void isp1761_pci_remove(struct pci_dev *dev) 215 215 + { 216 216 + struct usb_hcd *hcd; 217 217 + 218 218 + hcd = pci_get_drvdata(dev); 219 219 + 220 220 + usb_remove_hcd(hcd); 221 221 + iounmap(hcd->regs); 222 222 + release_mem_region(hcd->rsrc_start, hcd->rsrc_len); 223 223 + usb_put_hcd(hcd); 224 224 + 225 225 + pci_disable_device(dev); 226 226 + 227 227 + iounmap(iobase); 228 228 + iounmap(chip_addr); 229 229 + 230 230 + release_mem_region(nxp_pci_io_base, iolength); 231 231 + release_mem_region(pci_mem_phy0, length); 232 232 + } 233 233 + 234 234 + static void isp1761_pci_shutdown(struct pci_dev *dev) 235 235 + { 236 236 + printk(KERN_ERR "ips1761_pci_shutdown\n"); 237 237 + } 238 238 + 239 239 + static const struct pci_device_id isp1760_plx [] = { { 240 240 + /* handle any USB 2.0 EHCI controller */ 241 241 + PCI_DEVICE_CLASS(((PCI_CLASS_BRIDGE_OTHER << 8) | (0x06 << 16)), ~0), 242 242 + .driver_data = 0, 243 243 + }, 244 244 + { /* end: all zeroes */ } 245 245 + }; 246 246 + MODULE_DEVICE_TABLE(pci, isp1760_plx); 247 247 + 248 248 + static struct pci_driver isp1761_pci_driver = { 249 249 + .name = "isp1760", 250 250 + .id_table = isp1760_plx, 251 251 + .probe = isp1761_pci_probe, 252 252 + .remove = isp1761_pci_remove, 253 253 + .shutdown = isp1761_pci_shutdown, 254 254 + }; 255 255 + #endif 256 256 + 257 257 + static int __init isp1760_init(void) 258 258 + { 259 259 + int ret; 260 260 + 261 261 + init_kmem_once(); 262 262 + 263 263 + #ifdef CONFIG_USB_ISP1760_OF 264 264 + ret = of_register_platform_driver(&isp1760_of_driver); 265 265 + if (ret) { 266 266 + deinit_kmem_cache(); 267 267 + return ret; 268 268 + } 269 269 + #endif 270 270 + #ifdef CONFIG_USB_ISP1760_PCI 271 271 + ret = pci_register_driver(&isp1761_pci_driver); 272 272 + if (ret) 273 273 + goto unreg_of; 274 274 + #endif 275 275 + return ret; 276 276 + 277 277 + #ifdef CONFIG_USB_ISP1760_PCI 278 278 + unreg_of: 279 279 + #endif 280 280 + #ifdef CONFIG_USB_ISP1760_OF 281 281 + of_unregister_platform_driver(&isp1760_of_driver); 282 282 + #endif 283 283 + deinit_kmem_cache(); 284 284 + return ret; 285 285 + } 286 286 + module_init(isp1760_init); 287 287 + 288 288 + static void __exit isp1760_exit(void) 289 289 + { 290 290 + #ifdef CONFIG_USB_ISP1760_OF 291 291 + of_unregister_platform_driver(&isp1760_of_driver); 292 292 + #endif 293 293 + #ifdef CONFIG_USB_ISP1760_PCI 294 294 + pci_unregister_driver(&isp1761_pci_driver); 295 295 + #endif 296 296 + deinit_kmem_cache(); 297 297 + } 298 298 + module_exit(isp1760_exit);

+1 -1

drivers/usb/host/ohci-hub.c

reviewed

··· 613 613 static inline int root_port_reset (struct ohci_hcd *ohci, unsigned port) 614 614 { 615 615 __hc32 __iomem *portstat = &ohci->regs->roothub.portstatus [port]; 616 616 - u32 temp; 616 616 + u32 temp = 0; 617 617 u16 now = ohci_readl(ohci, &ohci->regs->fmnumber); 618 618 u16 reset_done = now + PORT_RESET_MSEC; 619 619 int limit_1 = DIV_ROUND_UP(PORT_RESET_MSEC, PORT_RESET_HW_MSEC);

+58 -16

drivers/usb/host/uhci-hcd.c

reviewed

··· 234 234 return 0; 235 235 } 236 236 237 237 - static int remote_wakeup_is_broken(struct uhci_hcd *uhci) 237 237 + static int global_suspend_mode_is_broken(struct uhci_hcd *uhci) 238 238 { 239 239 int port; 240 240 const char *sys_info; ··· 261 261 __acquires(uhci->lock) 262 262 { 263 263 int auto_stop; 264 264 - int int_enable, egsm_enable; 264 264 + int int_enable, egsm_enable, wakeup_enable; 265 265 struct usb_device *rhdev = uhci_to_hcd(uhci)->self.root_hub; 266 266 267 267 auto_stop = (new_state == UHCI_RH_AUTO_STOPPED); 268 268 dev_dbg(&rhdev->dev, "%s%s\n", __func__, 269 269 (auto_stop ? " (auto-stop)" : "")); 270 270 271 271 - /* Enable resume-detect interrupts if they work. 272 272 - * Then enter Global Suspend mode if _it_ works, still configured. 271 271 + /* Start off by assuming Resume-Detect interrupts and EGSM work 272 272 + * and that remote wakeups should be enabled. 273 273 */ 274 274 egsm_enable = USBCMD_EGSM; 275 275 - uhci->working_RD = 1; 275 275 + uhci->RD_enable = 1; 276 276 int_enable = USBINTR_RESUME; 277 277 - if (remote_wakeup_is_broken(uhci)) 278 278 - egsm_enable = 0; 279 279 - if (resume_detect_interrupts_are_broken(uhci) || !egsm_enable || 277 277 + wakeup_enable = 1; 278 278 + 279 279 + /* In auto-stop mode wakeups must always be detected, but 280 280 + * Resume-Detect interrupts may be prohibited. (In the absence 281 281 + * of CONFIG_PM, they are always disallowed.) 282 282 + */ 283 283 + if (auto_stop) { 284 284 + if (!device_may_wakeup(&rhdev->dev)) 285 285 + int_enable = 0; 286 286 + 287 287 + /* In bus-suspend mode wakeups may be disabled, but if they are 288 288 + * allowed then so are Resume-Detect interrupts. 289 289 + */ 290 290 + } else { 280 291 #ifdef CONFIG_PM 281 281 - (!auto_stop && !rhdev->do_remote_wakeup) || 292 292 + if (!rhdev->do_remote_wakeup) 293 293 + wakeup_enable = 0; 282 294 #endif 283 283 - (auto_stop && !device_may_wakeup(&rhdev->dev))) 284 284 - uhci->working_RD = int_enable = 0; 295 295 + } 296 296 + 297 297 + /* EGSM causes the root hub to echo a 'K' signal (resume) out any 298 298 + * port which requests a remote wakeup. According to the USB spec, 299 299 + * every hub is supposed to do this. But if we are ignoring 300 300 + * remote-wakeup requests anyway then there's no point to it. 301 301 + * We also shouldn't enable EGSM if it's broken. 302 302 + */ 303 303 + if (!wakeup_enable || global_suspend_mode_is_broken(uhci)) 304 304 + egsm_enable = 0; 305 305 + 306 306 + /* If we're ignoring wakeup events then there's no reason to 307 307 + * enable Resume-Detect interrupts. We also shouldn't enable 308 308 + * them if they are broken or disallowed. 309 309 + * 310 310 + * This logic may lead us to enabling RD but not EGSM. The UHCI 311 311 + * spec foolishly says that RD works only when EGSM is on, but 312 312 + * there's no harm in enabling it anyway -- perhaps some chips 313 313 + * will implement it! 314 314 + */ 315 315 + if (!wakeup_enable || resume_detect_interrupts_are_broken(uhci) || 316 316 + !int_enable) 317 317 + uhci->RD_enable = int_enable = 0; 285 318 286 319 outw(int_enable, uhci->io_addr + USBINTR); 287 320 outw(egsm_enable | USBCMD_CF, uhci->io_addr + USBCMD); ··· 341 308 342 309 uhci->rh_state = new_state; 343 310 uhci->is_stopped = UHCI_IS_STOPPED; 344 344 - uhci_to_hcd(uhci)->poll_rh = !int_enable; 311 311 + 312 312 + /* If interrupts don't work and remote wakeup is enabled then 313 313 + * the suspended root hub needs to be polled. 314 314 + */ 315 315 + uhci_to_hcd(uhci)->poll_rh = (!int_enable && wakeup_enable); 345 316 346 317 uhci_scan_schedule(uhci); 347 318 uhci_fsbr_off(uhci); ··· 381 344 * for 20 ms. 382 345 */ 383 346 if (uhci->rh_state == UHCI_RH_SUSPENDED) { 347 347 + unsigned egsm; 348 348 + 349 349 + /* Keep EGSM on if it was set before */ 350 350 + egsm = inw(uhci->io_addr + USBCMD) & USBCMD_EGSM; 384 351 uhci->rh_state = UHCI_RH_RESUMING; 385 385 - outw(USBCMD_FGR | USBCMD_EGSM | USBCMD_CF, 386 386 - uhci->io_addr + USBCMD); 352 352 + outw(USBCMD_FGR | USBCMD_CF | egsm, uhci->io_addr + USBCMD); 387 353 spin_unlock_irq(&uhci->lock); 388 354 msleep(20); 389 355 spin_lock_irq(&uhci->lock); ··· 841 801 842 802 spin_unlock_irq(&uhci->lock); 843 803 844 844 - if (!uhci->working_RD) { 845 845 - /* Suspended root hub needs to be polled */ 804 804 + /* If interrupts don't work and remote wakeup is enabled then 805 805 + * the suspended root hub needs to be polled. 806 806 + */ 807 807 + if (!uhci->RD_enable && hcd->self.root_hub->do_remote_wakeup) { 846 808 hcd->poll_rh = 1; 847 809 usb_hcd_poll_rh_status(hcd); 848 810 }

+3 -2

drivers/usb/host/uhci-hcd.h

reviewed

··· 400 400 unsigned int scan_in_progress:1; /* Schedule scan is running */ 401 401 unsigned int need_rescan:1; /* Redo the schedule scan */ 402 402 unsigned int dead:1; /* Controller has died */ 403 403 - unsigned int working_RD:1; /* Suspended root hub doesn't 404 404 - need to be polled */ 403 403 + unsigned int RD_enable:1; /* Suspended root hub with 404 404 + Resume-Detect interrupts 405 405 + enabled */ 405 406 unsigned int is_initialized:1; /* Data structure is usable */ 406 407 unsigned int fsbr_is_on:1; /* FSBR is turned on */ 407 408 unsigned int fsbr_is_wanted:1; /* Does any URB want FSBR? */

+14 -14

drivers/usb/misc/ldusb.c

reviewed

··· 148 148 149 149 /* Structure to hold all of our device specific stuff */ 150 150 struct ld_usb { 151 151 - struct semaphore sem; /* locks this structure */ 151 151 + struct mutex mutex; /* locks this structure */ 152 152 struct usb_interface* intf; /* save off the usb interface pointer */ 153 153 154 154 int open_count; /* number of times this port has been opened */ ··· 319 319 return -ENODEV; 320 320 321 321 /* lock this device */ 322 322 - if (down_interruptible(&dev->sem)) 322 322 + if (mutex_lock_interruptible(&dev->mutex)) 323 323 return -ERESTARTSYS; 324 324 325 325 /* allow opening only once */ ··· 358 358 file->private_data = dev; 359 359 360 360 unlock_exit: 361 361 - up(&dev->sem); 361 361 + mutex_unlock(&dev->mutex); 362 362 363 363 return retval; 364 364 } ··· 378 378 goto exit; 379 379 } 380 380 381 381 - if (down_interruptible(&dev->sem)) { 381 381 + if (mutex_lock_interruptible(&dev->mutex)) { 382 382 retval = -ERESTARTSYS; 383 383 goto exit; 384 384 } ··· 389 389 } 390 390 if (dev->intf == NULL) { 391 391 /* the device was unplugged before the file was released */ 392 392 - up(&dev->sem); 392 392 + mutex_unlock(&dev->mutex); 393 393 /* unlock here as ld_usb_delete frees dev */ 394 394 ld_usb_delete(dev); 395 395 goto exit; ··· 402 402 dev->open_count = 0; 403 403 404 404 unlock_exit: 405 405 - up(&dev->sem); 405 405 + mutex_unlock(&dev->mutex); 406 406 407 407 exit: 408 408 return retval; ··· 448 448 goto exit; 449 449 450 450 /* lock this object */ 451 451 - if (down_interruptible(&dev->sem)) { 451 451 + if (mutex_lock_interruptible(&dev->mutex)) { 452 452 retval = -ERESTARTSYS; 453 453 goto exit; 454 454 } ··· 505 505 506 506 unlock_exit: 507 507 /* unlock the device */ 508 508 - up(&dev->sem); 508 508 + mutex_unlock(&dev->mutex); 509 509 510 510 exit: 511 511 return retval; ··· 528 528 goto exit; 529 529 530 530 /* lock this object */ 531 531 - if (down_interruptible(&dev->sem)) { 531 531 + if (mutex_lock_interruptible(&dev->mutex)) { 532 532 retval = -ERESTARTSYS; 533 533 goto exit; 534 534 } ··· 602 602 603 603 unlock_exit: 604 604 /* unlock the device */ 605 605 - up(&dev->sem); 605 605 + mutex_unlock(&dev->mutex); 606 606 607 607 exit: 608 608 return retval; ··· 651 651 dev_err(&intf->dev, "Out of memory\n"); 652 652 goto exit; 653 653 } 654 654 - init_MUTEX(&dev->sem); 654 654 + mutex_init(&dev->mutex); 655 655 spin_lock_init(&dev->rbsl); 656 656 dev->intf = intf; 657 657 init_waitqueue_head(&dev->read_wait); ··· 765 765 /* give back our minor */ 766 766 usb_deregister_dev(intf, &ld_usb_class); 767 767 768 768 - down(&dev->sem); 768 768 + mutex_lock(&dev->mutex); 769 769 770 770 /* if the device is not opened, then we clean up right now */ 771 771 if (!dev->open_count) { 772 772 - up(&dev->sem); 772 772 + mutex_unlock(&dev->mutex); 773 773 ld_usb_delete(dev); 774 774 } else { 775 775 dev->intf = NULL; 776 776 - up(&dev->sem); 776 776 + mutex_unlock(&dev->mutex); 777 777 } 778 778 779 779 dev_info(&intf->dev, "LD USB Device #%d now disconnected\n",

+133 -143

drivers/usb/misc/usbtest.c

reviewed

··· 79 79 /* set up all urbs so they can be used with either bulk or interrupt */ 80 80 #define INTERRUPT_RATE 1 /* msec/transfer */ 81 81 82 82 - #define xprintk(tdev,level,fmt,args...) \ 83 83 - dev_printk(level , &(tdev)->intf->dev , fmt , ## args) 84 84 - 85 85 - #ifdef DEBUG 86 86 - #define DBG(dev,fmt,args...) \ 87 87 - xprintk(dev , KERN_DEBUG , fmt , ## args) 88 88 - #else 89 89 - #define DBG(dev,fmt,args...) \ 90 90 - do { } while (0) 91 91 - #endif /* DEBUG */ 92 92 - 93 93 - #ifdef VERBOSE 94 94 - #define VDBG DBG 95 95 - #else 96 96 - #define VDBG(dev,fmt,args...) \ 97 97 - do { } while (0) 98 98 - #endif /* VERBOSE */ 99 99 - 100 100 - #define ERROR(dev,fmt,args...) \ 101 101 - xprintk(dev , KERN_ERR , fmt , ## args) 102 102 - #define WARN(dev,fmt,args...) \ 103 103 - xprintk(dev , KERN_WARNING , fmt , ## args) 104 104 - #define INFO(dev,fmt,args...) \ 105 105 - xprintk(dev , KERN_INFO , fmt , ## args) 82 82 + #define ERROR(tdev, fmt, args...) \ 83 83 + dev_err(&(tdev)->intf->dev , fmt , ## args) 84 84 + #define WARN(tdev, fmt, args...) \ 85 85 + dev_warn(&(tdev)->intf->dev , fmt , ## args) 106 86 107 87 /*-------------------------------------------------------------------------*/ 108 88 ··· 216 236 217 237 static unsigned pattern = 0; 218 238 module_param (pattern, uint, S_IRUGO); 219 219 - // MODULE_PARM_DESC (pattern, "i/o pattern (0 == zeroes)"); 239 239 + MODULE_PARM_DESC(pattern, "i/o pattern (0 == zeroes)"); 220 240 221 241 static inline void simple_fill_buf (struct urb *urb) 222 242 { ··· 237 257 } 238 258 } 239 259 240 240 - static inline int simple_check_buf (struct urb *urb) 260 260 + static inline int simple_check_buf(struct usbtest_dev *tdev, struct urb *urb) 241 261 { 242 262 unsigned i; 243 263 u8 expected; ··· 265 285 } 266 286 if (*buf == expected) 267 287 continue; 268 268 - dbg ("buf[%d] = %d (not %d)", i, *buf, expected); 288 288 + ERROR(tdev, "buf[%d] = %d (not %d)\n", i, *buf, expected); 269 289 return -EINVAL; 270 290 } 271 291 return 0; ··· 279 299 } 280 300 281 301 static int simple_io ( 302 302 + struct usbtest_dev *tdev, 282 303 struct urb *urb, 283 304 int iterations, 284 305 int vary, ··· 305 324 retval = urb->status; 306 325 urb->dev = udev; 307 326 if (retval == 0 && usb_pipein (urb->pipe)) 308 308 - retval = simple_check_buf (urb); 327 327 + retval = simple_check_buf(tdev, urb); 309 328 310 329 if (vary) { 311 330 int len = urb->transfer_buffer_length; ··· 322 341 urb->transfer_buffer_length = max; 323 342 324 343 if (expected != retval) 325 325 - dev_dbg (&udev->dev, 344 344 + dev_err(&udev->dev, 326 345 "%s failed, iterations left %d, status %d (not %d)\n", 327 346 label, iterations, retval, expected); 328 347 return retval; ··· 338 357 static void free_sglist (struct scatterlist *sg, int nents) 339 358 { 340 359 unsigned i; 341 341 - 360 360 + 342 361 if (!sg) 343 362 return; 344 363 for (i = 0; i < nents; i++) { ··· 396 415 } 397 416 398 417 static int perform_sglist ( 399 399 - struct usb_device *udev, 418 418 + struct usbtest_dev *tdev, 400 419 unsigned iterations, 401 420 int pipe, 402 421 struct usb_sg_request *req, ··· 404 423 int nents 405 424 ) 406 425 { 426 426 + struct usb_device *udev = testdev_to_usbdev(tdev); 407 427 int retval = 0; 408 428 409 429 while (retval == 0 && iterations-- > 0) { ··· 413 431 ? (INTERRUPT_RATE << 3) 414 432 : INTERRUPT_RATE, 415 433 sg, nents, 0, GFP_KERNEL); 416 416 - 434 434 + 417 435 if (retval) 418 436 break; 419 437 usb_sg_wait (req); ··· 428 446 // failure if retval is as we expected ... 429 447 430 448 if (retval) 431 431 - dbg ("perform_sglist failed, iterations left %d, status %d", 449 449 + ERROR(tdev, "perform_sglist failed, " 450 450 + "iterations left %d, status %d\n", 432 451 iterations, retval); 433 452 return retval; 434 453 } ··· 488 505 alternate); 489 506 } 490 507 491 491 - static int is_good_config (char *buf, int len) 508 508 + static int is_good_config(struct usbtest_dev *tdev, int len) 492 509 { 493 510 struct usb_config_descriptor *config; 494 494 - 511 511 + 495 512 if (len < sizeof *config) 496 513 return 0; 497 497 - config = (struct usb_config_descriptor *) buf; 514 514 + config = (struct usb_config_descriptor *) tdev->buf; 498 515 499 516 switch (config->bDescriptorType) { 500 517 case USB_DT_CONFIG: 501 518 case USB_DT_OTHER_SPEED_CONFIG: 502 519 if (config->bLength != 9) { 503 503 - dbg ("bogus config descriptor length"); 520 520 + ERROR(tdev, "bogus config descriptor length\n"); 504 521 return 0; 505 522 } 506 523 /* this bit 'must be 1' but often isn't */ 507 524 if (!realworld && !(config->bmAttributes & 0x80)) { 508 508 - dbg ("high bit of config attributes not set"); 525 525 + ERROR(tdev, "high bit of config attributes not set\n"); 509 526 return 0; 510 527 } 511 528 if (config->bmAttributes & 0x1f) { /* reserved == 0 */ 512 512 - dbg ("reserved config bits set"); 529 529 + ERROR(tdev, "reserved config bits set\n"); 513 530 return 0; 514 531 } 515 532 break; ··· 521 538 return 1; 522 539 if (le16_to_cpu(config->wTotalLength) >= TBUF_SIZE) /* max partial read */ 523 540 return 1; 524 524 - dbg ("bogus config descriptor read size"); 541 541 + ERROR(tdev, "bogus config descriptor read size\n"); 525 542 return 0; 526 543 } 527 544 ··· 554 571 /* 9.2.3 constrains the range here */ 555 572 alt = iface->altsetting [i].desc.bAlternateSetting; 556 573 if (alt < 0 || alt >= iface->num_altsetting) { 557 557 - dev_dbg (&iface->dev, 574 574 + dev_err(&iface->dev, 558 575 "invalid alt [%d].bAltSetting = %d\n", 559 576 i, alt); 560 577 } ··· 566 583 /* [9.4.10] set_interface */ 567 584 retval = set_altsetting (dev, alt); 568 585 if (retval) { 569 569 - dev_dbg (&iface->dev, "can't set_interface = %d, %d\n", 586 586 + dev_err(&iface->dev, "can't set_interface = %d, %d\n", 570 587 alt, retval); 571 588 return retval; 572 589 } ··· 574 591 /* [9.4.4] get_interface always works */ 575 592 retval = get_altsetting (dev); 576 593 if (retval != alt) { 577 577 - dev_dbg (&iface->dev, "get alt should be %d, was %d\n", 594 594 + dev_err(&iface->dev, "get alt should be %d, was %d\n", 578 595 alt, retval); 579 596 return (retval < 0) ? retval : -EDOM; 580 597 } ··· 594 611 USB_DIR_IN | USB_RECIP_DEVICE, 595 612 0, 0, dev->buf, 1, USB_CTRL_GET_TIMEOUT); 596 613 if (retval != 1 || dev->buf [0] != expected) { 597 597 - dev_dbg (&iface->dev, "get config --> %d %d (1 %d)\n", 614 614 + dev_err(&iface->dev, "get config --> %d %d (1 %d)\n", 598 615 retval, dev->buf[0], expected); 599 616 return (retval < 0) ? retval : -EDOM; 600 617 } ··· 604 621 retval = usb_get_descriptor (udev, USB_DT_DEVICE, 0, 605 622 dev->buf, sizeof udev->descriptor); 606 623 if (retval != sizeof udev->descriptor) { 607 607 - dev_dbg (&iface->dev, "dev descriptor --> %d\n", retval); 624 624 + dev_err(&iface->dev, "dev descriptor --> %d\n", retval); 608 625 return (retval < 0) ? retval : -EDOM; 609 626 } 610 627 ··· 612 629 for (i = 0; i < udev->descriptor.bNumConfigurations; i++) { 613 630 retval = usb_get_descriptor (udev, USB_DT_CONFIG, i, 614 631 dev->buf, TBUF_SIZE); 615 615 - if (!is_good_config (dev->buf, retval)) { 616 616 - dev_dbg (&iface->dev, 632 632 + if (!is_good_config(dev, retval)) { 633 633 + dev_err(&iface->dev, 617 634 "config [%d] descriptor --> %d\n", 618 635 i, retval); 619 636 return (retval < 0) ? retval : -EDOM; ··· 633 650 sizeof (struct usb_qualifier_descriptor)); 634 651 if (retval == -EPIPE) { 635 652 if (udev->speed == USB_SPEED_HIGH) { 636 636 - dev_dbg (&iface->dev, 653 653 + dev_err(&iface->dev, 637 654 "hs dev qualifier --> %d\n", 638 655 retval); 639 656 return (retval < 0) ? retval : -EDOM; 640 657 } 641 658 /* usb2.0 but not high-speed capable; fine */ 642 659 } else if (retval != sizeof (struct usb_qualifier_descriptor)) { 643 643 - dev_dbg (&iface->dev, "dev qualifier --> %d\n", retval); 660 660 + dev_err(&iface->dev, "dev qualifier --> %d\n", retval); 644 661 return (retval < 0) ? retval : -EDOM; 645 662 } else 646 663 d = (struct usb_qualifier_descriptor *) dev->buf; ··· 652 669 retval = usb_get_descriptor (udev, 653 670 USB_DT_OTHER_SPEED_CONFIG, i, 654 671 dev->buf, TBUF_SIZE); 655 655 - if (!is_good_config (dev->buf, retval)) { 656 656 - dev_dbg (&iface->dev, 672 672 + if (!is_good_config(dev, retval)) { 673 673 + dev_err(&iface->dev, 657 674 "other speed config --> %d\n", 658 675 retval); 659 676 return (retval < 0) ? retval : -EDOM; ··· 666 683 /* [9.4.5] get_status always works */ 667 684 retval = usb_get_status (udev, USB_RECIP_DEVICE, 0, dev->buf); 668 685 if (retval != 2) { 669 669 - dev_dbg (&iface->dev, "get dev status --> %d\n", retval); 686 686 + dev_err(&iface->dev, "get dev status --> %d\n", retval); 670 687 return (retval < 0) ? retval : -EDOM; 671 688 } 672 689 ··· 676 693 retval = usb_get_status (udev, USB_RECIP_INTERFACE, 677 694 iface->altsetting [0].desc.bInterfaceNumber, dev->buf); 678 695 if (retval != 2) { 679 679 - dev_dbg (&iface->dev, "get interface status --> %d\n", retval); 696 696 + dev_err(&iface->dev, "get interface status --> %d\n", retval); 680 697 return (retval < 0) ? retval : -EDOM; 681 698 } 682 699 // FIXME get status for each endpoint in the interface 683 683 - 700 700 + 684 701 return 0; 685 702 } 686 703 ··· 735 752 */ 736 753 if (subcase->number > 0) { 737 754 if ((subcase->number - ctx->last) != 1) { 738 738 - dbg ("subcase %d completed out of order, last %d", 739 739 - subcase->number, ctx->last); 755 755 + ERROR(ctx->dev, 756 756 + "subcase %d completed out of order, last %d\n", 757 757 + subcase->number, ctx->last); 740 758 status = -EDOM; 741 759 ctx->last = subcase->number; 742 760 goto error; ··· 761 777 else if (subcase->number == 12 && status == -EPIPE) 762 778 status = 0; 763 779 else 764 764 - dbg ("subtest %d error, status %d", 780 780 + ERROR(ctx->dev, "subtest %d error, status %d\n", 765 781 subcase->number, status); 766 782 } 767 783 ··· 772 788 int i; 773 789 774 790 ctx->status = status; 775 775 - info ("control queue %02x.%02x, err %d, %d left", 791 791 + ERROR(ctx->dev, "control queue %02x.%02x, err %d, " 792 792 + "%d left, subcase %d, len %d/%d\n", 776 793 reqp->bRequestType, reqp->bRequest, 777 777 - status, ctx->count); 794 794 + status, ctx->count, subcase->number, 795 795 + urb->actual_length, 796 796 + urb->transfer_buffer_length); 778 797 779 798 /* FIXME this "unlink everything" exit route should 780 799 * be a separate test case. ··· 786 799 /* unlink whatever's still pending */ 787 800 for (i = 1; i < ctx->param->sglen; i++) { 788 801 struct urb *u = ctx->urb [ 789 789 - (i + subcase->number) % ctx->param->sglen]; 802 802 + (i + subcase->number) 803 803 + % ctx->param->sglen]; 790 804 791 805 if (u == urb || !u->dev) 792 806 continue; ··· 800 812 case -EIDRM: 801 813 continue; 802 814 default: 803 803 - dbg ("urb unlink --> %d", status); 815 815 + ERROR(ctx->dev, "urb unlink --> %d\n", 816 816 + status); 804 817 } 805 818 } 806 819 status = ctx->status; ··· 811 822 /* resubmit if we need to, else mark this as done */ 812 823 if ((status == 0) && (ctx->pending < ctx->count)) { 813 824 if ((status = usb_submit_urb (urb, GFP_ATOMIC)) != 0) { 814 814 - dbg ("can't resubmit ctrl %02x.%02x, err %d", 825 825 + ERROR(ctx->dev, 826 826 + "can't resubmit ctrl %02x.%02x, err %d\n", 815 827 reqp->bRequestType, reqp->bRequest, status); 816 828 urb->dev = NULL; 817 829 } else 818 830 ctx->pending++; 819 831 } else 820 832 urb->dev = NULL; 821 821 - 833 833 + 822 834 /* signal completion when nothing's queued */ 823 835 if (ctx->pending == 0) 824 836 complete (&ctx->complete); ··· 908 918 req.wValue = cpu_to_le16 (USB_DT_INTERFACE << 8); 909 919 // interface == 0 910 920 len = sizeof (struct usb_interface_descriptor); 911 911 - expected = EPIPE; 921 921 + expected = -EPIPE; 912 922 break; 913 923 // NOTE: two consecutive stalls in the queue here. 914 924 // that tests fault recovery a bit more aggressively. 915 915 - case 8: // clear endpoint halt (USUALLY STALLS) 925 925 + case 8: // clear endpoint halt (MAY STALL) 916 926 req.bRequest = USB_REQ_CLEAR_FEATURE; 917 927 req.bRequestType = USB_RECIP_ENDPOINT; 918 928 // wValue 0 == ep halt ··· 955 965 break; 956 966 case 14: // short read; try to fill the last packet 957 967 req.wValue = cpu_to_le16 ((USB_DT_DEVICE << 8) | 0); 958 958 - // device descriptor size == 18 bytes 968 968 + /* device descriptor size == 18 bytes */ 959 969 len = udev->descriptor.bMaxPacketSize0; 960 970 switch (len) { 961 971 case 8: len = 24; break; ··· 964 974 expected = -EREMOTEIO; 965 975 break; 966 976 default: 967 967 - err ("bogus number of ctrl queue testcases!"); 977 977 + ERROR(dev, "bogus number of ctrl queue testcases!\n"); 968 978 context.status = -EINVAL; 969 979 goto cleanup; 970 980 } ··· 993 1003 for (i = 0; i < param->sglen; i++) { 994 1004 context.status = usb_submit_urb (urb [i], GFP_ATOMIC); 995 1005 if (context.status != 0) { 996 996 - dbg ("can't submit urb[%d], status %d", 1006 1006 + ERROR(dev, "can't submit urb[%d], status %d\n", 997 1007 i, context.status); 998 1008 context.count = context.pending; 999 1009 break; ··· 1060 1070 * due to errors, or is just NAKing requests. 1061 1071 */ 1062 1072 if ((retval = usb_submit_urb (urb, GFP_KERNEL)) != 0) { 1063 1063 - dev_dbg (&dev->intf->dev, "submit fail %d\n", retval); 1073 1073 + dev_err(&dev->intf->dev, "submit fail %d\n", retval); 1064 1074 return retval; 1065 1075 } 1066 1076 ··· 1077 1087 * "normal" drivers would prevent resubmission, but 1078 1088 * since we're testing unlink paths, we can't. 1079 1089 */ 1080 1080 - dev_dbg (&dev->intf->dev, "unlink retry\n"); 1090 1090 + ERROR(dev, "unlink retry\n"); 1081 1091 goto retry; 1082 1092 } 1083 1093 } else 1084 1094 usb_kill_urb (urb); 1085 1095 if (!(retval == 0 || retval == -EINPROGRESS)) { 1086 1086 - dev_dbg (&dev->intf->dev, "unlink fail %d\n", retval); 1096 1096 + dev_err(&dev->intf->dev, "unlink fail %d\n", retval); 1087 1097 return retval; 1088 1098 } 1089 1099 ··· 1111 1121 1112 1122 /*-------------------------------------------------------------------------*/ 1113 1123 1114 1114 - static int verify_not_halted (int ep, struct urb *urb) 1124 1124 + static int verify_not_halted(struct usbtest_dev *tdev, int ep, struct urb *urb) 1115 1125 { 1116 1126 int retval; 1117 1127 u16 status; ··· 1119 1129 /* shouldn't look or act halted */ 1120 1130 retval = usb_get_status (urb->dev, USB_RECIP_ENDPOINT, ep, &status); 1121 1131 if (retval < 0) { 1122 1122 - dbg ("ep %02x couldn't get no-halt status, %d", ep, retval); 1132 1132 + ERROR(tdev, "ep %02x couldn't get no-halt status, %d\n", 1133 1133 + ep, retval); 1123 1134 return retval; 1124 1135 } 1125 1136 if (status != 0) { 1126 1126 - dbg ("ep %02x bogus status: %04x != 0", ep, status); 1137 1137 + ERROR(tdev, "ep %02x bogus status: %04x != 0\n", ep, status); 1127 1138 return -EINVAL; 1128 1139 } 1129 1129 - retval = simple_io (urb, 1, 0, 0, __func__); 1140 1140 + retval = simple_io(tdev, urb, 1, 0, 0, __func__); 1130 1141 if (retval != 0) 1131 1142 return -EINVAL; 1132 1143 return 0; 1133 1144 } 1134 1145 1135 1135 - static int verify_halted (int ep, struct urb *urb) 1146 1146 + static int verify_halted(struct usbtest_dev *tdev, int ep, struct urb *urb) 1136 1147 { 1137 1148 int retval; 1138 1149 u16 status; ··· 1141 1150 /* should look and act halted */ 1142 1151 retval = usb_get_status (urb->dev, USB_RECIP_ENDPOINT, ep, &status); 1143 1152 if (retval < 0) { 1144 1144 - dbg ("ep %02x couldn't get halt status, %d", ep, retval); 1153 1153 + ERROR(tdev, "ep %02x couldn't get halt status, %d\n", 1154 1154 + ep, retval); 1145 1155 return retval; 1146 1156 } 1147 1157 le16_to_cpus(&status); 1148 1158 if (status != 1) { 1149 1149 - dbg ("ep %02x bogus status: %04x != 1", ep, status); 1159 1159 + ERROR(tdev, "ep %02x bogus status: %04x != 1\n", ep, status); 1150 1160 return -EINVAL; 1151 1161 } 1152 1152 - retval = simple_io (urb, 1, 0, -EPIPE, __func__); 1162 1162 + retval = simple_io(tdev, urb, 1, 0, -EPIPE, __func__); 1153 1163 if (retval != -EPIPE) 1154 1164 return -EINVAL; 1155 1155 - retval = simple_io (urb, 1, 0, -EPIPE, "verify_still_halted"); 1165 1165 + retval = simple_io(tdev, urb, 1, 0, -EPIPE, "verify_still_halted"); 1156 1166 if (retval != -EPIPE) 1157 1167 return -EINVAL; 1158 1168 return 0; 1159 1169 } 1160 1170 1161 1161 - static int test_halt (int ep, struct urb *urb) 1171 1171 + static int test_halt(struct usbtest_dev *tdev, int ep, struct urb *urb) 1162 1172 { 1163 1173 int retval; 1164 1174 1165 1175 /* shouldn't look or act halted now */ 1166 1166 - retval = verify_not_halted (ep, urb); 1176 1176 + retval = verify_not_halted(tdev, ep, urb); 1167 1177 if (retval < 0) 1168 1178 return retval; 1169 1179 ··· 1174 1182 USB_ENDPOINT_HALT, ep, 1175 1183 NULL, 0, USB_CTRL_SET_TIMEOUT); 1176 1184 if (retval < 0) { 1177 1177 - dbg ("ep %02x couldn't set halt, %d", ep, retval); 1185 1185 + ERROR(tdev, "ep %02x couldn't set halt, %d\n", ep, retval); 1178 1186 return retval; 1179 1187 } 1180 1180 - retval = verify_halted (ep, urb); 1188 1188 + retval = verify_halted(tdev, ep, urb); 1181 1189 if (retval < 0) 1182 1190 return retval; 1183 1191 1184 1192 /* clear halt (tests API + protocol), verify it worked */ 1185 1193 retval = usb_clear_halt (urb->dev, urb->pipe); 1186 1194 if (retval < 0) { 1187 1187 - dbg ("ep %02x couldn't clear halt, %d", ep, retval); 1195 1195 + ERROR(tdev, "ep %02x couldn't clear halt, %d\n", ep, retval); 1188 1196 return retval; 1189 1197 } 1190 1190 - retval = verify_not_halted (ep, urb); 1198 1198 + retval = verify_not_halted(tdev, ep, urb); 1191 1199 if (retval < 0) 1192 1200 return retval; 1193 1201 ··· 1209 1217 if (dev->in_pipe) { 1210 1218 ep = usb_pipeendpoint (dev->in_pipe) | USB_DIR_IN; 1211 1219 urb->pipe = dev->in_pipe; 1212 1212 - retval = test_halt (ep, urb); 1220 1220 + retval = test_halt(dev, ep, urb); 1213 1221 if (retval < 0) 1214 1222 goto done; 1215 1223 } ··· 1217 1225 if (dev->out_pipe) { 1218 1226 ep = usb_pipeendpoint (dev->out_pipe); 1219 1227 urb->pipe = dev->out_pipe; 1220 1220 - retval = test_halt (ep, urb); 1228 1228 + retval = test_halt(dev, ep, urb); 1221 1229 } 1222 1230 done: 1223 1231 simple_free_urb (urb); ··· 1267 1275 if (retval != len) { 1268 1276 what = "write"; 1269 1277 if (retval >= 0) { 1270 1270 - INFO(dev, "ctrl_out, wlen %d (expected %d)\n", 1278 1278 + ERROR(dev, "ctrl_out, wlen %d (expected %d)\n", 1271 1279 retval, len); 1272 1280 retval = -EBADMSG; 1273 1281 } ··· 1281 1289 if (retval != len) { 1282 1290 what = "read"; 1283 1291 if (retval >= 0) { 1284 1284 - INFO(dev, "ctrl_out, rlen %d (expected %d)\n", 1292 1292 + ERROR(dev, "ctrl_out, rlen %d (expected %d)\n", 1285 1293 retval, len); 1286 1294 retval = -EBADMSG; 1287 1295 } ··· 1291 1299 /* fail if we can't verify */ 1292 1300 for (j = 0; j < len; j++) { 1293 1301 if (buf [j] != (u8) (i + j)) { 1294 1294 - INFO (dev, "ctrl_out, byte %d is %d not %d\n", 1302 1302 + ERROR(dev, "ctrl_out, byte %d is %d not %d\n", 1295 1303 j, buf [j], (u8) i + j); 1296 1304 retval = -EBADMSG; 1297 1305 break; ··· 1313 1321 } 1314 1322 1315 1323 if (retval < 0) 1316 1316 - INFO (dev, "ctrl_out %s failed, code %d, count %d\n", 1324 1324 + ERROR (dev, "ctrl_out %s failed, code %d, count %d\n", 1317 1325 what, retval, i); 1318 1326 1319 1327 kfree (buf); ··· 1358 1366 case 0: 1359 1367 goto done; 1360 1368 default: 1361 1361 - dev_dbg (&ctx->dev->intf->dev, 1369 1369 + dev_err(&ctx->dev->intf->dev, 1362 1370 "iso resubmit err %d\n", 1363 1371 status); 1364 1372 /* FALLTHROUGH */ ··· 1373 1381 ctx->pending--; 1374 1382 if (ctx->pending == 0) { 1375 1383 if (ctx->errors) 1376 1376 - dev_dbg (&ctx->dev->intf->dev, 1384 1384 + dev_err(&ctx->dev->intf->dev, 1377 1385 "iso test, %lu errors out of %lu\n", 1378 1386 ctx->errors, ctx->packet_count); 1379 1387 complete (&ctx->done); ··· 1450 1458 1451 1459 memset (urbs, 0, sizeof urbs); 1452 1460 udev = testdev_to_usbdev (dev); 1453 1453 - dev_dbg (&dev->intf->dev, 1461 1461 + dev_info(&dev->intf->dev, 1454 1462 "... iso period %d %sframes, wMaxPacket %04x\n", 1455 1463 1 << (desc->bInterval - 1), 1456 1464 (udev->speed == USB_SPEED_HIGH) ? "micro" : "", ··· 1467 1475 urbs [i]->context = &context; 1468 1476 } 1469 1477 packets *= param->iterations; 1470 1470 - dev_dbg (&dev->intf->dev, 1478 1478 + dev_info(&dev->intf->dev, 1471 1479 "... total %lu msec (%lu packets)\n", 1472 1480 (packets * (1 << (desc->bInterval - 1))) 1473 1481 / ((udev->speed == USB_SPEED_HIGH) ? 8 : 1), ··· 1529 1537 * except indirectly by consuming USB bandwidth and CPU resources for test 1530 1538 * threads and request completion. But the only way to know that for sure 1531 1539 * is to test when HC queues are in use by many devices. 1540 1540 + * 1541 1541 + * WARNING: Because usbfs grabs udev->dev.sem before calling this ioctl(), 1542 1542 + * it locks out usbcore in certain code paths. Notably, if you disconnect 1543 1543 + * the device-under-test, khubd will wait block forever waiting for the 1544 1544 + * ioctl to complete ... so that usb_disconnect() can abort the pending 1545 1545 + * urbs and then call usbtest_disconnect(). To abort a test, you're best 1546 1546 + * off just killing the userspace task and waiting for it to exit. 1532 1547 */ 1533 1548 1534 1549 static int ··· 1574 1575 * altsettings; force a default so most tests don't need to check. 1575 1576 */ 1576 1577 if (dev->info->alt >= 0) { 1577 1577 - int res; 1578 1578 + int res; 1578 1579 1579 1580 if (intf->altsetting->desc.bInterfaceNumber) { 1580 1581 mutex_unlock(&dev->lock); ··· 1603 1604 switch (param->test_num) { 1604 1605 1605 1606 case 0: 1606 1606 - dev_dbg (&intf->dev, "TEST 0: NOP\n"); 1607 1607 + dev_info(&intf->dev, "TEST 0: NOP\n"); 1607 1608 retval = 0; 1608 1609 break; 1609 1610 ··· 1611 1612 case 1: 1612 1613 if (dev->out_pipe == 0) 1613 1614 break; 1614 1614 - dev_dbg (&intf->dev, 1615 1615 + dev_info(&intf->dev, 1615 1616 "TEST 1: write %d bytes %u times\n", 1616 1617 param->length, param->iterations); 1617 1618 urb = simple_alloc_urb (udev, dev->out_pipe, param->length); ··· 1620 1621 break; 1621 1622 } 1622 1623 // FIRMWARE: bulk sink (maybe accepts short writes) 1623 1623 - retval = simple_io (urb, param->iterations, 0, 0, "test1"); 1624 1624 + retval = simple_io(dev, urb, param->iterations, 0, 0, "test1"); 1624 1625 simple_free_urb (urb); 1625 1626 break; 1626 1627 case 2: 1627 1628 if (dev->in_pipe == 0) 1628 1629 break; 1629 1629 - dev_dbg (&intf->dev, 1630 1630 + dev_info(&intf->dev, 1630 1631 "TEST 2: read %d bytes %u times\n", 1631 1632 param->length, param->iterations); 1632 1633 urb = simple_alloc_urb (udev, dev->in_pipe, param->length); ··· 1635 1636 break; 1636 1637 } 1637 1638 // FIRMWARE: bulk source (maybe generates short writes) 1638 1638 - retval = simple_io (urb, param->iterations, 0, 0, "test2"); 1639 1639 + retval = simple_io(dev, urb, param->iterations, 0, 0, "test2"); 1639 1640 simple_free_urb (urb); 1640 1641 break; 1641 1642 case 3: 1642 1643 if (dev->out_pipe == 0 || param->vary == 0) 1643 1644 break; 1644 1644 - dev_dbg (&intf->dev, 1645 1645 + dev_info(&intf->dev, 1645 1646 "TEST 3: write/%d 0..%d bytes %u times\n", 1646 1647 param->vary, param->length, param->iterations); 1647 1648 urb = simple_alloc_urb (udev, dev->out_pipe, param->length); ··· 1650 1651 break; 1651 1652 } 1652 1653 // FIRMWARE: bulk sink (maybe accepts short writes) 1653 1653 - retval = simple_io (urb, param->iterations, param->vary, 1654 1654 + retval = simple_io(dev, urb, param->iterations, param->vary, 1654 1655 0, "test3"); 1655 1656 simple_free_urb (urb); 1656 1657 break; 1657 1658 case 4: 1658 1659 if (dev->in_pipe == 0 || param->vary == 0) 1659 1660 break; 1660 1660 - dev_dbg (&intf->dev, 1661 1661 + dev_info(&intf->dev, 1661 1662 "TEST 4: read/%d 0..%d bytes %u times\n", 1662 1663 param->vary, param->length, param->iterations); 1663 1664 urb = simple_alloc_urb (udev, dev->in_pipe, param->length); ··· 1666 1667 break; 1667 1668 } 1668 1669 // FIRMWARE: bulk source (maybe generates short writes) 1669 1669 - retval = simple_io (urb, param->iterations, param->vary, 1670 1670 + retval = simple_io(dev, urb, param->iterations, param->vary, 1670 1671 0, "test4"); 1671 1672 simple_free_urb (urb); 1672 1673 break; ··· 1675 1676 case 5: 1676 1677 if (dev->out_pipe == 0 || param->sglen == 0) 1677 1678 break; 1678 1678 - dev_dbg (&intf->dev, 1679 1679 + dev_info(&intf->dev, 1679 1680 "TEST 5: write %d sglists %d entries of %d bytes\n", 1680 1681 param->iterations, 1681 1682 param->sglen, param->length); ··· 1685 1686 break; 1686 1687 } 1687 1688 // FIRMWARE: bulk sink (maybe accepts short writes) 1688 1688 - retval = perform_sglist (udev, param->iterations, dev->out_pipe, 1689 1689 + retval = perform_sglist(dev, param->iterations, dev->out_pipe, 1689 1690 &req, sg, param->sglen); 1690 1691 free_sglist (sg, param->sglen); 1691 1692 break; ··· 1693 1694 case 6: 1694 1695 if (dev->in_pipe == 0 || param->sglen == 0) 1695 1696 break; 1696 1696 - dev_dbg (&intf->dev, 1697 1697 + dev_info(&intf->dev, 1697 1698 "TEST 6: read %d sglists %d entries of %d bytes\n", 1698 1699 param->iterations, 1699 1700 param->sglen, param->length); ··· 1703 1704 break; 1704 1705 } 1705 1706 // FIRMWARE: bulk source (maybe generates short writes) 1706 1706 - retval = perform_sglist (udev, param->iterations, dev->in_pipe, 1707 1707 + retval = perform_sglist(dev, param->iterations, dev->in_pipe, 1707 1708 &req, sg, param->sglen); 1708 1709 free_sglist (sg, param->sglen); 1709 1710 break; 1710 1711 case 7: 1711 1712 if (dev->out_pipe == 0 || param->sglen == 0 || param->vary == 0) 1712 1713 break; 1713 1713 - dev_dbg (&intf->dev, 1714 1714 + dev_info(&intf->dev, 1714 1715 "TEST 7: write/%d %d sglists %d entries 0..%d bytes\n", 1715 1716 param->vary, param->iterations, 1716 1717 param->sglen, param->length); ··· 1720 1721 break; 1721 1722 } 1722 1723 // FIRMWARE: bulk sink (maybe accepts short writes) 1723 1723 - retval = perform_sglist (udev, param->iterations, dev->out_pipe, 1724 1724 + retval = perform_sglist(dev, param->iterations, dev->out_pipe, 1724 1725 &req, sg, param->sglen); 1725 1726 free_sglist (sg, param->sglen); 1726 1727 break; 1727 1728 case 8: 1728 1729 if (dev->in_pipe == 0 || param->sglen == 0 || param->vary == 0) 1729 1730 break; 1730 1730 - dev_dbg (&intf->dev, 1731 1731 + dev_info(&intf->dev, 1731 1732 "TEST 8: read/%d %d sglists %d entries 0..%d bytes\n", 1732 1733 param->vary, param->iterations, 1733 1734 param->sglen, param->length); ··· 1737 1738 break; 1738 1739 } 1739 1740 // FIRMWARE: bulk source (maybe generates short writes) 1740 1740 - retval = perform_sglist (udev, param->iterations, dev->in_pipe, 1741 1741 + retval = perform_sglist(dev, param->iterations, dev->in_pipe, 1741 1742 &req, sg, param->sglen); 1742 1743 free_sglist (sg, param->sglen); 1743 1744 break; ··· 1745 1746 /* non-queued sanity tests for control (chapter 9 subset) */ 1746 1747 case 9: 1747 1748 retval = 0; 1748 1748 - dev_dbg (&intf->dev, 1749 1749 + dev_info(&intf->dev, 1749 1750 "TEST 9: ch9 (subset) control tests, %d times\n", 1750 1751 param->iterations); 1751 1752 for (i = param->iterations; retval == 0 && i--; /* NOP */) 1752 1753 retval = ch9_postconfig (dev); 1753 1754 if (retval) 1754 1754 - dbg ("ch9 subset failed, iterations left %d", i); 1755 1755 + dev_err(&intf->dev, "ch9 subset failed, " 1756 1756 + "iterations left %d\n", i); 1755 1757 break; 1756 1758 1757 1759 /* queued control messaging */ ··· 1760 1760 if (param->sglen == 0) 1761 1761 break; 1762 1762 retval = 0; 1763 1763 - dev_dbg (&intf->dev, 1763 1763 + dev_info(&intf->dev, 1764 1764 "TEST 10: queue %d control calls, %d times\n", 1765 1765 param->sglen, 1766 1766 param->iterations); ··· 1772 1772 if (dev->in_pipe == 0 || !param->length) 1773 1773 break; 1774 1774 retval = 0; 1775 1775 - dev_dbg (&intf->dev, "TEST 11: unlink %d reads of %d\n", 1775 1775 + dev_info(&intf->dev, "TEST 11: unlink %d reads of %d\n", 1776 1776 param->iterations, param->length); 1777 1777 for (i = param->iterations; retval == 0 && i--; /* NOP */) 1778 1778 retval = unlink_simple (dev, dev->in_pipe, 1779 1779 param->length); 1780 1780 if (retval) 1781 1781 - dev_dbg (&intf->dev, "unlink reads failed %d, " 1781 1781 + dev_err(&intf->dev, "unlink reads failed %d, " 1782 1782 "iterations left %d\n", retval, i); 1783 1783 break; 1784 1784 case 12: 1785 1785 if (dev->out_pipe == 0 || !param->length) 1786 1786 break; 1787 1787 retval = 0; 1788 1788 - dev_dbg (&intf->dev, "TEST 12: unlink %d writes of %d\n", 1788 1788 + dev_info(&intf->dev, "TEST 12: unlink %d writes of %d\n", 1789 1789 param->iterations, param->length); 1790 1790 for (i = param->iterations; retval == 0 && i--; /* NOP */) 1791 1791 retval = unlink_simple (dev, dev->out_pipe, 1792 1792 param->length); 1793 1793 if (retval) 1794 1794 - dev_dbg (&intf->dev, "unlink writes failed %d, " 1794 1794 + dev_err(&intf->dev, "unlink writes failed %d, " 1795 1795 "iterations left %d\n", retval, i); 1796 1796 break; 1797 1797 ··· 1800 1800 if (dev->out_pipe == 0 && dev->in_pipe == 0) 1801 1801 break; 1802 1802 retval = 0; 1803 1803 - dev_dbg (&intf->dev, "TEST 13: set/clear %d halts\n", 1803 1803 + dev_info(&intf->dev, "TEST 13: set/clear %d halts\n", 1804 1804 param->iterations); 1805 1805 for (i = param->iterations; retval == 0 && i--; /* NOP */) 1806 1806 retval = halt_simple (dev); 1807 1807 - 1807 1807 + 1808 1808 if (retval) 1809 1809 - DBG (dev, "halts failed, iterations left %d\n", i); 1809 1809 + ERROR(dev, "halts failed, iterations left %d\n", i); 1810 1810 break; 1811 1811 1812 1812 /* control write tests */ 1813 1813 case 14: 1814 1814 if (!dev->info->ctrl_out) 1815 1815 break; 1816 1816 - dev_dbg (&intf->dev, "TEST 14: %d ep0out, %d..%d vary %d\n", 1816 1816 + dev_info(&intf->dev, "TEST 14: %d ep0out, %d..%d vary %d\n", 1817 1817 param->iterations, 1818 1818 realworld ? 1 : 0, param->length, 1819 1819 param->vary); 1820 1820 - retval = ctrl_out (dev, param->iterations, 1820 1820 + retval = ctrl_out(dev, param->iterations, 1821 1821 param->length, param->vary); 1822 1822 break; 1823 1823 ··· 1825 1825 case 15: 1826 1826 if (dev->out_iso_pipe == 0 || param->sglen == 0) 1827 1827 break; 1828 1828 - dev_dbg (&intf->dev, 1828 1828 + dev_info(&intf->dev, 1829 1829 "TEST 15: write %d iso, %d entries of %d bytes\n", 1830 1830 param->iterations, 1831 1831 param->sglen, param->length); ··· 1838 1838 case 16: 1839 1839 if (dev->in_iso_pipe == 0 || param->sglen == 0) 1840 1840 break; 1841 1841 - dev_dbg (&intf->dev, 1841 1841 + dev_info(&intf->dev, 1842 1842 "TEST 16: read %d iso, %d entries of %d bytes\n", 1843 1843 param->iterations, 1844 1844 param->sglen, param->length); ··· 1898 1898 return -ENODEV; 1899 1899 if (product && le16_to_cpu(udev->descriptor.idProduct) != (u16)product) 1900 1900 return -ENODEV; 1901 1901 - dbg ("matched module params, vend=0x%04x prod=0x%04x", 1901 1901 + dev_info(&intf->dev, "matched module params, " 1902 1902 + "vend=0x%04x prod=0x%04x\n", 1902 1903 le16_to_cpu(udev->descriptor.idVendor), 1903 1904 le16_to_cpu(udev->descriptor.idProduct)); 1904 1905 } ··· 1941 1940 1942 1941 status = get_endpoints (dev, intf); 1943 1942 if (status < 0) { 1944 1944 - dbg ("couldn't get endpoints, %d\n", status); 1943 1943 + WARN(dev, "couldn't get endpoints, %d\n", 1944 1944 + status); 1945 1945 return status; 1946 1946 } 1947 1947 /* may find bulk or ISO pipes */ ··· 2084 2082 }; 2085 2083 #endif 2086 2084 2087 2087 - // FIXME remove this 2088 2088 - static struct usbtest_info hact_info = { 2089 2089 - .name = "FX2/hact", 2090 2090 - //.ep_in = 6, 2091 2091 - .ep_out = 2, 2092 2092 - .alt = -1, 2093 2093 - }; 2094 2094 - 2095 2085 2096 2086 static struct usb_device_id id_table [] = { 2097 2097 - 2098 2098 - { USB_DEVICE (0x0547, 0x1002), 2099 2099 - .driver_info = (unsigned long) &hact_info, 2100 2100 - }, 2101 2087 2102 2088 /*-------------------------------------------------------------*/ 2103 2089 ··· 2175 2185 { 2176 2186 #ifdef GENERIC 2177 2187 if (vendor) 2178 2178 - dbg ("params: vend=0x%04x prod=0x%04x", vendor, product); 2188 2188 + pr_debug("params: vend=0x%04x prod=0x%04x\n", vendor, product); 2179 2189 #endif 2180 2190 return usb_register (&usbtest_driver); 2181 2191 }

+50 -48

drivers/usb/serial/aircable.c

reviewed

··· 147 147 */ 148 148 static int serial_buf_data_avail(struct circ_buf *cb) 149 149 { 150 150 - return CIRC_CNT(cb->head,cb->tail,AIRCABLE_BUF_SIZE); 150 150 + return CIRC_CNT(cb->head, cb->tail, AIRCABLE_BUF_SIZE); 151 151 } 152 152 153 153 /* ··· 171 171 cb->head = (cb->head + c) & (AIRCABLE_BUF_SIZE-1); 172 172 buf += c; 173 173 count -= c; 174 174 - ret= c; 174 174 + ret = c; 175 175 } 176 176 return ret; 177 177 } ··· 197 197 cb->tail = (cb->tail + c) & (AIRCABLE_BUF_SIZE-1); 198 198 buf += c; 199 199 count -= c; 200 200 - ret= c; 200 200 + ret = c; 201 201 } 202 202 return ret; 203 203 } ··· 208 208 { 209 209 int count, result; 210 210 struct aircable_private *priv = usb_get_serial_port_data(port); 211 211 - unsigned char* buf; 211 211 + unsigned char *buf; 212 212 __le16 *dbuf; 213 213 dbg("%s - port %d", __func__, port->number); 214 214 if (port->write_urb_busy) ··· 229 229 buf[1] = TX_HEADER_1; 230 230 dbuf = (__le16 *)&buf[2]; 231 231 *dbuf = cpu_to_le16((u16)count); 232 232 - serial_buf_get(priv->tx_buf,buf + HCI_HEADER_LENGTH, MAX_HCI_FRAMESIZE); 232 232 + serial_buf_get(priv->tx_buf, buf + HCI_HEADER_LENGTH, 233 233 + MAX_HCI_FRAMESIZE); 233 234 234 235 memcpy(port->write_urb->transfer_buffer, buf, 235 236 count + HCI_HEADER_LENGTH); ··· 262 261 struct tty_struct *tty; 263 262 unsigned char *data; 264 263 int count; 265 265 - if (priv->rx_flags & THROTTLED){ 264 264 + if (priv->rx_flags & THROTTLED) { 266 265 if (priv->rx_flags & ACTUALLY_THROTTLED) 267 266 schedule_work(&priv->rx_work); 268 267 return; ··· 283 282 count = min(64, serial_buf_data_avail(priv->rx_buf)); 284 283 285 284 if (count <= 0) 286 286 - return; //We have finished sending everything. 285 285 + return; /* We have finished sending everything. */ 287 286 288 287 tty_prepare_flip_string(tty, &data, count); 289 289 - if (!data){ 288 288 + if (!data) { 290 289 err("%s- kzalloc(%d) failed.", __func__, count); 291 290 return; 292 291 } ··· 305 304 static int aircable_probe(struct usb_serial *serial, 306 305 const struct usb_device_id *id) 307 306 { 308 308 - struct usb_host_interface *iface_desc = serial->interface->cur_altsetting; 307 307 + struct usb_host_interface *iface_desc = serial->interface-> 308 308 + cur_altsetting; 309 309 struct usb_endpoint_descriptor *endpoint; 310 310 - int num_bulk_out=0; 310 310 + int num_bulk_out = 0; 311 311 int i; 312 312 313 313 for (i = 0; i < iface_desc->desc.bNumEndpoints; i++) { ··· 327 325 return 0; 328 326 } 329 327 330 330 - static int aircable_attach (struct usb_serial *serial) 328 328 + static int aircable_attach(struct usb_serial *serial) 331 329 { 332 330 struct usb_serial_port *port = serial->port[0]; 333 331 struct aircable_private *priv; 334 332 335 333 priv = kzalloc(sizeof(struct aircable_private), GFP_KERNEL); 336 336 - if (!priv){ 334 334 + if (!priv) { 337 335 err("%s- kmalloc(%Zd) failed.", __func__, 338 336 sizeof(struct aircable_private)); 339 337 return -ENOMEM; ··· 394 392 395 393 usb_serial_debug_data(debug, &port->dev, __func__, count, source); 396 394 397 397 - if (!count){ 395 395 + if (!count) { 398 396 dbg("%s - write request of 0 bytes", __func__); 399 397 return count; 400 398 } ··· 420 418 421 419 /* This has been taken from cypress_m8.c cypress_write_int_callback */ 422 420 switch (status) { 423 423 - case 0: 424 424 - /* success */ 425 425 - break; 426 426 - case -ECONNRESET: 427 427 - case -ENOENT: 428 428 - case -ESHUTDOWN: 429 429 - /* this urb is terminated, clean up */ 430 430 - dbg("%s - urb shutting down with status: %d", 431 431 - __func__, status); 432 432 - port->write_urb_busy = 0; 421 421 + case 0: 422 422 + /* success */ 423 423 + break; 424 424 + case -ECONNRESET: 425 425 + case -ENOENT: 426 426 + case -ESHUTDOWN: 427 427 + /* this urb is terminated, clean up */ 428 428 + dbg("%s - urb shutting down with status: %d", 429 429 + __func__, status); 430 430 + port->write_urb_busy = 0; 431 431 + return; 432 432 + default: 433 433 + /* error in the urb, so we have to resubmit it */ 434 434 + dbg("%s - Overflow in write", __func__); 435 435 + dbg("%s - nonzero write bulk status received: %d", 436 436 + __func__, status); 437 437 + port->write_urb->transfer_buffer_length = 1; 438 438 + port->write_urb->dev = port->serial->dev; 439 439 + result = usb_submit_urb(port->write_urb, GFP_ATOMIC); 440 440 + if (result) 441 441 + dev_err(&urb->dev->dev, 442 442 + "%s - failed resubmitting write urb, error %d\n", 443 443 + __func__, result); 444 444 + else 433 445 return; 434 434 - default: 435 435 - /* error in the urb, so we have to resubmit it */ 436 436 - dbg("%s - Overflow in write", __func__); 437 437 - dbg("%s - nonzero write bulk status received: %d", 438 438 - __func__, status); 439 439 - port->write_urb->transfer_buffer_length = 1; 440 440 - port->write_urb->dev = port->serial->dev; 441 441 - result = usb_submit_urb(port->write_urb, GFP_ATOMIC); 442 442 - if (result) 443 443 - dev_err(&urb->dev->dev, 444 444 - "%s - failed resubmitting write urb, error %d\n", 445 445 - __func__, result); 446 446 - else 447 447 - return; 448 446 } 449 447 450 448 port->write_urb_busy = 0; ··· 474 472 dbg("%s - caught -EPROTO, resubmitting the urb", 475 473 __func__); 476 474 usb_fill_bulk_urb(port->read_urb, port->serial->dev, 477 477 - usb_rcvbulkpipe(port->serial->dev, 478 478 - port->bulk_in_endpointAddress), 479 479 - port->read_urb->transfer_buffer, 480 480 - port->read_urb->transfer_buffer_length, 481 481 - aircable_read_bulk_callback, port); 475 475 + usb_rcvbulkpipe(port->serial->dev, 476 476 + port->bulk_in_endpointAddress), 477 477 + port->read_urb->transfer_buffer, 478 478 + port->read_urb->transfer_buffer_length, 479 479 + aircable_read_bulk_callback, port); 482 480 483 481 result = usb_submit_urb(urb, GFP_ATOMIC); 484 482 if (result) ··· 492 490 } 493 491 494 492 usb_serial_debug_data(debug, &port->dev, __func__, 495 495 - urb->actual_length,urb->transfer_buffer); 493 493 + urb->actual_length, urb->transfer_buffer); 496 494 497 495 tty = port->tty; 498 496 if (tty && urb->actual_length) { ··· 509 507 no_packages = urb->actual_length / (HCI_COMPLETE_FRAME); 510 508 511 509 if (urb->actual_length % HCI_COMPLETE_FRAME != 0) 512 512 - no_packages+=1; 510 510 + no_packages++; 513 511 514 514 - for (i = 0; i < no_packages ;i++) { 512 512 + for (i = 0; i < no_packages; i++) { 515 513 if (remaining > (HCI_COMPLETE_FRAME)) 516 514 package_length = HCI_COMPLETE_FRAME; 517 515 else ··· 531 529 if (port->open_count) { 532 530 usb_fill_bulk_urb(port->read_urb, port->serial->dev, 533 531 usb_rcvbulkpipe(port->serial->dev, 534 534 - port->bulk_in_endpointAddress), 532 532 + port->bulk_in_endpointAddress), 535 533 port->read_urb->transfer_buffer, 536 534 port->read_urb->transfer_buffer_length, 537 535 aircable_read_bulk_callback, port); ··· 604 602 .unthrottle = aircable_unthrottle, 605 603 }; 606 604 607 607 - static int __init aircable_init (void) 605 605 + static int __init aircable_init(void) 608 606 { 609 607 int retval; 610 608 retval = usb_serial_register(&aircable_device); ··· 621 619 return retval; 622 620 } 623 621 624 624 - static void __exit aircable_exit (void) 622 622 + static void __exit aircable_exit(void) 625 623 { 626 624 usb_deregister(&aircable_driver); 627 625 usb_serial_deregister(&aircable_device);

+35 -28

drivers/usb/serial/airprime.c

reviewed

··· 68 68 val |= 0x02; 69 69 70 70 return usb_control_msg(serial->dev, 71 71 - usb_rcvctrlpipe(serial->dev, 0), 72 72 - 0x22,0x21,val,0,NULL,0,USB_CTRL_SET_TIMEOUT); 71 71 + usb_rcvctrlpipe(serial->dev, 0), 72 72 + 0x22, 0x21, val, 0, NULL, 0, 73 73 + USB_CTRL_SET_TIMEOUT); 73 74 } 74 75 75 76 return 0; ··· 91 90 __func__, status); 92 91 return; 93 92 } 94 94 - usb_serial_debug_data(debug, &port->dev, __func__, urb->actual_length, data); 93 93 + usb_serial_debug_data(debug, &port->dev, __func__, 94 94 + urb->actual_length, data); 95 95 96 96 tty = port->tty; 97 97 if (tty && urb->actual_length) { 98 98 - tty_insert_flip_string (tty, data, urb->actual_length); 99 99 - tty_flip_buffer_push (tty); 98 98 + tty_insert_flip_string(tty, data, urb->actual_length); 99 99 + tty_flip_buffer_push(tty); 100 100 } 101 101 102 102 - result = usb_submit_urb (urb, GFP_ATOMIC); 102 102 + result = usb_submit_urb(urb, GFP_ATOMIC); 103 103 if (result) 104 104 - dev_err(&port->dev, "%s - failed resubmitting read urb, error %d\n", 104 104 + dev_err(&port->dev, 105 105 + "%s - failed resubmitting read urb, error %d\n", 105 106 __func__, result); 106 107 return; 107 108 } ··· 118 115 dbg("%s - port %d", __func__, port->number); 119 116 120 117 /* free up the transfer buffer, as usb_free_urb() does not do this */ 121 121 - kfree (urb->transfer_buffer); 118 118 + kfree(urb->transfer_buffer); 122 119 123 120 if (status) 124 121 dbg("%s - nonzero write bulk status received: %d", ··· 174 171 } 175 172 usb_fill_bulk_urb(urb, serial->dev, 176 173 usb_rcvbulkpipe(serial->dev, 177 177 - port->bulk_out_endpointAddress), 174 174 + port->bulk_out_endpointAddress), 178 175 buffer, buffer_size, 179 176 airprime_read_bulk_callback, port); 180 177 result = usb_submit_urb(urb, GFP_KERNEL); ··· 186 183 __func__, i, port->number, result); 187 184 goto errout; 188 185 } 189 189 - /* remember this urb so we can kill it when the port is closed */ 186 186 + /* remember this urb so we can kill it when the 187 187 + port is closed */ 190 188 priv->read_urbp[i] = urb; 191 189 } 192 190 ··· 196 192 goto out; 197 193 198 194 errout: 199 199 - /* some error happened, cancel any submitted urbs and clean up anything that 200 200 - got allocated successfully */ 195 195 + /* some error happened, cancel any submitted urbs and clean up 196 196 + anything that got allocated successfully */ 201 197 202 198 while (i-- != 0) { 203 199 urb = priv->read_urbp[i]; 204 200 buffer = urb->transfer_buffer; 205 205 - usb_kill_urb (urb); 206 206 - usb_free_urb (urb); 207 207 - kfree (buffer); 201 201 + usb_kill_urb(urb); 202 202 + usb_free_urb(urb); 203 203 + kfree(buffer); 208 204 } 209 205 210 206 out: 211 207 return result; 212 208 } 213 209 214 214 - static void airprime_close(struct usb_serial_port *port, struct file * filp) 210 210 + static void airprime_close(struct usb_serial_port *port, struct file *filp) 215 211 { 216 212 struct airprime_private *priv = usb_get_serial_port_data(port); 217 213 int i; ··· 224 220 mutex_lock(&port->serial->disc_mutex); 225 221 if (!port->serial->disconnected) 226 222 airprime_send_setup(port); 227 227 - mutex_lock(&port->serial->disc_mutex); 223 223 + mutex_unlock(&port->serial->disc_mutex); 228 224 229 225 for (i = 0; i < NUM_READ_URBS; ++i) { 230 230 - usb_kill_urb (priv->read_urbp[i]); 231 231 - kfree (priv->read_urbp[i]->transfer_buffer); 232 232 - usb_free_urb (priv->read_urbp[i]); 226 226 + usb_kill_urb(priv->read_urbp[i]); 227 227 + kfree(priv->read_urbp[i]->transfer_buffer); 228 228 + usb_free_urb(priv->read_urbp[i]); 233 229 } 234 230 235 231 /* free up private structure */ 236 236 - kfree (priv); 232 232 + kfree(priv); 237 233 usb_set_serial_port_data(port, NULL); 238 234 } 239 235 ··· 263 259 urb = usb_alloc_urb(0, GFP_ATOMIC); 264 260 if (!urb) { 265 261 dev_err(&port->dev, "no more free urbs\n"); 266 266 - kfree (buffer); 262 262 + kfree(buffer); 267 263 return -ENOMEM; 268 264 } 269 269 - memcpy (buffer, buf, count); 265 265 + memcpy(buffer, buf, count); 270 266 271 267 usb_serial_debug_data(debug, &port->dev, __func__, count, buffer); 272 268 ··· 283 279 "%s - usb_submit_urb(write bulk) failed with status = %d\n", 284 280 __func__, status); 285 281 count = status; 286 286 - kfree (buffer); 282 282 + kfree(buffer); 287 283 } else { 288 284 spin_lock_irqsave(&priv->lock, flags); 289 285 ++priv->outstanding_urbs; ··· 291 287 } 292 288 /* we are done with this urb, so let the host driver 293 289 * really free it when it is finished with it */ 294 294 - usb_free_urb (urb); 290 290 + usb_free_urb(urb); 295 291 return count; 296 292 } 297 293 ··· 319 315 { 320 316 int retval; 321 317 322 322 - airprime_device.num_ports = 323 323 - (endpoints > 0 && endpoints <= MAX_BULK_EPS) ? endpoints : NUM_BULK_EPS; 318 318 + airprime_device.num_ports = endpoints; 319 319 + if (endpoints < 0 || endpoints >= MAX_BULK_EPS) 320 320 + airprime_device.num_ports = NUM_BULK_EPS; 321 321 + 324 322 retval = usb_serial_register(&airprime_device); 325 323 if (retval) 326 324 return retval; ··· 347 341 module_param(debug, bool, S_IRUGO | S_IWUSR); 348 342 MODULE_PARM_DESC(debug, "Debug enabled"); 349 343 module_param(buffer_size, int, 0); 350 350 - MODULE_PARM_DESC(buffer_size, "Size of the transfer buffers in bytes (default 4096)"); 344 344 + MODULE_PARM_DESC(buffer_size, 345 345 + "Size of the transfer buffers in bytes (default 4096)"); 351 346 module_param(endpoints, int, 0); 352 347 MODULE_PARM_DESC(endpoints, "Number of bulk EPs to configure (default 3)");

+27 -27

drivers/usb/serial/ark3116.c

reviewed

··· 24 24 #include <linux/usb.h> 25 25 #include <linux/usb/serial.h> 26 26 #include <linux/serial.h> 27 27 - #include <asm/uaccess.h> 27 27 + #include <linux/uaccess.h> 28 28 29 29 30 30 static int debug; ··· 246 246 baud = tty_get_baud_rate(port->tty); 247 247 248 248 switch (baud) { 249 249 - case 75: 250 250 - case 150: 251 251 - case 300: 252 252 - case 600: 253 253 - case 1200: 254 254 - case 1800: 255 255 - case 2400: 256 256 - case 4800: 257 257 - case 9600: 258 258 - case 19200: 259 259 - case 38400: 260 260 - case 57600: 261 261 - case 115200: 262 262 - case 230400: 263 263 - case 460800: 264 264 - /* Report the resulting rate back to the caller */ 265 265 - tty_encode_baud_rate(port->tty, baud, baud); 266 266 - break; 267 267 - /* set 9600 as default (if given baudrate is invalid for example) */ 268 268 - default: 269 269 - tty_encode_baud_rate(port->tty, 9600, 9600); 270 270 - case 0: 271 271 - baud = 9600; 249 249 + case 75: 250 250 + case 150: 251 251 + case 300: 252 252 + case 600: 253 253 + case 1200: 254 254 + case 1800: 255 255 + case 2400: 256 256 + case 4800: 257 257 + case 9600: 258 258 + case 19200: 259 259 + case 38400: 260 260 + case 57600: 261 261 + case 115200: 262 262 + case 230400: 263 263 + case 460800: 264 264 + /* Report the resulting rate back to the caller */ 265 265 + tty_encode_baud_rate(port->tty, baud, baud); 266 266 + break; 267 267 + /* set 9600 as default (if given baudrate is invalid for example) */ 268 268 + default: 269 269 + tty_encode_baud_rate(port->tty, 9600, 9600); 270 270 + case 0: 271 271 + baud = 9600; 272 272 } 273 273 274 274 /* ··· 380 380 switch (cmd) { 381 381 case TIOCGSERIAL: 382 382 /* XXX: Some of these values are probably wrong. */ 383 383 - memset(&serstruct, 0, sizeof (serstruct)); 383 383 + memset(&serstruct, 0, sizeof(serstruct)); 384 384 serstruct.type = PORT_16654; 385 385 serstruct.line = port->serial->minor; 386 386 serstruct.port = port->number; 387 387 serstruct.custom_divisor = 0; 388 388 serstruct.baud_base = 460800; 389 389 390 390 - if (copy_to_user(user_arg, &serstruct, sizeof (serstruct))) 390 390 + if (copy_to_user(user_arg, &serstruct, sizeof(serstruct))) 391 391 return -EFAULT; 392 392 393 393 return 0; 394 394 case TIOCSSERIAL: 395 395 - if (copy_from_user(&serstruct, user_arg, sizeof (serstruct))) 395 395 + if (copy_from_user(&serstruct, user_arg, sizeof(serstruct))) 396 396 return -EFAULT; 397 397 return 0; 398 398 default:

+1 -1

drivers/usb/serial/ch341.c

reviewed

··· 130 130 return -ENOMEM; 131 131 132 132 r = ch341_control_in(dev, 0x95, 0x0706, 0, buffer, size); 133 133 - if ( r < 0) 133 133 + if (r < 0) 134 134 goto out; 135 135 136 136 /* Not having the datasheet for the CH341, we ignore the bytes returned

+8

drivers/usb/serial/ftdi_sio.c

reviewed

··· 133 133 static struct usb_device_id id_table_combined [] = { 134 134 { USB_DEVICE(FTDI_VID, FTDI_AMC232_PID) }, 135 135 { USB_DEVICE(FTDI_VID, FTDI_CANUSB_PID) }, 136 136 + { USB_DEVICE(FTDI_VID, FTDI_SCS_DEVICE_0_PID) }, 137 137 + { USB_DEVICE(FTDI_VID, FTDI_SCS_DEVICE_1_PID) }, 138 138 + { USB_DEVICE(FTDI_VID, FTDI_SCS_DEVICE_2_PID) }, 139 139 + { USB_DEVICE(FTDI_VID, FTDI_SCS_DEVICE_3_PID) }, 140 140 + { USB_DEVICE(FTDI_VID, FTDI_SCS_DEVICE_4_PID) }, 141 141 + { USB_DEVICE(FTDI_VID, FTDI_SCS_DEVICE_5_PID) }, 142 142 + { USB_DEVICE(FTDI_VID, FTDI_SCS_DEVICE_6_PID) }, 143 143 + { USB_DEVICE(FTDI_VID, FTDI_SCS_DEVICE_7_PID) }, 136 144 { USB_DEVICE(FTDI_VID, FTDI_ACTZWAVE_PID) }, 137 145 { USB_DEVICE(FTDI_VID, FTDI_IRTRANS_PID) }, 138 146 { USB_DEVICE(FTDI_VID, FTDI_IPLUS_PID) },

+11

drivers/usb/serial/ftdi_sio.h

reviewed

··· 40 40 /* AlphaMicro Components AMC-232USB01 device */ 41 41 #define FTDI_AMC232_PID 0xFF00 /* Product Id */ 42 42 43 43 + /* SCS HF Radio Modems PID's (http://www.scs-ptc.com) */ 44 44 + /* the VID is the standard ftdi vid (FTDI_VID) */ 45 45 + #define FTDI_SCS_DEVICE_0_PID 0xD010 /* SCS PTC-IIusb */ 46 46 + #define FTDI_SCS_DEVICE_1_PID 0xD011 /* SCS Tracker / DSP TNC */ 47 47 + #define FTDI_SCS_DEVICE_2_PID 0xD012 48 48 + #define FTDI_SCS_DEVICE_3_PID 0xD013 49 49 + #define FTDI_SCS_DEVICE_4_PID 0xD014 50 50 + #define FTDI_SCS_DEVICE_5_PID 0xD015 51 51 + #define FTDI_SCS_DEVICE_6_PID 0xD016 52 52 + #define FTDI_SCS_DEVICE_7_PID 0xD017 53 53 + 43 54 /* ACT Solutions HomePro ZWave interface (http://www.act-solutions.com/HomePro.htm) */ 44 55 #define FTDI_ACTZWAVE_PID 0xF2D0 45 56

+2 -3

drivers/usb/serial/mos7840.c

reviewed

··· 1713 1713 { 1714 1714 struct moschip_port *mos7840_port; 1715 1715 unsigned int mcr; 1716 1716 - unsigned int status; 1716 1716 + int status; 1717 1717 1718 1718 dbg("%s - port %d", __func__, port->number); 1719 1719 ··· 1740 1740 1741 1741 mos7840_port->shadowMCR = mcr; 1742 1742 1743 1743 - status = 0; 1744 1743 status = mos7840_set_uart_reg(port, MODEM_CONTROL_REGISTER, mcr); 1745 1744 if (status < 0) { 1746 1745 dbg("setting MODEM_CONTROL_REGISTER Failed\n"); 1747 1747 - return -1; 1746 1746 + return status; 1748 1747 } 1749 1748 1750 1749 return 0;

+2 -1

drivers/usb/storage/Kconfig

reviewed

··· 123 123 124 124 config USB_STORAGE_ONETOUCH 125 125 bool "Support OneTouch Button on Maxtor Hard Drives" 126 126 - depends on USB_STORAGE && INPUT_EVDEV 126 126 + depends on USB_STORAGE 127 127 + depends on INPUT=y || INPUT=USB_STORAGE 127 128 help 128 129 Say Y here to include additional code to support the Maxtor OneTouch 129 130 USB hard drive's onetouch button.

+1 -1

drivers/usb/storage/libusual.c

reviewed

··· 135 135 stat[type].fls |= USU_MOD_FL_THREAD; 136 136 spin_unlock_irqrestore(&usu_lock, flags); 137 137 138 138 - task = kthread_run(usu_probe_thread, (void*)type, "libusual_%d", type); 138 138 + task = kthread_run(usu_probe_thread, (void*)type, "libusual_%ld", type); 139 139 if (IS_ERR(task)) { 140 140 rc = PTR_ERR(task); 141 141 printk(KERN_WARNING "libusual: "

+2 -2

drivers/usb/storage/onetouch.c

reviewed

··· 38 38 #include "onetouch.h" 39 39 #include "debug.h" 40 40 41 41 - void onetouch_release_input(void *onetouch_); 41 41 + static void onetouch_release_input(void *onetouch_); 42 42 43 43 struct usb_onetouch { 44 44 char name[128]; ··· 223 223 return error; 224 224 } 225 225 226 226 - void onetouch_release_input(void *onetouch_) 226 226 + static void onetouch_release_input(void *onetouch_) 227 227 { 228 228 struct usb_onetouch *onetouch = (struct usb_onetouch *) onetouch_; 229 229

+27 -1

drivers/usb/storage/unusual_devs.h

reviewed

··· 44 44 * running with this patch. 45 45 * Send your submission to either Phil Dibowitz <phil@ipom.com> or 46 46 * Alan Stern <stern@rowland.harvard.edu>, and don't forget to CC: the 47 47 - * USB development list <linux-usb-devel@lists.sourceforge.net>. 47 47 + * USB development list <linux-usb@vger.kernel.org> and the USB storage list 48 48 + * <usb-storage@lists.one-eyed-alien.net> 48 49 */ 49 50 50 51 /* patch submitted by Vivian Bregier <Vivian.Bregier@imag.fr> ··· 557 556 US_SC_SCSI, US_PR_USBAT, init_usbat_flash, 558 557 US_FL_SINGLE_LUN), 559 558 #endif 559 559 + 560 560 + /* Reported by Dmitry Khlystov <adminimus@gmail.com> */ 561 561 + UNUSUAL_DEV( 0x04e8, 0x507c, 0x0220, 0x0220, 562 562 + "Samsung", 563 563 + "YP-U3", 564 564 + US_SC_DEVICE, US_PR_DEVICE, NULL, 565 565 + US_FL_MAX_SECTORS_64), 560 566 561 567 /* Reported by Bob Sass <rls@vectordb.com> -- only rev 1.33 tested */ 562 568 UNUSUAL_DEV( 0x050d, 0x0115, 0x0133, 0x0133, ··· 1208 1200 US_SC_DEVICE, US_PR_DEVICE, NULL, 1209 1201 US_FL_BULK32), 1210 1202 1203 1203 + /* Andrew Lunn <andrew@lunn.ch> 1204 1204 + * PanDigital Digital Picture Frame. Does not like ALLOW_MEDIUM_REMOVAL 1205 1205 + * on LUN 4. 1206 1206 + * Note: Vend:Prod clash with "Ltd Maxell WS30 Slim Digital Camera" 1207 1207 + */ 1208 1208 + UNUSUAL_DEV( 0x0851, 0x1543, 0x0200, 0x0200, 1209 1209 + "PanDigital", 1210 1210 + "Photo Frame", 1211 1211 + US_SC_DEVICE, US_PR_DEVICE, NULL, 1212 1212 + US_FL_NOT_LOCKABLE), 1213 1213 + 1211 1214 /* Submitted by Jan De Luyck <lkml@kcore.org> */ 1212 1215 UNUSUAL_DEV( 0x08bd, 0x1100, 0x0000, 0x0000, 1213 1216 "CITIZEN", ··· 1360 1341 "MD 7425", 1361 1342 US_SC_DEVICE, US_PR_DEVICE, NULL, 1362 1343 US_FL_FIX_INQUIRY), 1344 1344 + 1345 1345 + /* Reported by Rohan Hart <rohan.hart17@gmail.com> */ 1346 1346 + UNUSUAL_DEV( 0x2770, 0x915d, 0x0010, 0x0010, 1347 1347 + "INTOVA", 1348 1348 + "Pixtreme", 1349 1349 + US_SC_DEVICE, US_PR_DEVICE, NULL, 1350 1350 + US_FL_FIX_CAPACITY ), 1363 1351 1364 1352 /* 1365 1353 * Entry for Jenoptik JD 5200z3

+2 -1

drivers/usb/storage/usb.c

reviewed

··· 539 539 " has %s in unusual_devs.h (kernel" 540 540 " %s)\n" 541 541 " Please send a copy of this message to " 542 542 - "<linux-usb-devel@lists.sourceforge.net>\n", 542 542 + "<linux-usb@vger.kernel.org> and " 543 543 + "<usb-storage@lists.one-eyed-alien.net>\n", 543 544 le16_to_cpu(ddesc->idVendor), 544 545 le16_to_cpu(ddesc->idProduct), 545 546 le16_to_cpu(ddesc->bcdDevice),

+48

include/linux/usb/c67x00.h

reviewed

··· 1 1 + /* 2 2 + * usb_c67x00.h: platform definitions for the Cypress C67X00 USB chip 3 3 + * 4 4 + * Copyright (C) 2006-2008 Barco N.V. 5 5 + * 6 6 + * This program is free software; you can redistribute it and/or modify 7 7 + * it under the terms of the GNU General Public License as published by 8 8 + * the Free Software Foundation; either version 2 of the License, or 9 9 + * (at your option) any later version. 10 10 + * 11 11 + * This program is distributed in the hope that it will be useful, 12 12 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 13 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 14 + * GNU General Public License for more details. 15 15 + * 16 16 + * You should have received a copy of the GNU General Public License 17 17 + * along with this program; if not, write to the Free Software 18 18 + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 19 19 + * MA 02110-1301 USA. 20 20 + */ 21 21 + 22 22 + #ifndef _LINUX_USB_C67X00_H 23 23 + #define _LINUX_USB_C67X00_H 24 24 + 25 25 + /* SIE configuration */ 26 26 + #define C67X00_SIE_UNUSED 0 27 27 + #define C67X00_SIE_HOST 1 28 28 + #define C67X00_SIE_PERIPHERAL_A 2 /* peripheral on A port */ 29 29 + #define C67X00_SIE_PERIPHERAL_B 3 /* peripheral on B port */ 30 30 + 31 31 + #define c67x00_sie_config(config, n) (((config)>>(4*(n)))&0x3) 32 32 + 33 33 + #define C67X00_SIE1_UNUSED (C67X00_SIE_UNUSED << 0) 34 34 + #define C67X00_SIE1_HOST (C67X00_SIE_HOST << 0) 35 35 + #define C67X00_SIE1_PERIPHERAL_A (C67X00_SIE_PERIPHERAL_A << 0) 36 36 + #define C67X00_SIE1_PERIPHERAL_B (C67X00_SIE_PERIPHERAL_B << 0) 37 37 + 38 38 + #define C67X00_SIE2_UNUSED (C67X00_SIE_UNUSED << 4) 39 39 + #define C67X00_SIE2_HOST (C67X00_SIE_HOST << 4) 40 40 + #define C67X00_SIE2_PERIPHERAL_A (C67X00_SIE_PERIPHERAL_A << 4) 41 41 + #define C67X00_SIE2_PERIPHERAL_B (C67X00_SIE_PERIPHERAL_B << 4) 42 42 + 43 43 + struct c67x00_platform_data { 44 44 + int sie_config; /* SIEs config (C67X00_SIEx_*) */ 45 45 + unsigned long hpi_regstep; /* Step between HPI registers */ 46 46 + }; 47 47 + 48 48 + #endif /* _LINUX_USB_C67X00_H */

+11 -1

include/linux/usb/ch9.h

reviewed

··· 455 455 456 456 /*-------------------------------------------------------------------------*/ 457 457 458 458 - /* USB_DT_BOS: group of wireless capabilities */ 458 458 + /* USB_DT_BOS: group of device-level capabilities */ 459 459 struct usb_bos_descriptor { 460 460 __u8 bLength; 461 461 __u8 bDescriptorType; ··· 499 499 __u8 bmFFITXPowerInfo; /* FFI power levels */ 500 500 __le16 bmBandGroup; 501 501 __u8 bReserved; 502 502 + } __attribute__((packed)); 503 503 + 504 504 + #define USB_CAP_TYPE_EXT 2 505 505 + 506 506 + struct usb_ext_cap_descriptor { /* Link Power Management */ 507 507 + __u8 bLength; 508 508 + __u8 bDescriptorType; 509 509 + __u8 bDevCapabilityType; 510 510 + __u8 bmAttributes; 511 511 + #define USB_LPM_SUPPORT (1 << 1) /* supports LPM */ 502 512 } __attribute__((packed)); 503 513 504 514 /*-------------------------------------------------------------------------*/

+21

include/linux/usb/gadget.h

reviewed

··· 114 114 int (*dequeue) (struct usb_ep *ep, struct usb_request *req); 115 115 116 116 int (*set_halt) (struct usb_ep *ep, int value); 117 117 + int (*set_wedge) (struct usb_ep *ep); 118 118 + 117 119 int (*fifo_status) (struct usb_ep *ep); 118 120 void (*fifo_flush) (struct usb_ep *ep); 119 121 }; ··· 348 346 static inline int usb_ep_clear_halt(struct usb_ep *ep) 349 347 { 350 348 return ep->ops->set_halt(ep, 0); 349 349 + } 350 350 + 351 351 + /** 352 352 + * usb_ep_set_wedge - sets the halt feature and ignores clear requests 353 353 + * @ep: the endpoint being wedged 354 354 + * 355 355 + * Use this to stall an endpoint and ignore CLEAR_FEATURE(HALT_ENDPOINT) 356 356 + * requests. If the gadget driver clears the halt status, it will 357 357 + * automatically unwedge the endpoint. 358 358 + * 359 359 + * Returns zero on success, else negative errno. 360 360 + */ 361 361 + static inline int 362 362 + usb_ep_set_wedge(struct usb_ep *ep) 363 363 + { 364 364 + if (ep->ops->set_wedge) 365 365 + return ep->ops->set_wedge(ep); 366 366 + else 367 367 + return ep->ops->set_halt(ep, 1); 351 368 } 352 369 353 370 /**