Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'staging-4.12-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging
Pull staging and IIO fixes from Greg KH:
"Here are some small staging and IIO driver fixes for 4.12-rc6.
Nothing huge, just a few small driver fixes for reported issues. All
have been in linux-next with no reported issues"
* tag 'staging-4.12-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging:
Staging: rtl8723bs: fix an error code in isFileReadable()
iio: buffer-dmaengine: Add missing header buffer_impl.h
iio: buffer-dma: Add missing header buffer_impl.h
iio: adc: meson-saradc: fix potential crash in meson_sar_adc_clear_fifo
iio: adc: mxs-lradc: Fix return value check in mxs_lradc_adc_probe()
iio: imu: inv_mpu6050: add accel lpf setting for chip >= MPU6500
staging: iio: ad7152: Fix deadlock in ad7152_write_raw_samp_freq()
+50
-13
+2
-2
drivers/iio/adc/meson_saradc.c
+2
-2
drivers/iio/adc/meson_saradc.c
···
468
468
static void meson_sar_adc_clear_fifo(struct iio_dev *indio_dev)
469
469
{
470
470
struct meson_sar_adc_priv *priv = iio_priv(indio_dev);
471
-
int count;
471
+
unsigned int count, tmp;
472
472
473
473
for (count = 0; count < MESON_SAR_ADC_MAX_FIFO_SIZE; count++) {
474
474
if (!meson_sar_adc_get_fifo_count(indio_dev))
475
475
break;
476
476
477
-
regmap_read(priv->regmap, MESON_SAR_ADC_FIFO_RD, 0);
477
+
regmap_read(priv->regmap, MESON_SAR_ADC_FIFO_RD, &tmp);
478
478
}
479
479
}
480
480
+5
-2
drivers/iio/adc/mxs-lradc-adc.c
+5
-2
drivers/iio/adc/mxs-lradc-adc.c
···
718
718
adc->dev = dev;
719
719
720
720
iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
721
+
if (!iores)
722
+
return -EINVAL;
723
+
721
724
adc->base = devm_ioremap(dev, iores->start, resource_size(iores));
722
-
if (IS_ERR(adc->base))
723
-
return PTR_ERR(adc->base);
725
+
if (!adc->base)
726
+
return -ENOMEM;
724
727
725
728
init_completion(&adc->completion);
726
729
spin_lock_init(&adc->lock);
+1
drivers/iio/buffer/industrialio-buffer-dma.c
+1
drivers/iio/buffer/industrialio-buffer-dma.c
+1
drivers/iio/buffer/industrialio-buffer-dmaengine.c
+1
drivers/iio/buffer/industrialio-buffer-dmaengine.c
+36
-3
drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
+36
-3
drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
···
41
41
static const struct inv_mpu6050_reg_map reg_set_6500 = {
42
42
.sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
43
43
.lpf = INV_MPU6050_REG_CONFIG,
44
+
.accel_lpf = INV_MPU6500_REG_ACCEL_CONFIG_2,
44
45
.user_ctrl = INV_MPU6050_REG_USER_CTRL,
45
46
.fifo_en = INV_MPU6050_REG_FIFO_EN,
46
47
.gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
···
212
211
EXPORT_SYMBOL_GPL(inv_mpu6050_set_power_itg);
213
212
214
213
/**
214
+
* inv_mpu6050_set_lpf_regs() - set low pass filter registers, chip dependent
215
+
*
216
+
* MPU60xx/MPU9150 use only 1 register for accelerometer + gyroscope
217
+
* MPU6500 and above have a dedicated register for accelerometer
218
+
*/
219
+
static int inv_mpu6050_set_lpf_regs(struct inv_mpu6050_state *st,
220
+
enum inv_mpu6050_filter_e val)
221
+
{
222
+
int result;
223
+
224
+
result = regmap_write(st->map, st->reg->lpf, val);
225
+
if (result)
226
+
return result;
227
+
228
+
switch (st->chip_type) {
229
+
case INV_MPU6050:
230
+
case INV_MPU6000:
231
+
case INV_MPU9150:
232
+
/* old chips, nothing to do */
233
+
result = 0;
234
+
break;
235
+
default:
236
+
/* set accel lpf */
237
+
result = regmap_write(st->map, st->reg->accel_lpf, val);
238
+
break;
239
+
}
240
+
241
+
return result;
242
+
}
243
+
244
+
/**
215
245
* inv_mpu6050_init_config() - Initialize hardware, disable FIFO.
216
246
*
217
247
* Initial configuration:
···
265
233
if (result)
266
234
return result;
267
235
268
-
d = INV_MPU6050_FILTER_20HZ;
269
-
result = regmap_write(st->map, st->reg->lpf, d);
236
+
result = inv_mpu6050_set_lpf_regs(st, INV_MPU6050_FILTER_20HZ);
270
237
if (result)
271
238
return result;
272
239
···
568
537
* would be alising. This function basically search for the
569
538
* correct low pass parameters based on the fifo rate, e.g,
570
539
* sampling frequency.
540
+
*
541
+
* lpf is set automatically when setting sampling rate to avoid any aliases.
571
542
*/
572
543
static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate)
573
544
{
···
585
552
while ((h < hz[i]) && (i < ARRAY_SIZE(d) - 1))
586
553
i++;
587
554
data = d[i];
588
-
result = regmap_write(st->map, st->reg->lpf, data);
555
+
result = inv_mpu6050_set_lpf_regs(st, data);
589
556
if (result)
590
557
return result;
591
558
st->chip_config.lpf = data;
+3
drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h
+3
drivers/iio/imu/inv_mpu6050/inv_mpu_iio.h
···
28
28
* struct inv_mpu6050_reg_map - Notable registers.
29
29
* @sample_rate_div: Divider applied to gyro output rate.
30
30
* @lpf: Configures internal low pass filter.
31
+
* @accel_lpf: Configures accelerometer low pass filter.
31
32
* @user_ctrl: Enables/resets the FIFO.
32
33
* @fifo_en: Determines which data will appear in FIFO.
33
34
* @gyro_config: gyro config register.
···
48
47
struct inv_mpu6050_reg_map {
49
48
u8 sample_rate_div;
50
49
u8 lpf;
50
+
u8 accel_lpf;
51
51
u8 user_ctrl;
52
52
u8 fifo_en;
53
53
u8 gyro_config;
···
190
188
#define INV_MPU6050_FIFO_THRESHOLD 500
191
189
192
190
/* mpu6500 registers */
191
+
#define INV_MPU6500_REG_ACCEL_CONFIG_2 0x1D
193
192
#define INV_MPU6500_REG_ACCEL_OFFSET 0x77
194
193
195
194
/* delay time in milliseconds */
+1
-5
drivers/staging/iio/cdc/ad7152.c
+1
-5
drivers/staging/iio/cdc/ad7152.c
···
231
231
if (i >= ARRAY_SIZE(ad7152_filter_rate_table))
232
232
i = ARRAY_SIZE(ad7152_filter_rate_table) - 1;
233
233
234
-
mutex_lock(&chip->state_lock);
235
234
ret = i2c_smbus_write_byte_data(chip->client,
236
235
AD7152_REG_CFG2, AD7152_CFG2_OSR(i));
237
-
if (ret < 0) {
238
-
mutex_unlock(&chip->state_lock);
236
+
if (ret < 0)
239
237
return ret;
240
-
}
241
238
242
239
chip->filter_rate_setup = i;
243
-
mutex_unlock(&chip->state_lock);
244
240
245
241
return ret;
246
242
}