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dt-bindings: opp-v2: Fix example 3 CPU reg value

Example 3 is a dual-cluster example, meaning that the CPU nodes should
have reg values 0x0, 0x1, 0x100, 0x101. The example incorrectly uses
decimal 0, 1, 100, 101 instead, which seems unintended. Use the correct
hexadecimal values.

Even though the value doesn't change for the first two CPUs, 0 and 1 in
example 3 are changed to 0x0 and 0x1 respectively for consistency. Other
examples all have reg less than 10, so they have not been changed.

Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260403-dt-bindings-opp-v2-hex-cpu-reg-v1-1-38a4968ab515@iscas.ac.cn
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>

authored by

Vivian Wang and committed by
Rob Herring (Arm) 1bf99c2a 7ed020d8

+4 -4
+4 -4
Documentation/devicetree/bindings/opp/opp-v2.yaml
··· 172 172 cpu@0 { 173 173 compatible = "arm,cortex-a7"; 174 174 device_type = "cpu"; 175 - reg = <0>; 175 + reg = <0x0>; 176 176 next-level-cache = <&L2>; 177 177 clocks = <&clk_controller 0>; 178 178 clock-names = "cpu"; ··· 183 183 cpu@1 { 184 184 compatible = "arm,cortex-a7"; 185 185 device_type = "cpu"; 186 - reg = <1>; 186 + reg = <0x1>; 187 187 next-level-cache = <&L2>; 188 188 clocks = <&clk_controller 0>; 189 189 clock-names = "cpu"; ··· 194 194 cpu@100 { 195 195 compatible = "arm,cortex-a15"; 196 196 device_type = "cpu"; 197 - reg = <100>; 197 + reg = <0x100>; 198 198 next-level-cache = <&L2>; 199 199 clocks = <&clk_controller 1>; 200 200 clock-names = "cpu"; ··· 205 205 cpu@101 { 206 206 compatible = "arm,cortex-a15"; 207 207 device_type = "cpu"; 208 - reg = <101>; 208 + reg = <0x101>; 209 209 next-level-cache = <&L2>; 210 210 clocks = <&clk_controller 1>; 211 211 clock-names = "cpu";