riscv: checksum: Use riscv_has_extension_likely

Use riscv_has_extension_likely() to check for RISCV_ISA_EXT_ZBB,
replacing the use of asm goto with ALTERNATIVE.

The "likely" variant is used to match the behavior of the original
implementation using ALTERNATIVE("j %l[no_zbb]", "nop", ...).

While we're at it, also remove bogus comment about Zbb being likely
available. We have to choose between "likely" and "unlikely" due to
limitations of the asm goto feature, but that does not mean we should
put a bad comment on why we pick "likely" over "unlikely".

Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn>
Link: https://patch.msgid.link/20251020-riscv-altn-helper-wip-v4-2-ef941c87669a@iscas.ac.cn
Signed-off-by: Paul Walmsley <pjw@kernel.org>

authored by

Vivian Wang and committed by

Paul Walmsley 7 months ago 1c7d491d 0a067ae2

+16 -50

2 changed files

expand all

arch

riscv

include

asm

checksum.h

lib

csum.c

+4 -9

arch/riscv/include/asm/checksum.h

··· 49 49 * ZBB only saves three instructions on 32-bit and five on 64-bit so not 50 50 * worth checking if supported without Alternatives. 51 51 */ 52 - if (IS_ENABLED(CONFIG_RISCV_ISA_ZBB) && IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB)) { 52 + if (IS_ENABLED(CONFIG_RISCV_ISA_ZBB) && 53 + IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB) && 54 + riscv_has_extension_likely(RISCV_ISA_EXT_ZBB)) { 53 55 unsigned long fold_temp; 54 - 55 - asm goto(ALTERNATIVE("j %l[no_zbb]", "nop", 0, 56 - RISCV_ISA_EXT_ZBB, 1) 57 - : 58 - : 59 - : 60 - : no_zbb); 61 56 62 57 if (IS_ENABLED(CONFIG_32BIT)) { 63 58 asm(".option push \n\ ··· 76 81 } 77 82 return (__force __sum16)(csum >> 16); 78 83 } 79 - no_zbb: 84 + 80 85 #ifndef CONFIG_32BIT 81 86 csum += ror64(csum, 32); 82 87 csum >>= 32;

+12 -41

arch/riscv/lib/csum.c

··· 40 40 uproto = (__force unsigned int)htonl(proto); 41 41 sum += uproto; 42 42 43 - if (IS_ENABLED(CONFIG_RISCV_ISA_ZBB) && IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB)) { 43 + if (IS_ENABLED(CONFIG_RISCV_ISA_ZBB) && 44 + IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB) && 45 + riscv_has_extension_likely(RISCV_ISA_EXT_ZBB)) { 44 46 unsigned long fold_temp; 45 47 46 - /* 47 - * Zbb is likely available when the kernel is compiled with Zbb 48 - * support, so nop when Zbb is available and jump when Zbb is 49 - * not available. 50 - */ 51 - asm goto(ALTERNATIVE("j %l[no_zbb]", "nop", 0, 52 - RISCV_ISA_EXT_ZBB, 1) 53 - : 54 - : 55 - : 56 - : no_zbb); 57 48 asm(".option push \n\ 58 49 .option arch,+zbb \n\ 59 50 rori %[fold_temp], %[sum], 32 \n\ ··· 57 66 : [sum] "+r" (sum), [fold_temp] "=&r" (fold_temp)); 58 67 return (__force __sum16)(sum >> 16); 59 68 } 60 - no_zbb: 69 + 61 70 sum += ror64(sum, 32); 62 71 sum >>= 32; 63 72 return csum_fold((__force __wsum)sum); ··· 143 152 csum = do_csum_common(ptr, end, data); 144 153 145 154 #ifdef CC_HAS_ASM_GOTO_TIED_OUTPUT 146 - if (IS_ENABLED(CONFIG_RISCV_ISA_ZBB) && IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB)) { 155 + if (IS_ENABLED(CONFIG_RISCV_ISA_ZBB) && 156 + IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB) && 157 + riscv_has_extension_likely(RISCV_ISA_EXT_ZBB)) { 147 158 unsigned long fold_temp; 148 - 149 - /* 150 - * Zbb is likely available when the kernel is compiled with Zbb 151 - * support, so nop when Zbb is available and jump when Zbb is 152 - * not available. 153 - */ 154 - asm goto(ALTERNATIVE("j %l[no_zbb]", "nop", 0, 155 - RISCV_ISA_EXT_ZBB, 1) 156 - : 157 - : 158 - : 159 - : no_zbb); 160 159 161 160 #ifdef CONFIG_32BIT 162 161 asm_goto_output(".option push \n\ ··· 185 204 end: 186 205 return csum >> 16; 187 206 } 188 - no_zbb: 207 + 189 208 #endif /* CC_HAS_ASM_GOTO_TIED_OUTPUT */ 190 209 #ifndef CONFIG_32BIT 191 210 csum += ror64(csum, 32); ··· 215 234 end = (const unsigned long *)(buff + len); 216 235 csum = do_csum_common(ptr, end, data); 217 236 218 - if (IS_ENABLED(CONFIG_RISCV_ISA_ZBB) && IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB)) { 237 + if (IS_ENABLED(CONFIG_RISCV_ISA_ZBB) && 238 + IS_ENABLED(CONFIG_TOOLCHAIN_HAS_ZBB) && 239 + riscv_has_extension_likely(RISCV_ISA_EXT_ZBB)) { 219 240 unsigned long fold_temp; 220 - 221 - /* 222 - * Zbb is likely available when the kernel is compiled with Zbb 223 - * support, so nop when Zbb is available and jump when Zbb is 224 - * not available. 225 - */ 226 - asm goto(ALTERNATIVE("j %l[no_zbb]", "nop", 0, 227 - RISCV_ISA_EXT_ZBB, 1) 228 - : 229 - : 230 - : 231 - : no_zbb); 232 241 233 242 #ifdef CONFIG_32BIT 234 243 asm (".option push \n\ ··· 245 274 #endif /* !CONFIG_32BIT */ 246 275 return csum >> 16; 247 276 } 248 - no_zbb: 277 + 249 278 #ifndef CONFIG_32BIT 250 279 csum += ror64(csum, 32); 251 280 csum >>= 32;

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