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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
iio: add MEMSensing MSA311 3-axis accelerometer driver
MSA311 is a tri-axial, low-g accelerometer with I2C digital output for
sensitivity consumer applications. It has dynamic user-selectable full
scales range of +-2g/+-4g/+-8g/+-16g and allows acceleration measurements
with output data rates from 1Hz to 1000Hz.
This driver supports following MSA311 features:
- IIO interface
- Different power modes: NORMAL and SUSPEND (using pm_runtime)
- ODR (Output Data Rate) selection
- Scale and samp_freq selection
- IIO triggered buffer, IIO reg access
- NEW_DATA interrupt + trigger
Below features to be done:
- Motion Events: ACTIVE, TAP, ORIENT, FREEFALL
- Low Power mode
Datasheet: https://cdn-shop.adafruit.com/product-files/5309/MSA311-V1.1-ENG.pdf
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Link: https://lore.kernel.org/r/20220822175011.2886-4-ddrokosov@sberdevices.ru
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
authored by
Dmitry Rokosov
and committed by
Jonathan Cameron
1ca2cfbc
49059493
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MAINTAINERS
+6
MAINTAINERS
···
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F: include/linux/mtd/
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F: include/uapi/mtd/
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MEMSENSING MICROSYSTEMS MSA311 DRIVER
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M: Dmitry Rokosov <ddrokosov@sberdevices.ru>
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L: linux-iio@vger.kernel.org
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S: Maintained
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F: drivers/iio/accel/msa311.c
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+
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MEN A21 WATCHDOG DRIVER
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M: Johannes Thumshirn <morbidrsa@gmail.com>
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L: linux-watchdog@vger.kernel.org
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drivers/iio/accel/Kconfig
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drivers/iio/accel/Kconfig
···
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To compile this driver as a module, choose M here: the module
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will be called mma9553.
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config MSA311
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tristate "MEMSensing Digital 3-Axis Accelerometer Driver"
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depends on I2C
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select IIO_BUFFER
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select IIO_TRIGGERED_BUFFER
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select REGMAP_I2C
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help
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Say yes here to build support for the MEMSensing MSA311
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accelerometer driver.
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To compile this driver as a module, choose M here: the module will be
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called msa311.
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config MXC4005
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tristate "Memsic MXC4005XC 3-Axis Accelerometer Driver"
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depends on I2C
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drivers/iio/accel/Makefile
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drivers/iio/accel/Makefile
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drivers/iio/accel/msa311.c
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drivers/iio/accel/msa311.c
···
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// SPDX-License-Identifier: GPL-2.0
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+
/*
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* MEMSensing digital 3-Axis accelerometer
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*
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* MSA311 is a tri-axial, low-g accelerometer with I2C digital output for
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* sensitivity consumer applications. It has dynamic user-selectable full
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* scales range of +-2g/+-4g/+-8g/+-16g and allows acceleration measurements
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* with output data rates from 1Hz to 1000Hz.
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*
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* MSA311 is available in an ultra small (2mm x 2mm, height 0.95mm) LGA package
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* and is guaranteed to operate over -40C to +85C.
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*
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* This driver supports following MSA311 features:
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* - IIO interface
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* - Different power modes: NORMAL, SUSPEND
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* - ODR (Output Data Rate) selection
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* - Scale selection
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* - IIO triggered buffer
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* - NEW_DATA interrupt + trigger
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*
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* Below features to be done:
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* - Motion Events: ACTIVE, TAP, ORIENT, FREEFALL
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* - Low Power mode
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*
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* Copyright (c) 2022, SberDevices. All Rights Reserved.
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*
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* Author: Dmitry Rokosov <ddrokosov@sberdevices.ru>
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*/
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#include <linux/i2c.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/pm.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <linux/string_helpers.h>
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#include <linux/units.h>
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+
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#include <linux/iio/buffer.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/sysfs.h>
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#include <linux/iio/trigger.h>
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#include <linux/iio/trigger_consumer.h>
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#include <linux/iio/triggered_buffer.h>
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+
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#define MSA311_SOFT_RESET_REG 0x00
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#define MSA311_PARTID_REG 0x01
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#define MSA311_ACC_X_REG 0x02
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#define MSA311_ACC_Y_REG 0x04
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#define MSA311_ACC_Z_REG 0x06
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#define MSA311_MOTION_INT_REG 0x09
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#define MSA311_DATA_INT_REG 0x0A
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#define MSA311_TAP_ACTIVE_STS_REG 0x0B
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#define MSA311_ORIENT_STS_REG 0x0C
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#define MSA311_RANGE_REG 0x0F
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#define MSA311_ODR_REG 0x10
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#define MSA311_PWR_MODE_REG 0x11
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#define MSA311_SWAP_POLARITY_REG 0x12
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#define MSA311_INT_SET_0_REG 0x16
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#define MSA311_INT_SET_1_REG 0x17
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#define MSA311_INT_MAP_0_REG 0x19
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#define MSA311_INT_MAP_1_REG 0x1A
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#define MSA311_INT_CONFIG_REG 0x20
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#define MSA311_INT_LATCH_REG 0x21
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#define MSA311_FREEFALL_DUR_REG 0x22
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#define MSA311_FREEFALL_TH_REG 0x23
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#define MSA311_FREEFALL_HY_REG 0x24
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#define MSA311_ACTIVE_DUR_REG 0x27
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#define MSA311_ACTIVE_TH_REG 0x28
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#define MSA311_TAP_DUR_REG 0x2A
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#define MSA311_TAP_TH_REG 0x2B
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#define MSA311_ORIENT_HY_REG 0x2C
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#define MSA311_Z_BLOCK_REG 0x2D
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#define MSA311_OFFSET_X_REG 0x38
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#define MSA311_OFFSET_Y_REG 0x39
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#define MSA311_OFFSET_Z_REG 0x3A
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+
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enum msa311_fields {
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/* Soft_Reset */
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F_SOFT_RESET_I2C, F_SOFT_RESET_SPI,
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/* Motion_Interrupt */
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F_ORIENT_INT, F_S_TAP_INT, F_D_TAP_INT, F_ACTIVE_INT, F_FREEFALL_INT,
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/* Data_Interrupt */
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F_NEW_DATA_INT,
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/* Tap_Active_Status */
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F_TAP_SIGN, F_TAP_FIRST_X, F_TAP_FIRST_Y, F_TAP_FIRST_Z, F_ACTV_SIGN,
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F_ACTV_FIRST_X, F_ACTV_FIRST_Y, F_ACTV_FIRST_Z,
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/* Orientation_Status */
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F_ORIENT_Z, F_ORIENT_X_Y,
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/* Range */
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F_FS,
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/* ODR */
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F_X_AXIS_DIS, F_Y_AXIS_DIS, F_Z_AXIS_DIS, F_ODR,
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/* Power Mode/Bandwidth */
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F_PWR_MODE, F_LOW_POWER_BW,
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/* Swap_Polarity */
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F_X_POLARITY, F_Y_POLARITY, F_Z_POLARITY, F_X_Y_SWAP,
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/* Int_Set_0 */
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F_ORIENT_INT_EN, F_S_TAP_INT_EN, F_D_TAP_INT_EN, F_ACTIVE_INT_EN_Z,
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F_ACTIVE_INT_EN_Y, F_ACTIVE_INT_EN_X,
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/* Int_Set_1 */
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F_NEW_DATA_INT_EN, F_FREEFALL_INT_EN,
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/* Int_Map_0 */
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F_INT1_ORIENT, F_INT1_S_TAP, F_INT1_D_TAP, F_INT1_ACTIVE,
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F_INT1_FREEFALL,
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/* Int_Map_1 */
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F_INT1_NEW_DATA,
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/* Int_Config */
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F_INT1_OD, F_INT1_LVL,
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/* Int_Latch */
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F_RESET_INT, F_LATCH_INT,
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/* Freefall_Hy */
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F_FREEFALL_MODE, F_FREEFALL_HY,
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/* Active_Dur */
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F_ACTIVE_DUR,
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/* Tap_Dur */
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F_TAP_QUIET, F_TAP_SHOCK, F_TAP_DUR,
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/* Tap_Th */
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F_TAP_TH,
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/* Orient_Hy */
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F_ORIENT_HYST, F_ORIENT_BLOCKING, F_ORIENT_MODE,
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/* Z_Block */
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F_Z_BLOCKING,
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/* End of register map */
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F_MAX_FIELDS,
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};
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static const struct reg_field msa311_reg_fields[] = {
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/* Soft_Reset */
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[F_SOFT_RESET_I2C] = REG_FIELD(MSA311_SOFT_RESET_REG, 2, 2),
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[F_SOFT_RESET_SPI] = REG_FIELD(MSA311_SOFT_RESET_REG, 5, 5),
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/* Motion_Interrupt */
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[F_ORIENT_INT] = REG_FIELD(MSA311_MOTION_INT_REG, 6, 6),
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[F_S_TAP_INT] = REG_FIELD(MSA311_MOTION_INT_REG, 5, 5),
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[F_D_TAP_INT] = REG_FIELD(MSA311_MOTION_INT_REG, 4, 4),
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[F_ACTIVE_INT] = REG_FIELD(MSA311_MOTION_INT_REG, 2, 2),
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[F_FREEFALL_INT] = REG_FIELD(MSA311_MOTION_INT_REG, 0, 0),
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/* Data_Interrupt */
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[F_NEW_DATA_INT] = REG_FIELD(MSA311_DATA_INT_REG, 0, 0),
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/* Tap_Active_Status */
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[F_TAP_SIGN] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 7, 7),
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[F_TAP_FIRST_X] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 6, 6),
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[F_TAP_FIRST_Y] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 5, 5),
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[F_TAP_FIRST_Z] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 4, 4),
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[F_ACTV_SIGN] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 3, 3),
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[F_ACTV_FIRST_X] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 2, 2),
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[F_ACTV_FIRST_Y] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 1, 1),
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[F_ACTV_FIRST_Z] = REG_FIELD(MSA311_TAP_ACTIVE_STS_REG, 0, 0),
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/* Orientation_Status */
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[F_ORIENT_Z] = REG_FIELD(MSA311_ORIENT_STS_REG, 6, 6),
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[F_ORIENT_X_Y] = REG_FIELD(MSA311_ORIENT_STS_REG, 4, 5),
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/* Range */
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[F_FS] = REG_FIELD(MSA311_RANGE_REG, 0, 1),
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/* ODR */
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[F_X_AXIS_DIS] = REG_FIELD(MSA311_ODR_REG, 7, 7),
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[F_Y_AXIS_DIS] = REG_FIELD(MSA311_ODR_REG, 6, 6),
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[F_Z_AXIS_DIS] = REG_FIELD(MSA311_ODR_REG, 5, 5),
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[F_ODR] = REG_FIELD(MSA311_ODR_REG, 0, 3),
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/* Power Mode/Bandwidth */
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[F_PWR_MODE] = REG_FIELD(MSA311_PWR_MODE_REG, 6, 7),
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[F_LOW_POWER_BW] = REG_FIELD(MSA311_PWR_MODE_REG, 1, 4),
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/* Swap_Polarity */
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[F_X_POLARITY] = REG_FIELD(MSA311_SWAP_POLARITY_REG, 3, 3),
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[F_Y_POLARITY] = REG_FIELD(MSA311_SWAP_POLARITY_REG, 2, 2),
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[F_Z_POLARITY] = REG_FIELD(MSA311_SWAP_POLARITY_REG, 1, 1),
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[F_X_Y_SWAP] = REG_FIELD(MSA311_SWAP_POLARITY_REG, 0, 0),
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/* Int_Set_0 */
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[F_ORIENT_INT_EN] = REG_FIELD(MSA311_INT_SET_0_REG, 6, 6),
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[F_S_TAP_INT_EN] = REG_FIELD(MSA311_INT_SET_0_REG, 5, 5),
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[F_D_TAP_INT_EN] = REG_FIELD(MSA311_INT_SET_0_REG, 4, 4),
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[F_ACTIVE_INT_EN_Z] = REG_FIELD(MSA311_INT_SET_0_REG, 2, 2),
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[F_ACTIVE_INT_EN_Y] = REG_FIELD(MSA311_INT_SET_0_REG, 1, 1),
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[F_ACTIVE_INT_EN_X] = REG_FIELD(MSA311_INT_SET_0_REG, 0, 0),
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/* Int_Set_1 */
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[F_NEW_DATA_INT_EN] = REG_FIELD(MSA311_INT_SET_1_REG, 4, 4),
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[F_FREEFALL_INT_EN] = REG_FIELD(MSA311_INT_SET_1_REG, 3, 3),
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/* Int_Map_0 */
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[F_INT1_ORIENT] = REG_FIELD(MSA311_INT_MAP_0_REG, 6, 6),
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[F_INT1_S_TAP] = REG_FIELD(MSA311_INT_MAP_0_REG, 5, 5),
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[F_INT1_D_TAP] = REG_FIELD(MSA311_INT_MAP_0_REG, 4, 4),
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[F_INT1_ACTIVE] = REG_FIELD(MSA311_INT_MAP_0_REG, 2, 2),
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[F_INT1_FREEFALL] = REG_FIELD(MSA311_INT_MAP_0_REG, 0, 0),
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/* Int_Map_1 */
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[F_INT1_NEW_DATA] = REG_FIELD(MSA311_INT_MAP_1_REG, 0, 0),
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/* Int_Config */
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[F_INT1_OD] = REG_FIELD(MSA311_INT_CONFIG_REG, 1, 1),
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[F_INT1_LVL] = REG_FIELD(MSA311_INT_CONFIG_REG, 0, 0),
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/* Int_Latch */
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[F_RESET_INT] = REG_FIELD(MSA311_INT_LATCH_REG, 7, 7),
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[F_LATCH_INT] = REG_FIELD(MSA311_INT_LATCH_REG, 0, 3),
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/* Freefall_Hy */
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[F_FREEFALL_MODE] = REG_FIELD(MSA311_FREEFALL_HY_REG, 2, 2),
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[F_FREEFALL_HY] = REG_FIELD(MSA311_FREEFALL_HY_REG, 0, 1),
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/* Active_Dur */
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[F_ACTIVE_DUR] = REG_FIELD(MSA311_ACTIVE_DUR_REG, 0, 1),
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/* Tap_Dur */
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[F_TAP_QUIET] = REG_FIELD(MSA311_TAP_DUR_REG, 7, 7),
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[F_TAP_SHOCK] = REG_FIELD(MSA311_TAP_DUR_REG, 6, 6),
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[F_TAP_DUR] = REG_FIELD(MSA311_TAP_DUR_REG, 0, 2),
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/* Tap_Th */
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[F_TAP_TH] = REG_FIELD(MSA311_TAP_TH_REG, 0, 4),
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/* Orient_Hy */
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[F_ORIENT_HYST] = REG_FIELD(MSA311_ORIENT_HY_REG, 4, 6),
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[F_ORIENT_BLOCKING] = REG_FIELD(MSA311_ORIENT_HY_REG, 2, 3),
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[F_ORIENT_MODE] = REG_FIELD(MSA311_ORIENT_HY_REG, 0, 1),
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/* Z_Block */
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[F_Z_BLOCKING] = REG_FIELD(MSA311_Z_BLOCK_REG, 0, 3),
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};
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+
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#define MSA311_WHO_AM_I 0x13
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/*
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* Possible Full Scale ranges
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*
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* Axis data is 12-bit signed value, so
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*
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* fs0 = (2 + 2) * 9.81 / (2^11) = 0.009580
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* fs1 = (4 + 4) * 9.81 / (2^11) = 0.019160
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* fs2 = (8 + 8) * 9.81 / (2^11) = 0.038320
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* fs3 = (16 + 16) * 9.81 / (2^11) = 0.076641
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*/
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enum {
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MSA311_FS_2G,
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MSA311_FS_4G,
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MSA311_FS_8G,
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MSA311_FS_16G,
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};
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struct iio_decimal_fract {
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int integral;
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int microfract;
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};
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+
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static const struct iio_decimal_fract msa311_fs_table[] = {
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{0, 9580}, {0, 19160}, {0, 38320}, {0, 76641},
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};
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+
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/* Possible Output Data Rate values */
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enum {
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MSA311_ODR_1_HZ,
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MSA311_ODR_1_95_HZ,
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MSA311_ODR_3_9_HZ,
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MSA311_ODR_7_81_HZ,
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MSA311_ODR_15_63_HZ,
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MSA311_ODR_31_25_HZ,
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MSA311_ODR_62_5_HZ,
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MSA311_ODR_125_HZ,
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MSA311_ODR_250_HZ,
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MSA311_ODR_500_HZ,
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MSA311_ODR_1000_HZ,
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};
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+
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static const struct iio_decimal_fract msa311_odr_table[] = {
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{1, 0}, {1, 950000}, {3, 900000}, {7, 810000}, {15, 630000},
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{31, 250000}, {62, 500000}, {125, 0}, {250, 0}, {500, 0}, {1000, 0},
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+
};
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+
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+
/* All supported power modes */
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+
#define MSA311_PWR_MODE_NORMAL 0b00
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#define MSA311_PWR_MODE_LOW 0b01
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+
#define MSA311_PWR_MODE_UNKNOWN 0b10
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+
#define MSA311_PWR_MODE_SUSPEND 0b11
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static const char * const msa311_pwr_modes[] = {
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[MSA311_PWR_MODE_NORMAL] = "normal",
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[MSA311_PWR_MODE_LOW] = "low",
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[MSA311_PWR_MODE_UNKNOWN] = "unknown",
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[MSA311_PWR_MODE_SUSPEND] = "suspend",
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};
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+
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+
/* Autosuspend delay */
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#define MSA311_PWR_SLEEP_DELAY_MS 2000
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+
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+
/* Possible INT1 types and levels */
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+
enum {
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MSA311_INT1_OD_PUSH_PULL,
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+
MSA311_INT1_OD_OPEN_DRAIN,
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+
};
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+
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enum {
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MSA311_INT1_LVL_LOW,
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MSA311_INT1_LVL_HIGH,
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+
};
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+
284
+
/* Latch INT modes */
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+
#define MSA311_LATCH_INT_NOT_LATCHED 0b0000
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+
#define MSA311_LATCH_INT_250MS 0b0001
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+
#define MSA311_LATCH_INT_500MS 0b0010
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+
#define MSA311_LATCH_INT_1S 0b0011
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+
#define MSA311_LATCH_INT_2S 0b0100
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+
#define MSA311_LATCH_INT_4S 0b0101
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+
#define MSA311_LATCH_INT_8S 0b0110
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+
#define MSA311_LATCH_INT_1MS 0b1010
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+
#define MSA311_LATCH_INT_2MS 0b1011
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+
#define MSA311_LATCH_INT_25MS 0b1100
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+
#define MSA311_LATCH_INT_50MS 0b1101
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+
#define MSA311_LATCH_INT_100MS 0b1110
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+
#define MSA311_LATCH_INT_LATCHED 0b0111
298
+
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+
static const struct regmap_range msa311_readonly_registers[] = {
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+
regmap_reg_range(MSA311_PARTID_REG, MSA311_ORIENT_STS_REG),
301
+
};
302
+
303
+
static const struct regmap_access_table msa311_writeable_table = {
304
+
.no_ranges = msa311_readonly_registers,
305
+
.n_no_ranges = ARRAY_SIZE(msa311_readonly_registers),
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+
};
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+
308
+
static const struct regmap_range msa311_writeonly_registers[] = {
309
+
regmap_reg_range(MSA311_SOFT_RESET_REG, MSA311_SOFT_RESET_REG),
310
+
};
311
+
312
+
static const struct regmap_access_table msa311_readable_table = {
313
+
.no_ranges = msa311_writeonly_registers,
314
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.n_no_ranges = ARRAY_SIZE(msa311_writeonly_registers),
315
+
};
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+
317
+
static const struct regmap_range msa311_volatile_registers[] = {
318
+
regmap_reg_range(MSA311_ACC_X_REG, MSA311_ORIENT_STS_REG),
319
+
};
320
+
321
+
static const struct regmap_access_table msa311_volatile_table = {
322
+
.yes_ranges = msa311_volatile_registers,
323
+
.n_yes_ranges = ARRAY_SIZE(msa311_volatile_registers),
324
+
};
325
+
326
+
static const struct regmap_config msa311_regmap_config = {
327
+
.name = "msa311",
328
+
.reg_bits = 8,
329
+
.val_bits = 8,
330
+
.max_register = MSA311_OFFSET_Z_REG,
331
+
.wr_table = &msa311_writeable_table,
332
+
.rd_table = &msa311_readable_table,
333
+
.volatile_table = &msa311_volatile_table,
334
+
.cache_type = REGCACHE_RBTREE,
335
+
};
336
+
337
+
#define MSA311_GENMASK(field) ({ \
338
+
typeof(&(msa311_reg_fields)[0]) _field; \
339
+
_field = &msa311_reg_fields[(field)]; \
340
+
GENMASK(_field->msb, _field->lsb); \
341
+
})
342
+
343
+
/**
344
+
* struct msa311_priv - MSA311 internal private state
345
+
* @regs: Underlying I2C bus adapter used to abstract slave
346
+
* register accesses
347
+
* @fields: Abstract objects for each registers fields access
348
+
* @dev: Device handler associated with appropriate bus client
349
+
* @lock: Protects msa311 device state between setup and data access routines
350
+
* (power transitions, samp_freq/scale tune, retrieving axes data, etc)
351
+
* @chip_name: Chip name in the format "msa311-%02x" % partid
352
+
* @new_data_trig: Optional NEW_DATA interrupt driven trigger used
353
+
* to notify external consumers a new sample is ready
354
+
* @vdd: Optional external voltage regulator for the device power supply
355
+
*/
356
+
struct msa311_priv {
357
+
struct regmap *regs;
358
+
struct regmap_field *fields[F_MAX_FIELDS];
359
+
360
+
struct device *dev;
361
+
struct mutex lock;
362
+
char *chip_name;
363
+
364
+
struct iio_trigger *new_data_trig;
365
+
struct regulator *vdd;
366
+
};
367
+
368
+
enum msa311_si {
369
+
MSA311_SI_X,
370
+
MSA311_SI_Y,
371
+
MSA311_SI_Z,
372
+
MSA311_SI_TIMESTAMP,
373
+
};
374
+
375
+
#define MSA311_ACCEL_CHANNEL(axis) { \
376
+
.type = IIO_ACCEL, \
377
+
.modified = 1, \
378
+
.channel2 = IIO_MOD_##axis, \
379
+
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
380
+
.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
381
+
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
382
+
.info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_SCALE) | \
383
+
BIT(IIO_CHAN_INFO_SAMP_FREQ), \
384
+
.scan_index = MSA311_SI_##axis, \
385
+
.scan_type = { \
386
+
.sign = 's', \
387
+
.realbits = 12, \
388
+
.storagebits = 16, \
389
+
.shift = 4, \
390
+
.endianness = IIO_LE, \
391
+
}, \
392
+
.datasheet_name = "ACC_"#axis, \
393
+
}
394
+
395
+
static const struct iio_chan_spec msa311_channels[] = {
396
+
MSA311_ACCEL_CHANNEL(X),
397
+
MSA311_ACCEL_CHANNEL(Y),
398
+
MSA311_ACCEL_CHANNEL(Z),
399
+
IIO_CHAN_SOFT_TIMESTAMP(MSA311_SI_TIMESTAMP),
400
+
};
401
+
402
+
/**
403
+
* msa311_get_odr() - Read Output Data Rate (ODR) value from MSA311 accel
404
+
* @msa311: MSA311 internal private state
405
+
* @odr: output ODR value
406
+
*
407
+
* This function should be called under msa311->lock.
408
+
*
409
+
* Return: 0 on success, -ERRNO in other failures
410
+
*/
411
+
static int msa311_get_odr(struct msa311_priv *msa311, unsigned int *odr)
412
+
{
413
+
int err;
414
+
415
+
err = regmap_field_read(msa311->fields[F_ODR], odr);
416
+
if (err)
417
+
return err;
418
+
419
+
/*
420
+
* Filter the same 1000Hz ODR register values based on datasheet info.
421
+
* ODR can be equal to 1010-1111 for 1000Hz, but function returns 1010
422
+
* all the time.
423
+
*/
424
+
if (*odr > MSA311_ODR_1000_HZ)
425
+
*odr = MSA311_ODR_1000_HZ;
426
+
427
+
return 0;
428
+
}
429
+
430
+
/**
431
+
* msa311_set_odr() - Setup Output Data Rate (ODR) value for MSA311 accel
432
+
* @msa311: MSA311 internal private state
433
+
* @odr: requested ODR value
434
+
*
435
+
* This function should be called under msa311->lock. Possible ODR values:
436
+
* - 1Hz (not available in normal mode)
437
+
* - 1.95Hz (not available in normal mode)
438
+
* - 3.9Hz
439
+
* - 7.81Hz
440
+
* - 15.63Hz
441
+
* - 31.25Hz
442
+
* - 62.5Hz
443
+
* - 125Hz
444
+
* - 250Hz
445
+
* - 500Hz
446
+
* - 1000Hz
447
+
*
448
+
* Return: 0 on success, -EINVAL for bad ODR value in the certain power mode,
449
+
* -ERRNO in other failures
450
+
*/
451
+
static int msa311_set_odr(struct msa311_priv *msa311, unsigned int odr)
452
+
{
453
+
struct device *dev = msa311->dev;
454
+
unsigned int pwr_mode;
455
+
bool good_odr;
456
+
int err;
457
+
458
+
err = regmap_field_read(msa311->fields[F_PWR_MODE], &pwr_mode);
459
+
if (err)
460
+
return err;
461
+
462
+
/* Filter bad ODR values */
463
+
if (pwr_mode == MSA311_PWR_MODE_NORMAL)
464
+
good_odr = (odr > MSA311_ODR_1_95_HZ);
465
+
else
466
+
good_odr = false;
467
+
468
+
if (!good_odr) {
469
+
dev_err(dev,
470
+
"can't set odr %u.%06uHz, not available in %s mode\n",
471
+
msa311_odr_table[odr].integral,
472
+
msa311_odr_table[odr].microfract,
473
+
msa311_pwr_modes[pwr_mode]);
474
+
return -EINVAL;
475
+
}
476
+
477
+
return regmap_field_write(msa311->fields[F_ODR], odr);
478
+
}
479
+
480
+
/**
481
+
* msa311_wait_for_next_data() - Wait next accel data available after resume
482
+
* @msa311: MSA311 internal private state
483
+
*
484
+
* Return: 0 on success, -EINTR if msleep() was interrupted,
485
+
* -ERRNO in other failures
486
+
*/
487
+
static int msa311_wait_for_next_data(struct msa311_priv *msa311)
488
+
{
489
+
static const unsigned int unintr_thresh_ms = 20;
490
+
struct device *dev = msa311->dev;
491
+
unsigned long freq_uhz;
492
+
unsigned long wait_ms;
493
+
unsigned int odr;
494
+
int err;
495
+
496
+
err = msa311_get_odr(msa311, &odr);
497
+
if (err) {
498
+
dev_err(dev, "can't get actual frequency (%pe)\n",
499
+
ERR_PTR(err));
500
+
return err;
501
+
}
502
+
503
+
/*
504
+
* After msa311 resuming is done, we need to wait for data
505
+
* to be refreshed by accel logic.
506
+
* A certain timeout is calculated based on the current ODR value.
507
+
* If requested timeout isn't so long (let's assume 20ms),
508
+
* we can wait for next data in uninterruptible sleep.
509
+
*/
510
+
freq_uhz = msa311_odr_table[odr].integral * MICROHZ_PER_HZ +
511
+
msa311_odr_table[odr].microfract;
512
+
wait_ms = (MICROHZ_PER_HZ / freq_uhz) * MSEC_PER_SEC;
513
+
514
+
if (wait_ms < unintr_thresh_ms)
515
+
usleep_range(wait_ms * USEC_PER_MSEC,
516
+
unintr_thresh_ms * USEC_PER_MSEC);
517
+
else if (msleep_interruptible(wait_ms))
518
+
return -EINTR;
519
+
520
+
return 0;
521
+
}
522
+
523
+
/**
524
+
* msa311_set_pwr_mode() - Install certain MSA311 power mode
525
+
* @msa311: MSA311 internal private state
526
+
* @mode: Power mode can be equal to NORMAL or SUSPEND
527
+
*
528
+
* This function should be called under msa311->lock.
529
+
*
530
+
* Return: 0 on success, -ERRNO on failure
531
+
*/
532
+
static int msa311_set_pwr_mode(struct msa311_priv *msa311, unsigned int mode)
533
+
{
534
+
struct device *dev = msa311->dev;
535
+
unsigned int prev_mode;
536
+
int err;
537
+
538
+
if (mode >= ARRAY_SIZE(msa311_pwr_modes))
539
+
return -EINVAL;
540
+
541
+
dev_dbg(dev, "transition to %s mode\n", msa311_pwr_modes[mode]);
542
+
543
+
err = regmap_field_read(msa311->fields[F_PWR_MODE], &prev_mode);
544
+
if (err)
545
+
return err;
546
+
547
+
err = regmap_field_write(msa311->fields[F_PWR_MODE], mode);
548
+
if (err)
549
+
return err;
550
+
551
+
/* Wait actual data if we wake up */
552
+
if (prev_mode == MSA311_PWR_MODE_SUSPEND &&
553
+
mode == MSA311_PWR_MODE_NORMAL)
554
+
return msa311_wait_for_next_data(msa311);
555
+
556
+
return 0;
557
+
}
558
+
559
+
/**
560
+
* msa311_get_axis() - Read MSA311 accel data for certain IIO channel axis spec
561
+
* @msa311: MSA311 internal private state
562
+
* @chan: IIO channel specification
563
+
* @axis: Output accel axis data for requested IIO channel spec
564
+
*
565
+
* This function should be called under msa311->lock.
566
+
*
567
+
* Return: 0 on success, -EINVAL for unknown IIO channel specification,
568
+
* -ERRNO in other failures
569
+
*/
570
+
static int msa311_get_axis(struct msa311_priv *msa311,
571
+
const struct iio_chan_spec * const chan,
572
+
__le16 *axis)
573
+
{
574
+
struct device *dev = msa311->dev;
575
+
unsigned int axis_reg;
576
+
577
+
if (chan->scan_index < MSA311_SI_X || chan->scan_index > MSA311_SI_Z) {
578
+
dev_err(dev, "invalid scan_index value [%d]\n",
579
+
chan->scan_index);
580
+
return -EINVAL;
581
+
}
582
+
583
+
/* Axes data layout has 2 byte gap for each axis starting from X axis */
584
+
axis_reg = MSA311_ACC_X_REG + (chan->scan_index << 1);
585
+
586
+
return regmap_bulk_read(msa311->regs, axis_reg, axis, sizeof(*axis));
587
+
}
588
+
589
+
static int msa311_read_raw_data(struct iio_dev *indio_dev,
590
+
struct iio_chan_spec const *chan,
591
+
int *val, int *val2)
592
+
{
593
+
struct msa311_priv *msa311 = iio_priv(indio_dev);
594
+
struct device *dev = msa311->dev;
595
+
__le16 axis;
596
+
int err;
597
+
598
+
err = pm_runtime_resume_and_get(dev);
599
+
if (err)
600
+
return err;
601
+
602
+
err = iio_device_claim_direct_mode(indio_dev);
603
+
if (err)
604
+
return err;
605
+
606
+
mutex_lock(&msa311->lock);
607
+
err = msa311_get_axis(msa311, chan, &axis);
608
+
mutex_unlock(&msa311->lock);
609
+
610
+
iio_device_release_direct_mode(indio_dev);
611
+
612
+
pm_runtime_mark_last_busy(dev);
613
+
pm_runtime_put_autosuspend(dev);
614
+
615
+
if (err) {
616
+
dev_err(dev, "can't get axis %s (%pe)\n",
617
+
chan->datasheet_name, ERR_PTR(err));
618
+
return err;
619
+
}
620
+
621
+
/*
622
+
* Axis data format is:
623
+
* ACC_X = (ACC_X_MSB[7:0] << 4) | ACC_X_LSB[7:4]
624
+
*/
625
+
*val = sign_extend32(le16_to_cpu(axis) >> chan->scan_type.shift,
626
+
chan->scan_type.realbits - 1);
627
+
628
+
return IIO_VAL_INT;
629
+
}
630
+
631
+
static int msa311_read_scale(struct iio_dev *indio_dev, int *val, int *val2)
632
+
{
633
+
struct msa311_priv *msa311 = iio_priv(indio_dev);
634
+
struct device *dev = msa311->dev;
635
+
unsigned int fs;
636
+
int err;
637
+
638
+
mutex_lock(&msa311->lock);
639
+
err = regmap_field_read(msa311->fields[F_FS], &fs);
640
+
mutex_unlock(&msa311->lock);
641
+
if (err) {
642
+
dev_err(dev, "can't get actual scale (%pe)\n", ERR_PTR(err));
643
+
return err;
644
+
}
645
+
646
+
*val = msa311_fs_table[fs].integral;
647
+
*val2 = msa311_fs_table[fs].microfract;
648
+
649
+
return IIO_VAL_INT_PLUS_MICRO;
650
+
}
651
+
652
+
static int msa311_read_samp_freq(struct iio_dev *indio_dev,
653
+
int *val, int *val2)
654
+
{
655
+
struct msa311_priv *msa311 = iio_priv(indio_dev);
656
+
struct device *dev = msa311->dev;
657
+
unsigned int odr;
658
+
int err;
659
+
660
+
mutex_lock(&msa311->lock);
661
+
err = msa311_get_odr(msa311, &odr);
662
+
mutex_unlock(&msa311->lock);
663
+
if (err) {
664
+
dev_err(dev, "can't get actual frequency (%pe)\n",
665
+
ERR_PTR(err));
666
+
return err;
667
+
}
668
+
669
+
*val = msa311_odr_table[odr].integral;
670
+
*val2 = msa311_odr_table[odr].microfract;
671
+
672
+
return IIO_VAL_INT_PLUS_MICRO;
673
+
}
674
+
675
+
static int msa311_read_raw(struct iio_dev *indio_dev,
676
+
struct iio_chan_spec const *chan,
677
+
int *val, int *val2, long mask)
678
+
{
679
+
switch (mask) {
680
+
case IIO_CHAN_INFO_RAW:
681
+
return msa311_read_raw_data(indio_dev, chan, val, val2);
682
+
683
+
case IIO_CHAN_INFO_SCALE:
684
+
return msa311_read_scale(indio_dev, val, val2);
685
+
686
+
case IIO_CHAN_INFO_SAMP_FREQ:
687
+
return msa311_read_samp_freq(indio_dev, val, val2);
688
+
689
+
default:
690
+
return -EINVAL;
691
+
}
692
+
}
693
+
694
+
static int msa311_read_avail(struct iio_dev *indio_dev,
695
+
struct iio_chan_spec const *chan,
696
+
const int **vals, int *type,
697
+
int *length, long mask)
698
+
{
699
+
switch (mask) {
700
+
case IIO_CHAN_INFO_SAMP_FREQ:
701
+
*vals = (int *)msa311_odr_table;
702
+
*type = IIO_VAL_INT_PLUS_MICRO;
703
+
/* ODR value has 2 ints (integer and fractional parts) */
704
+
*length = ARRAY_SIZE(msa311_odr_table) * 2;
705
+
return IIO_AVAIL_LIST;
706
+
707
+
case IIO_CHAN_INFO_SCALE:
708
+
*vals = (int *)msa311_fs_table;
709
+
*type = IIO_VAL_INT_PLUS_MICRO;
710
+
/* FS value has 2 ints (integer and fractional parts) */
711
+
*length = ARRAY_SIZE(msa311_fs_table) * 2;
712
+
return IIO_AVAIL_LIST;
713
+
714
+
default:
715
+
return -EINVAL;
716
+
}
717
+
}
718
+
719
+
static int msa311_write_scale(struct iio_dev *indio_dev, int val, int val2)
720
+
{
721
+
struct msa311_priv *msa311 = iio_priv(indio_dev);
722
+
struct device *dev = msa311->dev;
723
+
unsigned int fs;
724
+
int err;
725
+
726
+
/* We do not have fs >= 1, so skip such values */
727
+
if (val)
728
+
return 0;
729
+
730
+
err = pm_runtime_resume_and_get(dev);
731
+
if (err)
732
+
return err;
733
+
734
+
err = -EINVAL;
735
+
for (fs = 0; fs < ARRAY_SIZE(msa311_fs_table); fs++)
736
+
/* Do not check msa311_fs_table[fs].integral, it's always 0 */
737
+
if (val2 == msa311_fs_table[fs].microfract) {
738
+
mutex_lock(&msa311->lock);
739
+
err = regmap_field_write(msa311->fields[F_FS], fs);
740
+
mutex_unlock(&msa311->lock);
741
+
break;
742
+
}
743
+
744
+
pm_runtime_mark_last_busy(dev);
745
+
pm_runtime_put_autosuspend(dev);
746
+
747
+
if (err)
748
+
dev_err(dev, "can't update scale (%pe)\n", ERR_PTR(err));
749
+
750
+
return err;
751
+
}
752
+
753
+
static int msa311_write_samp_freq(struct iio_dev *indio_dev, int val, int val2)
754
+
{
755
+
struct msa311_priv *msa311 = iio_priv(indio_dev);
756
+
struct device *dev = msa311->dev;
757
+
unsigned int odr;
758
+
int err;
759
+
760
+
err = pm_runtime_resume_and_get(dev);
761
+
if (err)
762
+
return err;
763
+
764
+
/*
765
+
* Sampling frequency changing is prohibited when buffer mode is
766
+
* enabled, because sometimes MSA311 chip returns outliers during
767
+
* frequency values growing up in the read operation moment.
768
+
*/
769
+
err = iio_device_claim_direct_mode(indio_dev);
770
+
if (err)
771
+
return err;
772
+
773
+
err = -EINVAL;
774
+
for (odr = 0; odr < ARRAY_SIZE(msa311_odr_table); odr++)
775
+
if (val == msa311_odr_table[odr].integral &&
776
+
val2 == msa311_odr_table[odr].microfract) {
777
+
mutex_lock(&msa311->lock);
778
+
err = msa311_set_odr(msa311, odr);
779
+
mutex_unlock(&msa311->lock);
780
+
break;
781
+
}
782
+
783
+
iio_device_release_direct_mode(indio_dev);
784
+
785
+
pm_runtime_mark_last_busy(dev);
786
+
pm_runtime_put_autosuspend(dev);
787
+
788
+
if (err)
789
+
dev_err(dev, "can't update frequency (%pe)\n", ERR_PTR(err));
790
+
791
+
return err;
792
+
}
793
+
794
+
static int msa311_write_raw(struct iio_dev *indio_dev,
795
+
struct iio_chan_spec const *chan,
796
+
int val, int val2, long mask)
797
+
{
798
+
switch (mask) {
799
+
case IIO_CHAN_INFO_SCALE:
800
+
return msa311_write_scale(indio_dev, val, val2);
801
+
802
+
case IIO_CHAN_INFO_SAMP_FREQ:
803
+
return msa311_write_samp_freq(indio_dev, val, val2);
804
+
805
+
default:
806
+
return -EINVAL;
807
+
}
808
+
}
809
+
810
+
static int msa311_debugfs_reg_access(struct iio_dev *indio_dev,
811
+
unsigned int reg, unsigned int writeval,
812
+
unsigned int *readval)
813
+
{
814
+
struct msa311_priv *msa311 = iio_priv(indio_dev);
815
+
struct device *dev = msa311->dev;
816
+
int err;
817
+
818
+
if (reg > regmap_get_max_register(msa311->regs))
819
+
return -EINVAL;
820
+
821
+
err = pm_runtime_resume_and_get(dev);
822
+
if (err)
823
+
return err;
824
+
825
+
mutex_lock(&msa311->lock);
826
+
827
+
if (readval)
828
+
err = regmap_read(msa311->regs, reg, readval);
829
+
else
830
+
err = regmap_write(msa311->regs, reg, writeval);
831
+
832
+
mutex_unlock(&msa311->lock);
833
+
834
+
pm_runtime_mark_last_busy(dev);
835
+
pm_runtime_put_autosuspend(dev);
836
+
837
+
if (err)
838
+
dev_err(dev, "can't %s register %u from debugfs (%pe)\n",
839
+
str_read_write(readval), reg, ERR_PTR(err));
840
+
841
+
return err;
842
+
}
843
+
844
+
static int msa311_buffer_preenable(struct iio_dev *indio_dev)
845
+
{
846
+
struct msa311_priv *msa311 = iio_priv(indio_dev);
847
+
struct device *dev = msa311->dev;
848
+
849
+
return pm_runtime_resume_and_get(dev);
850
+
}
851
+
852
+
static int msa311_buffer_postdisable(struct iio_dev *indio_dev)
853
+
{
854
+
struct msa311_priv *msa311 = iio_priv(indio_dev);
855
+
struct device *dev = msa311->dev;
856
+
857
+
pm_runtime_mark_last_busy(dev);
858
+
pm_runtime_put_autosuspend(dev);
859
+
860
+
return 0;
861
+
}
862
+
863
+
static int msa311_set_new_data_trig_state(struct iio_trigger *trig, bool state)
864
+
{
865
+
struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
866
+
struct msa311_priv *msa311 = iio_priv(indio_dev);
867
+
struct device *dev = msa311->dev;
868
+
int err;
869
+
870
+
mutex_lock(&msa311->lock);
871
+
err = regmap_field_write(msa311->fields[F_NEW_DATA_INT_EN], state);
872
+
mutex_unlock(&msa311->lock);
873
+
if (err)
874
+
dev_err(dev,
875
+
"can't %s buffer due to new_data_int failure (%pe)\n",
876
+
str_enable_disable(state), ERR_PTR(err));
877
+
878
+
return err;
879
+
}
880
+
881
+
static int msa311_validate_device(struct iio_trigger *trig,
882
+
struct iio_dev *indio_dev)
883
+
{
884
+
return iio_trigger_get_drvdata(trig) == indio_dev ? 0 : -EINVAL;
885
+
}
886
+
887
+
static irqreturn_t msa311_buffer_thread(int irq, void *p)
888
+
{
889
+
struct iio_poll_func *pf = p;
890
+
struct msa311_priv *msa311 = iio_priv(pf->indio_dev);
891
+
struct iio_dev *indio_dev = pf->indio_dev;
892
+
const struct iio_chan_spec *chan;
893
+
struct device *dev = msa311->dev;
894
+
int bit, err, i = 0;
895
+
__le16 axis;
896
+
struct {
897
+
__le16 channels[MSA311_SI_Z + 1];
898
+
s64 ts __aligned(8);
899
+
} buf;
900
+
901
+
memset(&buf, 0, sizeof(buf));
902
+
903
+
mutex_lock(&msa311->lock);
904
+
905
+
for_each_set_bit(bit, indio_dev->active_scan_mask,
906
+
indio_dev->masklength) {
907
+
chan = &msa311_channels[bit];
908
+
909
+
err = msa311_get_axis(msa311, chan, &axis);
910
+
if (err) {
911
+
mutex_unlock(&msa311->lock);
912
+
dev_err(dev, "can't get axis %s (%pe)\n",
913
+
chan->datasheet_name, ERR_PTR(err));
914
+
goto notify_done;
915
+
}
916
+
917
+
buf.channels[i++] = axis;
918
+
}
919
+
920
+
mutex_unlock(&msa311->lock);
921
+
922
+
iio_push_to_buffers_with_timestamp(indio_dev, &buf,
923
+
iio_get_time_ns(indio_dev));
924
+
925
+
notify_done:
926
+
iio_trigger_notify_done(indio_dev->trig);
927
+
928
+
return IRQ_HANDLED;
929
+
}
930
+
931
+
static irqreturn_t msa311_irq_thread(int irq, void *p)
932
+
{
933
+
struct msa311_priv *msa311 = iio_priv(p);
934
+
unsigned int new_data_int_enabled;
935
+
struct device *dev = msa311->dev;
936
+
int err;
937
+
938
+
mutex_lock(&msa311->lock);
939
+
940
+
/*
941
+
* We do not check NEW_DATA int status, because based on the
942
+
* specification it's cleared automatically after a fixed time.
943
+
* So just check that is enabled by driver logic.
944
+
*/
945
+
err = regmap_field_read(msa311->fields[F_NEW_DATA_INT_EN],
946
+
&new_data_int_enabled);
947
+
948
+
mutex_unlock(&msa311->lock);
949
+
if (err) {
950
+
dev_err(dev, "can't read new_data interrupt state (%pe)\n",
951
+
ERR_PTR(err));
952
+
return IRQ_NONE;
953
+
}
954
+
955
+
if (new_data_int_enabled)
956
+
iio_trigger_poll_chained(msa311->new_data_trig);
957
+
958
+
return IRQ_HANDLED;
959
+
}
960
+
961
+
static const struct iio_info msa311_info = {
962
+
.read_raw = msa311_read_raw,
963
+
.read_avail = msa311_read_avail,
964
+
.write_raw = msa311_write_raw,
965
+
.debugfs_reg_access = msa311_debugfs_reg_access,
966
+
};
967
+
968
+
static const struct iio_buffer_setup_ops msa311_buffer_setup_ops = {
969
+
.preenable = msa311_buffer_preenable,
970
+
.postdisable = msa311_buffer_postdisable,
971
+
};
972
+
973
+
static const struct iio_trigger_ops msa311_new_data_trig_ops = {
974
+
.set_trigger_state = msa311_set_new_data_trig_state,
975
+
.validate_device = msa311_validate_device,
976
+
};
977
+
978
+
static int msa311_check_partid(struct msa311_priv *msa311)
979
+
{
980
+
struct device *dev = msa311->dev;
981
+
unsigned int partid;
982
+
int err;
983
+
984
+
err = regmap_read(msa311->regs, MSA311_PARTID_REG, &partid);
985
+
if (err)
986
+
return dev_err_probe(dev, err, "failed to read partid\n");
987
+
988
+
if (partid != MSA311_WHO_AM_I)
989
+
dev_warn(dev, "invalid partid (%#x), expected (%#x)\n",
990
+
partid, MSA311_WHO_AM_I);
991
+
992
+
msa311->chip_name = devm_kasprintf(dev, GFP_KERNEL,
993
+
"msa311-%02x", partid);
994
+
if (!msa311->chip_name)
995
+
return dev_err_probe(dev, -ENOMEM, "can't alloc chip name\n");
996
+
997
+
return 0;
998
+
}
999
+
1000
+
static int msa311_soft_reset(struct msa311_priv *msa311)
1001
+
{
1002
+
struct device *dev = msa311->dev;
1003
+
int err;
1004
+
1005
+
err = regmap_write(msa311->regs, MSA311_SOFT_RESET_REG,
1006
+
MSA311_GENMASK(F_SOFT_RESET_I2C) |
1007
+
MSA311_GENMASK(F_SOFT_RESET_SPI));
1008
+
if (err)
1009
+
return dev_err_probe(dev, err, "can't soft reset all logic\n");
1010
+
1011
+
return 0;
1012
+
}
1013
+
1014
+
static int msa311_chip_init(struct msa311_priv *msa311)
1015
+
{
1016
+
struct device *dev = msa311->dev;
1017
+
const char zero_bulk[2] = { };
1018
+
int err;
1019
+
1020
+
err = regmap_write(msa311->regs, MSA311_RANGE_REG, MSA311_FS_16G);
1021
+
if (err)
1022
+
return dev_err_probe(dev, err, "failed to setup accel range\n");
1023
+
1024
+
/* Disable all interrupts by default */
1025
+
err = regmap_bulk_write(msa311->regs, MSA311_INT_SET_0_REG,
1026
+
zero_bulk, sizeof(zero_bulk));
1027
+
if (err)
1028
+
return dev_err_probe(dev, err,
1029
+
"can't disable set0/set1 interrupts\n");
1030
+
1031
+
/* Unmap all INT1 interrupts by default */
1032
+
err = regmap_bulk_write(msa311->regs, MSA311_INT_MAP_0_REG,
1033
+
zero_bulk, sizeof(zero_bulk));
1034
+
if (err)
1035
+
return dev_err_probe(dev, err,
1036
+
"failed to unmap map0/map1 interrupts\n");
1037
+
1038
+
/* Disable all axes by default */
1039
+
err = regmap_update_bits(msa311->regs, MSA311_ODR_REG,
1040
+
MSA311_GENMASK(F_X_AXIS_DIS) |
1041
+
MSA311_GENMASK(F_Y_AXIS_DIS) |
1042
+
MSA311_GENMASK(F_Z_AXIS_DIS), 0);
1043
+
if (err)
1044
+
return dev_err_probe(dev, err, "can't enable all axes\n");
1045
+
1046
+
err = msa311_set_odr(msa311, MSA311_ODR_125_HZ);
1047
+
if (err)
1048
+
return dev_err_probe(dev, err,
1049
+
"failed to set accel frequency\n");
1050
+
1051
+
return 0;
1052
+
}
1053
+
1054
+
static int msa311_setup_interrupts(struct msa311_priv *msa311)
1055
+
{
1056
+
struct device *dev = msa311->dev;
1057
+
struct i2c_client *i2c = to_i2c_client(dev);
1058
+
struct iio_dev *indio_dev = i2c_get_clientdata(i2c);
1059
+
struct iio_trigger *trig;
1060
+
int err;
1061
+
1062
+
/* Keep going without interrupts if no initialized I2C IRQ */
1063
+
if (i2c->irq <= 0)
1064
+
return 0;
1065
+
1066
+
err = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL,
1067
+
msa311_irq_thread, IRQF_ONESHOT,
1068
+
msa311->chip_name, indio_dev);
1069
+
if (err)
1070
+
return dev_err_probe(dev, err, "failed to request IRQ\n");
1071
+
1072
+
trig = devm_iio_trigger_alloc(dev, "%s-new-data", msa311->chip_name);
1073
+
if (!trig)
1074
+
return dev_err_probe(dev, -ENOMEM,
1075
+
"can't allocate newdata trigger\n");
1076
+
1077
+
msa311->new_data_trig = trig;
1078
+
msa311->new_data_trig->ops = &msa311_new_data_trig_ops;
1079
+
iio_trigger_set_drvdata(msa311->new_data_trig, indio_dev);
1080
+
1081
+
err = devm_iio_trigger_register(dev, msa311->new_data_trig);
1082
+
if (err)
1083
+
return dev_err_probe(dev, err,
1084
+
"can't register newdata trigger\n");
1085
+
1086
+
err = regmap_field_write(msa311->fields[F_INT1_OD],
1087
+
MSA311_INT1_OD_PUSH_PULL);
1088
+
if (err)
1089
+
return dev_err_probe(dev, err,
1090
+
"can't enable push-pull interrupt\n");
1091
+
1092
+
err = regmap_field_write(msa311->fields[F_INT1_LVL],
1093
+
MSA311_INT1_LVL_HIGH);
1094
+
if (err)
1095
+
return dev_err_probe(dev, err,
1096
+
"can't set active interrupt level\n");
1097
+
1098
+
err = regmap_field_write(msa311->fields[F_LATCH_INT],
1099
+
MSA311_LATCH_INT_LATCHED);
1100
+
if (err)
1101
+
return dev_err_probe(dev, err,
1102
+
"can't latch interrupt\n");
1103
+
1104
+
err = regmap_field_write(msa311->fields[F_RESET_INT], 1);
1105
+
if (err)
1106
+
return dev_err_probe(dev, err,
1107
+
"can't reset interrupt\n");
1108
+
1109
+
err = regmap_field_write(msa311->fields[F_INT1_NEW_DATA], 1);
1110
+
if (err)
1111
+
return dev_err_probe(dev, err,
1112
+
"can't map new data interrupt\n");
1113
+
1114
+
return 0;
1115
+
}
1116
+
1117
+
static int msa311_regmap_init(struct msa311_priv *msa311)
1118
+
{
1119
+
struct regmap_field **fields = msa311->fields;
1120
+
struct device *dev = msa311->dev;
1121
+
struct i2c_client *i2c = to_i2c_client(dev);
1122
+
struct regmap *regmap;
1123
+
int i;
1124
+
1125
+
regmap = devm_regmap_init_i2c(i2c, &msa311_regmap_config);
1126
+
if (IS_ERR(regmap))
1127
+
return dev_err_probe(dev, PTR_ERR(regmap),
1128
+
"failed to register i2c regmap\n");
1129
+
1130
+
msa311->regs = regmap;
1131
+
1132
+
for (i = 0; i < F_MAX_FIELDS; i++) {
1133
+
fields[i] = devm_regmap_field_alloc(dev,
1134
+
msa311->regs,
1135
+
msa311_reg_fields[i]);
1136
+
if (IS_ERR(msa311->fields[i]))
1137
+
return dev_err_probe(dev, PTR_ERR(msa311->fields[i]),
1138
+
"can't alloc field[%d]\n", i);
1139
+
}
1140
+
1141
+
return 0;
1142
+
}
1143
+
1144
+
static void msa311_powerdown(void *msa311)
1145
+
{
1146
+
msa311_set_pwr_mode(msa311, MSA311_PWR_MODE_SUSPEND);
1147
+
}
1148
+
1149
+
static void msa311_vdd_disable(void *vdd)
1150
+
{
1151
+
regulator_disable(vdd);
1152
+
}
1153
+
1154
+
static int msa311_probe(struct i2c_client *i2c)
1155
+
{
1156
+
struct device *dev = &i2c->dev;
1157
+
struct msa311_priv *msa311;
1158
+
struct iio_dev *indio_dev;
1159
+
int err;
1160
+
1161
+
indio_dev = devm_iio_device_alloc(dev, sizeof(*msa311));
1162
+
if (!indio_dev)
1163
+
return dev_err_probe(dev, -ENOMEM,
1164
+
"IIO device allocation failed\n");
1165
+
1166
+
msa311 = iio_priv(indio_dev);
1167
+
msa311->dev = dev;
1168
+
i2c_set_clientdata(i2c, indio_dev);
1169
+
1170
+
err = msa311_regmap_init(msa311);
1171
+
if (err)
1172
+
return err;
1173
+
1174
+
mutex_init(&msa311->lock);
1175
+
1176
+
msa311->vdd = devm_regulator_get(dev, "vdd");
1177
+
if (IS_ERR(msa311->vdd))
1178
+
return dev_err_probe(dev, PTR_ERR(msa311->vdd),
1179
+
"can't get vdd supply\n");
1180
+
1181
+
err = regulator_enable(msa311->vdd);
1182
+
if (err)
1183
+
return dev_err_probe(dev, err, "can't enable vdd supply\n");
1184
+
1185
+
err = devm_add_action_or_reset(dev, msa311_vdd_disable, msa311->vdd);
1186
+
if (err)
1187
+
return dev_err_probe(dev, err,
1188
+
"can't add vdd disable action\n");
1189
+
1190
+
err = msa311_check_partid(msa311);
1191
+
if (err)
1192
+
return err;
1193
+
1194
+
err = msa311_soft_reset(msa311);
1195
+
if (err)
1196
+
return err;
1197
+
1198
+
err = msa311_set_pwr_mode(msa311, MSA311_PWR_MODE_NORMAL);
1199
+
if (err)
1200
+
return dev_err_probe(dev, err, "failed to power on device\n");
1201
+
1202
+
/*
1203
+
* Register powerdown deferred callback which suspends the chip
1204
+
* after module unloaded.
1205
+
*
1206
+
* MSA311 should be in SUSPEND mode in the two cases:
1207
+
* 1) When driver is loaded, but we do not have any data or
1208
+
* configuration requests to it (we are solving it using
1209
+
* autosuspend feature).
1210
+
* 2) When driver is unloaded and device is not used (devm action is
1211
+
* used in this case).
1212
+
*/
1213
+
err = devm_add_action_or_reset(dev, msa311_powerdown, msa311);
1214
+
if (err)
1215
+
return dev_err_probe(dev, err, "can't add powerdown action\n");
1216
+
1217
+
err = pm_runtime_set_active(dev);
1218
+
if (err)
1219
+
return err;
1220
+
1221
+
err = devm_pm_runtime_enable(dev);
1222
+
if (err)
1223
+
return err;
1224
+
1225
+
pm_runtime_get_noresume(dev);
1226
+
pm_runtime_set_autosuspend_delay(dev, MSA311_PWR_SLEEP_DELAY_MS);
1227
+
pm_runtime_use_autosuspend(dev);
1228
+
1229
+
err = msa311_chip_init(msa311);
1230
+
if (err)
1231
+
return err;
1232
+
1233
+
indio_dev->modes = INDIO_DIRECT_MODE;
1234
+
indio_dev->channels = msa311_channels;
1235
+
indio_dev->num_channels = ARRAY_SIZE(msa311_channels);
1236
+
indio_dev->name = msa311->chip_name;
1237
+
indio_dev->info = &msa311_info;
1238
+
1239
+
err = devm_iio_triggered_buffer_setup(dev, indio_dev,
1240
+
iio_pollfunc_store_time,
1241
+
msa311_buffer_thread,
1242
+
&msa311_buffer_setup_ops);
1243
+
if (err)
1244
+
return dev_err_probe(dev, err,
1245
+
"can't setup IIO trigger buffer\n");
1246
+
1247
+
err = msa311_setup_interrupts(msa311);
1248
+
if (err)
1249
+
return err;
1250
+
1251
+
pm_runtime_mark_last_busy(dev);
1252
+
pm_runtime_put_autosuspend(dev);
1253
+
1254
+
err = devm_iio_device_register(dev, indio_dev);
1255
+
if (err)
1256
+
return dev_err_probe(dev, err, "IIO device register failed\n");
1257
+
1258
+
return 0;
1259
+
}
1260
+
1261
+
static int msa311_runtime_suspend(struct device *dev)
1262
+
{
1263
+
struct iio_dev *indio_dev = dev_get_drvdata(dev);
1264
+
struct msa311_priv *msa311 = iio_priv(indio_dev);
1265
+
int err;
1266
+
1267
+
mutex_lock(&msa311->lock);
1268
+
err = msa311_set_pwr_mode(msa311, MSA311_PWR_MODE_SUSPEND);
1269
+
mutex_unlock(&msa311->lock);
1270
+
if (err)
1271
+
dev_err(dev, "failed to power off device (%pe)\n",
1272
+
ERR_PTR(err));
1273
+
1274
+
return err;
1275
+
}
1276
+
1277
+
static int msa311_runtime_resume(struct device *dev)
1278
+
{
1279
+
struct iio_dev *indio_dev = dev_get_drvdata(dev);
1280
+
struct msa311_priv *msa311 = iio_priv(indio_dev);
1281
+
int err;
1282
+
1283
+
mutex_lock(&msa311->lock);
1284
+
err = msa311_set_pwr_mode(msa311, MSA311_PWR_MODE_NORMAL);
1285
+
mutex_unlock(&msa311->lock);
1286
+
if (err)
1287
+
dev_err(dev, "failed to power on device (%pe)\n",
1288
+
ERR_PTR(err));
1289
+
1290
+
return err;
1291
+
}
1292
+
1293
+
static DEFINE_RUNTIME_DEV_PM_OPS(msa311_pm_ops, msa311_runtime_suspend,
1294
+
msa311_runtime_resume, NULL);
1295
+
1296
+
static const struct i2c_device_id msa311_i2c_id[] = {
1297
+
{ .name = "msa311" },
1298
+
{ }
1299
+
};
1300
+
MODULE_DEVICE_TABLE(i2c, msa311_i2c_id);
1301
+
1302
+
static const struct of_device_id msa311_of_match[] = {
1303
+
{ .compatible = "memsensing,msa311" },
1304
+
{ }
1305
+
};
1306
+
MODULE_DEVICE_TABLE(of, msa311_of_match);
1307
+
1308
+
static struct i2c_driver msa311_driver = {
1309
+
.driver = {
1310
+
.name = "msa311",
1311
+
.of_match_table = msa311_of_match,
1312
+
.pm = pm_ptr(&msa311_pm_ops),
1313
+
},
1314
+
.probe_new = msa311_probe,
1315
+
.id_table = msa311_i2c_id,
1316
+
};
1317
+
module_i2c_driver(msa311_driver);
1318
+
1319
+
MODULE_AUTHOR("Dmitry Rokosov <ddrokosov@sberdevices.ru>");
1320
+
MODULE_DESCRIPTION("MEMSensing MSA311 3-axis accelerometer driver");
1321
+
MODULE_LICENSE("GPL");