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bindings: iio: adc: Add bindings for TI ADS131M0x ADCs

Add device tree bindings documentation for the Texas Instruments
ADS131M0x analog-to-digital converters. This family includes the ADS131M02,
ADS131M03, ADS131M04, ADS131M06, and ADS131M08 variants.

These variants differ primarily in the number of supported channels
(2, 3, 4, 6, and 8, respectively), which requires separate compatible
strings to validate the channel nodes.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: David Lechner <dlechner@baylibre.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

authored by

Oleksij Rempel and committed by
Jonathan Cameron
1ca733e8 3624f038

+208
+208
Documentation/devicetree/bindings/iio/adc/ti,ads131m02.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/iio/adc/ti,ads131m02.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Texas Instruments ADS131M0x 2-, 3-, 4-, 6- and 8-Channel ADCs 8 + 9 + maintainers: 10 + - Oleksij Rempel <o.rempel@pengutronix.de> 11 + 12 + description: | 13 + The ADS131M0x are a family of multichannel, simultaneous sampling, 14 + 24-bit, delta-sigma, analog-to-digital converters (ADCs) with a 15 + built-in programmable gain amplifier (PGA) and internal reference. 16 + Communication with the ADC chip is via SPI. 17 + 18 + Datasheets: 19 + - ADS131M02: https://www.ti.com/lit/ds/symlink/ads131m02.pdf 20 + - ADS131M03: https://www.ti.com/lit/ds/symlink/ads131m03.pdf 21 + - ADS131M04: https://www.ti.com/lit/ds/symlink/ads131m04.pdf 22 + - ADS131M06: https://www.ti.com/lit/ds/symlink/ads131m06.pdf 23 + - ADS131M08: https://www.ti.com/lit/ds/symlink/ads131m08.pdf 24 + 25 + properties: 26 + compatible: 27 + enum: 28 + - ti,ads131m02 29 + - ti,ads131m03 30 + - ti,ads131m04 31 + - ti,ads131m06 32 + - ti,ads131m08 33 + 34 + reg: 35 + description: SPI chip select number. 36 + 37 + clocks: 38 + description: 39 + Phandle to the external clock source required by the ADC's CLKIN pin. 40 + The datasheet recommends specific frequencies based on the desired power 41 + mode (e.g., 8.192 MHz for High-Resolution mode). 42 + maxItems: 1 43 + 44 + avdd-supply: 45 + description: Analog power supply (AVDD). 46 + 47 + dvdd-supply: 48 + description: Digital power supply (DVDD). 49 + 50 + interrupts: 51 + description: DRDY (Data Ready) output signal. 52 + maxItems: 1 53 + 54 + reset-gpios: 55 + description: Optional RESET signal. 56 + maxItems: 1 57 + 58 + clock-names: 59 + description: 60 + Indicates if a crystal oscillator (XTAL) or CMOS signal is connected 61 + (CLKIN). Note that XTAL mode is only supported on ADS131M06 and ADS131M08. 62 + enum: [xtal, clkin] 63 + 64 + refin-supply: 65 + description: Optional external reference supply (REFIN). 66 + 67 + '#address-cells': 68 + const: 1 69 + 70 + '#size-cells': 71 + const: 0 72 + 73 + required: 74 + - compatible 75 + - reg 76 + - clocks 77 + - clock-names 78 + - avdd-supply 79 + - dvdd-supply 80 + 81 + patternProperties: 82 + "^channel@[0-7]$": 83 + type: object 84 + $ref: /schemas/iio/adc/adc.yaml# 85 + description: Properties for a single ADC channel. 86 + 87 + properties: 88 + reg: 89 + description: The channel index (0-7). 90 + minimum: 0 91 + maximum: 7 # Max channels on ADS131M08 92 + 93 + label: true 94 + 95 + required: 96 + - reg 97 + 98 + unevaluatedProperties: false 99 + 100 + allOf: 101 + - $ref: /schemas/spi/spi-peripheral-props.yaml# 102 + 103 + - if: 104 + # 20-pin devices: M02, M03, M04 105 + # These do not support XTAL or REFIN. 106 + properties: 107 + compatible: 108 + enum: 109 + - ti,ads131m02 110 + - ti,ads131m03 111 + - ti,ads131m04 112 + then: 113 + properties: 114 + clock-names: 115 + const: clkin 116 + refin-supply: false 117 + 118 + - if: 119 + # ADS131M02: 2 channels max (0-1) 120 + properties: 121 + compatible: 122 + contains: 123 + const: ti,ads131m02 124 + then: 125 + patternProperties: 126 + "^channel@[0-1]$": 127 + properties: 128 + reg: 129 + maximum: 1 130 + "^channel@[2-7]$": false 131 + 132 + - if: 133 + # ADS131M03: 3 channels max (0-2) 134 + properties: 135 + compatible: 136 + contains: 137 + const: ti,ads131m03 138 + then: 139 + patternProperties: 140 + "^channel@[0-2]$": 141 + properties: 142 + reg: 143 + maximum: 2 144 + "^channel@[3-7]$": false 145 + 146 + - if: 147 + # ADS131M04: 4 channels max (0-3) 148 + properties: 149 + compatible: 150 + contains: 151 + const: ti,ads131m04 152 + then: 153 + patternProperties: 154 + "^channel@[0-3]$": 155 + properties: 156 + reg: 157 + maximum: 3 158 + "^channel@[4-7]$": false 159 + 160 + - if: 161 + # ADS131M06: 6 channels max (0-5) 162 + properties: 163 + compatible: 164 + contains: 165 + const: ti,ads131m06 166 + then: 167 + patternProperties: 168 + "^channel@[0-5]$": 169 + properties: 170 + reg: 171 + maximum: 5 172 + "^channel@[6-7]$": false 173 + 174 + unevaluatedProperties: false 175 + 176 + examples: 177 + - | 178 + #include <dt-bindings/clock/stm32mp1-clks.h> 179 + 180 + spi1 { 181 + #address-cells = <1>; 182 + #size-cells = <0>; 183 + 184 + adc@0 { 185 + compatible = "ti,ads131m02"; 186 + reg = <0>; 187 + spi-max-frequency = <8000000>; 188 + 189 + clocks = <&rcc CK_MCO2>; 190 + clock-names = "clkin"; 191 + 192 + avdd-supply = <&vdd_ana>; 193 + dvdd-supply = <&vdd_dig>; 194 + 195 + #address-cells = <1>; 196 + #size-cells = <0>; 197 + 198 + channel@0 { 199 + reg = <0>; 200 + label = "input_voltage"; 201 + }; 202 + 203 + channel@1 { 204 + reg = <1>; 205 + label = "input_current"; 206 + }; 207 + }; 208 + };