tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

rapidio/tsi721: modify PCIe capability settings

Modify initialization of PCIe capability registers in Tsi721 mport driver:
- change Completion Timeout value to avoid unexpected data transfer
aborts during intensive traffic.
- replace hardcoded offset of PCIe capability block by making it use the
common function.

This patch is applicable to kernel versions starting from 3.2-rc1.

Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com>
Cc: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

authored by

Alexandre Bounine and committed by
Linus Torvalds 1cee22b7 b439e66f

+17 -5
+15 -5
drivers/rapidio/devices/tsi721.c
··· 2154 2154 const struct pci_device_id *id) 2155 2155 { 2156 2156 struct tsi721_device *priv; 2157 - int i; 2157 + int i, cap; 2158 2158 int err; 2159 2159 u32 regval; 2160 2160 ··· 2262 2262 dev_info(&pdev->dev, "Unable to set consistent DMA mask\n"); 2263 2263 } 2264 2264 2265 - /* Clear "no snoop" and "relaxed ordering" bits. */ 2266 - pci_read_config_dword(pdev, 0x40 + PCI_EXP_DEVCTL, &regval); 2267 - regval &= ~(PCI_EXP_DEVCTL_RELAX_EN | PCI_EXP_DEVCTL_NOSNOOP_EN); 2268 - pci_write_config_dword(pdev, 0x40 + PCI_EXP_DEVCTL, regval); 2265 + cap = pci_pcie_cap(pdev); 2266 + BUG_ON(cap == 0); 2267 + 2268 + /* Clear "no snoop" and "relaxed ordering" bits, use default MRRS. */ 2269 + pci_read_config_dword(pdev, cap + PCI_EXP_DEVCTL, &regval); 2270 + regval &= ~(PCI_EXP_DEVCTL_READRQ | PCI_EXP_DEVCTL_RELAX_EN | 2271 + PCI_EXP_DEVCTL_NOSNOOP_EN); 2272 + regval |= 0x2 << MAX_READ_REQUEST_SZ_SHIFT; 2273 + pci_write_config_dword(pdev, cap + PCI_EXP_DEVCTL, regval); 2274 + 2275 + /* Adjust PCIe completion timeout. */ 2276 + pci_read_config_dword(pdev, cap + PCI_EXP_DEVCTL2, &regval); 2277 + regval &= ~(0x0f); 2278 + pci_write_config_dword(pdev, cap + PCI_EXP_DEVCTL2, regval | 0x2); 2269 2279 2270 2280 /* 2271 2281 * FIXUP: correct offsets of MSI-X tables in the MSI-X Capability Block
+2
drivers/rapidio/devices/tsi721.h
··· 72 72 #define TSI721_MSIXPBA_OFFSET 0x2a000 73 73 #define TSI721_PCIECFG_EPCTL 0x400 74 74 75 + #define MAX_READ_REQUEST_SZ_SHIFT 12 76 + 75 77 /* 76 78 * Event Management Registers 77 79 */