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linux
Merge branch 'net-dsa-lantiq_gswip-prepare-for-supporting-maxlinear-gsw1xx'
Daniel Golle says:
====================
net: dsa: lantiq_gswip: prepare for supporting MaxLinear GSW1xx
Continue to prepare for supporting the newer standalone MaxLinear GSW1xx
switch family by extending the existing lantiq_gswip driver to allow it
to support MII interfaces and MDIO bus of the GSW1xx.
This series has been preceded by an RFC series which covers everything
needed to support the MaxLinear GSW1xx family of switches. Andrew Lunn
had suggested to split it into a couple of smaller series and start
with the changes which don't yet make actual functional changes or
support new features.
Everything has been compile and runtime tested on AVM Fritz!Box 7490
(GSWIP version 2.1, VR9 v1.2)
Link: https://lore.kernel.org/netdev/aKDhFCNwjDDwRKsI@pidgin.makrotopia.org/
====================
Link: https://patch.msgid.link/cover.1756520811.git.daniel@makrotopia.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+57
-22
+1
-2
MAINTAINERS
+1
-2
MAINTAINERS
···
13812
13812
L: netdev@vger.kernel.org
13813
13813
S: Maintained
13814
13814
F: Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml
13815
-
F: drivers/net/dsa/lantiq_gswip.c
13816
-
F: drivers/net/dsa/lantiq_pce.h
13815
+
F: drivers/net/dsa/lantiq/*
13817
13816
F: drivers/net/ethernet/lantiq_xrx200.c
13818
13817
F: net/dsa/tag_gswip.c
13819
13818
+1
-7
drivers/net/dsa/Kconfig
+1
-7
drivers/net/dsa/Kconfig
···
26
26
27
27
source "drivers/net/dsa/hirschmann/Kconfig"
28
28
29
-
config NET_DSA_LANTIQ_GSWIP
30
-
tristate "Lantiq / Intel GSWIP"
31
-
depends on HAS_IOMEM
32
-
select NET_DSA_TAG_GSWIP
33
-
help
34
-
This enables support for the Lantiq / Intel GSWIP 2.1 found in
35
-
the xrx200 / VR9 SoC.
29
+
source "drivers/net/dsa/lantiq/Kconfig"
36
30
37
31
config NET_DSA_MT7530
38
32
tristate "MediaTek MT7530 and MT7531 Ethernet switch support"
+1
-1
drivers/net/dsa/Makefile
+1
-1
drivers/net/dsa/Makefile
···
6
6
obj-$(CONFIG_FIXED_PHY) += dsa_loop_bdinfo.o
7
7
endif
8
8
obj-$(CONFIG_NET_DSA_KS8995) += ks8995.o
9
-
obj-$(CONFIG_NET_DSA_LANTIQ_GSWIP) += lantiq_gswip.o
10
9
obj-$(CONFIG_NET_DSA_MT7530) += mt7530.o
11
10
obj-$(CONFIG_NET_DSA_MT7530_MDIO) += mt7530-mdio.o
12
11
obj-$(CONFIG_NET_DSA_MT7530_MMIO) += mt7530-mmio.o
···
19
20
obj-$(CONFIG_NET_DSA_VITESSE_VSC73XX_SPI) += vitesse-vsc73xx-spi.o
20
21
obj-y += b53/
21
22
obj-y += hirschmann/
23
+
obj-y += lantiq/
22
24
obj-y += microchip/
23
25
obj-y += mv88e6xxx/
24
26
obj-y += ocelot/
+7
drivers/net/dsa/lantiq/Kconfig
+7
drivers/net/dsa/lantiq/Kconfig
+1
drivers/net/dsa/lantiq/Makefile
+1
drivers/net/dsa/lantiq/Makefile
···
1
+
obj-$(CONFIG_NET_DSA_LANTIQ_GSWIP) += lantiq_gswip.o
+42
-12
drivers/net/dsa/lantiq_gswip.c
drivers/net/dsa/lantiq/lantiq_gswip.c
+42
-12
drivers/net/dsa/lantiq_gswip.c
drivers/net/dsa/lantiq/lantiq_gswip.c
···
183
183
static void gswip_mii_mask_cfg(struct gswip_priv *priv, u32 clear, u32 set,
184
184
int port)
185
185
{
186
+
int reg_port;
187
+
186
188
/* MII_CFG register only exists for MII ports */
187
189
if (!(priv->hw_info->mii_ports & BIT(port)))
188
190
return;
189
191
190
-
gswip_mii_mask(priv, clear, set, GSWIP_MII_CFGp(port));
192
+
reg_port = port + priv->hw_info->mii_port_reg_offset;
193
+
194
+
gswip_mii_mask(priv, clear, set, GSWIP_MII_CFGp(reg_port));
191
195
}
192
196
193
197
static void gswip_mii_mask_pcdu(struct gswip_priv *priv, u32 clear, u32 set,
194
198
int port)
195
199
{
200
+
int reg_port;
201
+
196
202
/* MII_PCDU register only exists for MII ports */
197
203
if (!(priv->hw_info->mii_ports & BIT(port)))
198
204
return;
199
205
200
-
switch (port) {
206
+
reg_port = port + priv->hw_info->mii_port_reg_offset;
207
+
208
+
switch (reg_port) {
201
209
case 0:
202
210
gswip_mii_mask(priv, clear, set, GSWIP_MII_PCDU0);
203
211
break;
···
286
278
int err = 0;
287
279
288
280
mdio_np = of_get_compatible_child(switch_np, "lantiq,xrx200-mdio");
281
+
if (!mdio_np)
282
+
mdio_np = of_get_child_by_name(switch_np, "mdio");
283
+
289
284
if (!of_device_is_available(mdio_np))
290
285
goto out_put_node;
291
286
···
626
615
627
616
/* Configure the MDIO Clock 2.5 MHz */
628
617
gswip_mdio_mask(priv, 0xff, 0x09, GSWIP_MDIO_MDC_CFG1);
618
+
619
+
/* bring up the mdio bus */
620
+
err = gswip_mdio(priv);
621
+
if (err) {
622
+
dev_err(priv->dev, "mdio bus setup failed\n");
623
+
return err;
624
+
}
629
625
630
626
/* Disable the xMII interface and clear it's isolation bit */
631
627
for (i = 0; i < priv->hw_info->max_ports; i++)
···
1462
1444
miicfg |= GSWIP_MII_CFG_LDCLKDIS;
1463
1445
1464
1446
switch (state->interface) {
1447
+
case PHY_INTERFACE_MODE_SGMII:
1448
+
case PHY_INTERFACE_MODE_1000BASEX:
1449
+
case PHY_INTERFACE_MODE_2500BASEX:
1450
+
return;
1465
1451
case PHY_INTERFACE_MODE_MII:
1466
1452
case PHY_INTERFACE_MODE_INTERNAL:
1467
1453
miicfg |= GSWIP_MII_CFG_MODE_MIIM;
···
1614
1592
return ARRAY_SIZE(gswip_rmon_cnt);
1615
1593
}
1616
1594
1595
+
static struct phylink_pcs *gswip_phylink_mac_select_pcs(struct phylink_config *config,
1596
+
phy_interface_t interface)
1597
+
{
1598
+
struct dsa_port *dp = dsa_phylink_to_port(config);
1599
+
struct gswip_priv *priv = dp->ds->priv;
1600
+
1601
+
if (priv->hw_info->mac_select_pcs)
1602
+
return priv->hw_info->mac_select_pcs(config, interface);
1603
+
1604
+
return NULL;
1605
+
}
1606
+
1617
1607
static const struct phylink_mac_ops gswip_phylink_mac_ops = {
1618
-
.mac_config = gswip_phylink_mac_config,
1619
-
.mac_link_down = gswip_phylink_mac_link_down,
1620
-
.mac_link_up = gswip_phylink_mac_link_up,
1608
+
.mac_config = gswip_phylink_mac_config,
1609
+
.mac_link_down = gswip_phylink_mac_link_down,
1610
+
.mac_link_up = gswip_phylink_mac_link_up,
1611
+
.mac_select_pcs = gswip_phylink_mac_select_pcs,
1621
1612
};
1622
1613
1623
1614
static const struct dsa_switch_ops gswip_switch_ops = {
···
1980
1945
"gphy fw probe failed\n");
1981
1946
}
1982
1947
1983
-
/* bring up the mdio bus */
1984
-
err = gswip_mdio(priv);
1985
-
if (err) {
1986
-
dev_err_probe(dev, err, "mdio probe failed\n");
1987
-
goto gphy_fw_remove;
1988
-
}
1989
-
1990
1948
err = dsa_register_switch(priv->ds);
1991
1949
if (err) {
1992
1950
dev_err_probe(dev, err, "dsa switch registration failed\n");
···
2038
2010
.max_ports = 7,
2039
2011
.allowed_cpu_ports = BIT(6),
2040
2012
.mii_ports = BIT(0) | BIT(1) | BIT(5),
2013
+
.mii_port_reg_offset = 0,
2041
2014
.phylink_get_caps = gswip_xrx200_phylink_get_caps,
2042
2015
.pce_microcode = &gswip_pce_microcode,
2043
2016
.pce_microcode_size = ARRAY_SIZE(gswip_pce_microcode),
···
2049
2020
.max_ports = 7,
2050
2021
.allowed_cpu_ports = BIT(6),
2051
2022
.mii_ports = BIT(0) | BIT(5),
2023
+
.mii_port_reg_offset = 0,
2052
2024
.phylink_get_caps = gswip_xrx300_phylink_get_caps,
2053
2025
.pce_microcode = &gswip_pce_microcode,
2054
2026
.pce_microcode_size = ARRAY_SIZE(gswip_pce_microcode),
+4
drivers/net/dsa/lantiq_gswip.h
drivers/net/dsa/lantiq/lantiq_gswip.h
+4
drivers/net/dsa/lantiq_gswip.h
drivers/net/dsa/lantiq/lantiq_gswip.h
···
4
4
5
5
#include <linux/clk.h>
6
6
#include <linux/mutex.h>
7
+
#include <linux/phylink.h>
7
8
#include <linux/platform_device.h>
8
9
#include <linux/regmap.h>
9
10
#include <linux/reset.h>
···
233
232
int max_ports;
234
233
unsigned int allowed_cpu_ports;
235
234
unsigned int mii_ports;
235
+
int mii_port_reg_offset;
236
236
const struct gswip_pce_microcode (*pce_microcode)[];
237
237
size_t pce_microcode_size;
238
238
enum dsa_tag_protocol tag_protocol;
239
239
void (*phylink_get_caps)(struct dsa_switch *ds, int port,
240
240
struct phylink_config *config);
241
+
struct phylink_pcs *(*mac_select_pcs)(struct phylink_config *config,
242
+
phy_interface_t interface);
241
243
};
242
244
243
245
struct gswip_gphy_fw {
drivers/net/dsa/lantiq_pce.h
drivers/net/dsa/lantiq/lantiq_pce.h
drivers/net/dsa/lantiq_pce.h
drivers/net/dsa/lantiq/lantiq_pce.h