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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
"The usual batch; most of them are DT tweaks to fix misdescribed
hardware. Beyond that:

- A bugfix for MMP2 CPU detection, it's been there quite a while but
makes sense to fix now anyway.

- Some power management tweaks:
+ disabling of CPU idle power state on Marvell Armada 7K/8K
(Macchiatobin et al)
+ Increase of minimum voltage on BananaPi M3
+ Tweak of power ramp time for DVFS on NXP/Freescale i.MX7SX

- A couple of MAINTAINER updates:
+ MMP has a new volunteer to look after it
+ Mediatek adds a few keywords, IRC channel and wiki URL"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: dts: imx7d-nitrogen7: Fix the description of the Wifi clock
ARM: imx: update the cpu power up timing setting on i.mx6sx
Revert "arm64: dts: marvell: add CPU Idle power state support on Armada 7K/8K"
ARM: dts: imx7d-pico: Describe the Wifi clock
ARM: dts: realview: Fix some more duplicate regulator nodes
MAINTAINERS: update entry for MMP platform
ARM: mmp/mmp2: fix cpu_is_mmp2() on mmp2-dt
MAINTAINERS: mediatek: Update SoC entry
ARM: dts: bcm2837: Fix polarity of wifi reset GPIOs
arm64: dts: mt7622: Drop the general purpose timer node
arm64: dts: mt7622: fix no more console output on BPI-R64 board
arm64: dts: mt7622: fix no more console output on rfb1
ARM: dts: sun8i: a83t: bananapi-m3: increase vcc-pd voltage to 3.3V

+67 -62
+8
CREDITS
··· 2541 2541 S: Victoria 3163 2542 2542 S: Australia 2543 2543 2544 + N: Eric Miao 2545 + E: eric.y.miao@gmail.com 2546 + D: MMP support 2547 + 2544 2548 N: Pauline Middelink 2545 2549 E: middelin@polyware.nl 2546 2550 D: General low-level bug fixes, /proc fixes, identd support ··· 4118 4114 S: 1507 145th Place SE #B5 4119 4115 S: Bellevue, Washington 98007 4120 4116 S: USA 4117 + 4118 + N: Haojian Zhuang 4119 + E: haojian.zhuang@gmail.com 4120 + D: MMP support 4121 4121 4122 4122 N: Richard Zidlicky 4123 4123 E: rz@linux-m68k.org, rdzidlic@geocities.com
+6 -5
MAINTAINERS
··· 1739 1739 M: Matthias Brugger <matthias.bgg@gmail.com> 1740 1740 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 1741 1741 L: linux-mediatek@lists.infradead.org (moderated for non-subscribers) 1742 + W: https://mtk.bcnfs.org/ 1743 + C: irc://chat.freenode.net/linux-mediatek 1742 1744 S: Maintained 1743 1745 F: arch/arm/boot/dts/mt6* 1744 1746 F: arch/arm/boot/dts/mt7* 1745 1747 F: arch/arm/boot/dts/mt8* 1746 1748 F: arch/arm/mach-mediatek/ 1747 1749 F: arch/arm64/boot/dts/mediatek/ 1750 + F: drivers/soc/mediatek/ 1748 1751 N: mtk 1752 + N: mt[678] 1749 1753 K: mediatek 1750 1754 1751 1755 ARM/Mediatek USB3 PHY DRIVER ··· 10009 10005 F: drivers/media/radio/radio-miropcm20* 10010 10006 10011 10007 MMP SUPPORT 10012 - M: Eric Miao <eric.y.miao@gmail.com> 10013 - M: Haojian Zhuang <haojian.zhuang@gmail.com> 10008 + R: Lubomir Rintel <lkundrak@v3.sk> 10014 10009 L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 10015 - T: git git://github.com/hzhuang1/linux.git 10016 - T: git git://git.linaro.org/people/ycmiao/pxa-linux.git 10017 - S: Maintained 10010 + S: Odd Fixes 10018 10011 F: arch/arm/boot/dts/mmp* 10019 10012 F: arch/arm/mach-mmp/ 10020 10013
+2 -2
arch/arm/boot/dts/arm-realview-pb1176.dts
··· 45 45 }; 46 46 47 47 /* The voltage to the MMC card is hardwired at 3.3V */ 48 - vmmc: fixedregulator@0 { 48 + vmmc: regulator-vmmc { 49 49 compatible = "regulator-fixed"; 50 50 regulator-name = "vmmc"; 51 51 regulator-min-microvolt = <3300000>; ··· 53 53 regulator-boot-on; 54 54 }; 55 55 56 - veth: fixedregulator@0 { 56 + veth: regulator-veth { 57 57 compatible = "regulator-fixed"; 58 58 regulator-name = "veth"; 59 59 regulator-min-microvolt = <3300000>;
+2 -2
arch/arm/boot/dts/arm-realview-pb11mp.dts
··· 145 145 }; 146 146 147 147 /* The voltage to the MMC card is hardwired at 3.3V */ 148 - vmmc: fixedregulator@0 { 148 + vmmc: regulator-vmmc { 149 149 compatible = "regulator-fixed"; 150 150 regulator-name = "vmmc"; 151 151 regulator-min-microvolt = <3300000>; ··· 153 153 regulator-boot-on; 154 154 }; 155 155 156 - veth: fixedregulator@0 { 156 + veth: regulator-veth { 157 157 compatible = "regulator-fixed"; 158 158 regulator-name = "veth"; 159 159 regulator-min-microvolt = <3300000>;
+1 -1
arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
··· 31 31 32 32 wifi_pwrseq: wifi-pwrseq { 33 33 compatible = "mmc-pwrseq-simple"; 34 - reset-gpios = <&expgpio 1 GPIO_ACTIVE_HIGH>; 34 + reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>; 35 35 }; 36 36 }; 37 37
+1 -1
arch/arm/boot/dts/bcm2837-rpi-3-b.dts
··· 26 26 27 27 wifi_pwrseq: wifi-pwrseq { 28 28 compatible = "mmc-pwrseq-simple"; 29 - reset-gpios = <&expgpio 1 GPIO_ACTIVE_HIGH>; 29 + reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>; 30 30 }; 31 31 }; 32 32
+7 -2
arch/arm/boot/dts/imx7d-nitrogen7.dts
··· 86 86 compatible = "regulator-fixed"; 87 87 regulator-min-microvolt = <3300000>; 88 88 regulator-max-microvolt = <3300000>; 89 - clocks = <&clks IMX7D_CLKO2_ROOT_DIV>; 90 - clock-names = "slow"; 91 89 regulator-name = "reg_wlan"; 92 90 startup-delay-us = <70000>; 93 91 gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>; 94 92 enable-active-high; 93 + }; 94 + 95 + usdhc2_pwrseq: usdhc2_pwrseq { 96 + compatible = "mmc-pwrseq-simple"; 97 + clocks = <&clks IMX7D_CLKO2_ROOT_DIV>; 98 + clock-names = "ext_clock"; 95 99 }; 96 100 }; 97 101 ··· 379 375 bus-width = <4>; 380 376 non-removable; 381 377 vmmc-supply = <&reg_wlan>; 378 + mmc-pwrseq = <&usdhc2_pwrseq>; 382 379 cap-power-off-card; 383 380 keep-power-in-suspend; 384 381 status = "okay";
+21 -1
arch/arm/boot/dts/imx7d-pico.dtsi
··· 100 100 regulator-min-microvolt = <1800000>; 101 101 regulator-max-microvolt = <1800000>; 102 102 }; 103 + 104 + usdhc2_pwrseq: usdhc2_pwrseq { 105 + compatible = "mmc-pwrseq-simple"; 106 + clocks = <&clks IMX7D_CLKO2_ROOT_DIV>; 107 + clock-names = "ext_clock"; 108 + }; 109 + }; 110 + 111 + &clks { 112 + assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>, 113 + <&clks IMX7D_CLKO2_ROOT_DIV>; 114 + assigned-clock-parents = <&clks IMX7D_CKIL>; 115 + assigned-clock-rates = <0>, <32768>; 103 116 }; 104 117 105 118 &i2c4 { ··· 212 199 213 200 &usdhc2 { /* Wifi SDIO */ 214 201 pinctrl-names = "default"; 215 - pinctrl-0 = <&pinctrl_usdhc2>; 202 + pinctrl-0 = <&pinctrl_usdhc2 &pinctrl_wifi_clk>; 216 203 no-1-8-v; 217 204 non-removable; 218 205 keep-power-in-suspend; 219 206 wakeup-source; 220 207 vmmc-supply = <&reg_ap6212>; 208 + mmc-pwrseq = <&usdhc2_pwrseq>; 221 209 status = "okay"; 222 210 }; 223 211 ··· 315 301 }; 316 302 317 303 &iomuxc_lpsr { 304 + pinctrl_wifi_clk: wificlkgrp { 305 + fsl,pins = < 306 + MX7D_PAD_LPSR_GPIO1_IO03__CCM_CLKO2 0x7d 307 + >; 308 + }; 309 + 318 310 pinctrl_wdog: wdoggrp { 319 311 fsl,pins = < 320 312 MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74
+2 -2
arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
··· 314 314 315 315 &reg_dldo3 { 316 316 regulator-always-on; 317 - regulator-min-microvolt = <2500000>; 318 - regulator-max-microvolt = <2500000>; 317 + regulator-min-microvolt = <3300000>; 318 + regulator-max-microvolt = <3300000>; 319 319 regulator-name = "vcc-pd"; 320 320 }; 321 321
+1 -1
arch/arm/mach-imx/cpuidle-imx6sx.c
··· 110 110 * except for power up sw2iso which need to be 111 111 * larger than LDO ramp up time. 112 112 */ 113 - imx_gpc_set_arm_power_up_timing(2, 1); 113 + imx_gpc_set_arm_power_up_timing(0xf, 1); 114 114 imx_gpc_set_arm_power_down_timing(1, 1); 115 115 116 116 return cpuidle_register(&imx6sx_cpuidle_driver, NULL);
+4 -2
arch/arm/mach-mmp/cputype.h
··· 44 44 #define cpu_is_pxa910() (0) 45 45 #endif 46 46 47 - #ifdef CONFIG_CPU_MMP2 47 + #if defined(CONFIG_CPU_MMP2) || defined(CONFIG_MACH_MMP2_DT) 48 48 static inline int cpu_is_mmp2(void) 49 49 { 50 - return (((read_cpuid_id() >> 8) & 0xff) == 0x58); 50 + return (((read_cpuid_id() >> 8) & 0xff) == 0x58) && 51 + (((mmp_chip_id & 0xfff) == 0x410) || 52 + ((mmp_chip_id & 0xfff) == 0x610)); 51 53 } 52 54 #else 53 55 #define cpu_is_mmp2() (0)
-4
arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
··· 20 20 compatible = "arm,cortex-a72", "arm,armv8"; 21 21 reg = <0x000>; 22 22 enable-method = "psci"; 23 - cpu-idle-states = <&CPU_SLEEP_0>; 24 23 }; 25 24 cpu1: cpu@1 { 26 25 device_type = "cpu"; 27 26 compatible = "arm,cortex-a72", "arm,armv8"; 28 27 reg = <0x001>; 29 28 enable-method = "psci"; 30 - cpu-idle-states = <&CPU_SLEEP_0>; 31 29 }; 32 30 cpu2: cpu@100 { 33 31 device_type = "cpu"; 34 32 compatible = "arm,cortex-a72", "arm,armv8"; 35 33 reg = <0x100>; 36 34 enable-method = "psci"; 37 - cpu-idle-states = <&CPU_SLEEP_0>; 38 35 }; 39 36 cpu3: cpu@101 { 40 37 device_type = "cpu"; 41 38 compatible = "arm,cortex-a72", "arm,armv8"; 42 39 reg = <0x101>; 43 40 enable-method = "psci"; 44 - cpu-idle-states = <&CPU_SLEEP_0>; 45 41 }; 46 42 }; 47 43 };
-27
arch/arm64/boot/dts/marvell/armada-ap806.dtsi
··· 28 28 method = "smc"; 29 29 }; 30 30 31 - cpus { 32 - #address-cells = <1>; 33 - #size-cells = <0>; 34 - 35 - idle_states { 36 - entry_method = "arm,pcsi"; 37 - 38 - CPU_SLEEP_0: cpu-sleep-0 { 39 - compatible = "arm,idle-state"; 40 - local-timer-stop; 41 - arm,psci-suspend-param = <0x0010000>; 42 - entry-latency-us = <80>; 43 - exit-latency-us = <160>; 44 - min-residency-us = <320>; 45 - }; 46 - 47 - CLUSTER_SLEEP_0: cluster-sleep-0 { 48 - compatible = "arm,idle-state"; 49 - local-timer-stop; 50 - arm,psci-suspend-param = <0x1010000>; 51 - entry-latency-us = <500>; 52 - exit-latency-us = <1000>; 53 - min-residency-us = <2500>; 54 - }; 55 - }; 56 - }; 57 - 58 31 ap806 { 59 32 #address-cells = <2>; 60 33 #size-cells = <2>;
+6 -1
arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
··· 16 16 model = "Bananapi BPI-R64"; 17 17 compatible = "bananapi,bpi-r64", "mediatek,mt7622"; 18 18 19 + aliases { 20 + serial0 = &uart0; 21 + }; 22 + 19 23 chosen { 20 - bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512"; 24 + stdout-path = "serial0:115200n8"; 25 + bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512"; 21 26 }; 22 27 23 28 cpus {
+6 -1
arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
··· 17 17 model = "MediaTek MT7622 RFB1 board"; 18 18 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622"; 19 19 20 + aliases { 21 + serial0 = &uart0; 22 + }; 23 + 20 24 chosen { 21 - bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512"; 25 + stdout-path = "serial0:115200n8"; 26 + bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512"; 22 27 }; 23 28 24 29 cpus {
-10
arch/arm64/boot/dts/mediatek/mt7622.dtsi
··· 227 227 #reset-cells = <1>; 228 228 }; 229 229 230 - timer: timer@10004000 { 231 - compatible = "mediatek,mt7622-timer", 232 - "mediatek,mt6577-timer"; 233 - reg = <0 0x10004000 0 0x80>; 234 - interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_LOW>; 235 - clocks = <&infracfg CLK_INFRA_APXGPT_PD>, 236 - <&topckgen CLK_TOP_RTC>; 237 - clock-names = "system-clk", "rtc-clk"; 238 - }; 239 - 240 230 scpsys: scpsys@10006000 { 241 231 compatible = "mediatek,mt7622-scpsys", 242 232 "syscon";