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Merge tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp

Pull EDAC fixes from Borislav Petkov:
"A fix from Mauro to correct csrow size accounting in sysfs and a
sparse fix from Stephen Hemminger."

* tag 'for_linus' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
EDAC: Merge mci.mem_is_per_rank with mci.csbased
amd64_edac: Correct DIMM sizes
EDAC: Make sysfs functions static

+19 -26
+9 -6
drivers/edac/amd64_edac.c
··· 2048 2048 edac_dbg(1, "MC node: %d, csrow: %d\n", 2049 2049 pvt->mc_node_id, i); 2050 2050 2051 - if (row_dct0) 2051 + if (row_dct0) { 2052 2052 nr_pages = amd64_csrow_nr_pages(pvt, 0, i); 2053 + csrow->channels[0]->dimm->nr_pages = nr_pages; 2054 + } 2053 2055 2054 2056 /* K8 has only one DCT */ 2055 - if (boot_cpu_data.x86 != 0xf && row_dct1) 2056 - nr_pages += amd64_csrow_nr_pages(pvt, 1, i); 2057 + if (boot_cpu_data.x86 != 0xf && row_dct1) { 2058 + int row_dct1_pages = amd64_csrow_nr_pages(pvt, 1, i); 2059 + 2060 + csrow->channels[1]->dimm->nr_pages = row_dct1_pages; 2061 + nr_pages += row_dct1_pages; 2062 + } 2057 2063 2058 2064 mtype = amd64_determine_memory_type(pvt, i); 2059 2065 ··· 2078 2072 dimm = csrow->channels[j]->dimm; 2079 2073 dimm->mtype = mtype; 2080 2074 dimm->edac_mode = edac_mode; 2081 - dimm->nr_pages = nr_pages; 2082 2075 } 2083 - csrow->nr_pages = nr_pages; 2084 2076 } 2085 2077 2086 2078 return empty; ··· 2423 2419 2424 2420 mci->pvt_info = pvt; 2425 2421 mci->pdev = &pvt->F2->dev; 2426 - mci->csbased = 1; 2427 2422 2428 2423 setup_mci_misc_attrs(mci, fam_type); 2429 2424
+3 -3
drivers/edac/edac_mc.c
··· 86 86 edac_dimm_info_location(dimm, location, sizeof(location)); 87 87 88 88 edac_dbg(4, "%s%i: %smapped as virtual row %d, chan %d\n", 89 - dimm->mci->mem_is_per_rank ? "rank" : "dimm", 89 + dimm->mci->csbased ? "rank" : "dimm", 90 90 number, location, dimm->csrow, dimm->cschannel); 91 91 edac_dbg(4, " dimm = %p\n", dimm); 92 92 edac_dbg(4, " dimm->label = '%s'\n", dimm->label); ··· 341 341 memcpy(mci->layers, layers, sizeof(*layer) * n_layers); 342 342 mci->nr_csrows = tot_csrows; 343 343 mci->num_cschannel = tot_channels; 344 - mci->mem_is_per_rank = per_rank; 344 + mci->csbased = per_rank; 345 345 346 346 /* 347 347 * Alocate and fill the csrow/channels structs ··· 1235 1235 * incrementing the compat API counters 1236 1236 */ 1237 1237 edac_dbg(4, "%s csrows map: (%d,%d)\n", 1238 - mci->mem_is_per_rank ? "rank" : "dimm", 1238 + mci->csbased ? "rank" : "dimm", 1239 1239 dimm->csrow, dimm->cschannel); 1240 1240 if (row == -1) 1241 1241 row = dimm->csrow;
+5 -12
drivers/edac/edac_mc_sysfs.c
··· 143 143 * and the per-dimm/per-rank one 144 144 */ 145 145 #define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \ 146 - struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store) 146 + static struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store) 147 147 148 148 struct dev_ch_attribute { 149 149 struct device_attribute attr; ··· 179 179 struct csrow_info *csrow = to_csrow(dev); 180 180 int i; 181 181 u32 nr_pages = 0; 182 - 183 - if (csrow->mci->csbased) 184 - return sprintf(data, "%u\n", PAGES_TO_MiB(csrow->nr_pages)); 185 182 186 183 for (i = 0; i < csrow->nr_channels; i++) 187 184 nr_pages += csrow->channels[i]->dimm->nr_pages; ··· 609 612 device_initialize(&dimm->dev); 610 613 611 614 dimm->dev.parent = &mci->dev; 612 - if (mci->mem_is_per_rank) 615 + if (mci->csbased) 613 616 dev_set_name(&dimm->dev, "rank%d", index); 614 617 else 615 618 dev_set_name(&dimm->dev, "dimm%d", index); ··· 775 778 for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) { 776 779 struct csrow_info *csrow = mci->csrows[csrow_idx]; 777 780 778 - if (csrow->mci->csbased) { 779 - total_pages += csrow->nr_pages; 780 - } else { 781 - for (j = 0; j < csrow->nr_channels; j++) { 782 - struct dimm_info *dimm = csrow->channels[j]->dimm; 781 + for (j = 0; j < csrow->nr_channels; j++) { 782 + struct dimm_info *dimm = csrow->channels[j]->dimm; 783 783 784 - total_pages += dimm->nr_pages; 785 - } 784 + total_pages += dimm->nr_pages; 786 785 } 787 786 } 788 787
+2 -5
include/linux/edac.h
··· 561 561 562 562 u32 ue_count; /* Uncorrectable Errors for this csrow */ 563 563 u32 ce_count; /* Correctable Errors for this csrow */ 564 - u32 nr_pages; /* combined pages count of all channels */ 565 564 566 565 struct mem_ctl_info *mci; /* the parent */ 567 566 ··· 675 676 * sees memory sticks ("dimms"), and the ones that sees memory ranks. 676 677 * All old memory controllers enumerate memories per rank, but most 677 678 * of the recent drivers enumerate memories per DIMM, instead. 678 - * When the memory controller is per rank, mem_is_per_rank is true. 679 + * When the memory controller is per rank, csbased is true. 679 680 */ 680 681 unsigned n_layers; 681 682 struct edac_mc_layer *layers; 682 - bool mem_is_per_rank; 683 + bool csbased; 683 684 684 685 /* 685 686 * DIMM info. Will eventually remove the entire csrows_info some day ··· 740 741 u32 fake_inject_ue; 741 742 u16 fake_inject_count; 742 743 #endif 743 - __u8 csbased : 1, /* csrow-based memory controller */ 744 - __resv : 7; 745 744 }; 746 745 747 746 #endif