Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'mmc-4.2-rc3' of git://git.linaro.org/people/ulf.hansson/mmc
Pull MMC fixes from Ulf Hansson:
"Here are some mmc fixes intended for v4.2 rc4.
Note, most of the changes are for the sdhci-esdhc-imx controller,
which also required us to modify some related DTS files. Those
changes have been acked by the SoC maintainer.
MMC core:
- Fix a reference inbalance issue for power_ro_lock_show() sysfs handler
MMC host:
- omap_hsmmc: Fix IRQ errorhandling for CD, DTO, and CRC
- sdhci: Prevent a kernel panic while using DMA
- mtk-sd: Let it depend on HAS_DMA to prevent build errors
- sdhci-esdhc: Make 8BIT bus work
- sdhci-esdhc-imx: Fix some regressions for DT based platforms
- sdhci-pxav3: Fix a regression for DT based platforms"
* tag 'mmc-4.2-rc3' of git://git.linaro.org/people/ulf.hansson/mmc:
mmc: sdhci-pxav3: fix platform_data is not initialized
dts: mmc: fsl-imx-esdhc: remove fsl,cd-controller support
mmc: sdhci-esdhc-imx: clear f_max in boarddata
mmc: sdhci-esdhc-imx: remove duplicated dts parsing
mmc: sdhci: make max-frequency property in device tree work
mmc: sdhci-esdhc-imx: move all non dt probe code into one function
mmc: sdhci-esdhc-imx: fix cd regression for dt platform
dts: imx7: fix sd card gpio polarity specified in device tree
dts: imx25: fix sd card gpio polarity specified in device tree
dts: imx6: fix sd card gpio polarity specified in device tree
dts: imx53: fix sd card gpio polarity specified in device tree
dts: imx51: fix sd card gpio polarity specified in device tree
mmc: sdhci-esdhc: Make 8BIT bus work
mmc: block: Add missing mmc_blk_put() in power_ro_lock_show()
mmc: MMC_MTK should depend on HAS_DMA
mmc: sdhci check parameters before call dma_free_coherent
mmc: omap_hsmmc: Handle BADA, DEB and CEB interrupts
mmc: omap_hsmmc: Fix DTO and DCRC handling
+202
-187
-2
Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt
-2
Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt
···
17
17
"fsl,imx6sx-usdhc"
18
18
19
19
Optional properties:
20
-
- fsl,cd-controller : Indicate to use controller internal card detection
21
20
- fsl,wp-controller : Indicate to use controller internal write protection
22
21
- fsl,delay-line : Specify the number of delay cells for override mode.
23
22
This is used to set the clock delay for DLL(Delay Line) on override mode
···
34
35
compatible = "fsl,imx51-esdhc";
35
36
reg = <0x70004000 0x4000>;
36
37
interrupts = <1>;
37
-
fsl,cd-controller;
38
38
fsl,wp-controller;
39
39
};
40
40
+3
-2
arch/arm/boot/dts/imx25-pdk.dts
+3
-2
arch/arm/boot/dts/imx25-pdk.dts
···
10
10
*/
11
11
12
12
/dts-v1/;
13
+
#include <dt-bindings/gpio/gpio.h>
13
14
#include <dt-bindings/input/input.h>
14
15
#include "imx25.dtsi"
15
16
···
115
114
&esdhc1 {
116
115
pinctrl-names = "default";
117
116
pinctrl-0 = <&pinctrl_esdhc1>;
118
-
cd-gpios = <&gpio2 1 0>;
119
-
wp-gpios = <&gpio2 0 0>;
117
+
cd-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
118
+
wp-gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
120
119
status = "okay";
121
120
};
122
121
+1
-1
arch/arm/boot/dts/imx51-apf51dev.dts
+1
-1
arch/arm/boot/dts/imx51-apf51dev.dts
+2
-2
arch/arm/boot/dts/imx53-ard.dts
+2
-2
arch/arm/boot/dts/imx53-ard.dts
+2
-2
arch/arm/boot/dts/imx53-m53evk.dts
+2
-2
arch/arm/boot/dts/imx53-m53evk.dts
+2
-2
arch/arm/boot/dts/imx53-qsb-common.dtsi
+2
-2
arch/arm/boot/dts/imx53-qsb-common.dtsi
···
147
147
&esdhc3 {
148
148
pinctrl-names = "default";
149
149
pinctrl-0 = <&pinctrl_esdhc3>;
150
-
cd-gpios = <&gpio3 11 0>;
151
-
wp-gpios = <&gpio3 12 0>;
150
+
cd-gpios = <&gpio3 11 GPIO_ACTIVE_LOW>;
151
+
wp-gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
152
152
bus-width = <8>;
153
153
status = "okay";
154
154
};
+2
-2
arch/arm/boot/dts/imx53-smd.dts
+2
-2
arch/arm/boot/dts/imx53-smd.dts
+2
-2
arch/arm/boot/dts/imx53-tqma53.dtsi
+2
-2
arch/arm/boot/dts/imx53-tqma53.dtsi
+2
-2
arch/arm/boot/dts/imx53-tx53.dtsi
+2
-2
arch/arm/boot/dts/imx53-tx53.dtsi
···
183
183
};
184
184
185
185
&esdhc1 {
186
-
cd-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
186
+
cd-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
187
187
fsl,wp-controller;
188
188
pinctrl-names = "default";
189
189
pinctrl-0 = <&pinctrl_esdhc1>;
···
191
191
};
192
192
193
193
&esdhc2 {
194
-
cd-gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>;
194
+
cd-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
195
195
fsl,wp-controller;
196
196
pinctrl-names = "default";
197
197
pinctrl-0 = <&pinctrl_esdhc2>;
+2
-2
arch/arm/boot/dts/imx53-voipac-bsb.dts
+2
-2
arch/arm/boot/dts/imx53-voipac-bsb.dts
···
119
119
&esdhc2 {
120
120
pinctrl-names = "default";
121
121
pinctrl-0 = <&pinctrl_esdhc2>;
122
-
cd-gpios = <&gpio3 25 0>;
123
-
wp-gpios = <&gpio2 19 0>;
122
+
cd-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
123
+
wp-gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>;
124
124
vmmc-supply = <®_3p3v>;
125
125
status = "okay";
126
126
};
+4
-4
arch/arm/boot/dts/imx6dl-riotboard.dts
+4
-4
arch/arm/boot/dts/imx6dl-riotboard.dts
···
305
305
&usdhc2 {
306
306
pinctrl-names = "default";
307
307
pinctrl-0 = <&pinctrl_usdhc2>;
308
-
cd-gpios = <&gpio1 4 0>;
309
-
wp-gpios = <&gpio1 2 0>;
308
+
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
309
+
wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
310
310
vmmc-supply = <®_3p3v>;
311
311
status = "okay";
312
312
};
···
314
314
&usdhc3 {
315
315
pinctrl-names = "default";
316
316
pinctrl-0 = <&pinctrl_usdhc3>;
317
-
cd-gpios = <&gpio7 0 0>;
318
-
wp-gpios = <&gpio7 1 0>;
317
+
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
318
+
wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
319
319
vmmc-supply = <®_3p3v>;
320
320
status = "okay";
321
321
};
+3
-2
arch/arm/boot/dts/imx6q-arm2.dts
+3
-2
arch/arm/boot/dts/imx6q-arm2.dts
···
11
11
*/
12
12
13
13
/dts-v1/;
14
+
#include <dt-bindings/gpio/gpio.h>
14
15
#include "imx6q.dtsi"
15
16
16
17
/ {
···
197
196
};
198
197
199
198
&usdhc3 {
200
-
cd-gpios = <&gpio6 11 0>;
201
-
wp-gpios = <&gpio6 14 0>;
199
+
cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
200
+
wp-gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>;
202
201
vmmc-supply = <®_3p3v>;
203
202
pinctrl-names = "default";
204
203
pinctrl-0 = <&pinctrl_usdhc3
+2
-1
arch/arm/boot/dts/imx6q-gk802.dts
+2
-1
arch/arm/boot/dts/imx6q-gk802.dts
···
7
7
*/
8
8
9
9
/dts-v1/;
10
+
#include <dt-bindings/gpio/gpio.h>
10
11
#include "imx6q.dtsi"
11
12
12
13
/ {
···
162
161
pinctrl-names = "default";
163
162
pinctrl-0 = <&pinctrl_usdhc3>;
164
163
bus-width = <4>;
165
-
cd-gpios = <&gpio6 11 0>;
164
+
cd-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>;
166
165
vmmc-supply = <®_3p3v>;
167
166
status = "okay";
168
167
};
+2
-2
arch/arm/boot/dts/imx6q-tbs2910.dts
+2
-2
arch/arm/boot/dts/imx6q-tbs2910.dts
···
251
251
pinctrl-names = "default";
252
252
pinctrl-0 = <&pinctrl_usdhc2>;
253
253
bus-width = <4>;
254
-
cd-gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
254
+
cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
255
255
vmmc-supply = <®_3p3v>;
256
256
status = "okay";
257
257
};
···
260
260
pinctrl-names = "default";
261
261
pinctrl-0 = <&pinctrl_usdhc3>;
262
262
bus-width = <4>;
263
-
cd-gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
263
+
cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
264
264
wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
265
265
vmmc-supply = <®_3p3v>;
266
266
status = "okay";
+2
-2
arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
+2
-2
arch/arm/boot/dts/imx6qdl-aristainetos.dtsi
···
173
173
pinctrl-names = "default";
174
174
pinctrl-0 = <&pinctrl_usdhc1>;
175
175
vmmc-supply = <®_3p3v>;
176
-
cd-gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>;
176
+
cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
177
177
status = "okay";
178
178
};
179
179
···
181
181
pinctrl-names = "default";
182
182
pinctrl-0 = <&pinctrl_usdhc2>;
183
183
vmmc-supply = <®_3p3v>;
184
-
cd-gpios = <&gpio4 8 GPIO_ACTIVE_HIGH>;
184
+
cd-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
185
185
status = "okay";
186
186
};
187
187
+2
-2
arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
+2
-2
arch/arm/boot/dts/imx6qdl-aristainetos2.dtsi
···
392
392
&usdhc1 {
393
393
pinctrl-names = "default";
394
394
pinctrl-0 = <&pinctrl_usdhc1>;
395
-
cd-gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
395
+
cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
396
396
no-1-8-v;
397
397
status = "okay";
398
398
};
···
400
400
&usdhc2 {
401
401
pinctrl-names = "default";
402
402
pinctrl-0 = <&pinctrl_usdhc2>;
403
-
cd-gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
403
+
cd-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>;
404
404
wp-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
405
405
no-1-8-v;
406
406
status = "okay";
+1
-1
arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
+1
-1
arch/arm/boot/dts/imx6qdl-cubox-i.dtsi
+3
-1
arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
+3
-1
arch/arm/boot/dts/imx6qdl-dfi-fs700-m60.dtsi
···
1
+
#include <dt-bindings/gpio/gpio.h>
2
+
1
3
/ {
2
4
regulators {
3
5
compatible = "simple-bus";
···
183
181
&usdhc2 { /* module slot */
184
182
pinctrl-names = "default";
185
183
pinctrl-0 = <&pinctrl_usdhc2>;
186
-
cd-gpios = <&gpio2 2 0>;
184
+
cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
187
185
status = "okay";
188
186
};
189
187
+1
-1
arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
+1
-1
arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
+1
-1
arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
+1
-1
arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
+1
-1
arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
+1
-1
arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
+1
-1
arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
+1
-1
arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
+2
-2
arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
+2
-2
arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
···
453
453
&usdhc3 {
454
454
pinctrl-names = "default";
455
455
pinctrl-0 = <&pinctrl_usdhc3>;
456
-
cd-gpios = <&gpio7 0 0>;
456
+
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
457
457
vmmc-supply = <®_3p3v>;
458
458
status = "okay";
459
459
};
···
461
461
&usdhc4 {
462
462
pinctrl-names = "default";
463
463
pinctrl-0 = <&pinctrl_usdhc4>;
464
-
cd-gpios = <&gpio2 6 0>;
464
+
cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
465
465
vmmc-supply = <®_3p3v>;
466
466
status = "okay";
467
467
};
+4
-4
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
+4
-4
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
···
409
409
&usdhc2 {
410
410
pinctrl-names = "default";
411
411
pinctrl-0 = <&pinctrl_usdhc2>;
412
-
cd-gpios = <&gpio1 4 0>;
413
-
wp-gpios = <&gpio1 2 0>;
412
+
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
413
+
wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
414
414
status = "disabled";
415
415
};
416
416
···
418
418
pinctrl-names = "default";
419
419
pinctrl-0 = <&pinctrl_usdhc3
420
420
&pinctrl_usdhc3_cdwp>;
421
-
cd-gpios = <&gpio1 27 0>;
422
-
wp-gpios = <&gpio1 29 0>;
421
+
cd-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>;
422
+
wp-gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
423
423
status = "disabled";
424
424
};
+2
-2
arch/arm/boot/dts/imx6qdl-rex.dtsi
+2
-2
arch/arm/boot/dts/imx6qdl-rex.dtsi
···
342
342
pinctrl-0 = <&pinctrl_usdhc2>;
343
343
bus-width = <4>;
344
344
cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
345
-
wp-gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
345
+
wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
346
346
status = "okay";
347
347
};
348
348
···
351
351
pinctrl-0 = <&pinctrl_usdhc3>;
352
352
bus-width = <4>;
353
353
cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
354
-
wp-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
354
+
wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
355
355
status = "okay";
356
356
};
+2
-2
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
+2
-2
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
···
467
467
pinctrl-0 = <&pinctrl_usdhc3>;
468
468
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
469
469
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
470
-
cd-gpios = <&gpio6 15 0>;
471
-
wp-gpios = <&gpio1 13 0>;
470
+
cd-gpios = <&gpio6 15 GPIO_ACTIVE_LOW>;
471
+
wp-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>;
472
472
status = "okay";
473
473
};
474
474
+3
-3
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+3
-3
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
···
448
448
&usdhc3 {
449
449
pinctrl-names = "default";
450
450
pinctrl-0 = <&pinctrl_usdhc3>;
451
-
cd-gpios = <&gpio7 0 0>;
452
-
wp-gpios = <&gpio7 1 0>;
451
+
cd-gpios = <&gpio7 0 GPIO_ACTIVE_LOW>;
452
+
wp-gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
453
453
vmmc-supply = <®_3p3v>;
454
454
status = "okay";
455
455
};
···
457
457
&usdhc4 {
458
458
pinctrl-names = "default";
459
459
pinctrl-0 = <&pinctrl_usdhc4>;
460
-
cd-gpios = <&gpio2 6 0>;
460
+
cd-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
461
461
vmmc-supply = <®_3p3v>;
462
462
status = "okay";
463
463
};
+4
-4
arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+4
-4
arch/arm/boot/dts/imx6qdl-sabresd.dtsi
···
562
562
pinctrl-names = "default";
563
563
pinctrl-0 = <&pinctrl_usdhc2>;
564
564
bus-width = <8>;
565
-
cd-gpios = <&gpio2 2 0>;
566
-
wp-gpios = <&gpio2 3 0>;
565
+
cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
566
+
wp-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
567
567
status = "okay";
568
568
};
569
569
···
571
571
pinctrl-names = "default";
572
572
pinctrl-0 = <&pinctrl_usdhc3>;
573
573
bus-width = <8>;
574
-
cd-gpios = <&gpio2 0 0>;
575
-
wp-gpios = <&gpio2 1 0>;
574
+
cd-gpios = <&gpio2 0 GPIO_ACTIVE_LOW>;
575
+
wp-gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
576
576
status = "okay";
577
577
};
578
578
+2
-2
arch/arm/boot/dts/imx6qdl-tx6.dtsi
+2
-2
arch/arm/boot/dts/imx6qdl-tx6.dtsi
···
680
680
pinctrl-0 = <&pinctrl_usdhc1>;
681
681
bus-width = <4>;
682
682
no-1-8-v;
683
-
cd-gpios = <&gpio7 2 0>;
683
+
cd-gpios = <&gpio7 2 GPIO_ACTIVE_LOW>;
684
684
fsl,wp-controller;
685
685
status = "okay";
686
686
};
···
690
690
pinctrl-0 = <&pinctrl_usdhc2>;
691
691
bus-width = <4>;
692
692
no-1-8-v;
693
-
cd-gpios = <&gpio7 3 0>;
693
+
cd-gpios = <&gpio7 3 GPIO_ACTIVE_LOW>;
694
694
fsl,wp-controller;
695
695
status = "okay";
696
696
};
+4
-2
arch/arm/boot/dts/imx6qdl-wandboard.dtsi
+4
-2
arch/arm/boot/dts/imx6qdl-wandboard.dtsi
···
9
9
*
10
10
*/
11
11
12
+
#include <dt-bindings/gpio/gpio.h>
13
+
12
14
/ {
13
15
regulators {
14
16
compatible = "simple-bus";
···
252
250
&usdhc1 {
253
251
pinctrl-names = "default";
254
252
pinctrl-0 = <&pinctrl_usdhc1>;
255
-
cd-gpios = <&gpio1 2 0>;
253
+
cd-gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
256
254
status = "okay";
257
255
};
258
256
259
257
&usdhc3 {
260
258
pinctrl-names = "default";
261
259
pinctrl-0 = <&pinctrl_usdhc3>;
262
-
cd-gpios = <&gpio3 9 0>;
260
+
cd-gpios = <&gpio3 9 GPIO_ACTIVE_LOW>;
263
261
status = "okay";
264
262
};
+5
-5
arch/arm/boot/dts/imx6sl-evk.dts
+5
-5
arch/arm/boot/dts/imx6sl-evk.dts
···
617
617
pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
618
618
pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
619
619
bus-width = <8>;
620
-
cd-gpios = <&gpio4 7 0>;
621
-
wp-gpios = <&gpio4 6 0>;
620
+
cd-gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
621
+
wp-gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>;
622
622
status = "okay";
623
623
};
624
624
···
627
627
pinctrl-0 = <&pinctrl_usdhc2>;
628
628
pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
629
629
pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
630
-
cd-gpios = <&gpio5 0 0>;
631
-
wp-gpios = <&gpio4 29 0>;
630
+
cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
631
+
wp-gpios = <&gpio4 29 GPIO_ACTIVE_HIGH>;
632
632
status = "okay";
633
633
};
634
634
···
637
637
pinctrl-0 = <&pinctrl_usdhc3>;
638
638
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
639
639
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
640
-
cd-gpios = <&gpio3 22 0>;
640
+
cd-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>;
641
641
status = "okay";
642
642
};
+2
-2
arch/arm/boot/dts/imx6sx-sabreauto.dts
+2
-2
arch/arm/boot/dts/imx6sx-sabreauto.dts
···
49
49
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
50
50
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
51
51
bus-width = <8>;
52
-
cd-gpios = <&gpio7 10 GPIO_ACTIVE_HIGH>;
52
+
cd-gpios = <&gpio7 10 GPIO_ACTIVE_LOW>;
53
53
wp-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
54
54
keep-power-in-suspend;
55
55
enable-sdio-wakeup;
···
61
61
pinctrl-names = "default";
62
62
pinctrl-0 = <&pinctrl_usdhc4>;
63
63
bus-width = <8>;
64
-
cd-gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
64
+
cd-gpios = <&gpio7 11 GPIO_ACTIVE_LOW>;
65
65
no-1-8-v;
66
66
keep-power-in-suspend;
67
67
enable-sdio-wakup;
+2
-2
arch/arm/boot/dts/imx6sx-sdb.dtsi
+2
-2
arch/arm/boot/dts/imx6sx-sdb.dtsi
···
293
293
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
294
294
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
295
295
bus-width = <8>;
296
-
cd-gpios = <&gpio2 10 GPIO_ACTIVE_HIGH>;
296
+
cd-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
297
297
wp-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
298
298
keep-power-in-suspend;
299
299
enable-sdio-wakeup;
···
304
304
&usdhc4 {
305
305
pinctrl-names = "default";
306
306
pinctrl-0 = <&pinctrl_usdhc4>;
307
-
cd-gpios = <&gpio6 21 GPIO_ACTIVE_HIGH>;
307
+
cd-gpios = <&gpio6 21 GPIO_ACTIVE_LOW>;
308
308
wp-gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>;
309
309
status = "okay";
310
310
};
+2
-2
arch/arm/boot/dts/imx7d-sdb.dts
+2
-2
arch/arm/boot/dts/imx7d-sdb.dts
···
234
234
&usdhc1 {
235
235
pinctrl-names = "default";
236
236
pinctrl-0 = <&pinctrl_usdhc1>;
237
-
cd-gpios = <&gpio5 0 0>;
238
-
wp-gpios = <&gpio5 1 0>;
237
+
cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
238
+
wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
239
239
enable-sdio-wakeup;
240
240
keep-power-in-suspend;
241
241
status = "okay";
+2
drivers/mmc/card/block.c
+2
drivers/mmc/card/block.c
+1
drivers/mmc/host/Kconfig
+1
drivers/mmc/host/Kconfig
+6
-5
drivers/mmc/host/omap_hsmmc.c
+6
-5
drivers/mmc/host/omap_hsmmc.c
···
1062
1062
1063
1063
if (status & (CTO_EN | CCRC_EN))
1064
1064
end_cmd = 1;
1065
+
if (host->data || host->response_busy) {
1066
+
end_trans = !end_cmd;
1067
+
host->response_busy = 0;
1068
+
}
1065
1069
if (status & (CTO_EN | DTO_EN))
1066
1070
hsmmc_command_incomplete(host, -ETIMEDOUT, end_cmd);
1067
-
else if (status & (CCRC_EN | DCRC_EN))
1071
+
else if (status & (CCRC_EN | DCRC_EN | DEB_EN | CEB_EN |
1072
+
BADA_EN))
1068
1073
hsmmc_command_incomplete(host, -EILSEQ, end_cmd);
1069
1074
1070
1075
if (status & ACE_EN) {
···
1085
1080
hsmmc_command_incomplete(host, error, end_cmd);
1086
1081
}
1087
1082
dev_dbg(mmc_dev(host->mmc), "AC12 err: 0x%x\n", ac12);
1088
-
}
1089
-
if (host->data || host->response_busy) {
1090
-
end_trans = !end_cmd;
1091
-
host->response_busy = 0;
1092
1083
}
1093
1084
}
1094
1085
+104
-106
drivers/mmc/host/sdhci-esdhc-imx.c
+104
-106
drivers/mmc/host/sdhci-esdhc-imx.c
···
581
581
static unsigned int esdhc_pltfm_get_max_clock(struct sdhci_host *host)
582
582
{
583
583
struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
584
-
struct pltfm_imx_data *imx_data = pltfm_host->priv;
585
-
struct esdhc_platform_data *boarddata = &imx_data->boarddata;
586
584
587
-
if (boarddata->f_max && (boarddata->f_max < pltfm_host->clock))
588
-
return boarddata->f_max;
589
-
else
590
-
return pltfm_host->clock;
585
+
return pltfm_host->clock;
591
586
}
592
587
593
588
static unsigned int esdhc_pltfm_get_min_clock(struct sdhci_host *host)
···
873
878
static int
874
879
sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
875
880
struct sdhci_host *host,
876
-
struct esdhc_platform_data *boarddata)
881
+
struct pltfm_imx_data *imx_data)
877
882
{
878
883
struct device_node *np = pdev->dev.of_node;
879
-
880
-
if (!np)
881
-
return -ENODEV;
882
-
883
-
if (of_get_property(np, "non-removable", NULL))
884
-
boarddata->cd_type = ESDHC_CD_PERMANENT;
885
-
886
-
if (of_get_property(np, "fsl,cd-controller", NULL))
887
-
boarddata->cd_type = ESDHC_CD_CONTROLLER;
884
+
struct esdhc_platform_data *boarddata = &imx_data->boarddata;
885
+
int ret;
888
886
889
887
if (of_get_property(np, "fsl,wp-controller", NULL))
890
888
boarddata->wp_type = ESDHC_WP_CONTROLLER;
891
889
892
-
boarddata->cd_gpio = of_get_named_gpio(np, "cd-gpios", 0);
893
-
if (gpio_is_valid(boarddata->cd_gpio))
894
-
boarddata->cd_type = ESDHC_CD_GPIO;
895
-
896
890
boarddata->wp_gpio = of_get_named_gpio(np, "wp-gpios", 0);
897
891
if (gpio_is_valid(boarddata->wp_gpio))
898
892
boarddata->wp_type = ESDHC_WP_GPIO;
899
-
900
-
of_property_read_u32(np, "bus-width", &boarddata->max_bus_width);
901
-
902
-
of_property_read_u32(np, "max-frequency", &boarddata->f_max);
903
893
904
894
if (of_find_property(np, "no-1-8-v", NULL))
905
895
boarddata->support_vsel = false;
···
896
916
897
917
mmc_of_parse_voltage(np, &host->ocr_mask);
898
918
919
+
/* sdr50 and sdr104 needs work on 1.8v signal voltage */
920
+
if ((boarddata->support_vsel) && esdhc_is_usdhc(imx_data) &&
921
+
!IS_ERR(imx_data->pins_default)) {
922
+
imx_data->pins_100mhz = pinctrl_lookup_state(imx_data->pinctrl,
923
+
ESDHC_PINCTRL_STATE_100MHZ);
924
+
imx_data->pins_200mhz = pinctrl_lookup_state(imx_data->pinctrl,
925
+
ESDHC_PINCTRL_STATE_200MHZ);
926
+
if (IS_ERR(imx_data->pins_100mhz) ||
927
+
IS_ERR(imx_data->pins_200mhz)) {
928
+
dev_warn(mmc_dev(host->mmc),
929
+
"could not get ultra high speed state, work on normal mode\n");
930
+
/*
931
+
* fall back to not support uhs by specify no 1.8v quirk
932
+
*/
933
+
host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
934
+
}
935
+
} else {
936
+
host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
937
+
}
938
+
899
939
/* call to generic mmc_of_parse to support additional capabilities */
900
-
return mmc_of_parse(host->mmc);
940
+
ret = mmc_of_parse(host->mmc);
941
+
if (ret)
942
+
return ret;
943
+
944
+
if (!IS_ERR_VALUE(mmc_gpio_get_cd(host->mmc)))
945
+
host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
946
+
947
+
return 0;
901
948
}
902
949
#else
903
950
static inline int
904
951
sdhci_esdhc_imx_probe_dt(struct platform_device *pdev,
905
952
struct sdhci_host *host,
906
-
struct esdhc_platform_data *boarddata)
953
+
struct pltfm_imx_data *imx_data)
907
954
{
908
955
return -ENODEV;
909
956
}
910
957
#endif
958
+
959
+
static int sdhci_esdhc_imx_probe_nondt(struct platform_device *pdev,
960
+
struct sdhci_host *host,
961
+
struct pltfm_imx_data *imx_data)
962
+
{
963
+
struct esdhc_platform_data *boarddata = &imx_data->boarddata;
964
+
int err;
965
+
966
+
if (!host->mmc->parent->platform_data) {
967
+
dev_err(mmc_dev(host->mmc), "no board data!\n");
968
+
return -EINVAL;
969
+
}
970
+
971
+
imx_data->boarddata = *((struct esdhc_platform_data *)
972
+
host->mmc->parent->platform_data);
973
+
/* write_protect */
974
+
if (boarddata->wp_type == ESDHC_WP_GPIO) {
975
+
err = mmc_gpio_request_ro(host->mmc, boarddata->wp_gpio);
976
+
if (err) {
977
+
dev_err(mmc_dev(host->mmc),
978
+
"failed to request write-protect gpio!\n");
979
+
return err;
980
+
}
981
+
host->mmc->caps2 |= MMC_CAP2_RO_ACTIVE_HIGH;
982
+
}
983
+
984
+
/* card_detect */
985
+
switch (boarddata->cd_type) {
986
+
case ESDHC_CD_GPIO:
987
+
err = mmc_gpio_request_cd(host->mmc, boarddata->cd_gpio, 0);
988
+
if (err) {
989
+
dev_err(mmc_dev(host->mmc),
990
+
"failed to request card-detect gpio!\n");
991
+
return err;
992
+
}
993
+
/* fall through */
994
+
995
+
case ESDHC_CD_CONTROLLER:
996
+
/* we have a working card_detect back */
997
+
host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
998
+
break;
999
+
1000
+
case ESDHC_CD_PERMANENT:
1001
+
host->mmc->caps |= MMC_CAP_NONREMOVABLE;
1002
+
break;
1003
+
1004
+
case ESDHC_CD_NONE:
1005
+
break;
1006
+
}
1007
+
1008
+
switch (boarddata->max_bus_width) {
1009
+
case 8:
1010
+
host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA;
1011
+
break;
1012
+
case 4:
1013
+
host->mmc->caps |= MMC_CAP_4_BIT_DATA;
1014
+
break;
1015
+
case 1:
1016
+
default:
1017
+
host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA;
1018
+
break;
1019
+
}
1020
+
1021
+
return 0;
1022
+
}
911
1023
912
1024
static int sdhci_esdhc_imx_probe(struct platform_device *pdev)
913
1025
{
···
1007
935
of_match_device(imx_esdhc_dt_ids, &pdev->dev);
1008
936
struct sdhci_pltfm_host *pltfm_host;
1009
937
struct sdhci_host *host;
1010
-
struct esdhc_platform_data *boarddata;
1011
938
int err;
1012
939
struct pltfm_imx_data *imx_data;
1013
-
bool dt = true;
1014
940
1015
941
host = sdhci_pltfm_init(pdev, &sdhci_esdhc_imx_pdata, 0);
1016
942
if (IS_ERR(host))
···
1100
1030
if (imx_data->socdata->flags & ESDHC_FLAG_ERR004536)
1101
1031
host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
1102
1032
1103
-
boarddata = &imx_data->boarddata;
1104
-
if (sdhci_esdhc_imx_probe_dt(pdev, host, boarddata) < 0) {
1105
-
if (!host->mmc->parent->platform_data) {
1106
-
dev_err(mmc_dev(host->mmc), "no board data!\n");
1107
-
err = -EINVAL;
1108
-
goto disable_clk;
1109
-
}
1110
-
imx_data->boarddata = *((struct esdhc_platform_data *)
1111
-
host->mmc->parent->platform_data);
1112
-
dt = false;
1113
-
}
1114
-
/* write_protect */
1115
-
if (boarddata->wp_type == ESDHC_WP_GPIO && !dt) {
1116
-
err = mmc_gpio_request_ro(host->mmc, boarddata->wp_gpio);
1117
-
if (err) {
1118
-
dev_err(mmc_dev(host->mmc),
1119
-
"failed to request write-protect gpio!\n");
1120
-
goto disable_clk;
1121
-
}
1122
-
host->mmc->caps2 |= MMC_CAP2_RO_ACTIVE_HIGH;
1123
-
}
1124
-
1125
-
/* card_detect */
1126
-
switch (boarddata->cd_type) {
1127
-
case ESDHC_CD_GPIO:
1128
-
if (dt)
1129
-
break;
1130
-
err = mmc_gpio_request_cd(host->mmc, boarddata->cd_gpio, 0);
1131
-
if (err) {
1132
-
dev_err(mmc_dev(host->mmc),
1133
-
"failed to request card-detect gpio!\n");
1134
-
goto disable_clk;
1135
-
}
1136
-
/* fall through */
1137
-
1138
-
case ESDHC_CD_CONTROLLER:
1139
-
/* we have a working card_detect back */
1140
-
host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
1141
-
break;
1142
-
1143
-
case ESDHC_CD_PERMANENT:
1144
-
host->mmc->caps |= MMC_CAP_NONREMOVABLE;
1145
-
break;
1146
-
1147
-
case ESDHC_CD_NONE:
1148
-
break;
1149
-
}
1150
-
1151
-
switch (boarddata->max_bus_width) {
1152
-
case 8:
1153
-
host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA;
1154
-
break;
1155
-
case 4:
1156
-
host->mmc->caps |= MMC_CAP_4_BIT_DATA;
1157
-
break;
1158
-
case 1:
1159
-
default:
1160
-
host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA;
1161
-
break;
1162
-
}
1163
-
1164
-
/* sdr50 and sdr104 needs work on 1.8v signal voltage */
1165
-
if ((boarddata->support_vsel) && esdhc_is_usdhc(imx_data) &&
1166
-
!IS_ERR(imx_data->pins_default)) {
1167
-
imx_data->pins_100mhz = pinctrl_lookup_state(imx_data->pinctrl,
1168
-
ESDHC_PINCTRL_STATE_100MHZ);
1169
-
imx_data->pins_200mhz = pinctrl_lookup_state(imx_data->pinctrl,
1170
-
ESDHC_PINCTRL_STATE_200MHZ);
1171
-
if (IS_ERR(imx_data->pins_100mhz) ||
1172
-
IS_ERR(imx_data->pins_200mhz)) {
1173
-
dev_warn(mmc_dev(host->mmc),
1174
-
"could not get ultra high speed state, work on normal mode\n");
1175
-
/* fall back to not support uhs by specify no 1.8v quirk */
1176
-
host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
1177
-
}
1178
-
} else {
1179
-
host->quirks2 |= SDHCI_QUIRK2_NO_1_8_V;
1180
-
}
1033
+
if (of_id)
1034
+
err = sdhci_esdhc_imx_probe_dt(pdev, host, imx_data);
1035
+
else
1036
+
err = sdhci_esdhc_imx_probe_nondt(pdev, host, imx_data);
1037
+
if (err)
1038
+
goto disable_clk;
1181
1039
1182
1040
err = sdhci_add_host(host);
1183
1041
if (err)
+1
-1
drivers/mmc/host/sdhci-esdhc.h
+1
-1
drivers/mmc/host/sdhci-esdhc.h
+1
drivers/mmc/host/sdhci-pxav3.c
+1
drivers/mmc/host/sdhci-pxav3.c
+12
-4
drivers/mmc/host/sdhci.c
+12
-4
drivers/mmc/host/sdhci.c
···
2866
2866
u32 max_current_caps;
2867
2867
unsigned int ocr_avail;
2868
2868
unsigned int override_timeout_clk;
2869
+
u32 max_clk;
2869
2870
int ret;
2870
2871
2871
2872
WARN_ON(host == NULL);
···
2979
2978
GFP_KERNEL);
2980
2979
host->align_buffer = kmalloc(host->align_buffer_sz, GFP_KERNEL);
2981
2980
if (!host->adma_table || !host->align_buffer) {
2982
-
dma_free_coherent(mmc_dev(mmc), host->adma_table_sz,
2983
-
host->adma_table, host->adma_addr);
2981
+
if (host->adma_table)
2982
+
dma_free_coherent(mmc_dev(mmc),
2983
+
host->adma_table_sz,
2984
+
host->adma_table,
2985
+
host->adma_addr);
2984
2986
kfree(host->align_buffer);
2985
2987
pr_warn("%s: Unable to allocate ADMA buffers - falling back to standard DMA\n",
2986
2988
mmc_hostname(mmc));
···
3051
3047
* Set host parameters.
3052
3048
*/
3053
3049
mmc->ops = &sdhci_ops;
3054
-
mmc->f_max = host->max_clk;
3050
+
max_clk = host->max_clk;
3051
+
3055
3052
if (host->ops->get_min_clock)
3056
3053
mmc->f_min = host->ops->get_min_clock(host);
3057
3054
else if (host->version >= SDHCI_SPEC_300) {
3058
3055
if (host->clk_mul) {
3059
3056
mmc->f_min = (host->max_clk * host->clk_mul) / 1024;
3060
-
mmc->f_max = host->max_clk * host->clk_mul;
3057
+
max_clk = host->max_clk * host->clk_mul;
3061
3058
} else
3062
3059
mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_300;
3063
3060
} else
3064
3061
mmc->f_min = host->max_clk / SDHCI_MAX_DIV_SPEC_200;
3062
+
3063
+
if (!mmc->f_max || (mmc->f_max && (mmc->f_max > max_clk)))
3064
+
mmc->f_max = max_clk;
3065
3065
3066
3066
if (!(host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK)) {
3067
3067
host->timeout_clk = (caps[0] & SDHCI_TIMEOUT_CLK_MASK) >>