Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm
Pull KVM fixes from Paolo Bonzini:
"Quite a few fixes for x86: nested virtualization save/restore, AMD
nested virtualization and virtual APIC, 32-bit fixes, an important fix
to restore operation on older processors, and a bunch of hyper-v
bugfixes. Several are marked stable.
There are also fixes for GCC warnings and for a GCC/objtool interaction"
* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm:
KVM: x86: Mark expected switch fall-throughs
KVM: x86: fix TRACE_INCLUDE_PATH and remove -I. header search paths
KVM: selftests: check returned evmcs version range
x86/kvm/hyper-v: nested_enable_evmcs() sets vmcs_version incorrectly
KVM: VMX: Move vmx_vcpu_run()'s VM-Enter asm blob to a helper function
kvm: selftests: Fix region overlap check in kvm_util
kvm: vmx: fix some -Wmissing-prototypes warnings
KVM: nSVM: clear events pending from svm_complete_interrupts() when exiting to L1
svm: Fix AVIC incomplete IPI emulation
svm: Add warning message for AVIC IPI invalid target
KVM: x86: WARN_ONCE if sending a PV IPI returns a fatal error
KVM: x86: Fix PV IPIs for 32-bit KVM host
x86/kvm/hyper-v: recommend using eVMCS only when it is enabled
x86/kvm/hyper-v: don't recommend doing reset via synthetic MSR
kvm: x86/vmx: Use kzalloc for cached_vmcs12
KVM: VMX: Use the correct field var when clearing VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL
KVM: x86: Fix single-step debugging
x86/kvm/hyper-v: don't announce GUEST IDLE MSR support
+130
-115
+5
-2
arch/x86/kernel/kvm.c
+5
-2
arch/x86/kernel/kvm.c
···
457
457
#else
458
458
u64 ipi_bitmap = 0;
459
459
#endif
460
+
long ret;
460
461
461
462
if (cpumask_empty(mask))
462
463
return;
···
483
482
} else if (apic_id < min + KVM_IPI_CLUSTER_SIZE) {
484
483
max = apic_id < max ? max : apic_id;
485
484
} else {
486
-
kvm_hypercall4(KVM_HC_SEND_IPI, (unsigned long)ipi_bitmap,
485
+
ret = kvm_hypercall4(KVM_HC_SEND_IPI, (unsigned long)ipi_bitmap,
487
486
(unsigned long)(ipi_bitmap >> BITS_PER_LONG), min, icr);
487
+
WARN_ONCE(ret < 0, "KVM: failed to send PV IPI: %ld", ret);
488
488
min = max = apic_id;
489
489
ipi_bitmap = 0;
490
490
}
···
493
491
}
494
492
495
493
if (ipi_bitmap) {
496
-
kvm_hypercall4(KVM_HC_SEND_IPI, (unsigned long)ipi_bitmap,
494
+
ret = kvm_hypercall4(KVM_HC_SEND_IPI, (unsigned long)ipi_bitmap,
497
495
(unsigned long)(ipi_bitmap >> BITS_PER_LONG), min, icr);
496
+
WARN_ONCE(ret < 0, "KVM: failed to send PV IPI: %ld", ret);
498
497
}
499
498
500
499
local_irq_restore(flags);
-4
arch/x86/kvm/Makefile
-4
arch/x86/kvm/Makefile
+3
-4
arch/x86/kvm/hyperv.c
+3
-4
arch/x86/kvm/hyperv.c
···
1636
1636
ret = kvm_hvcall_signal_event(vcpu, fast, ingpa);
1637
1637
if (ret != HV_STATUS_INVALID_PORT_ID)
1638
1638
break;
1639
-
/* maybe userspace knows this conn_id: fall through */
1639
+
/* fall through - maybe userspace knows this conn_id. */
1640
1640
case HVCALL_POST_MESSAGE:
1641
1641
/* don't bother userspace if it has no way to handle it */
1642
1642
if (unlikely(rep || !vcpu_to_synic(vcpu)->active)) {
···
1832
1832
ent->eax |= HV_X64_MSR_VP_INDEX_AVAILABLE;
1833
1833
ent->eax |= HV_X64_MSR_RESET_AVAILABLE;
1834
1834
ent->eax |= HV_MSR_REFERENCE_TSC_AVAILABLE;
1835
-
ent->eax |= HV_X64_MSR_GUEST_IDLE_AVAILABLE;
1836
1835
ent->eax |= HV_X64_ACCESS_FREQUENCY_MSRS;
1837
1836
ent->eax |= HV_X64_ACCESS_REENLIGHTENMENT;
1838
1837
···
1847
1848
case HYPERV_CPUID_ENLIGHTMENT_INFO:
1848
1849
ent->eax |= HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED;
1849
1850
ent->eax |= HV_X64_APIC_ACCESS_RECOMMENDED;
1850
-
ent->eax |= HV_X64_SYSTEM_RESET_RECOMMENDED;
1851
1851
ent->eax |= HV_X64_RELAXED_TIMING_RECOMMENDED;
1852
1852
ent->eax |= HV_X64_CLUSTER_IPI_RECOMMENDED;
1853
1853
ent->eax |= HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED;
1854
-
ent->eax |= HV_X64_ENLIGHTENED_VMCS_RECOMMENDED;
1854
+
if (evmcs_ver)
1855
+
ent->eax |= HV_X64_ENLIGHTENED_VMCS_RECOMMENDED;
1855
1856
1856
1857
/*
1857
1858
* Default number of spinlock retry attempts, matches
+2
arch/x86/kvm/lapic.c
+2
arch/x86/kvm/lapic.c
···
1035
1035
switch (delivery_mode) {
1036
1036
case APIC_DM_LOWEST:
1037
1037
vcpu->arch.apic_arb_prio++;
1038
+
/* fall through */
1038
1039
case APIC_DM_FIXED:
1039
1040
if (unlikely(trig_mode && !level))
1040
1041
break;
···
1875
1874
1876
1875
case APIC_LVT0:
1877
1876
apic_manage_nmi_watchdog(apic, val);
1877
+
/* fall through */
1878
1878
case APIC_LVTTHMR:
1879
1879
case APIC_LVTPC:
1880
1880
case APIC_LVT1:
+1
arch/x86/kvm/mmu.c
+1
arch/x86/kvm/mmu.c
+15
-16
arch/x86/kvm/svm.c
+15
-16
arch/x86/kvm/svm.c
···
3414
3414
kvm_mmu_reset_context(&svm->vcpu);
3415
3415
kvm_mmu_load(&svm->vcpu);
3416
3416
3417
+
/*
3418
+
* Drop what we picked up for L2 via svm_complete_interrupts() so it
3419
+
* doesn't end up in L1.
3420
+
*/
3421
+
svm->vcpu.arch.nmi_injected = false;
3422
+
kvm_clear_exception_queue(&svm->vcpu);
3423
+
kvm_clear_interrupt_queue(&svm->vcpu);
3424
+
3417
3425
return 0;
3418
3426
}
3419
3427
···
4403
4395
case MSR_IA32_APICBASE:
4404
4396
if (kvm_vcpu_apicv_active(vcpu))
4405
4397
avic_update_vapic_bar(to_svm(vcpu), data);
4406
-
/* Follow through */
4398
+
/* Fall through */
4407
4399
default:
4408
4400
return kvm_set_msr_common(vcpu, msr);
4409
4401
}
···
4512
4504
kvm_lapic_reg_write(apic, APIC_ICR, icrl);
4513
4505
break;
4514
4506
case AVIC_IPI_FAILURE_TARGET_NOT_RUNNING: {
4515
-
int i;
4516
-
struct kvm_vcpu *vcpu;
4517
-
struct kvm *kvm = svm->vcpu.kvm;
4518
4507
struct kvm_lapic *apic = svm->vcpu.arch.apic;
4519
4508
4520
4509
/*
4521
-
* At this point, we expect that the AVIC HW has already
4522
-
* set the appropriate IRR bits on the valid target
4523
-
* vcpus. So, we just need to kick the appropriate vcpu.
4510
+
* Update ICR high and low, then emulate sending IPI,
4511
+
* which is handled when writing APIC_ICR.
4524
4512
*/
4525
-
kvm_for_each_vcpu(i, vcpu, kvm) {
4526
-
bool m = kvm_apic_match_dest(vcpu, apic,
4527
-
icrl & KVM_APIC_SHORT_MASK,
4528
-
GET_APIC_DEST_FIELD(icrh),
4529
-
icrl & KVM_APIC_DEST_MASK);
4530
-
4531
-
if (m && !avic_vcpu_is_running(vcpu))
4532
-
kvm_vcpu_wake_up(vcpu);
4533
-
}
4513
+
kvm_lapic_reg_write(apic, APIC_ICR2, icrh);
4514
+
kvm_lapic_reg_write(apic, APIC_ICR, icrl);
4534
4515
break;
4535
4516
}
4536
4517
case AVIC_IPI_FAILURE_INVALID_TARGET:
4518
+
WARN_ONCE(1, "Invalid IPI target: index=%u, vcpu=%d, icr=%#0x:%#0x\n",
4519
+
index, svm->vcpu.vcpu_id, icrh, icrl);
4537
4520
break;
4538
4521
case AVIC_IPI_FAILURE_INVALID_BACKING_PAGE:
4539
4522
WARN_ONCE(1, "Invalid backing page\n");
+1
-1
arch/x86/kvm/trace.h
+1
-1
arch/x86/kvm/trace.h
+4
-3
arch/x86/kvm/vmx/evmcs.c
+4
-3
arch/x86/kvm/vmx/evmcs.c
···
332
332
uint16_t *vmcs_version)
333
333
{
334
334
struct vcpu_vmx *vmx = to_vmx(vcpu);
335
+
bool evmcs_already_enabled = vmx->nested.enlightened_vmcs_enabled;
336
+
337
+
vmx->nested.enlightened_vmcs_enabled = true;
335
338
336
339
if (vmcs_version)
337
340
*vmcs_version = nested_get_evmcs_version(vcpu);
338
341
339
342
/* We don't support disabling the feature for simplicity. */
340
-
if (vmx->nested.enlightened_vmcs_enabled)
343
+
if (evmcs_already_enabled)
341
344
return 0;
342
-
343
-
vmx->nested.enlightened_vmcs_enabled = true;
344
345
345
346
vmx->nested.msrs.pinbased_ctls_high &= ~EVMCS1_UNSUPPORTED_PINCTRL;
346
347
vmx->nested.msrs.entry_ctls_high &= ~EVMCS1_UNSUPPORTED_VMENTRY_CTRL;
+9
-5
arch/x86/kvm/vmx/nested.c
+9
-5
arch/x86/kvm/vmx/nested.c
···
55
55
static int max_shadow_read_write_fields =
56
56
ARRAY_SIZE(shadow_read_write_fields);
57
57
58
-
void init_vmcs_shadow_fields(void)
58
+
static void init_vmcs_shadow_fields(void)
59
59
{
60
60
int i, j;
61
61
···
4140
4140
if (r < 0)
4141
4141
goto out_vmcs02;
4142
4142
4143
-
vmx->nested.cached_vmcs12 = kmalloc(VMCS12_SIZE, GFP_KERNEL);
4143
+
vmx->nested.cached_vmcs12 = kzalloc(VMCS12_SIZE, GFP_KERNEL);
4144
4144
if (!vmx->nested.cached_vmcs12)
4145
4145
goto out_cached_vmcs12;
4146
4146
4147
-
vmx->nested.cached_shadow_vmcs12 = kmalloc(VMCS12_SIZE, GFP_KERNEL);
4147
+
vmx->nested.cached_shadow_vmcs12 = kzalloc(VMCS12_SIZE, GFP_KERNEL);
4148
4148
if (!vmx->nested.cached_shadow_vmcs12)
4149
4149
goto out_cached_shadow_vmcs12;
4150
4150
···
5263
5263
copy_shadow_to_vmcs12(vmx);
5264
5264
}
5265
5265
5266
-
if (copy_to_user(user_kvm_nested_state->data, vmcs12, sizeof(*vmcs12)))
5266
+
/*
5267
+
* Copy over the full allocated size of vmcs12 rather than just the size
5268
+
* of the struct.
5269
+
*/
5270
+
if (copy_to_user(user_kvm_nested_state->data, vmcs12, VMCS12_SIZE))
5267
5271
return -EFAULT;
5268
5272
5269
5273
if (nested_cpu_has_shadow_vmcs(vmcs12) &&
5270
5274
vmcs12->vmcs_link_pointer != -1ull) {
5271
5275
if (copy_to_user(user_kvm_nested_state->data + VMCS12_SIZE,
5272
-
get_shadow_vmcs12(vcpu), sizeof(*vmcs12)))
5276
+
get_shadow_vmcs12(vcpu), VMCS12_SIZE))
5273
5277
return -EFAULT;
5274
5278
}
5275
5279
+77
-70
arch/x86/kvm/vmx/vmx.c
+77
-70
arch/x86/kvm/vmx/vmx.c
···
423
423
to_kvm_vmx(kvm)->ept_pointers_match = EPT_POINTERS_MATCH;
424
424
}
425
425
426
-
int kvm_fill_hv_flush_list_func(struct hv_guest_mapping_flush_list *flush,
426
+
static int kvm_fill_hv_flush_list_func(struct hv_guest_mapping_flush_list *flush,
427
427
void *data)
428
428
{
429
429
struct kvm_tlb_range *range = data;
···
1773
1773
if (!msr_info->host_initiated &&
1774
1774
!guest_cpuid_has(vcpu, X86_FEATURE_RDTSCP))
1775
1775
return 1;
1776
-
/* Otherwise falls through */
1776
+
/* Else, falls through */
1777
1777
default:
1778
1778
msr = find_msr_entry(vmx, msr_info->index);
1779
1779
if (msr) {
···
2014
2014
/* Check reserved bit, higher 32 bits should be zero */
2015
2015
if ((data >> 32) != 0)
2016
2016
return 1;
2017
-
/* Otherwise falls through */
2017
+
/* Else, falls through */
2018
2018
default:
2019
2019
msr = find_msr_entry(vmx, msr_index);
2020
2020
if (msr) {
···
2344
2344
case 37: /* AAT100 */
2345
2345
case 44: /* BC86,AAY89,BD102 */
2346
2346
case 46: /* BA97 */
2347
-
_vmexit_control &= ~VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL;
2347
+
_vmentry_control &= ~VM_ENTRY_LOAD_IA32_PERF_GLOBAL_CTRL;
2348
2348
_vmexit_control &= ~VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL;
2349
2349
pr_warn_once("kvm: VM_EXIT_LOAD_IA32_PERF_GLOBAL_CTRL "
2350
2350
"does not work properly. Using workaround\n");
···
6362
6362
vmx->loaded_vmcs->hv_timer_armed = false;
6363
6363
}
6364
6364
6365
-
static void vmx_vcpu_run(struct kvm_vcpu *vcpu)
6365
+
static void __vmx_vcpu_run(struct kvm_vcpu *vcpu, struct vcpu_vmx *vmx)
6366
6366
{
6367
-
struct vcpu_vmx *vmx = to_vmx(vcpu);
6368
-
unsigned long cr3, cr4, evmcs_rsp;
6369
-
6370
-
/* Record the guest's net vcpu time for enforced NMI injections. */
6371
-
if (unlikely(!enable_vnmi &&
6372
-
vmx->loaded_vmcs->soft_vnmi_blocked))
6373
-
vmx->loaded_vmcs->entry_time = ktime_get();
6374
-
6375
-
/* Don't enter VMX if guest state is invalid, let the exit handler
6376
-
start emulation until we arrive back to a valid state */
6377
-
if (vmx->emulation_required)
6378
-
return;
6379
-
6380
-
if (vmx->ple_window_dirty) {
6381
-
vmx->ple_window_dirty = false;
6382
-
vmcs_write32(PLE_WINDOW, vmx->ple_window);
6383
-
}
6384
-
6385
-
if (vmx->nested.need_vmcs12_sync)
6386
-
nested_sync_from_vmcs12(vcpu);
6387
-
6388
-
if (test_bit(VCPU_REGS_RSP, (unsigned long *)&vcpu->arch.regs_dirty))
6389
-
vmcs_writel(GUEST_RSP, vcpu->arch.regs[VCPU_REGS_RSP]);
6390
-
if (test_bit(VCPU_REGS_RIP, (unsigned long *)&vcpu->arch.regs_dirty))
6391
-
vmcs_writel(GUEST_RIP, vcpu->arch.regs[VCPU_REGS_RIP]);
6392
-
6393
-
cr3 = __get_current_cr3_fast();
6394
-
if (unlikely(cr3 != vmx->loaded_vmcs->host_state.cr3)) {
6395
-
vmcs_writel(HOST_CR3, cr3);
6396
-
vmx->loaded_vmcs->host_state.cr3 = cr3;
6397
-
}
6398
-
6399
-
cr4 = cr4_read_shadow();
6400
-
if (unlikely(cr4 != vmx->loaded_vmcs->host_state.cr4)) {
6401
-
vmcs_writel(HOST_CR4, cr4);
6402
-
vmx->loaded_vmcs->host_state.cr4 = cr4;
6403
-
}
6404
-
6405
-
/* When single-stepping over STI and MOV SS, we must clear the
6406
-
* corresponding interruptibility bits in the guest state. Otherwise
6407
-
* vmentry fails as it then expects bit 14 (BS) in pending debug
6408
-
* exceptions being set, but that's not correct for the guest debugging
6409
-
* case. */
6410
-
if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6411
-
vmx_set_interrupt_shadow(vcpu, 0);
6412
-
6413
-
if (static_cpu_has(X86_FEATURE_PKU) &&
6414
-
kvm_read_cr4_bits(vcpu, X86_CR4_PKE) &&
6415
-
vcpu->arch.pkru != vmx->host_pkru)
6416
-
__write_pkru(vcpu->arch.pkru);
6417
-
6418
-
pt_guest_enter(vmx);
6419
-
6420
-
atomic_switch_perf_msrs(vmx);
6421
-
6422
-
vmx_update_hv_timer(vcpu);
6423
-
6424
-
/*
6425
-
* If this vCPU has touched SPEC_CTRL, restore the guest's value if
6426
-
* it's non-zero. Since vmentry is serialising on affected CPUs, there
6427
-
* is no need to worry about the conditional branch over the wrmsr
6428
-
* being speculatively taken.
6429
-
*/
6430
-
x86_spec_ctrl_set_guest(vmx->spec_ctrl, 0);
6367
+
unsigned long evmcs_rsp;
6431
6368
6432
6369
vmx->__launched = vmx->loaded_vmcs->launched;
6433
6370
···
6504
6567
, "eax", "ebx", "edi"
6505
6568
#endif
6506
6569
);
6570
+
}
6571
+
STACK_FRAME_NON_STANDARD(__vmx_vcpu_run);
6572
+
6573
+
static void vmx_vcpu_run(struct kvm_vcpu *vcpu)
6574
+
{
6575
+
struct vcpu_vmx *vmx = to_vmx(vcpu);
6576
+
unsigned long cr3, cr4;
6577
+
6578
+
/* Record the guest's net vcpu time for enforced NMI injections. */
6579
+
if (unlikely(!enable_vnmi &&
6580
+
vmx->loaded_vmcs->soft_vnmi_blocked))
6581
+
vmx->loaded_vmcs->entry_time = ktime_get();
6582
+
6583
+
/* Don't enter VMX if guest state is invalid, let the exit handler
6584
+
start emulation until we arrive back to a valid state */
6585
+
if (vmx->emulation_required)
6586
+
return;
6587
+
6588
+
if (vmx->ple_window_dirty) {
6589
+
vmx->ple_window_dirty = false;
6590
+
vmcs_write32(PLE_WINDOW, vmx->ple_window);
6591
+
}
6592
+
6593
+
if (vmx->nested.need_vmcs12_sync)
6594
+
nested_sync_from_vmcs12(vcpu);
6595
+
6596
+
if (test_bit(VCPU_REGS_RSP, (unsigned long *)&vcpu->arch.regs_dirty))
6597
+
vmcs_writel(GUEST_RSP, vcpu->arch.regs[VCPU_REGS_RSP]);
6598
+
if (test_bit(VCPU_REGS_RIP, (unsigned long *)&vcpu->arch.regs_dirty))
6599
+
vmcs_writel(GUEST_RIP, vcpu->arch.regs[VCPU_REGS_RIP]);
6600
+
6601
+
cr3 = __get_current_cr3_fast();
6602
+
if (unlikely(cr3 != vmx->loaded_vmcs->host_state.cr3)) {
6603
+
vmcs_writel(HOST_CR3, cr3);
6604
+
vmx->loaded_vmcs->host_state.cr3 = cr3;
6605
+
}
6606
+
6607
+
cr4 = cr4_read_shadow();
6608
+
if (unlikely(cr4 != vmx->loaded_vmcs->host_state.cr4)) {
6609
+
vmcs_writel(HOST_CR4, cr4);
6610
+
vmx->loaded_vmcs->host_state.cr4 = cr4;
6611
+
}
6612
+
6613
+
/* When single-stepping over STI and MOV SS, we must clear the
6614
+
* corresponding interruptibility bits in the guest state. Otherwise
6615
+
* vmentry fails as it then expects bit 14 (BS) in pending debug
6616
+
* exceptions being set, but that's not correct for the guest debugging
6617
+
* case. */
6618
+
if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6619
+
vmx_set_interrupt_shadow(vcpu, 0);
6620
+
6621
+
if (static_cpu_has(X86_FEATURE_PKU) &&
6622
+
kvm_read_cr4_bits(vcpu, X86_CR4_PKE) &&
6623
+
vcpu->arch.pkru != vmx->host_pkru)
6624
+
__write_pkru(vcpu->arch.pkru);
6625
+
6626
+
pt_guest_enter(vmx);
6627
+
6628
+
atomic_switch_perf_msrs(vmx);
6629
+
6630
+
vmx_update_hv_timer(vcpu);
6631
+
6632
+
/*
6633
+
* If this vCPU has touched SPEC_CTRL, restore the guest's value if
6634
+
* it's non-zero. Since vmentry is serialising on affected CPUs, there
6635
+
* is no need to worry about the conditional branch over the wrmsr
6636
+
* being speculatively taken.
6637
+
*/
6638
+
x86_spec_ctrl_set_guest(vmx->spec_ctrl, 0);
6639
+
6640
+
__vmx_vcpu_run(vcpu, vmx);
6507
6641
6508
6642
/*
6509
6643
* We do not use IBRS in the kernel. If this vCPU has used the
···
6656
6648
vmx_recover_nmi_blocking(vmx);
6657
6649
vmx_complete_interrupts(vmx);
6658
6650
}
6659
-
STACK_FRAME_NON_STANDARD(vmx_vcpu_run);
6660
6651
6661
6652
static struct kvm *vmx_vm_alloc(void)
6662
6653
{
+5
-3
arch/x86/kvm/x86.c
+5
-3
arch/x86/kvm/x86.c
···
3834
3834
case KVM_CAP_HYPERV_SYNIC2:
3835
3835
if (cap->args[0])
3836
3836
return -EINVAL;
3837
+
/* fall through */
3838
+
3837
3839
case KVM_CAP_HYPERV_SYNIC:
3838
3840
if (!irqchip_in_kernel(vcpu->kvm))
3839
3841
return -EINVAL;
···
6482
6480
toggle_interruptibility(vcpu, ctxt->interruptibility);
6483
6481
vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6484
6482
kvm_rip_write(vcpu, ctxt->eip);
6485
-
if (r == EMULATE_DONE &&
6486
-
(ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
6483
+
if (r == EMULATE_DONE && ctxt->tf)
6487
6484
kvm_vcpu_do_singlestep(vcpu, &r);
6488
6485
if (!ctxt->have_exception ||
6489
6486
exception_type(ctxt->exception.vector) == EXCPT_TRAP)
···
7094
7093
case KVM_HC_CLOCK_PAIRING:
7095
7094
ret = kvm_pv_clock_pairing(vcpu, a0, a1);
7096
7095
break;
7096
+
#endif
7097
7097
case KVM_HC_SEND_IPI:
7098
7098
ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
7099
7099
break;
7100
-
#endif
7101
7100
default:
7102
7101
ret = -KVM_ENOSYS;
7103
7102
break;
···
7938
7937
vcpu->arch.pv.pv_unhalted = false;
7939
7938
vcpu->arch.mp_state =
7940
7939
KVM_MP_STATE_RUNNABLE;
7940
+
/* fall through */
7941
7941
case KVM_MP_STATE_RUNNABLE:
7942
7942
vcpu->arch.apf.halted = false;
7943
7943
break;
+2
-7
tools/testing/selftests/kvm/lib/kvm_util.c
+2
-7
tools/testing/selftests/kvm/lib/kvm_util.c
···
571
571
* already exist.
572
572
*/
573
573
region = (struct userspace_mem_region *) userspace_mem_region_find(
574
-
vm, guest_paddr, guest_paddr + npages * vm->page_size);
574
+
vm, guest_paddr, (guest_paddr + npages * vm->page_size) - 1);
575
575
if (region != NULL)
576
576
TEST_ASSERT(false, "overlapping userspace_mem_region already "
577
577
"exists\n"
···
587
587
region = region->next) {
588
588
if (region->region.slot == slot)
589
589
break;
590
-
if ((guest_paddr <= (region->region.guest_phys_addr
591
-
+ region->region.memory_size))
592
-
&& ((guest_paddr + npages * vm->page_size)
593
-
>= region->region.guest_phys_addr))
594
-
break;
595
590
}
596
591
if (region != NULL)
597
592
TEST_ASSERT(false, "A mem region with the requested slot "
598
-
"or overlapping physical memory range already exists.\n"
593
+
"already exists.\n"
599
594
" requested slot: %u paddr: 0x%lx npages: 0x%lx\n"
600
595
" existing slot: %u paddr: 0x%lx size: 0x%lx",
601
596
slot, guest_paddr, npages,
+6
tools/testing/selftests/kvm/x86_64/evmcs_test.c
+6
tools/testing/selftests/kvm/x86_64/evmcs_test.c
···
103
103
104
104
vcpu_ioctl(vm, VCPU_ID, KVM_ENABLE_CAP, &enable_evmcs_cap);
105
105
106
+
/* KVM should return supported EVMCS version range */
107
+
TEST_ASSERT(((evmcs_ver >> 8) >= (evmcs_ver & 0xff)) &&
108
+
(evmcs_ver & 0xff) > 0,
109
+
"Incorrect EVMCS version range: %x:%x\n",
110
+
evmcs_ver & 0xff, evmcs_ver >> 8);
111
+
106
112
run = vcpu_state(vm, VCPU_ID);
107
113
108
114
vcpu_regs_get(vm, VCPU_ID, ®s1);