Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Cross-merge networking fixes after downstream PR (net-6.17-rc8).
Conflicts:
drivers/net/can/spi/hi311x.c
6b6968084721 ("can: hi311x: fix null pointer dereference when resuming from sleep before interface was enabled")
27ce71e1ce81 ("net: WQ_PERCPU added to alloc_workqueue users")
https://lore.kernel.org/72ce7599-1b5b-464a-a5de-228ff9724701@kernel.org
net/smc/smc_loopback.c
drivers/dibs/dibs_loopback.c
a35c04de2565 ("net/smc: fix warning in smc_rx_splice() when calling get_page()")
cc21191b584c ("dibs: Move data path to dibs layer")
https://lore.kernel.org/74368a5c-48ac-4f8e-a198-40ec1ed3cf5f@kernel.org
Adjacent changes:
drivers/net/dsa/lantiq/lantiq_gswip.c
c0054b25e2f1 ("net: dsa: lantiq_gswip: move gswip_add_single_port_br() call to port_setup()")
7a1eaef0a791 ("net: dsa: lantiq_gswip: support model-specific mac_select_pcs()")
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
+2022
-811
+1
.get_maintainer.ignore
+1
.get_maintainer.ignore
+1
.mailmap
+1
.mailmap
···
623
623
Paulo Alcantara <pc@manguebit.org> <pc@manguebit.com>
624
624
Pavankumar Kondeti <quic_pkondeti@quicinc.com> <pkondeti@codeaurora.org>
625
625
Peter A Jonsson <pj@ludd.ltu.se>
626
+
Peter Hilber <peter.hilber@oss.qualcomm.com> <quic_philber@quicinc.com>
626
627
Peter Oruba <peter.oruba@amd.com>
627
628
Peter Oruba <peter@oruba.de>
628
629
Pierre-Louis Bossart <pierre-louis.bossart@linux.dev> <pierre-louis.bossart@linux.intel.com>
+1
-1
Documentation/sound/alsa-configuration.rst
+1
-1
Documentation/sound/alsa-configuration.rst
···
2293
2293
notice the need.
2294
2294
skip_validation
2295
2295
Skip unit descriptor validation (default: no).
2296
-
The option is used to ignores the validation errors with the hexdump
2296
+
The option is used to ignore the validation errors with the hexdump
2297
2297
of the unit descriptor instead of a driver probe error, so that we
2298
2298
can check its details.
2299
2299
quirk_flags
+2
-3
MAINTAINERS
+2
-3
MAINTAINERS
···
1845
1845
F: drivers/input/mouse/bcm5974.c
1846
1846
1847
1847
APPLE PCIE CONTROLLER DRIVER
1848
-
M: Alyssa Rosenzweig <alyssa@rosenzweig.io>
1849
1848
M: Marc Zyngier <maz@kernel.org>
1850
1849
L: linux-pci@vger.kernel.org
1851
1850
S: Maintained
···
2363
2364
ARM/APPLE MACHINE SUPPORT
2364
2365
M: Sven Peter <sven@kernel.org>
2365
2366
M: Janne Grunau <j@jannau.net>
2366
-
R: Alyssa Rosenzweig <alyssa@rosenzweig.io>
2367
2367
R: Neal Gompa <neal@gompa.dev>
2368
2368
L: asahi@lists.linux.dev
2369
2369
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
···
22072
22074
22073
22075
RUNTIME VERIFICATION (RV)
22074
22076
M: Steven Rostedt <rostedt@goodmis.org>
22077
+
M: Gabriele Monaco <gmonaco@redhat.com>
22075
22078
L: linux-trace-kernel@vger.kernel.org
22076
22079
S: Maintained
22077
22080
F: Documentation/trace/rv/
···
26818
26819
F: drivers/nvdimm/virtio_pmem.c
26819
26820
26820
26821
VIRTIO RTC DRIVER
26821
-
M: Peter Hilber <quic_philber@quicinc.com>
26822
+
M: Peter Hilber <peter.hilber@oss.qualcomm.com>
26822
26823
L: virtualization@lists.linux.dev
26823
26824
S: Maintained
26824
26825
F: drivers/virtio/virtio_rtc_*
+1
-1
Makefile
+1
-1
Makefile
+1
-1
arch/arm/boot/dts/allwinner/sun4i-a10-olinuxino-lime.dts
+1
-1
arch/arm/boot/dts/allwinner/sun4i-a10-olinuxino-lime.dts
···
218
218
&usbphy {
219
219
usb0_id_det-gpios = <&pio 7 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH4 */
220
220
usb0_vbus_det-gpios = <&pio 7 5 (GPIO_ACTIVE_HIGH | GPIO_PULL_UP)>; /* PH5 */
221
-
usb0_vbus-supply = <®_usb0_vbus>;
221
+
usb0_vbus-supply = <®_usb0_vbus>;
222
222
usb1_vbus-supply = <®_usb1_vbus>;
223
223
usb2_vbus-supply = <®_usb2_vbus>;
224
224
status = "okay";
+1
-1
arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi
+1
-1
arch/arm/boot/dts/allwinner/sun8i-q8-common.dtsi
+1
-1
arch/arm/boot/dts/allwinner/sun8i-r40.dtsi
+1
-1
arch/arm/boot/dts/allwinner/sun8i-r40.dtsi
+1
-1
arch/arm/boot/dts/allwinner/sun8i-v3s-netcube-kumquat.dts
+1
-1
arch/arm/boot/dts/allwinner/sun8i-v3s-netcube-kumquat.dts
+4
-2
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_sodia.dts
+4
-2
arch/arm/boot/dts/intel/socfpga/socfpga_cyclone5_sodia.dts
+1
-1
arch/arm/boot/dts/marvell/armada-370-db.dts
+1
-1
arch/arm/boot/dts/marvell/armada-370-db.dts
+1
-1
arch/arm/boot/dts/marvell/kirkwood-openrd-client.dts
+1
-1
arch/arm/boot/dts/marvell/kirkwood-openrd-client.dts
+1
-1
arch/arm/mach-imx/Kconfig
+1
-1
arch/arm/mach-imx/Kconfig
+2
-2
arch/arm64/boot/dts/freescale/imx8mp.dtsi
+2
-2
arch/arm64/boot/dts/freescale/imx8mp.dtsi
···
298
298
cpu-thermal {
299
299
polling-delay-passive = <250>;
300
300
polling-delay = <2000>;
301
-
thermal-sensors = <&tmu 0>;
301
+
thermal-sensors = <&tmu 1>;
302
302
trips {
303
303
cpu_alert0: trip0 {
304
304
temperature = <85000>;
···
331
331
soc-thermal {
332
332
polling-delay-passive = <250>;
333
333
polling-delay = <2000>;
334
-
thermal-sensors = <&tmu 1>;
334
+
thermal-sensors = <&tmu 0>;
335
335
trips {
336
336
soc_alert0: trip0 {
337
337
temperature = <85000>;
+2
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
+2
arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
+4
-3
arch/arm64/boot/dts/marvell/cn9130-cf.dtsi
+4
-3
arch/arm64/boot/dts/marvell/cn9130-cf.dtsi
···
152
152
153
153
/* SRDS #0 - SATA on M.2 connector */
154
154
&cp0_sata0 {
155
-
phys = <&cp0_comphy0 1>;
156
155
status = "okay";
157
156
158
-
/* only port 1 is available */
159
-
/delete-node/ sata-port@0;
157
+
sata-port@1 {
158
+
phys = <&cp0_comphy0 1>;
159
+
status = "okay";
160
+
};
160
161
};
161
162
162
163
/* microSD */
+4
-2
arch/arm64/boot/dts/marvell/cn9131-cf-solidwan.dts
+4
-2
arch/arm64/boot/dts/marvell/cn9131-cf-solidwan.dts
···
563
563
564
564
/* SRDS #1 - SATA on M.2 (J44) */
565
565
&cp1_sata0 {
566
-
phys = <&cp1_comphy1 0>;
567
566
status = "okay";
568
567
569
568
/* only port 0 is available */
570
-
/delete-node/ sata-port@1;
569
+
sata-port@0 {
570
+
phys = <&cp1_comphy1 0>;
571
+
status = "okay";
572
+
};
571
573
};
572
574
573
575
&cp1_syscon0 {
+16
-6
arch/arm64/boot/dts/marvell/cn9132-clearfog.dts
+16
-6
arch/arm64/boot/dts/marvell/cn9132-clearfog.dts
···
413
413
/* SRDS #0,#1,#2,#3 - PCIe */
414
414
&cp0_pcie0 {
415
415
num-lanes = <4>;
416
-
phys = <&cp0_comphy0 0>, <&cp0_comphy1 0>, <&cp0_comphy2 0>, <&cp0_comphy3 0>;
416
+
/*
417
+
* The mvebu-comphy driver does not currently know how to pass correct
418
+
* lane-count to ATF while configuring the serdes lanes.
419
+
* Rely on bootloader configuration only.
420
+
*
421
+
* phys = <&cp0_comphy0 0>, <&cp0_comphy1 0>, <&cp0_comphy2 0>, <&cp0_comphy3 0>;
422
+
*/
417
423
status = "okay";
418
424
};
419
425
···
481
475
/* SRDS #0,#1 - PCIe */
482
476
&cp1_pcie0 {
483
477
num-lanes = <2>;
484
-
phys = <&cp1_comphy0 0>, <&cp1_comphy1 0>;
478
+
/*
479
+
* The mvebu-comphy driver does not currently know how to pass correct
480
+
* lane-count to ATF while configuring the serdes lanes.
481
+
* Rely on bootloader configuration only.
482
+
*
483
+
* phys = <&cp1_comphy0 0>, <&cp1_comphy1 0>;
484
+
*/
485
485
status = "okay";
486
486
};
487
487
···
524
512
status = "okay";
525
513
526
514
/* only port 1 is available */
527
-
/delete-node/ sata-port@0;
528
-
529
515
sata-port@1 {
530
516
phys = <&cp1_comphy3 1>;
517
+
status = "okay";
531
518
};
532
519
};
533
520
···
642
631
status = "okay";
643
632
644
633
/* only port 1 is available */
645
-
/delete-node/ sata-port@0;
646
-
647
634
sata-port@1 {
635
+
status = "okay";
648
636
phys = <&cp2_comphy3 1>;
649
637
};
650
638
};
+8
arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi
+8
arch/arm64/boot/dts/marvell/cn9132-sr-cex7.dtsi
···
137
137
pinctrl-0 = <&ap_mmc0_pins>;
138
138
pinctrl-names = "default";
139
139
vqmmc-supply = <&v_1_8>;
140
+
/*
141
+
* Not stable in HS modes - phy needs "more calibration", so disable
142
+
* UHS (by preventing voltage switch), SDR104, SDR50 and DDR50 modes.
143
+
*/
144
+
no-1-8-v;
145
+
no-sd;
146
+
no-sdio;
147
+
non-removable;
140
148
status = "okay";
141
149
};
142
150
+1
arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+1
arch/arm64/boot/dts/rockchip/rk3588-nanopc-t6.dtsi
+1
-2
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi
+1
-2
arch/arm64/boot/dts/rockchip/rk3588s-orangepi-5.dtsi
···
42
42
simple-audio-card,bitclock-master = <&masterdai>;
43
43
simple-audio-card,format = "i2s";
44
44
simple-audio-card,frame-master = <&masterdai>;
45
-
simple-audio-card,hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>;
45
+
simple-audio-card,hp-det-gpios = <&gpio1 RK_PD5 GPIO_ACTIVE_HIGH>;
46
46
simple-audio-card,mclk-fs = <256>;
47
-
simple-audio-card,pin-switches = "Headphones";
48
47
simple-audio-card,routing =
49
48
"Headphones", "LOUT1",
50
49
"Headphones", "ROUT1",
+10
-2
arch/loongarch/Kconfig
+10
-2
arch/loongarch/Kconfig
···
298
298
config CC_HAS_ANNOTATE_TABLEJUMP
299
299
def_bool $(cc-option,-mannotate-tablejump)
300
300
301
+
config RUSTC_HAS_ANNOTATE_TABLEJUMP
302
+
depends on RUST
303
+
def_bool $(rustc-option,-Cllvm-args=--loongarch-annotate-tablejump)
304
+
301
305
menu "Kernel type and options"
302
306
303
307
source "kernel/Kconfig.hz"
···
567
563
-mstrict-align build parameter to prevent unaligned accesses.
568
564
569
565
CPUs with h/w unaligned access support:
570
-
Loongson-2K2000/2K3000/3A5000/3C5000/3D5000.
566
+
Loongson-2K2000/2K3000 and all of Loongson-3 series processors
567
+
based on LoongArch.
571
568
572
569
CPUs without h/w unaligned access support:
573
-
Loongson-2K500/2K1000.
570
+
Loongson-2K0300/2K0500/2K1000.
571
+
572
+
If you want to make sure whether to support unaligned memory access
573
+
on your hardware, please read the bit 20 (UAL) of CPUCFG1 register.
574
574
575
575
This option is enabled by default to make the kernel be able to run
576
576
on all LoongArch systems. But you can disable it manually if you want
+10
-5
arch/loongarch/Makefile
+10
-5
arch/loongarch/Makefile
···
102
102
103
103
ifdef CONFIG_OBJTOOL
104
104
ifdef CONFIG_CC_HAS_ANNOTATE_TABLEJUMP
105
+
KBUILD_CFLAGS += -mannotate-tablejump
106
+
else
107
+
KBUILD_CFLAGS += -fno-jump-tables # keep compatibility with older compilers
108
+
endif
109
+
ifdef CONFIG_RUSTC_HAS_ANNOTATE_TABLEJUMP
110
+
KBUILD_RUSTFLAGS += -Cllvm-args=--loongarch-annotate-tablejump
111
+
else
112
+
KBUILD_RUSTFLAGS += -Zno-jump-tables # keep compatibility with older compilers
113
+
endif
114
+
ifdef CONFIG_LTO_CLANG
105
115
# The annotate-tablejump option can not be passed to LLVM backend when LTO is enabled.
106
116
# Ensure it is aware of linker with LTO, '--loongarch-annotate-tablejump' also needs to
107
117
# be passed via '-mllvm' to ld.lld.
108
-
KBUILD_CFLAGS += -mannotate-tablejump
109
-
ifdef CONFIG_LTO_CLANG
110
118
KBUILD_LDFLAGS += -mllvm --loongarch-annotate-tablejump
111
-
endif
112
-
else
113
-
KBUILD_CFLAGS += -fno-jump-tables # keep compatibility with older compilers
114
119
endif
115
120
endif
116
121
+3
-4
arch/loongarch/include/asm/acenv.h
+3
-4
arch/loongarch/include/asm/acenv.h
···
10
10
#ifndef _ASM_LOONGARCH_ACENV_H
11
11
#define _ASM_LOONGARCH_ACENV_H
12
12
13
-
/*
14
-
* This header is required by ACPI core, but we have nothing to fill in
15
-
* right now. Will be updated later when needed.
16
-
*/
13
+
#ifdef CONFIG_ARCH_STRICT_ALIGN
14
+
#define ACPI_MISALIGNMENT_NOT_SUPPORTED
15
+
#endif /* CONFIG_ARCH_STRICT_ALIGN */
17
16
18
17
#endif /* _ASM_LOONGARCH_ACENV_H */
+16
-4
arch/loongarch/include/asm/kvm_mmu.h
+16
-4
arch/loongarch/include/asm/kvm_mmu.h
···
16
16
*/
17
17
#define KVM_MMU_CACHE_MIN_PAGES (CONFIG_PGTABLE_LEVELS - 1)
18
18
19
+
/*
20
+
* _PAGE_MODIFIED is a SW pte bit, it records page ever written on host
21
+
* kernel, on secondary MMU it records the page writeable attribute, in
22
+
* order for fast path handling.
23
+
*/
24
+
#define KVM_PAGE_WRITEABLE _PAGE_MODIFIED
25
+
19
26
#define _KVM_FLUSH_PGTABLE 0x1
20
27
#define _KVM_HAS_PGMASK 0x2
21
28
#define kvm_pfn_pte(pfn, prot) (((pfn) << PFN_PTE_SHIFT) | pgprot_val(prot))
···
59
52
WRITE_ONCE(*ptep, val);
60
53
}
61
54
62
-
static inline int kvm_pte_write(kvm_pte_t pte) { return pte & _PAGE_WRITE; }
63
-
static inline int kvm_pte_dirty(kvm_pte_t pte) { return pte & _PAGE_DIRTY; }
64
55
static inline int kvm_pte_young(kvm_pte_t pte) { return pte & _PAGE_ACCESSED; }
65
56
static inline int kvm_pte_huge(kvm_pte_t pte) { return pte & _PAGE_HUGE; }
57
+
static inline int kvm_pte_dirty(kvm_pte_t pte) { return pte & __WRITEABLE; }
58
+
static inline int kvm_pte_writeable(kvm_pte_t pte) { return pte & KVM_PAGE_WRITEABLE; }
66
59
67
60
static inline kvm_pte_t kvm_pte_mkyoung(kvm_pte_t pte)
68
61
{
···
76
69
77
70
static inline kvm_pte_t kvm_pte_mkdirty(kvm_pte_t pte)
78
71
{
79
-
return pte | _PAGE_DIRTY;
72
+
return pte | __WRITEABLE;
80
73
}
81
74
82
75
static inline kvm_pte_t kvm_pte_mkclean(kvm_pte_t pte)
83
76
{
84
-
return pte & ~_PAGE_DIRTY;
77
+
return pte & ~__WRITEABLE;
85
78
}
86
79
87
80
static inline kvm_pte_t kvm_pte_mkhuge(kvm_pte_t pte)
···
92
85
static inline kvm_pte_t kvm_pte_mksmall(kvm_pte_t pte)
93
86
{
94
87
return pte & ~_PAGE_HUGE;
88
+
}
89
+
90
+
static inline kvm_pte_t kvm_pte_mkwriteable(kvm_pte_t pte)
91
+
{
92
+
return pte | KVM_PAGE_WRITEABLE;
95
93
}
96
94
97
95
static inline int kvm_need_flush(kvm_ptw_ctx *ctx)
+3
-1
arch/loongarch/kernel/env.c
+3
-1
arch/loongarch/kernel/env.c
···
86
86
static ssize_t boardinfo_show(struct kobject *kobj,
87
87
struct kobj_attribute *attr, char *buf)
88
88
{
89
-
return sprintf(buf,
89
+
return sysfs_emit(buf,
90
90
"BIOS Information\n"
91
91
"Vendor\t\t\t: %s\n"
92
92
"Version\t\t\t: %s\n"
···
109
109
struct kobject *loongson_kobj;
110
110
111
111
loongson_kobj = kobject_create_and_add("loongson", firmware_kobj);
112
+
if (!loongson_kobj)
113
+
return -ENOMEM;
112
114
113
115
return sysfs_create_file(loongson_kobj, &boardinfo_attr.attr);
114
116
}
+2
-1
arch/loongarch/kernel/stacktrace.c
+2
-1
arch/loongarch/kernel/stacktrace.c
···
51
51
if (task == current) {
52
52
regs->regs[3] = (unsigned long)__builtin_frame_address(0);
53
53
regs->csr_era = (unsigned long)__builtin_return_address(0);
54
+
regs->regs[22] = 0;
54
55
} else {
55
56
regs->regs[3] = thread_saved_fp(task);
56
57
regs->csr_era = thread_saved_ra(task);
58
+
regs->regs[22] = task->thread.reg22;
57
59
}
58
60
regs->regs[1] = 0;
59
-
regs->regs[22] = 0;
60
61
61
62
for (unwind_start(&state, task, regs);
62
63
!unwind_done(&state) && !unwind_error(&state); unwind_next_frame(&state)) {
+3
arch/loongarch/kernel/vdso.c
+3
arch/loongarch/kernel/vdso.c
···
54
54
vdso_info.code_mapping.pages =
55
55
kcalloc(vdso_info.size / PAGE_SIZE, sizeof(struct page *), GFP_KERNEL);
56
56
57
+
if (!vdso_info.code_mapping.pages)
58
+
return -ENOMEM;
59
+
57
60
pfn = __phys_to_pfn(__pa_symbol(vdso_info.vdso));
58
61
for (i = 0; i < vdso_info.size / PAGE_SIZE; i++)
59
62
vdso_info.code_mapping.pages[i] = pfn_to_page(pfn + i);
+2
-4
arch/loongarch/kvm/exit.c
+2
-4
arch/loongarch/kvm/exit.c
+53
-34
arch/loongarch/kvm/intc/eiointc.c
+53
-34
arch/loongarch/kvm/intc/eiointc.c
···
426
426
struct loongarch_eiointc *s = dev->kvm->arch.eiointc;
427
427
428
428
data = (void __user *)attr->addr;
429
+
switch (type) {
430
+
case KVM_DEV_LOONGARCH_EXTIOI_CTRL_INIT_NUM_CPU:
431
+
case KVM_DEV_LOONGARCH_EXTIOI_CTRL_INIT_FEATURE:
432
+
if (copy_from_user(&val, data, 4))
433
+
return -EFAULT;
434
+
break;
435
+
default:
436
+
break;
437
+
}
438
+
429
439
spin_lock_irqsave(&s->lock, flags);
430
440
switch (type) {
431
441
case KVM_DEV_LOONGARCH_EXTIOI_CTRL_INIT_NUM_CPU:
432
-
if (copy_from_user(&val, data, 4))
433
-
ret = -EFAULT;
434
-
else {
435
-
if (val >= EIOINTC_ROUTE_MAX_VCPUS)
436
-
ret = -EINVAL;
437
-
else
438
-
s->num_cpu = val;
439
-
}
442
+
if (val >= EIOINTC_ROUTE_MAX_VCPUS)
443
+
ret = -EINVAL;
444
+
else
445
+
s->num_cpu = val;
440
446
break;
441
447
case KVM_DEV_LOONGARCH_EXTIOI_CTRL_INIT_FEATURE:
442
-
if (copy_from_user(&s->features, data, 4))
443
-
ret = -EFAULT;
448
+
s->features = val;
444
449
if (!(s->features & BIT(EIOINTC_HAS_VIRT_EXTENSION)))
445
450
s->status |= BIT(EIOINTC_ENABLE);
446
451
break;
···
467
462
468
463
static int kvm_eiointc_regs_access(struct kvm_device *dev,
469
464
struct kvm_device_attr *attr,
470
-
bool is_write)
465
+
bool is_write, int *data)
471
466
{
472
467
int addr, cpu, offset, ret = 0;
473
468
unsigned long flags;
474
469
void *p = NULL;
475
-
void __user *data;
476
470
struct loongarch_eiointc *s;
477
471
478
472
s = dev->kvm->arch.eiointc;
479
473
addr = attr->attr;
480
474
cpu = addr >> 16;
481
475
addr &= 0xffff;
482
-
data = (void __user *)attr->addr;
483
476
switch (addr) {
484
477
case EIOINTC_NODETYPE_START ... EIOINTC_NODETYPE_END:
485
478
offset = (addr - EIOINTC_NODETYPE_START) / 4;
···
516
513
}
517
514
518
515
spin_lock_irqsave(&s->lock, flags);
519
-
if (is_write) {
520
-
if (copy_from_user(p, data, 4))
521
-
ret = -EFAULT;
522
-
} else {
523
-
if (copy_to_user(data, p, 4))
524
-
ret = -EFAULT;
525
-
}
516
+
if (is_write)
517
+
memcpy(p, data, 4);
518
+
else
519
+
memcpy(data, p, 4);
526
520
spin_unlock_irqrestore(&s->lock, flags);
527
521
528
522
return ret;
···
527
527
528
528
static int kvm_eiointc_sw_status_access(struct kvm_device *dev,
529
529
struct kvm_device_attr *attr,
530
-
bool is_write)
530
+
bool is_write, int *data)
531
531
{
532
532
int addr, ret = 0;
533
533
unsigned long flags;
534
534
void *p = NULL;
535
-
void __user *data;
536
535
struct loongarch_eiointc *s;
537
536
538
537
s = dev->kvm->arch.eiointc;
539
538
addr = attr->attr;
540
539
addr &= 0xffff;
541
540
542
-
data = (void __user *)attr->addr;
543
541
switch (addr) {
544
542
case KVM_DEV_LOONGARCH_EXTIOI_SW_STATUS_NUM_CPU:
545
543
if (is_write)
···
559
561
return -EINVAL;
560
562
}
561
563
spin_lock_irqsave(&s->lock, flags);
562
-
if (is_write) {
563
-
if (copy_from_user(p, data, 4))
564
-
ret = -EFAULT;
565
-
} else {
566
-
if (copy_to_user(data, p, 4))
567
-
ret = -EFAULT;
568
-
}
564
+
if (is_write)
565
+
memcpy(p, data, 4);
566
+
else
567
+
memcpy(data, p, 4);
569
568
spin_unlock_irqrestore(&s->lock, flags);
570
569
571
570
return ret;
···
571
576
static int kvm_eiointc_get_attr(struct kvm_device *dev,
572
577
struct kvm_device_attr *attr)
573
578
{
579
+
int ret, data;
580
+
574
581
switch (attr->group) {
575
582
case KVM_DEV_LOONGARCH_EXTIOI_GRP_REGS:
576
-
return kvm_eiointc_regs_access(dev, attr, false);
583
+
ret = kvm_eiointc_regs_access(dev, attr, false, &data);
584
+
if (ret)
585
+
return ret;
586
+
587
+
if (copy_to_user((void __user *)attr->addr, &data, 4))
588
+
ret = -EFAULT;
589
+
590
+
return ret;
577
591
case KVM_DEV_LOONGARCH_EXTIOI_GRP_SW_STATUS:
578
-
return kvm_eiointc_sw_status_access(dev, attr, false);
592
+
ret = kvm_eiointc_sw_status_access(dev, attr, false, &data);
593
+
if (ret)
594
+
return ret;
595
+
596
+
if (copy_to_user((void __user *)attr->addr, &data, 4))
597
+
ret = -EFAULT;
598
+
599
+
return ret;
579
600
default:
580
601
return -EINVAL;
581
602
}
···
600
589
static int kvm_eiointc_set_attr(struct kvm_device *dev,
601
590
struct kvm_device_attr *attr)
602
591
{
592
+
int data;
593
+
603
594
switch (attr->group) {
604
595
case KVM_DEV_LOONGARCH_EXTIOI_GRP_CTRL:
605
596
return kvm_eiointc_ctrl_access(dev, attr);
606
597
case KVM_DEV_LOONGARCH_EXTIOI_GRP_REGS:
607
-
return kvm_eiointc_regs_access(dev, attr, true);
598
+
if (copy_from_user(&data, (void __user *)attr->addr, 4))
599
+
return -EFAULT;
600
+
601
+
return kvm_eiointc_regs_access(dev, attr, true, &data);
608
602
case KVM_DEV_LOONGARCH_EXTIOI_GRP_SW_STATUS:
609
-
return kvm_eiointc_sw_status_access(dev, attr, true);
603
+
if (copy_from_user(&data, (void __user *)attr->addr, 4))
604
+
return -EFAULT;
605
+
606
+
return kvm_eiointc_sw_status_access(dev, attr, true, &data);
610
607
default:
611
608
return -EINVAL;
612
609
}
+14
-7
arch/loongarch/kvm/intc/pch_pic.c
+14
-7
arch/loongarch/kvm/intc/pch_pic.c
···
348
348
struct kvm_device_attr *attr,
349
349
bool is_write)
350
350
{
351
+
char buf[8];
351
352
int addr, offset, len = 8, ret = 0;
352
353
void __user *data;
353
354
void *p = NULL;
···
398
397
return -EINVAL;
399
398
}
400
399
401
-
spin_lock(&s->lock);
402
-
/* write or read value according to is_write */
403
400
if (is_write) {
404
-
if (copy_from_user(p, data, len))
405
-
ret = -EFAULT;
406
-
} else {
407
-
if (copy_to_user(data, p, len))
408
-
ret = -EFAULT;
401
+
if (copy_from_user(buf, data, len))
402
+
return -EFAULT;
409
403
}
404
+
405
+
spin_lock(&s->lock);
406
+
if (is_write)
407
+
memcpy(p, buf, len);
408
+
else
409
+
memcpy(buf, p, len);
410
410
spin_unlock(&s->lock);
411
+
412
+
if (!is_write) {
413
+
if (copy_to_user(data, buf, len))
414
+
return -EFAULT;
415
+
}
411
416
412
417
return ret;
413
418
}
+4
-4
arch/loongarch/kvm/mmu.c
+4
-4
arch/loongarch/kvm/mmu.c
···
569
569
/* Track access to pages marked old */
570
570
new = kvm_pte_mkyoung(*ptep);
571
571
if (write && !kvm_pte_dirty(new)) {
572
-
if (!kvm_pte_write(new)) {
572
+
if (!kvm_pte_writeable(new)) {
573
573
ret = -EFAULT;
574
574
goto out;
575
575
}
···
856
856
prot_bits |= _CACHE_SUC;
857
857
858
858
if (writeable) {
859
-
prot_bits |= _PAGE_WRITE;
859
+
prot_bits = kvm_pte_mkwriteable(prot_bits);
860
860
if (write)
861
-
prot_bits |= __WRITEABLE;
861
+
prot_bits = kvm_pte_mkdirty(prot_bits);
862
862
}
863
863
864
864
/* Disable dirty logging on HugePages */
···
904
904
kvm_release_faultin_page(kvm, page, false, writeable);
905
905
spin_unlock(&kvm->mmu_lock);
906
906
907
-
if (prot_bits & _PAGE_DIRTY)
907
+
if (kvm_pte_dirty(prot_bits))
908
908
mark_page_dirty_in_slot(kvm, memslot, gfn);
909
909
910
910
out:
+1
-1
arch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.dts
+1
-1
arch/riscv/boot/dts/allwinner/sun20i-d1-devterm-v3.14.dts
+5
-5
arch/s390/include/asm/pci_insn.h
+5
-5
arch/s390/include/asm/pci_insn.h
···
16
16
#define ZPCI_PCI_ST_FUNC_NOT_AVAIL 40
17
17
#define ZPCI_PCI_ST_ALREADY_IN_RQ_STATE 44
18
18
19
-
/* Load/Store return codes */
20
-
#define ZPCI_PCI_LS_OK 0
21
-
#define ZPCI_PCI_LS_ERR 1
22
-
#define ZPCI_PCI_LS_BUSY 2
23
-
#define ZPCI_PCI_LS_INVAL_HANDLE 3
19
+
/* PCI instruction condition codes */
20
+
#define ZPCI_CC_OK 0
21
+
#define ZPCI_CC_ERR 1
22
+
#define ZPCI_CC_BUSY 2
23
+
#define ZPCI_CC_INVAL_HANDLE 3
24
24
25
25
/* Load/Store address space identifiers */
26
26
#define ZPCI_PCIAS_MEMIO_0 0
+19
-19
arch/x86/include/asm/sev.h
+19
-19
arch/x86/include/asm/sev.h
···
562
562
563
563
extern struct ghcb *boot_ghcb;
564
564
565
+
static inline void sev_evict_cache(void *va, int npages)
566
+
{
567
+
volatile u8 val __always_unused;
568
+
u8 *bytes = va;
569
+
int page_idx;
570
+
571
+
/*
572
+
* For SEV guests, a read from the first/last cache-lines of a 4K page
573
+
* using the guest key is sufficient to cause a flush of all cache-lines
574
+
* associated with that 4K page without incurring all the overhead of a
575
+
* full CLFLUSH sequence.
576
+
*/
577
+
for (page_idx = 0; page_idx < npages; page_idx++) {
578
+
val = bytes[page_idx * PAGE_SIZE];
579
+
val = bytes[page_idx * PAGE_SIZE + PAGE_SIZE - 1];
580
+
}
581
+
}
582
+
565
583
#else /* !CONFIG_AMD_MEM_ENCRYPT */
566
584
567
585
#define snp_vmpl 0
···
623
605
static inline int snp_svsm_vtpm_send_command(u8 *buffer) { return -ENODEV; }
624
606
static inline void __init snp_secure_tsc_prepare(void) { }
625
607
static inline void __init snp_secure_tsc_init(void) { }
608
+
static inline void sev_evict_cache(void *va, int npages) {}
626
609
627
610
#endif /* CONFIG_AMD_MEM_ENCRYPT */
628
611
···
638
619
void snp_leak_pages(u64 pfn, unsigned int npages);
639
620
void kdump_sev_callback(void);
640
621
void snp_fixup_e820_tables(void);
641
-
642
-
static inline void sev_evict_cache(void *va, int npages)
643
-
{
644
-
volatile u8 val __always_unused;
645
-
u8 *bytes = va;
646
-
int page_idx;
647
-
648
-
/*
649
-
* For SEV guests, a read from the first/last cache-lines of a 4K page
650
-
* using the guest key is sufficient to cause a flush of all cache-lines
651
-
* associated with that 4K page without incurring all the overhead of a
652
-
* full CLFLUSH sequence.
653
-
*/
654
-
for (page_idx = 0; page_idx < npages; page_idx++) {
655
-
val = bytes[page_idx * PAGE_SIZE];
656
-
val = bytes[page_idx * PAGE_SIZE + PAGE_SIZE - 1];
657
-
}
658
-
}
659
622
#else
660
623
static inline bool snp_probe_rmptable_info(void) { return false; }
661
624
static inline int snp_rmptable_init(void) { return -ENOSYS; }
···
653
652
static inline void snp_leak_pages(u64 pfn, unsigned int npages) {}
654
653
static inline void kdump_sev_callback(void) { }
655
654
static inline void snp_fixup_e820_tables(void) {}
656
-
static inline void sev_evict_cache(void *va, int npages) {}
657
655
#endif
658
656
659
657
#endif
+9
-1
crypto/af_alg.c
+9
-1
crypto/af_alg.c
···
970
970
}
971
971
972
972
lock_sock(sk);
973
+
if (ctx->write) {
974
+
release_sock(sk);
975
+
return -EBUSY;
976
+
}
977
+
ctx->write = true;
978
+
973
979
if (ctx->init && !ctx->more) {
974
980
if (ctx->used) {
975
981
err = -EINVAL;
···
1025
1019
continue;
1026
1020
}
1027
1021
1022
+
ctx->merge = 0;
1023
+
1028
1024
if (!af_alg_writable(sk)) {
1029
1025
err = af_alg_wait_for_wmem(sk, msg->msg_flags);
1030
1026
if (err)
···
1066
1058
ctx->used += plen;
1067
1059
copied += plen;
1068
1060
size -= plen;
1069
-
ctx->merge = 0;
1070
1061
} else {
1071
1062
do {
1072
1063
struct page *pg;
···
1111
1104
1112
1105
unlock:
1113
1106
af_alg_data_wakeup(sk);
1107
+
ctx->write = false;
1114
1108
release_sock(sk);
1115
1109
1116
1110
return copied ?: err;
+1
drivers/block/drbd/drbd_nl.c
+1
drivers/block/drbd/drbd_nl.c
+6
drivers/bluetooth/Kconfig
+6
drivers/bluetooth/Kconfig
···
312
312
313
313
config BT_HCIBPA10X
314
314
tristate "HCI BPA10x USB driver"
315
+
depends on BT_HCIUART
315
316
depends on USB
317
+
select BT_HCIUART_H4
316
318
help
317
319
Bluetooth HCI BPA10x USB driver.
318
320
This driver provides support for the Digianswer BPA 100/105 Bluetooth
···
439
437
440
438
config BT_MTKUART
441
439
tristate "MediaTek HCI UART driver"
440
+
depends on BT_HCIUART
442
441
depends on SERIAL_DEV_BUS
443
442
depends on USB || !BT_HCIBTUSB_MTK
443
+
select BT_HCIUART_H4
444
444
select BT_MTK
445
445
help
446
446
MediaTek Bluetooth HCI UART driver.
···
487
483
488
484
config BT_NXPUART
489
485
tristate "NXP protocol support"
486
+
depends on BT_HCIUART
490
487
depends on SERIAL_DEV_BUS
488
+
select BT_HCIUART_H4
491
489
select CRC32
492
490
select CRC8
493
491
help
+4
-4
drivers/bluetooth/hci_uart.h
+4
-4
drivers/bluetooth/hci_uart.h
···
121
121
void hci_uart_set_speeds(struct hci_uart *hu, unsigned int init_speed,
122
122
unsigned int oper_speed);
123
123
124
-
#ifdef CONFIG_BT_HCIUART_H4
125
-
int h4_init(void);
126
-
int h4_deinit(void);
127
-
128
124
struct h4_recv_pkt {
129
125
u8 type; /* Packet type */
130
126
u8 hlen; /* Header length */
···
157
161
.loff = 2, \
158
162
.lsize = 2, \
159
163
.maxlen = HCI_MAX_FRAME_SIZE \
164
+
165
+
#ifdef CONFIG_BT_HCIUART_H4
166
+
int h4_init(void);
167
+
int h4_deinit(void);
160
168
161
169
struct sk_buff *h4_recv_buf(struct hci_dev *hdev, struct sk_buff *skb,
162
170
const unsigned char *buffer, int count,
+19
-1
drivers/clk/renesas/clk-mstp.c
+19
-1
drivers/clk/renesas/clk-mstp.c
···
303
303
pm_clk_destroy(dev);
304
304
}
305
305
306
+
static struct device_node *cpg_mstp_pd_np __initdata = NULL;
307
+
static struct generic_pm_domain *cpg_mstp_pd_genpd __initdata = NULL;
308
+
306
309
void __init cpg_mstp_add_clk_domain(struct device_node *np)
307
310
{
308
311
struct generic_pm_domain *pd;
···
327
324
pd->detach_dev = cpg_mstp_detach_dev;
328
325
pm_genpd_init(pd, &pm_domain_always_on_gov, false);
329
326
330
-
of_genpd_add_provider_simple(np, pd);
327
+
cpg_mstp_pd_np = of_node_get(np);
328
+
cpg_mstp_pd_genpd = pd;
331
329
}
330
+
331
+
static int __init cpg_mstp_pd_init_provider(void)
332
+
{
333
+
int error;
334
+
335
+
if (!cpg_mstp_pd_np)
336
+
return -ENODEV;
337
+
338
+
error = of_genpd_add_provider_simple(cpg_mstp_pd_np, cpg_mstp_pd_genpd);
339
+
340
+
of_node_put(cpg_mstp_pd_np);
341
+
return error;
342
+
}
343
+
postcore_initcall(cpg_mstp_pd_init_provider);
+1
-1
drivers/clk/sunxi-ng/ccu_mp.c
+1
-1
drivers/clk/sunxi-ng/ccu_mp.c
+11
-9
drivers/cpufreq/cpufreq.c
+11
-9
drivers/cpufreq/cpufreq.c
···
2953
2953
goto err_null_driver;
2954
2954
}
2955
2955
2956
+
/*
2957
+
* Mark support for the scheduler's frequency invariance engine for
2958
+
* drivers that implement target(), target_index() or fast_switch().
2959
+
*/
2960
+
if (!cpufreq_driver->setpolicy) {
2961
+
static_branch_enable_cpuslocked(&cpufreq_freq_invariance);
2962
+
pr_debug("cpufreq: supports frequency invariance\n");
2963
+
}
2964
+
2956
2965
ret = subsys_interface_register(&cpufreq_interface);
2957
2966
if (ret)
2958
2967
goto err_boost_unreg;
···
2983
2974
hp_online = ret;
2984
2975
ret = 0;
2985
2976
2986
-
/*
2987
-
* Mark support for the scheduler's frequency invariance engine for
2988
-
* drivers that implement target(), target_index() or fast_switch().
2989
-
*/
2990
-
if (!cpufreq_driver->setpolicy) {
2991
-
static_branch_enable_cpuslocked(&cpufreq_freq_invariance);
2992
-
pr_debug("supports frequency invariance");
2993
-
}
2994
-
2995
2977
pr_debug("driver %s up and running\n", driver_data->name);
2996
2978
goto out;
2997
2979
2998
2980
err_if_unreg:
2999
2981
subsys_interface_unregister(&cpufreq_interface);
3000
2982
err_boost_unreg:
2983
+
if (!cpufreq_driver->setpolicy)
2984
+
static_branch_disable_cpuslocked(&cpufreq_freq_invariance);
3001
2985
remove_boost_sysfs_file();
3002
2986
err_null_driver:
3003
2987
write_lock_irqsave(&cpufreq_driver_lock, flags);
+1
-1
drivers/crypto/ccp/sev-dev.c
+1
-1
drivers/crypto/ccp/sev-dev.c
+10
-5
drivers/dibs/dibs_loopback.c
+10
-5
drivers/dibs/dibs_loopback.c
···
12
12
#include <linux/bitops.h>
13
13
#include <linux/device.h>
14
14
#include <linux/dibs.h>
15
+
#include <linux/mm.h>
15
16
#include <linux/slab.h>
16
17
#include <linux/spinlock.h>
17
18
#include <linux/types.h>
···
50
49
{
51
50
struct dibs_lo_dmb_node *dmb_node, *tmp_node;
52
51
struct dibs_lo_dev *ldev;
52
+
struct folio *folio;
53
53
unsigned long flags;
54
54
int sba_idx, rc;
55
55
···
72
70
73
71
dmb_node->sba_idx = sba_idx;
74
72
dmb_node->len = dmb->dmb_len;
75
-
dmb_node->cpu_addr = kzalloc(dmb_node->len, GFP_KERNEL |
76
-
__GFP_NOWARN | __GFP_NORETRY |
77
-
__GFP_NOMEMALLOC);
78
-
if (!dmb_node->cpu_addr) {
73
+
74
+
/* not critical; fail under memory pressure and fallback to TCP */
75
+
folio = folio_alloc(GFP_KERNEL | __GFP_NOWARN | __GFP_NOMEMALLOC |
76
+
__GFP_NORETRY | __GFP_ZERO,
77
+
get_order(dmb_node->len));
78
+
if (!folio) {
79
79
rc = -ENOMEM;
80
80
goto err_node;
81
81
}
82
+
dmb_node->cpu_addr = folio_address(folio);
82
83
dmb_node->dma_addr = DIBS_DMA_ADDR_INVALID;
83
84
refcount_set(&dmb_node->refcnt, 1);
84
85
···
127
122
write_unlock_bh(&ldev->dmb_ht_lock);
128
123
129
124
clear_bit(dmb_node->sba_idx, ldev->sba_idx_mask);
130
-
kfree(dmb_node->cpu_addr);
125
+
folio_put(virt_to_folio(dmb_node->cpu_addr));
131
126
kfree(dmb_node);
132
127
133
128
if (atomic_dec_and_test(&ldev->dmb_cnt))
+1
-1
drivers/firewire/core-cdev.c
+1
-1
drivers/firewire/core-cdev.c
···
41
41
/*
42
42
* ABI version history is documented in linux/firewire-cdev.h.
43
43
*/
44
-
#define FW_CDEV_KERNEL_VERSION 5
44
+
#define FW_CDEV_KERNEL_VERSION 6
45
45
#define FW_CDEV_VERSION_EVENT_REQUEST2 4
46
46
#define FW_CDEV_VERSION_ALLOCATE_REGION_END 4
47
47
#define FW_CDEV_VERSION_AUTO_FLUSH_ISO_OVERFLOW 5
+4
-1
drivers/firmware/tegra/bpmp-tegra186.c
+4
-1
drivers/firmware/tegra/bpmp-tegra186.c
···
198
198
199
199
err = of_reserved_mem_region_to_resource(bpmp->dev->of_node, 0, &res);
200
200
if (err < 0) {
201
-
dev_warn(bpmp->dev, "failed to parse memory region: %d\n", err);
201
+
if (err != -ENODEV)
202
+
dev_warn(bpmp->dev,
203
+
"failed to parse memory region: %d\n", err);
204
+
202
205
return err;
203
206
}
204
207
+9
-2
drivers/gpio/gpiolib-acpi-core.c
+9
-2
drivers/gpio/gpiolib-acpi-core.c
···
942
942
{
943
943
struct acpi_device *adev = to_acpi_device_node(fwnode);
944
944
bool can_fallback = acpi_can_fallback_to_crs(adev, con_id);
945
-
struct acpi_gpio_info info;
945
+
struct acpi_gpio_info info = {};
946
946
struct gpio_desc *desc;
947
+
int ret;
947
948
948
949
desc = __acpi_find_gpio(fwnode, con_id, idx, can_fallback, &info);
949
950
if (IS_ERR(desc))
···
958
957
959
958
acpi_gpio_update_gpiod_flags(dflags, &info);
960
959
acpi_gpio_update_gpiod_lookup_flags(lookupflags, &info);
960
+
961
+
/* ACPI uses hundredths of milliseconds units */
962
+
ret = gpio_set_debounce_timeout(desc, info.debounce * 10);
963
+
if (ret)
964
+
return ERR_PTR(ret);
965
+
961
966
return desc;
962
967
}
963
968
···
999
992
int ret;
1000
993
1001
994
for (i = 0, idx = 0; idx <= index; i++) {
1002
-
struct acpi_gpio_info info;
995
+
struct acpi_gpio_info info = {};
1003
996
struct gpio_desc *desc;
1004
997
1005
998
/* Ignore -EPROBE_DEFER, it only matters if idx matches */
+12
drivers/gpio/gpiolib-acpi-quirks.c
+12
drivers/gpio/gpiolib-acpi-quirks.c
···
319
319
},
320
320
{
321
321
/*
322
+
* Same as G1619-04. New model.
323
+
*/
324
+
.matches = {
325
+
DMI_MATCH(DMI_SYS_VENDOR, "GPD"),
326
+
DMI_MATCH(DMI_PRODUCT_NAME, "G1619-05"),
327
+
},
328
+
.driver_data = &(struct acpi_gpiolib_dmi_quirk) {
329
+
.ignore_wake = "PNP0C50:00@8",
330
+
},
331
+
},
332
+
{
333
+
/*
322
334
* Spurious wakeups from GPIO 11
323
335
* Found in BIOS 1.04
324
336
* https://gitlab.freedesktop.org/drm/amd/-/issues/3954
+12
-4
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+12
-4
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
···
250
250
251
251
void amdgpu_amdkfd_suspend(struct amdgpu_device *adev, bool suspend_proc)
252
252
{
253
-
if (adev->kfd.dev)
254
-
kgd2kfd_suspend(adev->kfd.dev, suspend_proc);
253
+
if (adev->kfd.dev) {
254
+
if (adev->in_s0ix)
255
+
kgd2kfd_stop_sched_all_nodes(adev->kfd.dev);
256
+
else
257
+
kgd2kfd_suspend(adev->kfd.dev, suspend_proc);
258
+
}
255
259
}
256
260
257
261
int amdgpu_amdkfd_resume(struct amdgpu_device *adev, bool resume_proc)
258
262
{
259
263
int r = 0;
260
264
261
-
if (adev->kfd.dev)
262
-
r = kgd2kfd_resume(adev->kfd.dev, resume_proc);
265
+
if (adev->kfd.dev) {
266
+
if (adev->in_s0ix)
267
+
r = kgd2kfd_start_sched_all_nodes(adev->kfd.dev);
268
+
else
269
+
r = kgd2kfd_resume(adev->kfd.dev, resume_proc);
270
+
}
263
271
264
272
return r;
265
273
}
+12
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
+12
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
···
426
426
int kgd2kfd_check_and_lock_kfd(struct kfd_dev *kfd);
427
427
void kgd2kfd_unlock_kfd(struct kfd_dev *kfd);
428
428
int kgd2kfd_start_sched(struct kfd_dev *kfd, uint32_t node_id);
429
+
int kgd2kfd_start_sched_all_nodes(struct kfd_dev *kfd);
429
430
int kgd2kfd_stop_sched(struct kfd_dev *kfd, uint32_t node_id);
431
+
int kgd2kfd_stop_sched_all_nodes(struct kfd_dev *kfd);
430
432
bool kgd2kfd_compute_active(struct kfd_dev *kfd, uint32_t node_id);
431
433
bool kgd2kfd_vmfault_fast_path(struct amdgpu_device *adev, struct amdgpu_iv_entry *entry,
432
434
bool retry_fault);
···
518
516
return 0;
519
517
}
520
518
519
+
static inline int kgd2kfd_start_sched_all_nodes(struct kfd_dev *kfd)
520
+
{
521
+
return 0;
522
+
}
523
+
521
524
static inline int kgd2kfd_stop_sched(struct kfd_dev *kfd, uint32_t node_id)
525
+
{
526
+
return 0;
527
+
}
528
+
529
+
static inline int kgd2kfd_stop_sched_all_nodes(struct kfd_dev *kfd)
522
530
{
523
531
return 0;
524
532
}
+10
-14
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+10
-14
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
···
5136
5136
adev->in_suspend = true;
5137
5137
5138
5138
if (amdgpu_sriov_vf(adev)) {
5139
-
if (!adev->in_s0ix && !adev->in_runpm)
5139
+
if (!adev->in_runpm)
5140
5140
amdgpu_amdkfd_suspend_process(adev);
5141
5141
amdgpu_virt_fini_data_exchange(adev);
5142
5142
r = amdgpu_virt_request_full_gpu(adev, false);
···
5156
5156
5157
5157
amdgpu_device_ip_suspend_phase1(adev);
5158
5158
5159
-
if (!adev->in_s0ix) {
5160
-
amdgpu_amdkfd_suspend(adev, !amdgpu_sriov_vf(adev) && !adev->in_runpm);
5161
-
amdgpu_userq_suspend(adev);
5162
-
}
5159
+
amdgpu_amdkfd_suspend(adev, !amdgpu_sriov_vf(adev) && !adev->in_runpm);
5160
+
amdgpu_userq_suspend(adev);
5163
5161
5164
5162
r = amdgpu_device_evict_resources(adev);
5165
5163
if (r)
···
5252
5254
goto exit;
5253
5255
}
5254
5256
5255
-
if (!adev->in_s0ix) {
5256
-
r = amdgpu_amdkfd_resume(adev, !amdgpu_sriov_vf(adev) && !adev->in_runpm);
5257
-
if (r)
5258
-
goto exit;
5257
+
r = amdgpu_amdkfd_resume(adev, !amdgpu_sriov_vf(adev) && !adev->in_runpm);
5258
+
if (r)
5259
+
goto exit;
5259
5260
5260
-
r = amdgpu_userq_resume(adev);
5261
-
if (r)
5262
-
goto exit;
5263
-
}
5261
+
r = amdgpu_userq_resume(adev);
5262
+
if (r)
5263
+
goto exit;
5264
5264
5265
5265
r = amdgpu_device_ip_late_init(adev);
5266
5266
if (r)
···
5271
5275
amdgpu_virt_init_data_exchange(adev);
5272
5276
amdgpu_virt_release_full_gpu(adev, true);
5273
5277
5274
-
if (!adev->in_s0ix && !r && !adev->in_runpm)
5278
+
if (!r && !adev->in_runpm)
5275
5279
r = amdgpu_amdkfd_resume_process(adev);
5276
5280
}
5277
5281
+15
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+15
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
···
1654
1654
}
1655
1655
}
1656
1656
break;
1657
+
case IP_VERSION(11, 0, 1):
1658
+
case IP_VERSION(11, 0, 4):
1659
+
adev->gfx.cleaner_shader_ptr = gfx_11_0_3_cleaner_shader_hex;
1660
+
adev->gfx.cleaner_shader_size = sizeof(gfx_11_0_3_cleaner_shader_hex);
1661
+
if (adev->gfx.pfp_fw_version >= 102 &&
1662
+
adev->gfx.mec_fw_version >= 66 &&
1663
+
adev->mes.fw_version[0] >= 128) {
1664
+
adev->gfx.enable_cleaner_shader = true;
1665
+
r = amdgpu_gfx_cleaner_shader_sw_init(adev, adev->gfx.cleaner_shader_size);
1666
+
if (r) {
1667
+
adev->gfx.enable_cleaner_shader = false;
1668
+
dev_err(adev->dev, "Failed to initialize cleaner shader\n");
1669
+
}
1670
+
}
1671
+
break;
1657
1672
case IP_VERSION(11, 5, 0):
1658
1673
case IP_VERSION(11, 5, 1):
1659
1674
adev->gfx.cleaner_shader_ptr = gfx_11_0_3_cleaner_shader_hex;
+36
drivers/gpu/drm/amd/amdkfd/kfd_device.c
+36
drivers/gpu/drm/amd/amdkfd/kfd_device.c
···
1550
1550
return ret;
1551
1551
}
1552
1552
1553
+
int kgd2kfd_start_sched_all_nodes(struct kfd_dev *kfd)
1554
+
{
1555
+
struct kfd_node *node;
1556
+
int i, r;
1557
+
1558
+
if (!kfd->init_complete)
1559
+
return 0;
1560
+
1561
+
for (i = 0; i < kfd->num_nodes; i++) {
1562
+
node = kfd->nodes[i];
1563
+
r = node->dqm->ops.unhalt(node->dqm);
1564
+
if (r) {
1565
+
dev_err(kfd_device, "Error in starting scheduler\n");
1566
+
return r;
1567
+
}
1568
+
}
1569
+
return 0;
1570
+
}
1571
+
1553
1572
int kgd2kfd_stop_sched(struct kfd_dev *kfd, uint32_t node_id)
1554
1573
{
1555
1574
struct kfd_node *node;
···
1584
1565
1585
1566
node = kfd->nodes[node_id];
1586
1567
return node->dqm->ops.halt(node->dqm);
1568
+
}
1569
+
1570
+
int kgd2kfd_stop_sched_all_nodes(struct kfd_dev *kfd)
1571
+
{
1572
+
struct kfd_node *node;
1573
+
int i, r;
1574
+
1575
+
if (!kfd->init_complete)
1576
+
return 0;
1577
+
1578
+
for (i = 0; i < kfd->num_nodes; i++) {
1579
+
node = kfd->nodes[i];
1580
+
r = node->dqm->ops.halt(node->dqm);
1581
+
if (r)
1582
+
return r;
1583
+
}
1584
+
return 0;
1587
1585
}
1588
1586
1589
1587
bool kgd2kfd_compute_active(struct kfd_dev *kfd, uint32_t node_id)
+38
-1
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+38
-1
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
···
8717
8717
static void manage_dm_interrupts(struct amdgpu_device *adev,
8718
8718
struct amdgpu_crtc *acrtc,
8719
8719
struct dm_crtc_state *acrtc_state)
8720
-
{
8720
+
{ /*
8721
+
* We cannot be sure that the frontend index maps to the same
8722
+
* backend index - some even map to more than one.
8723
+
* So we have to go through the CRTC to find the right IRQ.
8724
+
*/
8725
+
int irq_type = amdgpu_display_crtc_idx_to_irq_type(
8726
+
adev,
8727
+
acrtc->crtc_id);
8728
+
struct drm_device *dev = adev_to_drm(adev);
8729
+
8721
8730
struct drm_vblank_crtc_config config = {0};
8722
8731
struct dc_crtc_timing *timing;
8723
8732
int offdelay;
···
8779
8770
8780
8771
drm_crtc_vblank_on_config(&acrtc->base,
8781
8772
&config);
8773
+
/* Allow RX6xxx, RX7700, RX7800 GPUs to call amdgpu_irq_get.*/
8774
+
switch (amdgpu_ip_version(adev, DCE_HWIP, 0)) {
8775
+
case IP_VERSION(3, 0, 0):
8776
+
case IP_VERSION(3, 0, 2):
8777
+
case IP_VERSION(3, 0, 3):
8778
+
case IP_VERSION(3, 2, 0):
8779
+
if (amdgpu_irq_get(adev, &adev->pageflip_irq, irq_type))
8780
+
drm_err(dev, "DM_IRQ: Cannot get pageflip irq!\n");
8781
+
#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)
8782
+
if (amdgpu_irq_get(adev, &adev->vline0_irq, irq_type))
8783
+
drm_err(dev, "DM_IRQ: Cannot get vline0 irq!\n");
8784
+
#endif
8785
+
}
8786
+
8782
8787
} else {
8788
+
/* Allow RX6xxx, RX7700, RX7800 GPUs to call amdgpu_irq_put.*/
8789
+
switch (amdgpu_ip_version(adev, DCE_HWIP, 0)) {
8790
+
case IP_VERSION(3, 0, 0):
8791
+
case IP_VERSION(3, 0, 2):
8792
+
case IP_VERSION(3, 0, 3):
8793
+
case IP_VERSION(3, 2, 0):
8794
+
#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)
8795
+
if (amdgpu_irq_put(adev, &adev->vline0_irq, irq_type))
8796
+
drm_err(dev, "DM_IRQ: Cannot put vline0 irq!\n");
8797
+
#endif
8798
+
if (amdgpu_irq_put(adev, &adev->pageflip_irq, irq_type))
8799
+
drm_err(dev, "DM_IRQ: Cannot put pageflip irq!\n");
8800
+
}
8801
+
8783
8802
drm_crtc_vblank_off(&acrtc->base);
8784
8803
}
8785
8804
}
+1
-1
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
+1
-1
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c
···
2236
2236
return ret;
2237
2237
}
2238
2238
2239
-
if (smu_dpm_ctx->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL) {
2239
+
if (smu_dpm_ctx->dpm_level == AMD_DPM_FORCED_LEVEL_MANUAL && smu->od_enabled) {
2240
2240
ret = smu_od_edit_dpm_table(smu, PP_OD_COMMIT_DPM_TABLE, NULL, 0);
2241
2241
if (ret)
2242
2242
return ret;
+4
-2
drivers/gpu/drm/bridge/analogix/anx7625.c
+4
-2
drivers/gpu/drm/bridge/analogix/anx7625.c
···
2677
2677
ret = devm_request_threaded_irq(dev, platform->pdata.intp_irq,
2678
2678
NULL, anx7625_intr_hpd_isr,
2679
2679
IRQF_TRIGGER_FALLING |
2680
-
IRQF_ONESHOT,
2680
+
IRQF_ONESHOT | IRQF_NO_AUTOEN,
2681
2681
"anx7625-intp", platform);
2682
2682
if (ret) {
2683
2683
DRM_DEV_ERROR(dev, "fail to request irq\n");
···
2746
2746
}
2747
2747
2748
2748
/* Add work function */
2749
-
if (platform->pdata.intp_irq)
2749
+
if (platform->pdata.intp_irq) {
2750
+
enable_irq(platform->pdata.intp_irq);
2750
2751
queue_work(platform->workqueue, &platform->work);
2752
+
}
2751
2753
2752
2754
if (platform->pdata.audio_en)
2753
2755
anx7625_register_audio(dev, platform);
+4
-2
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
+4
-2
drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c
···
1984
1984
mhdp_state = to_cdns_mhdp_bridge_state(new_state);
1985
1985
1986
1986
mhdp_state->current_mode = drm_mode_duplicate(bridge->dev, mode);
1987
-
if (!mhdp_state->current_mode)
1988
-
return;
1987
+
if (!mhdp_state->current_mode) {
1988
+
ret = -EINVAL;
1989
+
goto out;
1990
+
}
1989
1991
1990
1992
drm_mode_set_name(mhdp_state->current_mode);
1991
1993
-2
drivers/gpu/drm/drm_gpuvm.c
-2
drivers/gpu/drm/drm_gpuvm.c
+1
-1
drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+1
-1
drivers/gpu/drm/i915/display/intel_dp_aux_backlight.c
+1
drivers/gpu/drm/xe/abi/guc_actions_abi.h
+1
drivers/gpu/drm/xe/abi/guc_actions_abi.h
···
117
117
XE_GUC_ACTION_ENTER_S_STATE = 0x501,
118
118
XE_GUC_ACTION_EXIT_S_STATE = 0x502,
119
119
XE_GUC_ACTION_GLOBAL_SCHED_POLICY_CHANGE = 0x506,
120
+
XE_GUC_ACTION_UPDATE_SCHEDULING_POLICIES_KLV = 0x509,
120
121
XE_GUC_ACTION_SCHED_CONTEXT = 0x1000,
121
122
XE_GUC_ACTION_SCHED_CONTEXT_MODE_SET = 0x1001,
122
123
XE_GUC_ACTION_SCHED_CONTEXT_MODE_DONE = 0x1002,
+25
drivers/gpu/drm/xe/abi/guc_klvs_abi.h
+25
drivers/gpu/drm/xe/abi/guc_klvs_abi.h
···
17
17
* | 0 | 31:16 | **KEY** - KLV key identifier |
18
18
* | | | - `GuC Self Config KLVs`_ |
19
19
* | | | - `GuC Opt In Feature KLVs`_ |
20
+
* | | | - `GuC Scheduling Policies KLVs`_ |
20
21
* | | | - `GuC VGT Policy KLVs`_ |
21
22
* | | | - `GuC VF Configuration KLVs`_ |
22
23
* | | | |
···
152
151
153
152
#define GUC_KLV_OPT_IN_FEATURE_DYNAMIC_INHIBIT_CONTEXT_SWITCH_KEY 0x4003
154
153
#define GUC_KLV_OPT_IN_FEATURE_DYNAMIC_INHIBIT_CONTEXT_SWITCH_LEN 0u
154
+
155
+
/**
156
+
* DOC: GuC Scheduling Policies KLVs
157
+
*
158
+
* `GuC KLV`_ keys available for use with UPDATE_SCHEDULING_POLICIES_KLV.
159
+
*
160
+
* _`GUC_KLV_SCHEDULING_POLICIES_RENDER_COMPUTE_YIELD` : 0x1001
161
+
* Some platforms do not allow concurrent execution of RCS and CCS
162
+
* workloads from different address spaces. By default, the GuC prioritizes
163
+
* RCS submissions over CCS ones, which can lead to CCS workloads being
164
+
* significantly (or completely) starved of execution time. This KLV allows
165
+
* the driver to specify a quantum (in ms) and a ratio (percentage value
166
+
* between 0 and 100), and the GuC will prioritize the CCS for that
167
+
* percentage of each quantum. For example, specifying 100ms and 30% will
168
+
* make the GuC prioritize the CCS for 30ms of every 100ms.
169
+
* Note that this does not necessarly mean that RCS and CCS engines will
170
+
* only be active for their percentage of the quantum, as the restriction
171
+
* only kicks in if both classes are fully busy with non-compatible address
172
+
* spaces; i.e., if one engine is idle or running the same address space,
173
+
* a pending job on the other engine will still be submitted to the HW no
174
+
* matter what the ratio is
175
+
*/
176
+
#define GUC_KLV_SCHEDULING_POLICIES_RENDER_COMPUTE_YIELD_KEY 0x1001
177
+
#define GUC_KLV_SCHEDULING_POLICIES_RENDER_COMPUTE_YIELD_LEN 2u
155
178
156
179
/**
157
180
* DOC: GuC VGT Policy KLVs
+6
-2
drivers/gpu/drm/xe/xe_device_sysfs.c
+6
-2
drivers/gpu/drm/xe/xe_device_sysfs.c
···
311
311
if (xe->info.platform == XE_BATTLEMAGE) {
312
312
ret = sysfs_create_files(&dev->kobj, auto_link_downgrade_attrs);
313
313
if (ret)
314
-
return ret;
314
+
goto cleanup;
315
315
316
316
ret = late_bind_create_files(dev);
317
317
if (ret)
318
-
return ret;
318
+
goto cleanup;
319
319
}
320
320
321
321
return devm_add_action_or_reset(dev, xe_device_sysfs_fini, xe);
322
+
323
+
cleanup:
324
+
xe_device_sysfs_fini(xe);
325
+
return ret;
322
326
}
+15
-7
drivers/gpu/drm/xe/xe_exec_queue.c
+15
-7
drivers/gpu/drm/xe/xe_exec_queue.c
···
151
151
return err;
152
152
}
153
153
154
+
static void __xe_exec_queue_fini(struct xe_exec_queue *q)
155
+
{
156
+
int i;
157
+
158
+
q->ops->fini(q);
159
+
160
+
for (i = 0; i < q->width; ++i)
161
+
xe_lrc_put(q->lrc[i]);
162
+
}
163
+
154
164
struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *vm,
155
165
u32 logical_mask, u16 width,
156
166
struct xe_hw_engine *hwe, u32 flags,
···
191
181
if (xe_exec_queue_uses_pxp(q)) {
192
182
err = xe_pxp_exec_queue_add(xe->pxp, q);
193
183
if (err)
194
-
goto err_post_alloc;
184
+
goto err_post_init;
195
185
}
196
186
197
187
return q;
198
188
189
+
err_post_init:
190
+
__xe_exec_queue_fini(q);
199
191
err_post_alloc:
200
192
__xe_exec_queue_free(q);
201
193
return ERR_PTR(err);
···
295
283
xe_exec_queue_put(eq);
296
284
}
297
285
298
-
q->ops->fini(q);
286
+
q->ops->destroy(q);
299
287
}
300
288
301
289
void xe_exec_queue_fini(struct xe_exec_queue *q)
302
290
{
303
-
int i;
304
-
305
291
/*
306
292
* Before releasing our ref to lrc and xef, accumulate our run ticks
307
293
* and wakeup any waiters.
···
308
298
if (q->xef && atomic_dec_and_test(&q->xef->exec_queue.pending_removal))
309
299
wake_up_var(&q->xef->exec_queue.pending_removal);
310
300
311
-
for (i = 0; i < q->width; ++i)
312
-
xe_lrc_put(q->lrc[i]);
313
-
301
+
__xe_exec_queue_fini(q);
314
302
__xe_exec_queue_free(q);
315
303
}
316
304
+7
-1
drivers/gpu/drm/xe/xe_exec_queue_types.h
+7
-1
drivers/gpu/drm/xe/xe_exec_queue_types.h
···
166
166
int (*init)(struct xe_exec_queue *q);
167
167
/** @kill: Kill inflight submissions for backend */
168
168
void (*kill)(struct xe_exec_queue *q);
169
-
/** @fini: Fini exec queue for submission backend */
169
+
/** @fini: Undoes the init() for submission backend */
170
170
void (*fini)(struct xe_exec_queue *q);
171
+
/**
172
+
* @destroy: Destroy exec queue for submission backend. The backend
173
+
* function must call xe_exec_queue_fini() (which will in turn call the
174
+
* fini() backend function) to ensure the queue is properly cleaned up.
175
+
*/
176
+
void (*destroy)(struct xe_exec_queue *q);
171
177
/** @set_priority: Set priority for exec queue */
172
178
int (*set_priority)(struct xe_exec_queue *q,
173
179
enum xe_exec_queue_priority priority);
+16
-9
drivers/gpu/drm/xe/xe_execlist.c
+16
-9
drivers/gpu/drm/xe/xe_execlist.c
···
385
385
return err;
386
386
}
387
387
388
-
static void execlist_exec_queue_fini_async(struct work_struct *w)
388
+
static void execlist_exec_queue_fini(struct xe_exec_queue *q)
389
+
{
390
+
struct xe_execlist_exec_queue *exl = q->execlist;
391
+
392
+
drm_sched_entity_fini(&exl->entity);
393
+
drm_sched_fini(&exl->sched);
394
+
395
+
kfree(exl);
396
+
}
397
+
398
+
static void execlist_exec_queue_destroy_async(struct work_struct *w)
389
399
{
390
400
struct xe_execlist_exec_queue *ee =
391
-
container_of(w, struct xe_execlist_exec_queue, fini_async);
401
+
container_of(w, struct xe_execlist_exec_queue, destroy_async);
392
402
struct xe_exec_queue *q = ee->q;
393
403
struct xe_execlist_exec_queue *exl = q->execlist;
394
404
struct xe_device *xe = gt_to_xe(q->gt);
···
411
401
list_del(&exl->active_link);
412
402
spin_unlock_irqrestore(&exl->port->lock, flags);
413
403
414
-
drm_sched_entity_fini(&exl->entity);
415
-
drm_sched_fini(&exl->sched);
416
-
kfree(exl);
417
-
418
404
xe_exec_queue_fini(q);
419
405
}
420
406
···
419
413
/* NIY */
420
414
}
421
415
422
-
static void execlist_exec_queue_fini(struct xe_exec_queue *q)
416
+
static void execlist_exec_queue_destroy(struct xe_exec_queue *q)
423
417
{
424
-
INIT_WORK(&q->execlist->fini_async, execlist_exec_queue_fini_async);
425
-
queue_work(system_unbound_wq, &q->execlist->fini_async);
418
+
INIT_WORK(&q->execlist->destroy_async, execlist_exec_queue_destroy_async);
419
+
queue_work(system_unbound_wq, &q->execlist->destroy_async);
426
420
}
427
421
428
422
static int execlist_exec_queue_set_priority(struct xe_exec_queue *q,
···
473
467
.init = execlist_exec_queue_init,
474
468
.kill = execlist_exec_queue_kill,
475
469
.fini = execlist_exec_queue_fini,
470
+
.destroy = execlist_exec_queue_destroy,
476
471
.set_priority = execlist_exec_queue_set_priority,
477
472
.set_timeslice = execlist_exec_queue_set_timeslice,
478
473
.set_preempt_timeout = execlist_exec_queue_set_preempt_timeout,
+1
-1
drivers/gpu/drm/xe/xe_execlist_types.h
+1
-1
drivers/gpu/drm/xe/xe_execlist_types.h
+2
-1
drivers/gpu/drm/xe/xe_gt.c
+2
-1
drivers/gpu/drm/xe/xe_gt.c
···
41
41
#include "xe_gt_topology.h"
42
42
#include "xe_guc_exec_queue_types.h"
43
43
#include "xe_guc_pc.h"
44
+
#include "xe_guc_submit.h"
44
45
#include "xe_hw_fence.h"
45
46
#include "xe_hw_engine_class_sysfs.h"
46
47
#include "xe_irq.h"
···
98
97
* FIXME: if xe_uc_sanitize is called here, on TGL driver will not
99
98
* reload
100
99
*/
101
-
gt->uc.guc.submission_state.enabled = false;
100
+
xe_guc_submit_disable(>->uc.guc);
102
101
}
103
102
104
103
static void xe_gt_enable_host_l2_vram(struct xe_gt *gt)
-1
drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
-1
drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c
+2
-4
drivers/gpu/drm/xe/xe_guc.c
+2
-4
drivers/gpu/drm/xe/xe_guc.c
···
880
880
return ret;
881
881
}
882
882
883
-
guc->submission_state.enabled = true;
884
-
885
-
return 0;
883
+
return xe_guc_submit_enable(guc);
886
884
}
887
885
888
886
int xe_guc_reset(struct xe_guc *guc)
···
1577
1579
{
1578
1580
xe_uc_fw_sanitize(&guc->fw);
1579
1581
xe_guc_ct_disable(&guc->ct);
1580
-
guc->submission_state.enabled = false;
1582
+
xe_guc_submit_disable(guc);
1581
1583
}
1582
1584
1583
1585
int xe_guc_reset_prepare(struct xe_guc *guc)
+2
-2
drivers/gpu/drm/xe/xe_guc_exec_queue_types.h
+2
-2
drivers/gpu/drm/xe/xe_guc_exec_queue_types.h
···
35
35
struct xe_sched_msg static_msgs[MAX_STATIC_MSG_TYPE];
36
36
/** @lr_tdr: long running TDR worker */
37
37
struct work_struct lr_tdr;
38
-
/** @fini_async: do final fini async from this worker */
39
-
struct work_struct fini_async;
38
+
/** @destroy_async: do final destroy async from this worker */
39
+
struct work_struct destroy_async;
40
40
/** @resume_time: time of last resume */
41
41
u64 resume_time;
42
42
/** @state: GuC specific state for this xe_exec_queue */
+98
-22
drivers/gpu/drm/xe/xe_guc_submit.c
+98
-22
drivers/gpu/drm/xe/xe_guc_submit.c
···
32
32
#include "xe_guc_ct.h"
33
33
#include "xe_guc_exec_queue_types.h"
34
34
#include "xe_guc_id_mgr.h"
35
+
#include "xe_guc_klv_helpers.h"
35
36
#include "xe_guc_submit_types.h"
36
37
#include "xe_hw_engine.h"
37
38
#include "xe_hw_fence.h"
···
315
314
guc->submission_state.initialized = true;
316
315
317
316
return drmm_add_action_or_reset(&xe->drm, guc_submit_fini, guc);
317
+
}
318
+
319
+
/*
320
+
* Given that we want to guarantee enough RCS throughput to avoid missing
321
+
* frames, we set the yield policy to 20% of each 80ms interval.
322
+
*/
323
+
#define RC_YIELD_DURATION 80 /* in ms */
324
+
#define RC_YIELD_RATIO 20 /* in percent */
325
+
static u32 *emit_render_compute_yield_klv(u32 *emit)
326
+
{
327
+
*emit++ = PREP_GUC_KLV_TAG(SCHEDULING_POLICIES_RENDER_COMPUTE_YIELD);
328
+
*emit++ = RC_YIELD_DURATION;
329
+
*emit++ = RC_YIELD_RATIO;
330
+
331
+
return emit;
332
+
}
333
+
334
+
#define SCHEDULING_POLICY_MAX_DWORDS 16
335
+
static int guc_init_global_schedule_policy(struct xe_guc *guc)
336
+
{
337
+
u32 data[SCHEDULING_POLICY_MAX_DWORDS];
338
+
u32 *emit = data;
339
+
u32 count = 0;
340
+
int ret;
341
+
342
+
if (GUC_SUBMIT_VER(guc) < MAKE_GUC_VER(1, 1, 0))
343
+
return 0;
344
+
345
+
*emit++ = XE_GUC_ACTION_UPDATE_SCHEDULING_POLICIES_KLV;
346
+
347
+
if (CCS_MASK(guc_to_gt(guc)))
348
+
emit = emit_render_compute_yield_klv(emit);
349
+
350
+
count = emit - data;
351
+
if (count > 1) {
352
+
xe_assert(guc_to_xe(guc), count <= SCHEDULING_POLICY_MAX_DWORDS);
353
+
354
+
ret = xe_guc_ct_send_block(&guc->ct, data, count);
355
+
if (ret < 0) {
356
+
xe_gt_err(guc_to_gt(guc),
357
+
"failed to enable GuC sheduling policies: %pe\n",
358
+
ERR_PTR(ret));
359
+
return ret;
360
+
}
361
+
}
362
+
363
+
return 0;
364
+
}
365
+
366
+
int xe_guc_submit_enable(struct xe_guc *guc)
367
+
{
368
+
int ret;
369
+
370
+
ret = guc_init_global_schedule_policy(guc);
371
+
if (ret)
372
+
return ret;
373
+
374
+
guc->submission_state.enabled = true;
375
+
376
+
return 0;
377
+
}
378
+
379
+
void xe_guc_submit_disable(struct xe_guc *guc)
380
+
{
381
+
guc->submission_state.enabled = false;
318
382
}
319
383
320
384
static void __release_guc_id(struct xe_guc *guc, struct xe_exec_queue *q, u32 xa_count)
···
1343
1277
return DRM_GPU_SCHED_STAT_NO_HANG;
1344
1278
}
1345
1279
1346
-
static void __guc_exec_queue_fini_async(struct work_struct *w)
1280
+
static void guc_exec_queue_fini(struct xe_exec_queue *q)
1347
1281
{
1348
-
struct xe_guc_exec_queue *ge =
1349
-
container_of(w, struct xe_guc_exec_queue, fini_async);
1350
-
struct xe_exec_queue *q = ge->q;
1282
+
struct xe_guc_exec_queue *ge = q->guc;
1351
1283
struct xe_guc *guc = exec_queue_to_guc(q);
1352
1284
1353
-
xe_pm_runtime_get(guc_to_xe(guc));
1354
-
trace_xe_exec_queue_destroy(q);
1355
-
1356
1285
release_guc_id(guc, q);
1357
-
if (xe_exec_queue_is_lr(q))
1358
-
cancel_work_sync(&ge->lr_tdr);
1359
-
/* Confirm no work left behind accessing device structures */
1360
-
cancel_delayed_work_sync(&ge->sched.base.work_tdr);
1361
1286
xe_sched_entity_fini(&ge->entity);
1362
1287
xe_sched_fini(&ge->sched);
1363
1288
···
1357
1300
* (timeline name).
1358
1301
*/
1359
1302
kfree_rcu(ge, rcu);
1303
+
}
1304
+
1305
+
static void __guc_exec_queue_destroy_async(struct work_struct *w)
1306
+
{
1307
+
struct xe_guc_exec_queue *ge =
1308
+
container_of(w, struct xe_guc_exec_queue, destroy_async);
1309
+
struct xe_exec_queue *q = ge->q;
1310
+
struct xe_guc *guc = exec_queue_to_guc(q);
1311
+
1312
+
xe_pm_runtime_get(guc_to_xe(guc));
1313
+
trace_xe_exec_queue_destroy(q);
1314
+
1315
+
if (xe_exec_queue_is_lr(q))
1316
+
cancel_work_sync(&ge->lr_tdr);
1317
+
/* Confirm no work left behind accessing device structures */
1318
+
cancel_delayed_work_sync(&ge->sched.base.work_tdr);
1319
+
1360
1320
xe_exec_queue_fini(q);
1321
+
1361
1322
xe_pm_runtime_put(guc_to_xe(guc));
1362
1323
}
1363
1324
1364
-
static void guc_exec_queue_fini_async(struct xe_exec_queue *q)
1325
+
static void guc_exec_queue_destroy_async(struct xe_exec_queue *q)
1365
1326
{
1366
1327
struct xe_guc *guc = exec_queue_to_guc(q);
1367
1328
struct xe_device *xe = guc_to_xe(guc);
1368
1329
1369
-
INIT_WORK(&q->guc->fini_async, __guc_exec_queue_fini_async);
1330
+
INIT_WORK(&q->guc->destroy_async, __guc_exec_queue_destroy_async);
1370
1331
1371
1332
/* We must block on kernel engines so slabs are empty on driver unload */
1372
1333
if (q->flags & EXEC_QUEUE_FLAG_PERMANENT || exec_queue_wedged(q))
1373
-
__guc_exec_queue_fini_async(&q->guc->fini_async);
1334
+
__guc_exec_queue_destroy_async(&q->guc->destroy_async);
1374
1335
else
1375
-
queue_work(xe->destroy_wq, &q->guc->fini_async);
1336
+
queue_work(xe->destroy_wq, &q->guc->destroy_async);
1376
1337
}
1377
1338
1378
-
static void __guc_exec_queue_fini(struct xe_guc *guc, struct xe_exec_queue *q)
1339
+
static void __guc_exec_queue_destroy(struct xe_guc *guc, struct xe_exec_queue *q)
1379
1340
{
1380
1341
/*
1381
1342
* Might be done from within the GPU scheduler, need to do async as we
···
1402
1327
* this we and don't really care when everything is fini'd, just that it
1403
1328
* is.
1404
1329
*/
1405
-
guc_exec_queue_fini_async(q);
1330
+
guc_exec_queue_destroy_async(q);
1406
1331
}
1407
1332
1408
1333
static void __guc_exec_queue_process_msg_cleanup(struct xe_sched_msg *msg)
···
1416
1341
if (exec_queue_registered(q))
1417
1342
disable_scheduling_deregister(guc, q);
1418
1343
else
1419
-
__guc_exec_queue_fini(guc, q);
1344
+
__guc_exec_queue_destroy(guc, q);
1420
1345
}
1421
1346
1422
1347
static bool guc_exec_queue_allowed_to_change_state(struct xe_exec_queue *q)
···
1649
1574
#define STATIC_MSG_CLEANUP 0
1650
1575
#define STATIC_MSG_SUSPEND 1
1651
1576
#define STATIC_MSG_RESUME 2
1652
-
static void guc_exec_queue_fini(struct xe_exec_queue *q)
1577
+
static void guc_exec_queue_destroy(struct xe_exec_queue *q)
1653
1578
{
1654
1579
struct xe_sched_msg *msg = q->guc->static_msgs + STATIC_MSG_CLEANUP;
1655
1580
1656
1581
if (!(q->flags & EXEC_QUEUE_FLAG_PERMANENT) && !exec_queue_wedged(q))
1657
1582
guc_exec_queue_add_msg(q, msg, CLEANUP);
1658
1583
else
1659
-
__guc_exec_queue_fini(exec_queue_to_guc(q), q);
1584
+
__guc_exec_queue_destroy(exec_queue_to_guc(q), q);
1660
1585
}
1661
1586
1662
1587
static int guc_exec_queue_set_priority(struct xe_exec_queue *q,
···
1786
1711
.init = guc_exec_queue_init,
1787
1712
.kill = guc_exec_queue_kill,
1788
1713
.fini = guc_exec_queue_fini,
1714
+
.destroy = guc_exec_queue_destroy,
1789
1715
.set_priority = guc_exec_queue_set_priority,
1790
1716
.set_timeslice = guc_exec_queue_set_timeslice,
1791
1717
.set_preempt_timeout = guc_exec_queue_set_preempt_timeout,
···
1808
1732
if (exec_queue_extra_ref(q) || xe_exec_queue_is_lr(q))
1809
1733
xe_exec_queue_put(q);
1810
1734
else if (exec_queue_destroyed(q))
1811
-
__guc_exec_queue_fini(guc, q);
1735
+
__guc_exec_queue_destroy(guc, q);
1812
1736
}
1813
1737
if (q->guc->suspend_pending) {
1814
1738
set_exec_queue_suspended(q);
···
2065
1989
if (exec_queue_extra_ref(q) || xe_exec_queue_is_lr(q))
2066
1990
xe_exec_queue_put(q);
2067
1991
else
2068
-
__guc_exec_queue_fini(guc, q);
1992
+
__guc_exec_queue_destroy(guc, q);
2069
1993
}
2070
1994
2071
1995
int xe_guc_deregister_done_handler(struct xe_guc *guc, u32 *msg, u32 len)
+2
drivers/gpu/drm/xe/xe_guc_submit.h
+2
drivers/gpu/drm/xe/xe_guc_submit.h
···
13
13
struct xe_guc;
14
14
15
15
int xe_guc_submit_init(struct xe_guc *guc, unsigned int num_ids);
16
+
int xe_guc_submit_enable(struct xe_guc *guc);
17
+
void xe_guc_submit_disable(struct xe_guc *guc);
16
18
17
19
int xe_guc_submit_reset_prepare(struct xe_guc *guc);
18
20
void xe_guc_submit_reset_wait(struct xe_guc *guc);
+19
-16
drivers/gpu/drm/xe/xe_hwmon.c
+19
-16
drivers/gpu/drm/xe/xe_hwmon.c
···
286
286
*/
287
287
static void xe_hwmon_power_max_read(struct xe_hwmon *hwmon, u32 attr, int channel, long *value)
288
288
{
289
-
u64 reg_val = 0, min, max;
289
+
u32 reg_val = 0;
290
290
struct xe_device *xe = hwmon->xe;
291
291
struct xe_reg rapl_limit, pkg_power_sku;
292
292
struct xe_mmio *mmio = xe_root_tile_mmio(xe);
···
294
294
mutex_lock(&hwmon->hwmon_lock);
295
295
296
296
if (hwmon->xe->info.has_mbx_power_limits) {
297
-
xe_hwmon_pcode_read_power_limit(hwmon, attr, channel, (u32 *)®_val);
297
+
xe_hwmon_pcode_read_power_limit(hwmon, attr, channel, ®_val);
298
298
} else {
299
299
rapl_limit = xe_hwmon_get_reg(hwmon, REG_PKG_RAPL_LIMIT, channel);
300
300
pkg_power_sku = xe_hwmon_get_reg(hwmon, REG_PKG_POWER_SKU, channel);
···
304
304
/* Check if PL limits are disabled. */
305
305
if (!(reg_val & PWR_LIM_EN)) {
306
306
*value = PL_DISABLE;
307
-
drm_info(&hwmon->xe->drm, "%s disabled for channel %d, val 0x%016llx\n",
307
+
drm_info(&hwmon->xe->drm, "%s disabled for channel %d, val 0x%08x\n",
308
308
PWR_ATTR_TO_STR(attr), channel, reg_val);
309
309
goto unlock;
310
310
}
311
311
312
312
reg_val = REG_FIELD_GET(PWR_LIM_VAL, reg_val);
313
-
*value = mul_u64_u32_shr(reg_val, SF_POWER, hwmon->scl_shift_power);
313
+
*value = mul_u32_u32(reg_val, SF_POWER) >> hwmon->scl_shift_power;
314
314
315
315
/* For platforms with mailbox power limit support clamping would be done by pcode. */
316
316
if (!hwmon->xe->info.has_mbx_power_limits) {
317
-
reg_val = xe_mmio_read64_2x32(mmio, pkg_power_sku);
318
-
min = REG_FIELD_GET(PKG_MIN_PWR, reg_val);
319
-
max = REG_FIELD_GET(PKG_MAX_PWR, reg_val);
317
+
u64 pkg_pwr, min, max;
318
+
319
+
pkg_pwr = xe_mmio_read64_2x32(mmio, pkg_power_sku);
320
+
min = REG_FIELD_GET(PKG_MIN_PWR, pkg_pwr);
321
+
max = REG_FIELD_GET(PKG_MAX_PWR, pkg_pwr);
320
322
min = mul_u64_u32_shr(min, SF_POWER, hwmon->scl_shift_power);
321
323
max = mul_u64_u32_shr(max, SF_POWER, hwmon->scl_shift_power);
322
324
if (min && max)
···
495
493
{
496
494
struct xe_hwmon *hwmon = dev_get_drvdata(dev);
497
495
struct xe_mmio *mmio = xe_root_tile_mmio(hwmon->xe);
498
-
u32 x, y, x_w = 2; /* 2 bits */
499
-
u64 r, tau4, out;
496
+
u32 reg_val, x, y, x_w = 2; /* 2 bits */
497
+
u64 tau4, out;
500
498
int channel = (to_sensor_dev_attr(attr)->index % 2) ? CHANNEL_PKG : CHANNEL_CARD;
501
499
u32 power_attr = (to_sensor_dev_attr(attr)->index > 1) ? PL2_HWMON_ATTR : PL1_HWMON_ATTR;
502
500
···
507
505
mutex_lock(&hwmon->hwmon_lock);
508
506
509
507
if (hwmon->xe->info.has_mbx_power_limits) {
510
-
ret = xe_hwmon_pcode_read_power_limit(hwmon, power_attr, channel, (u32 *)&r);
508
+
ret = xe_hwmon_pcode_read_power_limit(hwmon, power_attr, channel, ®_val);
511
509
if (ret) {
512
510
drm_err(&hwmon->xe->drm,
513
-
"power interval read fail, ch %d, attr %d, r 0%llx, ret %d\n",
514
-
channel, power_attr, r, ret);
515
-
r = 0;
511
+
"power interval read fail, ch %d, attr %d, val 0x%08x, ret %d\n",
512
+
channel, power_attr, reg_val, ret);
513
+
reg_val = 0;
516
514
}
517
515
} else {
518
-
r = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_PKG_RAPL_LIMIT, channel));
516
+
reg_val = xe_mmio_read32(mmio, xe_hwmon_get_reg(hwmon, REG_PKG_RAPL_LIMIT,
517
+
channel));
519
518
}
520
519
521
520
mutex_unlock(&hwmon->hwmon_lock);
522
521
523
522
xe_pm_runtime_put(hwmon->xe);
524
523
525
-
x = REG_FIELD_GET(PWR_LIM_TIME_X, r);
526
-
y = REG_FIELD_GET(PWR_LIM_TIME_Y, r);
524
+
x = REG_FIELD_GET(PWR_LIM_TIME_X, reg_val);
525
+
y = REG_FIELD_GET(PWR_LIM_TIME_Y, reg_val);
527
526
528
527
/*
529
528
* tau = (1 + (x / 4)) * power(2,y), x = bits(23:22), y = bits(21:17)
+4
-1
drivers/gpu/drm/xe/xe_nvm.c
+4
-1
drivers/gpu/drm/xe/xe_nvm.c
···
35
35
36
36
static void xe_nvm_release_dev(struct device *dev)
37
37
{
38
+
struct auxiliary_device *aux = container_of(dev, struct auxiliary_device, dev);
39
+
struct intel_dg_nvm_dev *nvm = container_of(aux, struct intel_dg_nvm_dev, aux_dev);
40
+
41
+
kfree(nvm);
38
42
}
39
43
40
44
static bool xe_nvm_non_posted_erase(struct xe_device *xe)
···
166
162
167
163
auxiliary_device_delete(&nvm->aux_dev);
168
164
auxiliary_device_uninit(&nvm->aux_dev);
169
-
kfree(nvm);
170
165
xe->nvm = NULL;
171
166
}
+7
-5
drivers/gpu/drm/xe/xe_tile_sysfs.c
+7
-5
drivers/gpu/drm/xe/xe_tile_sysfs.c
···
44
44
kt->tile = tile;
45
45
46
46
err = kobject_add(&kt->base, &dev->kobj, "tile%d", tile->id);
47
-
if (err) {
48
-
kobject_put(&kt->base);
49
-
return err;
50
-
}
47
+
if (err)
48
+
goto err_object;
51
49
52
50
tile->sysfs = &kt->base;
53
51
54
52
err = xe_vram_freq_sysfs_init(tile);
55
53
if (err)
56
-
return err;
54
+
goto err_object;
57
55
58
56
return devm_add_action_or_reset(xe->drm.dev, tile_sysfs_fini, tile);
57
+
58
+
err_object:
59
+
kobject_put(&kt->base);
60
+
return err;
59
61
}
+2
-2
drivers/gpu/drm/xe/xe_vm.c
+2
-2
drivers/gpu/drm/xe/xe_vm.c
-2
drivers/hid/Kconfig
-2
drivers/hid/Kconfig
+10
-2
drivers/hid/amd-sfh-hid/amd_sfh_client.c
+10
-2
drivers/hid/amd-sfh-hid/amd_sfh_client.c
···
39
39
struct amdtp_hid_data *hid_data = hid->driver_data;
40
40
struct amdtp_cl_data *cli_data = hid_data->cli_data;
41
41
struct request_list *req_list = &cli_data->req_list;
42
+
struct amd_input_data *in_data = cli_data->in_data;
43
+
struct amd_mp2_dev *mp2;
42
44
int i;
43
45
46
+
mp2 = container_of(in_data, struct amd_mp2_dev, in_data);
47
+
guard(mutex)(&mp2->lock);
44
48
for (i = 0; i < cli_data->num_hid_devices; i++) {
45
49
if (cli_data->hid_sensor_hubs[i] == hid) {
46
50
struct request_list *new = kzalloc(sizeof(*new), GFP_KERNEL);
···
79
75
u8 report_id, node_type;
80
76
u8 report_size = 0;
81
77
78
+
mp2 = container_of(in_data, struct amd_mp2_dev, in_data);
79
+
guard(mutex)(&mp2->lock);
82
80
req_node = list_last_entry(&req_list->list, struct request_list, list);
83
81
list_del(&req_node->list);
84
82
current_index = req_node->current_index;
···
89
83
node_type = req_node->report_type;
90
84
kfree(req_node);
91
85
92
-
mp2 = container_of(in_data, struct amd_mp2_dev, in_data);
93
86
mp2_ops = mp2->mp2_ops;
94
87
if (node_type == HID_FEATURE_REPORT) {
95
88
report_size = mp2_ops->get_feat_rep(sensor_index, report_id,
···
112
107
cli_data->cur_hid_dev = current_index;
113
108
cli_data->sensor_requested_cnt[current_index] = 0;
114
109
amdtp_hid_wakeup(cli_data->hid_sensor_hubs[current_index]);
110
+
if (!list_empty(&req_list->list))
111
+
schedule_delayed_work(&cli_data->work, 0);
115
112
}
116
113
117
114
void amd_sfh_work_buffer(struct work_struct *work)
···
124
117
u8 report_size;
125
118
int i;
126
119
120
+
mp2 = container_of(in_data, struct amd_mp2_dev, in_data);
121
+
guard(mutex)(&mp2->lock);
127
122
for (i = 0; i < cli_data->num_hid_devices; i++) {
128
123
if (cli_data->sensor_sts[i] == SENSOR_ENABLED) {
129
-
mp2 = container_of(in_data, struct amd_mp2_dev, in_data);
130
124
report_size = mp2->mp2_ops->get_in_rep(i, cli_data->sensor_idx[i],
131
125
cli_data->report_id[i], in_data);
132
126
hid_input_report(cli_data->hid_sensor_hubs[i], HID_INPUT_REPORT,
+3
drivers/hid/amd-sfh-hid/amd_sfh_common.h
+3
drivers/hid/amd-sfh-hid/amd_sfh_common.h
···
10
10
#ifndef AMD_SFH_COMMON_H
11
11
#define AMD_SFH_COMMON_H
12
12
13
+
#include <linux/mutex.h>
13
14
#include <linux/pci.h>
14
15
#include "amd_sfh_hid.h"
15
16
···
60
59
u32 mp2_acs;
61
60
struct sfh_dev_status dev_en;
62
61
struct work_struct work;
62
+
/* mp2 to protect data */
63
+
struct mutex lock;
63
64
u8 init_done;
64
65
u8 rver;
65
66
};
+4
drivers/hid/amd-sfh-hid/amd_sfh_pcie.c
+4
drivers/hid/amd-sfh-hid/amd_sfh_pcie.c
···
466
466
if (!privdata->cl_data)
467
467
return -ENOMEM;
468
468
469
+
rc = devm_mutex_init(&pdev->dev, &privdata->lock);
470
+
if (rc)
471
+
return rc;
472
+
469
473
privdata->sfh1_1_ops = (const struct amd_sfh1_1_ops *)id->driver_data;
470
474
if (privdata->sfh1_1_ops) {
471
475
if (boot_cpu_data.x86 >= 0x1A)
+3
drivers/hid/hid-asus.c
+3
drivers/hid/hid-asus.c
···
974
974
case 0xc4: asus_map_key_clear(KEY_KBDILLUMUP); break;
975
975
case 0xc5: asus_map_key_clear(KEY_KBDILLUMDOWN); break;
976
976
case 0xc7: asus_map_key_clear(KEY_KBDILLUMTOGGLE); break;
977
+
case 0x4e: asus_map_key_clear(KEY_FN_ESC); break;
978
+
case 0x7e: asus_map_key_clear(KEY_EMOJI_PICKER); break;
977
979
980
+
case 0x8b: asus_map_key_clear(KEY_PROG1); break; /* ProArt Creator Hub key */
978
981
case 0x6b: asus_map_key_clear(KEY_F21); break; /* ASUS touchpad toggle */
979
982
case 0x38: asus_map_key_clear(KEY_PROG1); break; /* ROG key */
980
983
case 0xba: asus_map_key_clear(KEY_PROG2); break; /* Fn+C ASUS Splendid */
+5
-5
drivers/hid/hid-cp2112.c
+5
-5
drivers/hid/hid-cp2112.c
···
229
229
ret = hid_hw_raw_request(hdev, CP2112_GPIO_SET, buf,
230
230
CP2112_GPIO_SET_LENGTH, HID_FEATURE_REPORT,
231
231
HID_REQ_SET_REPORT);
232
-
if (ret < 0)
232
+
if (ret != CP2112_GPIO_SET_LENGTH) {
233
233
hid_err(hdev, "error setting GPIO values: %d\n", ret);
234
+
return ret < 0 ? ret : -EIO;
235
+
}
234
236
235
-
return ret;
237
+
return 0;
236
238
}
237
239
238
240
static int cp2112_gpio_set(struct gpio_chip *chip, unsigned int offset,
···
311
309
* Set gpio value when output direction is already set,
312
310
* as specified in AN495, Rev. 0.2, cpt. 4.4
313
311
*/
314
-
cp2112_gpio_set_unlocked(dev, offset, value);
315
-
316
-
return 0;
312
+
return cp2112_gpio_set_unlocked(dev, offset, value);
317
313
}
318
314
319
315
static int cp2112_hid_get(struct hid_device *hdev, unsigned char report_number,
+1
-3
drivers/hid/hid-lenovo.c
+1
-3
drivers/hid/hid-lenovo.c
···
32
32
#include <linux/leds.h>
33
33
#include <linux/workqueue.h>
34
34
35
-
#include <linux/platform_profile.h>
36
-
37
35
#include "hid-ids.h"
38
36
39
37
/* Userspace expects F20 for mic-mute KEY_MICMUTE does not work */
···
732
734
report_key_event(input, KEY_RFKILL);
733
735
return 1;
734
736
}
735
-
platform_profile_cycle();
737
+
report_key_event(input, KEY_PERFORMANCE);
736
738
return 1;
737
739
case TP_X12_RAW_HOTKEY_FN_F10:
738
740
/* TAB1 has PICKUP Phone and TAB2 use Snipping tool*/
+2
drivers/hid/intel-thc-hid/intel-quicki2c/pci-quicki2c.c
+2
drivers/hid/intel-thc-hid/intel-quicki2c/pci-quicki2c.c
···
997
997
{ PCI_DEVICE_DATA(INTEL, THC_PTL_H_DEVICE_ID_I2C_PORT2, &ptl_ddata) },
998
998
{ PCI_DEVICE_DATA(INTEL, THC_PTL_U_DEVICE_ID_I2C_PORT1, &ptl_ddata) },
999
999
{ PCI_DEVICE_DATA(INTEL, THC_PTL_U_DEVICE_ID_I2C_PORT2, &ptl_ddata) },
1000
+
{ PCI_DEVICE_DATA(INTEL, THC_WCL_DEVICE_ID_I2C_PORT1, &ptl_ddata) },
1001
+
{ PCI_DEVICE_DATA(INTEL, THC_WCL_DEVICE_ID_I2C_PORT2, &ptl_ddata) },
1000
1002
{ }
1001
1003
};
1002
1004
MODULE_DEVICE_TABLE(pci, quicki2c_pci_tbl);
+2
drivers/hid/intel-thc-hid/intel-quicki2c/quicki2c-dev.h
+2
drivers/hid/intel-thc-hid/intel-quicki2c/quicki2c-dev.h
···
13
13
#define PCI_DEVICE_ID_INTEL_THC_PTL_H_DEVICE_ID_I2C_PORT2 0xE34A
14
14
#define PCI_DEVICE_ID_INTEL_THC_PTL_U_DEVICE_ID_I2C_PORT1 0xE448
15
15
#define PCI_DEVICE_ID_INTEL_THC_PTL_U_DEVICE_ID_I2C_PORT2 0xE44A
16
+
#define PCI_DEVICE_ID_INTEL_THC_WCL_DEVICE_ID_I2C_PORT1 0x4D48
17
+
#define PCI_DEVICE_ID_INTEL_THC_WCL_DEVICE_ID_I2C_PORT2 0x4D4A
16
18
17
19
/* Packet size value, the unit is 16 bytes */
18
20
#define MAX_PACKET_SIZE_VALUE_LNL 256
+2
drivers/hid/intel-thc-hid/intel-quickspi/pci-quickspi.c
+2
drivers/hid/intel-thc-hid/intel-quickspi/pci-quickspi.c
···
976
976
{PCI_DEVICE_DATA(INTEL, THC_PTL_H_DEVICE_ID_SPI_PORT2, &ptl), },
977
977
{PCI_DEVICE_DATA(INTEL, THC_PTL_U_DEVICE_ID_SPI_PORT1, &ptl), },
978
978
{PCI_DEVICE_DATA(INTEL, THC_PTL_U_DEVICE_ID_SPI_PORT2, &ptl), },
979
+
{PCI_DEVICE_DATA(INTEL, THC_WCL_DEVICE_ID_SPI_PORT1, &ptl), },
980
+
{PCI_DEVICE_DATA(INTEL, THC_WCL_DEVICE_ID_SPI_PORT2, &ptl), },
979
981
{}
980
982
};
981
983
MODULE_DEVICE_TABLE(pci, quickspi_pci_tbl);
+2
drivers/hid/intel-thc-hid/intel-quickspi/quickspi-dev.h
+2
drivers/hid/intel-thc-hid/intel-quickspi/quickspi-dev.h
···
19
19
#define PCI_DEVICE_ID_INTEL_THC_PTL_H_DEVICE_ID_SPI_PORT2 0xE34B
20
20
#define PCI_DEVICE_ID_INTEL_THC_PTL_U_DEVICE_ID_SPI_PORT1 0xE449
21
21
#define PCI_DEVICE_ID_INTEL_THC_PTL_U_DEVICE_ID_SPI_PORT2 0xE44B
22
+
#define PCI_DEVICE_ID_INTEL_THC_WCL_DEVICE_ID_SPI_PORT1 0x4D49
23
+
#define PCI_DEVICE_ID_INTEL_THC_WCL_DEVICE_ID_SPI_PORT2 0x4D4B
22
24
23
25
/* HIDSPI special ACPI parameters DSM methods */
24
26
#define ACPI_QUICKSPI_REVISION_NUM 2
+1
drivers/infiniband/hw/mlx5/devx.c
+1
drivers/infiniband/hw/mlx5/devx.c
+1
drivers/iommu/amd/amd_iommu_types.h
+1
drivers/iommu/amd/amd_iommu_types.h
+5
-4
drivers/iommu/amd/init.c
+5
-4
drivers/iommu/amd/init.c
···
1455
1455
PCI_FUNC(e->devid));
1456
1456
1457
1457
devid = e->devid;
1458
-
for (dev_i = devid_start; dev_i <= devid; ++dev_i) {
1459
-
if (alias)
1458
+
if (alias) {
1459
+
for (dev_i = devid_start; dev_i <= devid; ++dev_i)
1460
1460
pci_seg->alias_table[dev_i] = devid_to;
1461
+
set_dev_entry_from_acpi(iommu, devid_to, flags, ext_flags);
1461
1462
}
1462
1463
set_dev_entry_from_acpi_range(iommu, devid_start, devid, flags, ext_flags);
1463
-
set_dev_entry_from_acpi(iommu, devid_to, flags, ext_flags);
1464
1464
break;
1465
1465
case IVHD_DEV_SPECIAL: {
1466
1466
u8 handle, type;
···
3067
3067
3068
3068
if (!boot_cpu_has(X86_FEATURE_CX16)) {
3069
3069
pr_err("Failed to initialize. The CMPXCHG16B feature is required.\n");
3070
-
return -EINVAL;
3070
+
ret = -EINVAL;
3071
+
goto out;
3071
3072
}
3072
3073
3073
3074
/*
+21
-4
drivers/iommu/amd/io_pgtable.c
+21
-4
drivers/iommu/amd/io_pgtable.c
···
17
17
#include <linux/slab.h>
18
18
#include <linux/types.h>
19
19
#include <linux/dma-mapping.h>
20
+
#include <linux/seqlock.h>
20
21
21
22
#include <asm/barrier.h>
22
23
···
131
130
132
131
*pte = PM_LEVEL_PDE(pgtable->mode, iommu_virt_to_phys(pgtable->root));
133
132
133
+
write_seqcount_begin(&pgtable->seqcount);
134
134
pgtable->root = pte;
135
135
pgtable->mode += 1;
136
+
write_seqcount_end(&pgtable->seqcount);
137
+
136
138
amd_iommu_update_and_flush_device_table(domain);
137
139
138
140
pte = NULL;
···
157
153
{
158
154
unsigned long last_addr = address + (page_size - 1);
159
155
struct io_pgtable_cfg *cfg = &pgtable->pgtbl.cfg;
156
+
unsigned int seqcount;
160
157
int level, end_lvl;
161
158
u64 *pte, *page;
162
159
···
175
170
}
176
171
177
172
178
-
level = pgtable->mode - 1;
179
-
pte = &pgtable->root[PM_LEVEL_INDEX(level, address)];
173
+
do {
174
+
seqcount = read_seqcount_begin(&pgtable->seqcount);
175
+
176
+
level = pgtable->mode - 1;
177
+
pte = &pgtable->root[PM_LEVEL_INDEX(level, address)];
178
+
} while (read_seqcount_retry(&pgtable->seqcount, seqcount));
179
+
180
+
180
181
address = PAGE_SIZE_ALIGN(address, page_size);
181
182
end_lvl = PAGE_SIZE_LEVEL(page_size);
182
183
···
260
249
unsigned long *page_size)
261
250
{
262
251
int level;
252
+
unsigned int seqcount;
263
253
u64 *pte;
264
254
265
255
*page_size = 0;
···
268
256
if (address > PM_LEVEL_SIZE(pgtable->mode))
269
257
return NULL;
270
258
271
-
level = pgtable->mode - 1;
272
-
pte = &pgtable->root[PM_LEVEL_INDEX(level, address)];
259
+
do {
260
+
seqcount = read_seqcount_begin(&pgtable->seqcount);
261
+
level = pgtable->mode - 1;
262
+
pte = &pgtable->root[PM_LEVEL_INDEX(level, address)];
263
+
} while (read_seqcount_retry(&pgtable->seqcount, seqcount));
264
+
273
265
*page_size = PTE_LEVEL_PAGE_SIZE(level);
274
266
275
267
while (level > 0) {
···
557
541
if (!pgtable->root)
558
542
return NULL;
559
543
pgtable->mode = PAGE_MODE_3_LEVEL;
544
+
seqcount_init(&pgtable->seqcount);
560
545
561
546
cfg->pgsize_bitmap = amd_iommu_pgsize_bitmap;
562
547
cfg->ias = IOMMU_IN_ADDR_BIT_SIZE;
+6
-1
drivers/iommu/intel/iommu.c
+6
-1
drivers/iommu/intel/iommu.c
···
1575
1575
unsigned long lvl_pages = lvl_to_nr_pages(level);
1576
1576
struct dma_pte *pte = NULL;
1577
1577
1578
+
if (WARN_ON(!IS_ALIGNED(start_pfn, lvl_pages) ||
1579
+
!IS_ALIGNED(end_pfn + 1, lvl_pages)))
1580
+
return;
1581
+
1578
1582
while (start_pfn <= end_pfn) {
1579
1583
if (!pte)
1580
1584
pte = pfn_to_dma_pte(domain, start_pfn, &level,
···
1654
1650
unsigned long pages_to_remove;
1655
1651
1656
1652
pteval |= DMA_PTE_LARGE_PAGE;
1657
-
pages_to_remove = min_t(unsigned long, nr_pages,
1653
+
pages_to_remove = min_t(unsigned long,
1654
+
round_down(nr_pages, lvl_pages),
1658
1655
nr_pte_to_next_page(pte) * lvl_pages);
1659
1656
end_pfn = iov_pfn + pages_to_remove - 1;
1660
1657
switch_to_super_page(domain, iov_pfn, end_pfn, largepage_lvl);
+2
-1
drivers/iommu/iommufd/device.c
+2
-1
drivers/iommu/iommufd/device.c
···
711
711
iopt_remove_reserved_iova(&hwpt_paging->ioas->iopt, idev->dev);
712
712
mutex_unlock(&igroup->lock);
713
713
714
+
iommufd_hw_pagetable_put(idev->ictx, hwpt);
715
+
714
716
/* Caller must destroy hwpt */
715
717
return hwpt;
716
718
}
···
1059
1057
hwpt = iommufd_hw_pagetable_detach(idev, pasid);
1060
1058
if (!hwpt)
1061
1059
return;
1062
-
iommufd_hw_pagetable_put(idev->ictx, hwpt);
1063
1060
refcount_dec(&idev->obj.users);
1064
1061
}
1065
1062
EXPORT_SYMBOL_NS_GPL(iommufd_device_detach, "IOMMUFD");
+2
-7
drivers/iommu/iommufd/eventq.c
+2
-7
drivers/iommu/iommufd/eventq.c
···
393
393
const struct file_operations *fops)
394
394
{
395
395
struct file *filep;
396
-
int fdno;
397
396
398
397
spin_lock_init(&eventq->lock);
399
398
INIT_LIST_HEAD(&eventq->deliver);
400
399
init_waitqueue_head(&eventq->wait_queue);
401
400
401
+
/* The filep is fput() by the core code during failure */
402
402
filep = anon_inode_getfile(name, fops, eventq, O_RDWR);
403
403
if (IS_ERR(filep))
404
404
return PTR_ERR(filep);
···
408
408
eventq->filep = filep;
409
409
refcount_inc(&eventq->obj.users);
410
410
411
-
fdno = get_unused_fd_flags(O_CLOEXEC);
412
-
if (fdno < 0)
413
-
fput(filep);
414
-
return fdno;
411
+
return get_unused_fd_flags(O_CLOEXEC);
415
412
}
416
413
417
414
static const struct file_operations iommufd_fault_fops =
···
449
452
return 0;
450
453
out_put_fdno:
451
454
put_unused_fd(fdno);
452
-
fput(fault->common.filep);
453
455
return rc;
454
456
}
455
457
···
532
536
533
537
out_put_fdno:
534
538
put_unused_fd(fdno);
535
-
fput(veventq->common.filep);
536
539
out_abort:
537
540
iommufd_object_abort_and_destroy(ucmd->ictx, &veventq->common.obj);
538
541
out_unlock_veventqs:
+1
-2
drivers/iommu/iommufd/iommufd_private.h
+1
-2
drivers/iommu/iommufd/iommufd_private.h
···
454
454
if (hwpt->obj.type == IOMMUFD_OBJ_HWPT_PAGING) {
455
455
struct iommufd_hwpt_paging *hwpt_paging = to_hwpt_paging(hwpt);
456
456
457
-
lockdep_assert_not_held(&hwpt_paging->ioas->mutex);
458
-
459
457
if (hwpt_paging->auto_domain) {
458
+
lockdep_assert_not_held(&hwpt_paging->ioas->mutex);
460
459
iommufd_object_put_and_try_destroy(ictx, &hwpt->obj);
461
460
return;
462
461
}
+50
-9
drivers/iommu/iommufd/main.c
+50
-9
drivers/iommu/iommufd/main.c
···
23
23
#include "iommufd_test.h"
24
24
25
25
struct iommufd_object_ops {
26
+
size_t file_offset;
26
27
void (*pre_destroy)(struct iommufd_object *obj);
27
28
void (*destroy)(struct iommufd_object *obj);
28
29
void (*abort)(struct iommufd_object *obj);
···
122
121
old = xas_store(&xas, NULL);
123
122
xa_unlock(&ictx->objects);
124
123
WARN_ON(old != XA_ZERO_ENTRY);
124
+
125
+
if (WARN_ON(!refcount_dec_and_test(&obj->users)))
126
+
return;
127
+
125
128
kfree(obj);
126
129
}
127
130
···
136
131
void iommufd_object_abort_and_destroy(struct iommufd_ctx *ictx,
137
132
struct iommufd_object *obj)
138
133
{
139
-
if (iommufd_object_ops[obj->type].abort)
140
-
iommufd_object_ops[obj->type].abort(obj);
134
+
const struct iommufd_object_ops *ops = &iommufd_object_ops[obj->type];
135
+
136
+
if (ops->file_offset) {
137
+
struct file **filep = ((void *)obj) + ops->file_offset;
138
+
139
+
/*
140
+
* A file should hold a users refcount while the file is open
141
+
* and put it back in its release. The file should hold a
142
+
* pointer to obj in their private data. Normal fput() is
143
+
* deferred to a workqueue and can get out of order with the
144
+
* following kfree(obj). Using the sync version ensures the
145
+
* release happens immediately. During abort we require the file
146
+
* refcount is one at this point - meaning the object alloc
147
+
* function cannot do anything to allow another thread to take a
148
+
* refcount prior to a guaranteed success.
149
+
*/
150
+
if (*filep)
151
+
__fput_sync(*filep);
152
+
}
153
+
154
+
if (ops->abort)
155
+
ops->abort(obj);
141
156
else
142
-
iommufd_object_ops[obj->type].destroy(obj);
157
+
ops->destroy(obj);
143
158
iommufd_object_abort(ictx, obj);
144
159
}
145
160
···
575
550
if (vma->vm_flags & VM_EXEC)
576
551
return -EPERM;
577
552
553
+
mtree_lock(&ictx->mt_mmap);
578
554
/* vma->vm_pgoff carries a page-shifted start position to an immap */
579
555
immap = mtree_load(&ictx->mt_mmap, vma->vm_pgoff << PAGE_SHIFT);
580
-
if (!immap)
556
+
if (!immap || !refcount_inc_not_zero(&immap->owner->users)) {
557
+
mtree_unlock(&ictx->mt_mmap);
581
558
return -ENXIO;
559
+
}
560
+
mtree_unlock(&ictx->mt_mmap);
561
+
582
562
/*
583
563
* mtree_load() returns the immap for any contained mmio_addr, so only
584
564
* allow the exact immap thing to be mapped
585
565
*/
586
-
if (vma->vm_pgoff != immap->vm_pgoff || length != immap->length)
587
-
return -ENXIO;
566
+
if (vma->vm_pgoff != immap->vm_pgoff || length != immap->length) {
567
+
rc = -ENXIO;
568
+
goto err_refcount;
569
+
}
588
570
589
571
vma->vm_pgoff = 0;
590
572
vma->vm_private_data = immap;
···
602
570
immap->mmio_addr >> PAGE_SHIFT, length,
603
571
vma->vm_page_prot);
604
572
if (rc)
605
-
return rc;
573
+
goto err_refcount;
574
+
return 0;
606
575
607
-
/* vm_ops.open won't be called for mmap itself. */
608
-
refcount_inc(&immap->owner->users);
576
+
err_refcount:
577
+
refcount_dec(&immap->owner->users);
609
578
return rc;
610
579
}
611
580
···
684
651
}
685
652
EXPORT_SYMBOL_NS_GPL(iommufd_ctx_put, "IOMMUFD");
686
653
654
+
#define IOMMUFD_FILE_OFFSET(_struct, _filep, _obj) \
655
+
.file_offset = (offsetof(_struct, _filep) + \
656
+
BUILD_BUG_ON_ZERO(!__same_type( \
657
+
struct file *, ((_struct *)NULL)->_filep)) + \
658
+
BUILD_BUG_ON_ZERO(offsetof(_struct, _obj)))
659
+
687
660
static const struct iommufd_object_ops iommufd_object_ops[] = {
688
661
[IOMMUFD_OBJ_ACCESS] = {
689
662
.destroy = iommufd_access_destroy_object,
···
700
661
},
701
662
[IOMMUFD_OBJ_FAULT] = {
702
663
.destroy = iommufd_fault_destroy,
664
+
IOMMUFD_FILE_OFFSET(struct iommufd_fault, common.filep, common.obj),
703
665
},
704
666
[IOMMUFD_OBJ_HW_QUEUE] = {
705
667
.destroy = iommufd_hw_queue_destroy,
···
723
683
[IOMMUFD_OBJ_VEVENTQ] = {
724
684
.destroy = iommufd_veventq_destroy,
725
685
.abort = iommufd_veventq_abort,
686
+
IOMMUFD_FILE_OFFSET(struct iommufd_veventq, common.filep, common.obj),
726
687
},
727
688
[IOMMUFD_OBJ_VIOMMU] = {
728
689
.destroy = iommufd_viommu_destroy,
+21
-8
drivers/iommu/s390-iommu.c
+21
-8
drivers/iommu/s390-iommu.c
···
612
612
}
613
613
}
614
614
615
+
static bool reg_ioat_propagate_error(int cc, u8 status)
616
+
{
617
+
/*
618
+
* If the device is in the error state the reset routine
619
+
* will register the IOAT of the newly set domain on re-enable
620
+
*/
621
+
if (cc == ZPCI_CC_ERR && status == ZPCI_PCI_ST_FUNC_NOT_AVAIL)
622
+
return false;
623
+
/*
624
+
* If the device was removed treat registration as success
625
+
* and let the subsequent error event trigger tear down.
626
+
*/
627
+
if (cc == ZPCI_CC_INVAL_HANDLE)
628
+
return false;
629
+
return cc != ZPCI_CC_OK;
630
+
}
631
+
615
632
static int s390_iommu_domain_reg_ioat(struct zpci_dev *zdev,
616
633
struct iommu_domain *domain, u8 *status)
617
634
{
···
713
696
714
697
/* If we fail now DMA remains blocked via blocking domain */
715
698
cc = s390_iommu_domain_reg_ioat(zdev, domain, &status);
716
-
if (cc && status != ZPCI_PCI_ST_FUNC_NOT_AVAIL)
699
+
if (reg_ioat_propagate_error(cc, status))
717
700
return -EIO;
718
701
zdev->dma_table = s390_domain->dma_table;
719
702
zdev_s390_domain_update(zdev, domain);
···
1049
1032
1050
1033
lockdep_assert_held(&zdev->dom_lock);
1051
1034
1052
-
if (zdev->s390_domain->type == IOMMU_DOMAIN_BLOCKED)
1035
+
if (zdev->s390_domain->type == IOMMU_DOMAIN_BLOCKED ||
1036
+
zdev->s390_domain->type == IOMMU_DOMAIN_IDENTITY)
1053
1037
return NULL;
1054
1038
1055
1039
s390_domain = to_s390_domain(zdev->s390_domain);
···
1141
1123
1142
1124
/* If we fail now DMA remains blocked via blocking domain */
1143
1125
cc = s390_iommu_domain_reg_ioat(zdev, domain, &status);
1144
-
1145
-
/*
1146
-
* If the device is undergoing error recovery the reset code
1147
-
* will re-establish the new domain.
1148
-
*/
1149
-
if (cc && status != ZPCI_PCI_ST_FUNC_NOT_AVAIL)
1126
+
if (reg_ioat_propagate_error(cc, status))
1150
1127
return -EIO;
1151
1128
1152
1129
zdev_s390_domain_update(zdev, domain);
+1
drivers/md/md-linear.c
+1
drivers/md/md-linear.c
···
73
73
md_init_stacking_limits(&lim);
74
74
lim.max_hw_sectors = mddev->chunk_sectors;
75
75
lim.max_write_zeroes_sectors = mddev->chunk_sectors;
76
+
lim.max_hw_wzeroes_unmap_sectors = mddev->chunk_sectors;
76
77
lim.io_min = mddev->chunk_sectors << 9;
77
78
err = mddev_stack_rdev_limits(mddev, &lim, MDDEV_STACK_INTEGRITY);
78
79
if (err)
+1
drivers/md/raid0.c
+1
drivers/md/raid0.c
···
382
382
md_init_stacking_limits(&lim);
383
383
lim.max_hw_sectors = mddev->chunk_sectors;
384
384
lim.max_write_zeroes_sectors = mddev->chunk_sectors;
385
+
lim.max_hw_wzeroes_unmap_sectors = mddev->chunk_sectors;
385
386
lim.io_min = mddev->chunk_sectors << 9;
386
387
lim.io_opt = lim.io_min * mddev->raid_disks;
387
388
lim.chunk_sectors = mddev->chunk_sectors;
+1
drivers/md/raid1.c
+1
drivers/md/raid1.c
+1
drivers/md/raid10.c
+1
drivers/md/raid10.c
···
4008
4008
4009
4009
md_init_stacking_limits(&lim);
4010
4010
lim.max_write_zeroes_sectors = 0;
4011
+
lim.max_hw_wzeroes_unmap_sectors = 0;
4011
4012
lim.io_min = mddev->chunk_sectors << 9;
4012
4013
lim.chunk_sectors = mddev->chunk_sectors;
4013
4014
lim.io_opt = lim.io_min * raid10_nr_stripes(conf);
+1
drivers/md/raid5.c
+1
drivers/md/raid5.c
···
7732
7732
lim.features |= BLK_FEAT_RAID_PARTIAL_STRIPES_EXPENSIVE;
7733
7733
lim.discard_granularity = stripe;
7734
7734
lim.max_write_zeroes_sectors = 0;
7735
+
lim.max_hw_wzeroes_unmap_sectors = 0;
7735
7736
mddev_stack_rdev_limits(mddev, &lim, 0);
7736
7737
rdev_for_each(rdev, mddev)
7737
7738
queue_limits_stack_bdev(&lim, rdev->bdev, rdev->new_data_offset,
+1
-1
drivers/mmc/host/mvsdio.c
+1
-1
drivers/mmc/host/mvsdio.c
+67
-1
drivers/mmc/host/sdhci-pci-gli.c
+67
-1
drivers/mmc/host/sdhci-pci-gli.c
···
283
283
#define PCIE_GLI_9767_UHS2_CTL2_ZC_VALUE 0xb
284
284
#define PCIE_GLI_9767_UHS2_CTL2_ZC_CTL BIT(6)
285
285
#define PCIE_GLI_9767_UHS2_CTL2_ZC_CTL_VALUE 0x1
286
+
#define PCIE_GLI_9767_UHS2_CTL2_FORCE_PHY_RESETN BIT(13)
287
+
#define PCIE_GLI_9767_UHS2_CTL2_FORCE_RESETN_VALUE BIT(14)
286
288
287
289
#define GLI_MAX_TUNING_LOOP 40
288
290
···
1181
1179
gl9767_vhs_read(pdev);
1182
1180
}
1183
1181
1182
+
static void sdhci_gl9767_uhs2_phy_reset(struct sdhci_host *host, bool assert)
1183
+
{
1184
+
struct sdhci_pci_slot *slot = sdhci_priv(host);
1185
+
struct pci_dev *pdev = slot->chip->pdev;
1186
+
u32 value, set, clr;
1187
+
1188
+
if (assert) {
1189
+
/* Assert reset, set RESETN and clean RESETN_VALUE */
1190
+
set = PCIE_GLI_9767_UHS2_CTL2_FORCE_PHY_RESETN;
1191
+
clr = PCIE_GLI_9767_UHS2_CTL2_FORCE_RESETN_VALUE;
1192
+
} else {
1193
+
/* De-assert reset, clean RESETN and set RESETN_VALUE */
1194
+
set = PCIE_GLI_9767_UHS2_CTL2_FORCE_RESETN_VALUE;
1195
+
clr = PCIE_GLI_9767_UHS2_CTL2_FORCE_PHY_RESETN;
1196
+
}
1197
+
1198
+
gl9767_vhs_write(pdev);
1199
+
pci_read_config_dword(pdev, PCIE_GLI_9767_UHS2_CTL2, &value);
1200
+
value |= set;
1201
+
pci_write_config_dword(pdev, PCIE_GLI_9767_UHS2_CTL2, value);
1202
+
value &= ~clr;
1203
+
pci_write_config_dword(pdev, PCIE_GLI_9767_UHS2_CTL2, value);
1204
+
gl9767_vhs_read(pdev);
1205
+
}
1206
+
1207
+
static void __gl9767_uhs2_set_power(struct sdhci_host *host, unsigned char mode, unsigned short vdd)
1208
+
{
1209
+
u8 pwr = 0;
1210
+
1211
+
if (mode != MMC_POWER_OFF) {
1212
+
pwr = sdhci_get_vdd_value(vdd);
1213
+
if (!pwr)
1214
+
WARN(1, "%s: Invalid vdd %#x\n",
1215
+
mmc_hostname(host->mmc), vdd);
1216
+
pwr |= SDHCI_VDD2_POWER_180;
1217
+
}
1218
+
1219
+
if (host->pwr == pwr)
1220
+
return;
1221
+
1222
+
host->pwr = pwr;
1223
+
1224
+
if (pwr == 0) {
1225
+
sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
1226
+
} else {
1227
+
sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
1228
+
1229
+
pwr |= SDHCI_POWER_ON;
1230
+
sdhci_writeb(host, pwr & 0xf, SDHCI_POWER_CONTROL);
1231
+
usleep_range(5000, 6250);
1232
+
1233
+
/* Assert reset */
1234
+
sdhci_gl9767_uhs2_phy_reset(host, true);
1235
+
pwr |= SDHCI_VDD2_POWER_ON;
1236
+
sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
1237
+
usleep_range(5000, 6250);
1238
+
}
1239
+
}
1240
+
1184
1241
static void sdhci_gl9767_set_clock(struct sdhci_host *host, unsigned int clock)
1185
1242
{
1186
1243
struct sdhci_pci_slot *slot = sdhci_priv(host);
···
1266
1205
}
1267
1206
1268
1207
sdhci_enable_clk(host, clk);
1208
+
1209
+
if (mmc_card_uhs2(host->mmc))
1210
+
/* De-assert reset */
1211
+
sdhci_gl9767_uhs2_phy_reset(host, false);
1212
+
1269
1213
gl9767_set_low_power_negotiation(pdev, true);
1270
1214
}
1271
1215
···
1542
1476
gl9767_vhs_read(pdev);
1543
1477
1544
1478
sdhci_gli_overcurrent_event_enable(host, false);
1545
-
sdhci_uhs2_set_power(host, mode, vdd);
1479
+
__gl9767_uhs2_set_power(host, mode, vdd);
1546
1480
sdhci_gli_overcurrent_event_enable(host, true);
1547
1481
} else {
1548
1482
gl9767_vhs_write(pdev);
+2
-1
drivers/mmc/host/sdhci-uhs2.c
+2
-1
drivers/mmc/host/sdhci-uhs2.c
···
295
295
else
296
296
sdhci_uhs2_set_power(host, ios->power_mode, ios->vdd);
297
297
298
-
sdhci_set_clock(host, host->clock);
298
+
host->ops->set_clock(host, ios->clock);
299
+
host->clock = ios->clock;
299
300
}
300
301
301
302
static int sdhci_uhs2_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
+17
-17
drivers/mmc/host/sdhci.c
+17
-17
drivers/mmc/host/sdhci.c
···
2367
2367
(ios->power_mode == MMC_POWER_UP) &&
2368
2368
!(host->quirks2 & SDHCI_QUIRK2_PRESET_VALUE_BROKEN))
2369
2369
sdhci_enable_preset_value(host, false);
2370
-
2371
-
if (!ios->clock || ios->clock != host->clock) {
2372
-
host->ops->set_clock(host, ios->clock);
2373
-
host->clock = ios->clock;
2374
-
2375
-
if (host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK &&
2376
-
host->clock) {
2377
-
host->timeout_clk = mmc->actual_clock ?
2378
-
mmc->actual_clock / 1000 :
2379
-
host->clock / 1000;
2380
-
mmc->max_busy_timeout =
2381
-
host->ops->get_max_timeout_count ?
2382
-
host->ops->get_max_timeout_count(host) :
2383
-
1 << 27;
2384
-
mmc->max_busy_timeout /= host->timeout_clk;
2385
-
}
2386
-
}
2387
2370
}
2388
2371
EXPORT_SYMBOL_GPL(sdhci_set_ios_common);
2389
2372
···
2392
2409
turning_on_clk = ios->clock != host->clock && ios->clock && !host->clock;
2393
2410
2394
2411
sdhci_set_ios_common(mmc, ios);
2412
+
2413
+
if (!ios->clock || ios->clock != host->clock) {
2414
+
host->ops->set_clock(host, ios->clock);
2415
+
host->clock = ios->clock;
2416
+
2417
+
if (host->quirks & SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK &&
2418
+
host->clock) {
2419
+
host->timeout_clk = mmc->actual_clock ?
2420
+
mmc->actual_clock / 1000 :
2421
+
host->clock / 1000;
2422
+
mmc->max_busy_timeout =
2423
+
host->ops->get_max_timeout_count ?
2424
+
host->ops->get_max_timeout_count(host) :
2425
+
1 << 27;
2426
+
mmc->max_busy_timeout /= host->timeout_clk;
2427
+
}
2428
+
}
2395
2429
2396
2430
if (host->ops->set_power)
2397
2431
host->ops->set_power(host, ios->power_mode, ios->vdd);
+4
-3
drivers/net/can/rcar/rcar_canfd.c
+4
-3
drivers/net/can/rcar/rcar_canfd.c
···
823
823
/* Reset Global error flags */
824
824
rcar_canfd_write(gpriv->base, RCANFD_GERFL, 0x0);
825
825
826
-
/* Set the controller into appropriate mode */
827
-
rcar_canfd_set_mode(gpriv);
828
-
829
826
/* Transition all Channels to reset mode */
830
827
for_each_set_bit(ch, &gpriv->channels_mask, gpriv->info->max_channels) {
831
828
rcar_canfd_clear_bit(gpriv->base,
···
841
844
return err;
842
845
}
843
846
}
847
+
848
+
/* Set the controller into appropriate mode */
849
+
rcar_canfd_set_mode(gpriv);
850
+
844
851
return 0;
845
852
}
846
853
+19
-17
drivers/net/can/spi/hi311x.c
+19
-17
drivers/net/can/spi/hi311x.c
···
545
545
546
546
priv->force_quit = 1;
547
547
free_irq(spi->irq, priv);
548
-
destroy_workqueue(priv->wq);
549
-
priv->wq = NULL;
550
548
551
549
mutex_lock(&priv->hi3110_lock);
552
550
···
768
770
goto out_close;
769
771
}
770
772
771
-
priv->wq = alloc_workqueue("hi3110_wq",
772
-
WQ_FREEZABLE | WQ_MEM_RECLAIM | WQ_PERCPU,
773
-
0);
774
-
if (!priv->wq) {
775
-
ret = -ENOMEM;
776
-
goto out_free_irq;
777
-
}
778
-
INIT_WORK(&priv->tx_work, hi3110_tx_work_handler);
779
-
INIT_WORK(&priv->restart_work, hi3110_restart_work_handler);
780
-
781
773
ret = hi3110_hw_reset(spi);
782
774
if (ret)
783
-
goto out_free_wq;
775
+
goto out_free_irq;
784
776
785
777
ret = hi3110_setup(net);
786
778
if (ret)
787
-
goto out_free_wq;
779
+
goto out_free_irq;
788
780
789
781
ret = hi3110_set_normal_mode(spi);
790
782
if (ret)
791
-
goto out_free_wq;
783
+
goto out_free_irq;
792
784
793
785
netif_wake_queue(net);
794
786
mutex_unlock(&priv->hi3110_lock);
795
787
796
788
return 0;
797
789
798
-
out_free_wq:
799
-
destroy_workqueue(priv->wq);
800
790
out_free_irq:
801
791
free_irq(spi->irq, priv);
802
792
hi3110_hw_sleep(spi);
···
799
813
.ndo_open = hi3110_open,
800
814
.ndo_stop = hi3110_stop,
801
815
.ndo_start_xmit = hi3110_hard_start_xmit,
816
+
.ndo_change_mtu = can_change_mtu,
802
817
};
803
818
804
819
static const struct ethtool_ops hi3110_ethtool_ops = {
···
896
909
if (ret)
897
910
goto out_clk;
898
911
912
+
priv->wq = alloc_workqueue("hi3110_wq",
913
+
WQ_FREEZABLE | WQ_MEM_RECLAIM | WQ_PERCPU,
914
+
0);
915
+
if (!priv->wq) {
916
+
ret = -ENOMEM;
917
+
goto out_clk;
918
+
}
919
+
INIT_WORK(&priv->tx_work, hi3110_tx_work_handler);
920
+
INIT_WORK(&priv->restart_work, hi3110_restart_work_handler);
921
+
899
922
priv->spi = spi;
900
923
mutex_init(&priv->hi3110_lock);
901
924
···
941
944
return 0;
942
945
943
946
error_probe:
947
+
destroy_workqueue(priv->wq);
948
+
priv->wq = NULL;
944
949
hi3110_power_enable(priv->power, 0);
945
950
946
951
out_clk:
···
962
963
unregister_candev(net);
963
964
964
965
hi3110_power_enable(priv->power, 0);
966
+
967
+
destroy_workqueue(priv->wq);
968
+
priv->wq = NULL;
965
969
966
970
clk_disable_unprepare(priv->clk);
967
971
+1
drivers/net/can/sun4i_can.c
+1
drivers/net/can/sun4i_can.c
+2
-1
drivers/net/can/usb/etas_es58x/es58x_core.c
+2
-1
drivers/net/can/usb/etas_es58x/es58x_core.c
···
7
7
*
8
8
* Copyright (c) 2019 Robert Bosch Engineering and Business Solutions. All rights reserved.
9
9
* Copyright (c) 2020 ETAS K.K.. All rights reserved.
10
-
* Copyright (c) 2020-2022 Vincent Mailhol <mailhol.vincent@wanadoo.fr>
10
+
* Copyright (c) 2020-2025 Vincent Mailhol <mailhol@kernel.org>
11
11
*/
12
12
13
13
#include <linux/unaligned.h>
···
1977
1977
.ndo_stop = es58x_stop,
1978
1978
.ndo_start_xmit = es58x_start_xmit,
1979
1979
.ndo_eth_ioctl = can_eth_ioctl_hwts,
1980
+
.ndo_change_mtu = can_change_mtu,
1980
1981
};
1981
1982
1982
1983
static const struct ethtool_ops es58x_ethtool_ops = {
+1
drivers/net/can/usb/mcba_usb.c
+1
drivers/net/can/usb/mcba_usb.c
+1
-1
drivers/net/can/usb/peak_usb/pcan_usb_core.c
+1
-1
drivers/net/can/usb/peak_usb/pcan_usb_core.c
···
111
111
u32 delta_ts = time_ref->ts_dev_2 - time_ref->ts_dev_1;
112
112
113
113
if (time_ref->ts_dev_2 < time_ref->ts_dev_1)
114
-
delta_ts &= (1 << time_ref->adapter->ts_used_bits) - 1;
114
+
delta_ts &= (1ULL << time_ref->adapter->ts_used_bits) - 1;
115
115
116
116
time_ref->ts_total += delta_ts;
117
117
}
+16
-5
drivers/net/dsa/lantiq/lantiq_gswip.c
+16
-5
drivers/net/dsa/lantiq/lantiq_gswip.c
···
458
458
return 0;
459
459
}
460
460
461
-
static int gswip_port_enable(struct dsa_switch *ds, int port,
462
-
struct phy_device *phydev)
461
+
static int gswip_port_setup(struct dsa_switch *ds, int port)
463
462
{
464
463
struct gswip_priv *priv = ds->priv;
465
464
int err;
466
465
467
466
if (!dsa_is_cpu_port(ds, port)) {
468
-
u32 mdio_phy = 0;
469
-
470
467
err = gswip_add_single_port_br(priv, port, true);
471
468
if (err)
472
469
return err;
470
+
}
471
+
472
+
return 0;
473
+
}
474
+
475
+
static int gswip_port_enable(struct dsa_switch *ds, int port,
476
+
struct phy_device *phydev)
477
+
{
478
+
struct gswip_priv *priv = ds->priv;
479
+
480
+
if (!dsa_is_cpu_port(ds, port)) {
481
+
u32 mdio_phy = 0;
473
482
474
483
if (phydev)
475
484
mdio_phy = phydev->mdio.addr & GSWIP_MDIO_PHY_ADDR_MASK;
···
1150
1141
int i;
1151
1142
int err;
1152
1143
1144
+
/* Operation not supported on the CPU port, don't throw errors */
1153
1145
if (!bridge)
1154
-
return -EINVAL;
1146
+
return 0;
1155
1147
1156
1148
for (i = max_ports; i < ARRAY_SIZE(priv->vlans); i++) {
1157
1149
if (priv->vlans[i].bridge == bridge) {
···
1646
1636
static const struct dsa_switch_ops gswip_switch_ops = {
1647
1637
.get_tag_protocol = gswip_get_tag_protocol,
1648
1638
.setup = gswip_setup,
1639
+
.port_setup = gswip_port_setup,
1649
1640
.port_enable = gswip_port_enable,
1650
1641
.port_disable = gswip_port_disable,
1651
1642
.port_bridge_join = gswip_port_bridge_join,
+1
-1
drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c
+1
-1
drivers/net/ethernet/broadcom/bnxt/bnxt_tc.c
···
244
244
offset < offset_of_ip6_daddr + 16) {
245
245
actions->nat.src_xlate = false;
246
246
idx = (offset - offset_of_ip6_daddr) / 4;
247
-
actions->nat.l3.ipv6.saddr.s6_addr32[idx] = htonl(val);
247
+
actions->nat.l3.ipv6.daddr.s6_addr32[idx] = htonl(val);
248
248
} else {
249
249
netdev_err(bp->dev,
250
250
"%s: IPv6_hdr: Invalid pedit field\n",
+2
-1
drivers/net/ethernet/intel/i40e/i40e.h
+2
-1
drivers/net/ethernet/intel/i40e/i40e.h
···
1278
1278
const u8 *macaddr);
1279
1279
int i40e_del_mac_filter(struct i40e_vsi *vsi, const u8 *macaddr);
1280
1280
bool i40e_is_vsi_in_vlan(struct i40e_vsi *vsi);
1281
-
int i40e_count_filters(struct i40e_vsi *vsi);
1281
+
int i40e_count_all_filters(struct i40e_vsi *vsi);
1282
+
int i40e_count_active_filters(struct i40e_vsi *vsi);
1282
1283
struct i40e_mac_filter *i40e_find_mac(struct i40e_vsi *vsi, const u8 *macaddr);
1283
1284
void i40e_vlan_stripping_enable(struct i40e_vsi *vsi);
1284
1285
static inline bool i40e_is_sw_dcb(struct i40e_pf *pf)
+22
-4
drivers/net/ethernet/intel/i40e/i40e_main.c
+22
-4
drivers/net/ethernet/intel/i40e/i40e_main.c
···
1243
1243
}
1244
1244
1245
1245
/**
1246
-
* i40e_count_filters - counts VSI mac filters
1246
+
* i40e_count_all_filters - counts VSI MAC filters
1247
1247
* @vsi: the VSI to be searched
1248
1248
*
1249
-
* Returns count of mac filters
1250
-
**/
1251
-
int i40e_count_filters(struct i40e_vsi *vsi)
1249
+
* Return: count of MAC filters in any state.
1250
+
*/
1251
+
int i40e_count_all_filters(struct i40e_vsi *vsi)
1252
+
{
1253
+
struct i40e_mac_filter *f;
1254
+
struct hlist_node *h;
1255
+
int bkt, cnt = 0;
1256
+
1257
+
hash_for_each_safe(vsi->mac_filter_hash, bkt, h, f, hlist)
1258
+
cnt++;
1259
+
1260
+
return cnt;
1261
+
}
1262
+
1263
+
/**
1264
+
* i40e_count_active_filters - counts VSI MAC filters
1265
+
* @vsi: the VSI to be searched
1266
+
*
1267
+
* Return: count of active MAC filters.
1268
+
*/
1269
+
int i40e_count_active_filters(struct i40e_vsi *vsi)
1252
1270
{
1253
1271
struct i40e_mac_filter *f;
1254
1272
struct hlist_node *h;
+64
-46
drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
+64
-46
drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.c
···
448
448
(qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
449
449
(pf_queue_id << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
450
450
BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
451
-
(itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
451
+
FIELD_PREP(I40E_QINT_RQCTL_ITR_INDX_MASK, itr_idx);
452
452
wr32(hw, reg_idx, reg);
453
453
}
454
454
···
653
653
654
654
/* only set the required fields */
655
655
tx_ctx.base = info->dma_ring_addr / 128;
656
+
657
+
/* ring_len has to be multiple of 8 */
658
+
if (!IS_ALIGNED(info->ring_len, 8) ||
659
+
info->ring_len > I40E_MAX_NUM_DESCRIPTORS_XL710) {
660
+
ret = -EINVAL;
661
+
goto error_context;
662
+
}
656
663
tx_ctx.qlen = info->ring_len;
657
664
tx_ctx.rdylist = le16_to_cpu(vsi->info.qs_handle[0]);
658
665
tx_ctx.rdylist_act = 0;
···
723
716
724
717
/* only set the required fields */
725
718
rx_ctx.base = info->dma_ring_addr / 128;
719
+
720
+
/* ring_len has to be multiple of 32 */
721
+
if (!IS_ALIGNED(info->ring_len, 32) ||
722
+
info->ring_len > I40E_MAX_NUM_DESCRIPTORS_XL710) {
723
+
ret = -EINVAL;
724
+
goto error_param;
725
+
}
726
726
rx_ctx.qlen = info->ring_len;
727
727
728
728
if (info->splithdr_enabled) {
···
1464
1450
* functions that may still be running at this point.
1465
1451
*/
1466
1452
clear_bit(I40E_VF_STATE_INIT, &vf->vf_states);
1453
+
clear_bit(I40E_VF_STATE_RESOURCES_LOADED, &vf->vf_states);
1467
1454
1468
1455
/* In the case of a VFLR, the HW has already reset the VF and we
1469
1456
* just need to clean up, so don't hit the VFRTRIG register.
···
2131
2116
size_t len = 0;
2132
2117
int ret;
2133
2118
2134
-
if (!i40e_sync_vf_state(vf, I40E_VF_STATE_INIT)) {
2119
+
i40e_sync_vf_state(vf, I40E_VF_STATE_INIT);
2120
+
2121
+
if (!test_bit(I40E_VF_STATE_INIT, &vf->vf_states) ||
2122
+
test_bit(I40E_VF_STATE_RESOURCES_LOADED, &vf->vf_states)) {
2135
2123
aq_ret = -EINVAL;
2136
2124
goto err;
2137
2125
}
···
2237
2219
vf->default_lan_addr.addr);
2238
2220
}
2239
2221
set_bit(I40E_VF_STATE_ACTIVE, &vf->vf_states);
2222
+
set_bit(I40E_VF_STATE_RESOURCES_LOADED, &vf->vf_states);
2240
2223
2241
2224
err:
2242
2225
/* send the response back to the VF */
···
2400
2381
}
2401
2382
2402
2383
if (vf->adq_enabled) {
2403
-
if (idx >= ARRAY_SIZE(vf->ch)) {
2384
+
if (idx >= vf->num_tc) {
2404
2385
aq_ret = -ENODEV;
2405
2386
goto error_param;
2406
2387
}
···
2421
2402
* to its appropriate VSIs based on TC mapping
2422
2403
*/
2423
2404
if (vf->adq_enabled) {
2424
-
if (idx >= ARRAY_SIZE(vf->ch)) {
2405
+
if (idx >= vf->num_tc) {
2425
2406
aq_ret = -ENODEV;
2426
2407
goto error_param;
2427
2408
}
···
2471
2452
u16 vsi_queue_id, queue_id;
2472
2453
2473
2454
for_each_set_bit(vsi_queue_id, &queuemap, I40E_MAX_VSI_QP) {
2474
-
if (vf->adq_enabled) {
2475
-
vsi_id = vf->ch[vsi_queue_id / I40E_MAX_VF_VSI].vsi_id;
2455
+
u16 idx = vsi_queue_id / I40E_MAX_VF_VSI;
2456
+
2457
+
if (vf->adq_enabled && idx < vf->num_tc) {
2458
+
vsi_id = vf->ch[idx].vsi_id;
2476
2459
queue_id = (vsi_queue_id % I40E_DEFAULT_QUEUES_PER_VF);
2477
2460
} else {
2478
2461
queue_id = vsi_queue_id;
···
2862
2841
(u8 *)&stats, sizeof(stats));
2863
2842
}
2864
2843
2865
-
/**
2866
-
* i40e_can_vf_change_mac
2867
-
* @vf: pointer to the VF info
2868
-
*
2869
-
* Return true if the VF is allowed to change its MAC filters, false otherwise
2870
-
*/
2871
-
static bool i40e_can_vf_change_mac(struct i40e_vf *vf)
2872
-
{
2873
-
/* If the VF MAC address has been set administratively (via the
2874
-
* ndo_set_vf_mac command), then deny permission to the VF to
2875
-
* add/delete unicast MAC addresses, unless the VF is trusted
2876
-
*/
2877
-
if (vf->pf_set_mac && !vf->trusted)
2878
-
return false;
2879
-
2880
-
return true;
2881
-
}
2882
-
2883
2844
#define I40E_MAX_MACVLAN_PER_HW 3072
2884
2845
#define I40E_MAX_MACVLAN_PER_PF(num_ports) (I40E_MAX_MACVLAN_PER_HW / \
2885
2846
(num_ports))
···
2900
2897
struct i40e_pf *pf = vf->pf;
2901
2898
struct i40e_vsi *vsi = pf->vsi[vf->lan_vsi_idx];
2902
2899
struct i40e_hw *hw = &pf->hw;
2903
-
int mac2add_cnt = 0;
2904
-
int i;
2900
+
int i, mac_add_max, mac_add_cnt = 0;
2901
+
bool vf_trusted;
2902
+
2903
+
vf_trusted = test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps);
2905
2904
2906
2905
for (i = 0; i < al->num_elements; i++) {
2907
2906
struct i40e_mac_filter *f;
···
2923
2918
* The VF may request to set the MAC address filter already
2924
2919
* assigned to it so do not return an error in that case.
2925
2920
*/
2926
-
if (!i40e_can_vf_change_mac(vf) &&
2927
-
!is_multicast_ether_addr(addr) &&
2928
-
!ether_addr_equal(addr, vf->default_lan_addr.addr)) {
2921
+
if (!vf_trusted && !is_multicast_ether_addr(addr) &&
2922
+
vf->pf_set_mac && !ether_addr_equal(addr, vf->default_lan_addr.addr)) {
2929
2923
dev_err(&pf->pdev->dev,
2930
2924
"VF attempting to override administratively set MAC address, bring down and up the VF interface to resume normal operation\n");
2931
2925
return -EPERM;
···
2933
2929
/*count filters that really will be added*/
2934
2930
f = i40e_find_mac(vsi, addr);
2935
2931
if (!f)
2936
-
++mac2add_cnt;
2932
+
++mac_add_cnt;
2937
2933
}
2938
2934
2939
2935
/* If this VF is not privileged, then we can't add more than a limited
2940
-
* number of addresses. Check to make sure that the additions do not
2941
-
* push us over the limit.
2942
-
*/
2943
-
if (!test_bit(I40E_VIRTCHNL_VF_CAP_PRIVILEGE, &vf->vf_caps)) {
2944
-
if ((i40e_count_filters(vsi) + mac2add_cnt) >
2945
-
I40E_VC_MAX_MAC_ADDR_PER_VF) {
2946
-
dev_err(&pf->pdev->dev,
2947
-
"Cannot add more MAC addresses, VF is not trusted, switch the VF to trusted to add more functionality\n");
2948
-
return -EPERM;
2949
-
}
2950
-
/* If this VF is trusted, it can use more resources than untrusted.
2936
+
* number of addresses.
2937
+
*
2938
+
* If this VF is trusted, it can use more resources than untrusted.
2951
2939
* However to ensure that every trusted VF has appropriate number of
2952
2940
* resources, divide whole pool of resources per port and then across
2953
2941
* all VFs.
2954
2942
*/
2955
-
} else {
2956
-
if ((i40e_count_filters(vsi) + mac2add_cnt) >
2957
-
I40E_VC_MAX_MACVLAN_PER_TRUSTED_VF(pf->num_alloc_vfs,
2958
-
hw->num_ports)) {
2943
+
if (!vf_trusted)
2944
+
mac_add_max = I40E_VC_MAX_MAC_ADDR_PER_VF;
2945
+
else
2946
+
mac_add_max = I40E_VC_MAX_MACVLAN_PER_TRUSTED_VF(pf->num_alloc_vfs, hw->num_ports);
2947
+
2948
+
/* VF can replace all its filters in one step, in this case mac_add_max
2949
+
* will be added as active and another mac_add_max will be in
2950
+
* a to-be-removed state. Account for that.
2951
+
*/
2952
+
if ((i40e_count_active_filters(vsi) + mac_add_cnt) > mac_add_max ||
2953
+
(i40e_count_all_filters(vsi) + mac_add_cnt) > 2 * mac_add_max) {
2954
+
if (!vf_trusted) {
2955
+
dev_err(&pf->pdev->dev,
2956
+
"Cannot add more MAC addresses, VF is not trusted, switch the VF to trusted to add more functionality\n");
2957
+
return -EPERM;
2958
+
} else {
2959
2959
dev_err(&pf->pdev->dev,
2960
2960
"Cannot add more MAC addresses, trusted VF exhausted it's resources\n");
2961
2961
return -EPERM;
···
3595
3587
3596
3588
/* action_meta is TC number here to which the filter is applied */
3597
3589
if (!tc_filter->action_meta ||
3598
-
tc_filter->action_meta > vf->num_tc) {
3590
+
tc_filter->action_meta >= vf->num_tc) {
3599
3591
dev_info(&pf->pdev->dev, "VF %d: Invalid TC number %u\n",
3600
3592
vf->vf_id, tc_filter->action_meta);
3601
3593
goto err;
···
3892
3884
aq_ret);
3893
3885
}
3894
3886
3887
+
#define I40E_MAX_VF_CLOUD_FILTER 0xFF00
3888
+
3895
3889
/**
3896
3890
* i40e_vc_add_cloud_filter
3897
3891
* @vf: pointer to the VF info
···
3930
3920
"VF %d: Invalid input/s, can't apply cloud filter\n",
3931
3921
vf->vf_id);
3932
3922
aq_ret = -EINVAL;
3923
+
goto err_out;
3924
+
}
3925
+
3926
+
if (vf->num_cloud_filters >= I40E_MAX_VF_CLOUD_FILTER) {
3927
+
dev_warn(&pf->pdev->dev,
3928
+
"VF %d: Max number of filters reached, can't apply cloud filter\n",
3929
+
vf->vf_id);
3930
+
aq_ret = -ENOSPC;
3933
3931
goto err_out;
3934
3932
}
3935
3933
+2
-1
drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h
+2
-1
drivers/net/ethernet/intel/i40e/i40e_virtchnl_pf.h
+1
-1
drivers/net/ethernet/intel/libie/adminq.c
+1
-1
drivers/net/ethernet/intel/libie/adminq.c
+1
-2
drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+1
-2
drivers/net/ethernet/marvell/octeontx2/af/cgx.c
+1
-1
drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c
+1
-1
drivers/net/ethernet/marvell/octeontx2/nic/otx2_tc.c
···
1326
1326
1327
1327
free_leaf:
1328
1328
otx2_tc_del_from_flow_list(flow_cfg, new_node);
1329
-
kfree_rcu(new_node, rcu);
1330
1329
if (new_node->is_act_police) {
1331
1330
mutex_lock(&nic->mbox.lock);
1332
1331
···
1345
1346
1346
1347
mutex_unlock(&nic->mbox.lock);
1347
1348
}
1349
+
kfree_rcu(new_node, rcu);
1348
1350
1349
1351
return rc;
1350
1352
}
+1
drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
+1
drivers/net/ethernet/mellanox/mlx5/core/en_stats.c
+1
-1
drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
+1
-1
drivers/net/ethernet/mellanox/mlx5/core/fs_core.c
···
663
663
BIT(MLX5_SET_FTE_MODIFY_ENABLE_MASK_ACTION) |
664
664
BIT(MLX5_SET_FTE_MODIFY_ENABLE_MASK_FLOW_COUNTERS);
665
665
fte->act_dests.action.action &= ~MLX5_FLOW_CONTEXT_ACTION_COUNT;
666
-
mlx5_fc_local_destroy(rule->dest_attr.counter);
666
+
mlx5_fc_local_put(rule->dest_attr.counter);
667
667
goto out;
668
668
}
669
669
+1
drivers/net/ethernet/mellanox/mlx5/core/fs_core.h
+1
drivers/net/ethernet/mellanox/mlx5/core/fs_core.h
+22
-3
drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c
+22
-3
drivers/net/ethernet/mellanox/mlx5/core/fs_counters.c
···
562
562
counter->id = counter_id;
563
563
fc_bulk->base_id = counter_id - offset;
564
564
fc_bulk->fs_bulk.bulk_len = bulk_size;
565
+
refcount_set(&fc_bulk->hws_data.hws_action_refcount, 0);
566
+
mutex_init(&fc_bulk->hws_data.lock);
565
567
counter->bulk = fc_bulk;
568
+
refcount_set(&counter->fc_local_refcount, 1);
566
569
return counter;
567
570
}
568
571
EXPORT_SYMBOL(mlx5_fc_local_create);
569
572
570
573
void mlx5_fc_local_destroy(struct mlx5_fc *counter)
571
574
{
572
-
if (!counter || counter->type != MLX5_FC_TYPE_LOCAL)
573
-
return;
574
-
575
575
kfree(counter->bulk);
576
576
kfree(counter);
577
577
}
578
578
EXPORT_SYMBOL(mlx5_fc_local_destroy);
579
+
580
+
void mlx5_fc_local_get(struct mlx5_fc *counter)
581
+
{
582
+
if (!counter || counter->type != MLX5_FC_TYPE_LOCAL)
583
+
return;
584
+
585
+
refcount_inc(&counter->fc_local_refcount);
586
+
}
587
+
588
+
void mlx5_fc_local_put(struct mlx5_fc *counter)
589
+
{
590
+
if (!counter || counter->type != MLX5_FC_TYPE_LOCAL)
591
+
return;
592
+
593
+
if (!refcount_dec_and_test(&counter->fc_local_refcount))
594
+
return;
595
+
596
+
mlx5_fc_local_destroy(counter);
597
+
}
+2
-2
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.c
+2
-2
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/action.c
···
1360
1360
struct mlx5hws_action *
1361
1361
mlx5hws_action_create_dest_array(struct mlx5hws_context *ctx, size_t num_dest,
1362
1362
struct mlx5hws_action_dest_attr *dests,
1363
-
bool ignore_flow_level, u32 flags)
1363
+
u32 flags)
1364
1364
{
1365
1365
struct mlx5hws_cmd_set_fte_dest *dest_list = NULL;
1366
1366
struct mlx5hws_cmd_ft_create_attr ft_attr = {0};
···
1397
1397
MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE;
1398
1398
dest_list[i].destination_id = dests[i].dest->dest_obj.obj_id;
1399
1399
fte_attr.action_flags |= MLX5_FLOW_CONTEXT_ACTION_FWD_DEST;
1400
-
fte_attr.ignore_flow_level = ignore_flow_level;
1400
+
fte_attr.ignore_flow_level = 1;
1401
1401
if (dests[i].is_wire_ft)
1402
1402
last_dest_idx = i;
1403
1403
break;
+3
-8
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.c
+3
-8
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws.c
···
572
572
static struct mlx5hws_action *
573
573
mlx5_fs_create_action_dest_array(struct mlx5hws_context *ctx,
574
574
struct mlx5hws_action_dest_attr *dests,
575
-
u32 num_of_dests, bool ignore_flow_level)
575
+
u32 num_of_dests)
576
576
{
577
577
u32 flags = MLX5HWS_ACTION_FLAG_HWS_FDB | MLX5HWS_ACTION_FLAG_SHARED;
578
578
579
579
return mlx5hws_action_create_dest_array(ctx, num_of_dests, dests,
580
-
ignore_flow_level, flags);
580
+
flags);
581
581
}
582
582
583
583
static struct mlx5hws_action *
···
1014
1014
}
1015
1015
(*ractions)[num_actions++].action = dest_actions->dest;
1016
1016
} else if (num_dest_actions > 1) {
1017
-
bool ignore_flow_level;
1018
-
1019
1017
if (num_actions == MLX5_FLOW_CONTEXT_ACTION_MAX ||
1020
1018
num_fs_actions == MLX5_FLOW_CONTEXT_ACTION_MAX) {
1021
1019
err = -EOPNOTSUPP;
1022
1020
goto free_actions;
1023
1021
}
1024
-
ignore_flow_level =
1025
-
!!(fte_action->flags & FLOW_ACT_IGNORE_FLOW_LEVEL);
1026
1022
tmp_action =
1027
1023
mlx5_fs_create_action_dest_array(ctx, dest_actions,
1028
-
num_dest_actions,
1029
-
ignore_flow_level);
1024
+
num_dest_actions);
1030
1025
if (!tmp_action) {
1031
1026
err = -EOPNOTSUPP;
1032
1027
goto free_actions;
+7
-1
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws_pools.c
+7
-1
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/fs_hws_pools.c
···
407
407
{
408
408
struct mlx5_fs_hws_create_action_ctx create_ctx;
409
409
struct mlx5_fc_bulk *fc_bulk = counter->bulk;
410
+
struct mlx5hws_action *hws_action;
410
411
411
412
create_ctx.hws_ctx = ctx;
412
413
create_ctx.id = fc_bulk->base_id;
413
414
create_ctx.actions_type = MLX5HWS_ACTION_TYP_CTR;
414
415
415
-
return mlx5_fs_get_hws_action(&fc_bulk->hws_data, &create_ctx);
416
+
mlx5_fc_local_get(counter);
417
+
hws_action = mlx5_fs_get_hws_action(&fc_bulk->hws_data, &create_ctx);
418
+
if (!hws_action)
419
+
mlx5_fc_local_put(counter);
420
+
return hws_action;
416
421
}
417
422
418
423
void mlx5_fc_put_hws_action(struct mlx5_fc *counter)
419
424
{
420
425
mlx5_fs_put_hws_action(&counter->bulk->hws_data);
426
+
mlx5_fc_local_put(counter);
421
427
}
+1
-2
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws.h
+1
-2
drivers/net/ethernet/mellanox/mlx5/core/steering/hws/mlx5hws.h
···
735
735
* @num_dest: The number of dests attributes.
736
736
* @dests: The destination array. Each contains a destination action and can
737
737
* have additional actions.
738
-
* @ignore_flow_level: Whether to turn on 'ignore_flow_level' for this dest.
739
738
* @flags: Action creation flags (enum mlx5hws_action_flags).
740
739
*
741
740
* Return: pointer to mlx5hws_action on success NULL otherwise.
···
742
743
struct mlx5hws_action *
743
744
mlx5hws_action_create_dest_array(struct mlx5hws_context *ctx, size_t num_dest,
744
745
struct mlx5hws_action_dest_attr *dests,
745
-
bool ignore_flow_level, u32 flags);
746
+
u32 flags);
746
747
747
748
/**
748
749
* mlx5hws_action_create_insert_header - Create insert header action.
+2
-4
drivers/net/phy/bcm-phy-ptp.c
+2
-4
drivers/net/phy/bcm-phy-ptp.c
···
597
597
598
598
period = BCM_MAX_PERIOD_8NS; /* write nonzero value */
599
599
600
-
/* Reject unsupported flags */
601
-
if (req->flags & ~PTP_PEROUT_DUTY_CYCLE)
602
-
return -EOPNOTSUPP;
603
-
604
600
if (req->flags & PTP_PEROUT_DUTY_CYCLE)
605
601
pulse = ktime_to_ns(ktime_set(req->on.sec, req->on.nsec));
606
602
else
···
737
741
.n_pins = 1,
738
742
.n_per_out = 1,
739
743
.n_ext_ts = 1,
744
+
.supported_perout_flags = PTP_PEROUT_DUTY_CYCLE,
745
+
.supported_extts_flags = PTP_STRICT_FLAGS | PTP_RISING_EDGE,
740
746
};
741
747
742
748
static void bcm_ptp_txtstamp(struct mii_timestamper *mii_ts,
+3
drivers/net/tun.c
+3
drivers/net/tun.c
+17
-14
drivers/pinctrl/mediatek/pinctrl-airoha.c
+17
-14
drivers/pinctrl/mediatek/pinctrl-airoha.c
···
108
108
#define JTAG_UDI_EN_MASK BIT(4)
109
109
#define JTAG_DFD_EN_MASK BIT(3)
110
110
111
+
#define REG_FORCE_GPIO_EN 0x0228
112
+
#define FORCE_GPIO_EN(n) BIT(n)
113
+
111
114
/* LED MAP */
112
115
#define REG_LAN_LED0_MAPPING 0x027c
113
116
#define REG_LAN_LED1_MAPPING 0x0280
···
722
719
.name = "mdio",
723
720
.regmap[0] = {
724
721
AIROHA_FUNC_MUX,
725
-
REG_GPIO_PON_MODE,
726
-
GPIO_SGMII_MDIO_MODE_MASK,
727
-
GPIO_SGMII_MDIO_MODE_MASK
728
-
},
729
-
.regmap[1] = {
730
-
AIROHA_FUNC_MUX,
731
722
REG_GPIO_2ND_I2C_MODE,
732
723
GPIO_MDC_IO_MASTER_MODE_MODE,
733
724
GPIO_MDC_IO_MASTER_MODE_MODE
725
+
},
726
+
.regmap[1] = {
727
+
AIROHA_FUNC_MUX,
728
+
REG_FORCE_GPIO_EN,
729
+
FORCE_GPIO_EN(1) | FORCE_GPIO_EN(2),
730
+
FORCE_GPIO_EN(1) | FORCE_GPIO_EN(2)
734
731
},
735
732
.regmap_size = 2,
736
733
},
···
1755
1752
.regmap[0] = {
1756
1753
AIROHA_FUNC_MUX,
1757
1754
REG_GPIO_2ND_I2C_MODE,
1758
-
GPIO_LAN3_LED0_MODE_MASK,
1759
-
GPIO_LAN3_LED0_MODE_MASK
1755
+
GPIO_LAN3_LED1_MODE_MASK,
1756
+
GPIO_LAN3_LED1_MODE_MASK
1760
1757
},
1761
1758
.regmap[1] = {
1762
1759
AIROHA_FUNC_MUX,
···
1819
1816
.regmap[0] = {
1820
1817
AIROHA_FUNC_MUX,
1821
1818
REG_GPIO_2ND_I2C_MODE,
1822
-
GPIO_LAN3_LED0_MODE_MASK,
1823
-
GPIO_LAN3_LED0_MODE_MASK
1819
+
GPIO_LAN3_LED1_MODE_MASK,
1820
+
GPIO_LAN3_LED1_MODE_MASK
1824
1821
},
1825
1822
.regmap[1] = {
1826
1823
AIROHA_FUNC_MUX,
···
1883
1880
.regmap[0] = {
1884
1881
AIROHA_FUNC_MUX,
1885
1882
REG_GPIO_2ND_I2C_MODE,
1886
-
GPIO_LAN3_LED0_MODE_MASK,
1887
-
GPIO_LAN3_LED0_MODE_MASK
1883
+
GPIO_LAN3_LED1_MODE_MASK,
1884
+
GPIO_LAN3_LED1_MODE_MASK
1888
1885
},
1889
1886
.regmap[1] = {
1890
1887
AIROHA_FUNC_MUX,
···
1947
1944
.regmap[0] = {
1948
1945
AIROHA_FUNC_MUX,
1949
1946
REG_GPIO_2ND_I2C_MODE,
1950
-
GPIO_LAN3_LED0_MODE_MASK,
1951
-
GPIO_LAN3_LED0_MODE_MASK
1947
+
GPIO_LAN3_LED1_MODE_MASK,
1948
+
GPIO_LAN3_LED1_MODE_MASK
1952
1949
},
1953
1950
.regmap[1] = {
1954
1951
AIROHA_FUNC_MUX,
+14
-6
drivers/pmdomain/core.c
+14
-6
drivers/pmdomain/core.c
···
187
187
#define genpd_is_opp_table_fw(genpd) (genpd->flags & GENPD_FLAG_OPP_TABLE_FW)
188
188
#define genpd_is_dev_name_fw(genpd) (genpd->flags & GENPD_FLAG_DEV_NAME_FW)
189
189
#define genpd_is_no_sync_state(genpd) (genpd->flags & GENPD_FLAG_NO_SYNC_STATE)
190
+
#define genpd_is_no_stay_on(genpd) (genpd->flags & GENPD_FLAG_NO_STAY_ON)
190
191
191
192
static inline bool irq_safe_dev_in_sleep_domain(struct device *dev,
192
193
const struct generic_pm_domain *genpd)
···
1358
1357
return ret;
1359
1358
}
1360
1359
1361
-
#ifndef CONFIG_PM_GENERIC_DOMAINS_OF
1362
1360
static bool pd_ignore_unused;
1363
1361
static int __init pd_ignore_unused_setup(char *__unused)
1364
1362
{
···
1382
1382
mutex_lock(&gpd_list_lock);
1383
1383
1384
1384
list_for_each_entry(genpd, &gpd_list, gpd_list_node) {
1385
-
genpd_lock(genpd);
1386
-
genpd->stay_on = false;
1387
-
genpd_unlock(genpd);
1388
1385
genpd_queue_power_off_work(genpd);
1389
1386
}
1390
1387
···
1390
1393
return 0;
1391
1394
}
1392
1395
late_initcall_sync(genpd_power_off_unused);
1393
-
#endif
1394
1396
1395
1397
#ifdef CONFIG_PM_SLEEP
1396
1398
···
2363
2367
}
2364
2368
}
2365
2369
2370
+
#ifdef CONFIG_PM_GENERIC_DOMAINS_OF
2371
+
static void genpd_set_stay_on(struct generic_pm_domain *genpd, bool is_off)
2372
+
{
2373
+
genpd->stay_on = !genpd_is_no_stay_on(genpd) && !is_off;
2374
+
}
2375
+
#else
2376
+
static void genpd_set_stay_on(struct generic_pm_domain *genpd, bool is_off)
2377
+
{
2378
+
genpd->stay_on = false;
2379
+
}
2380
+
#endif
2381
+
2366
2382
/**
2367
2383
* pm_genpd_init - Initialize a generic I/O PM domain object.
2368
2384
* @genpd: PM domain object to initialize.
···
2400
2392
INIT_WORK(&genpd->power_off_work, genpd_power_off_work_fn);
2401
2393
atomic_set(&genpd->sd_count, 0);
2402
2394
genpd->status = is_off ? GENPD_STATE_OFF : GENPD_STATE_ON;
2403
-
genpd->stay_on = !is_off;
2395
+
genpd_set_stay_on(genpd, is_off);
2404
2396
genpd->sync_state = GENPD_SYNC_STATE_OFF;
2405
2397
genpd->device_count = 0;
2406
2398
genpd->provider = NULL;
+1
drivers/pmdomain/renesas/rcar-gen4-sysc.c
+1
drivers/pmdomain/renesas/rcar-gen4-sysc.c
+2
-1
drivers/pmdomain/renesas/rcar-sysc.c
+2
-1
drivers/pmdomain/renesas/rcar-sysc.c
···
241
241
}
242
242
}
243
243
244
+
genpd->flags |= GENPD_FLAG_NO_STAY_ON;
244
245
genpd->power_off = rcar_sysc_pd_power_off;
245
246
genpd->power_on = rcar_sysc_pd_power_on;
246
247
···
343
342
};
344
343
345
344
static struct genpd_onecell_data *rcar_sysc_onecell_data;
346
-
static struct device_node *rcar_sysc_onecell_np;
345
+
static struct device_node *rcar_sysc_onecell_np __initdata = NULL;
347
346
348
347
static int __init rcar_sysc_pd_init(void)
349
348
{
+2
-1
drivers/pmdomain/renesas/rmobile-sysc.c
+2
-1
drivers/pmdomain/renesas/rmobile-sysc.c
···
100
100
struct generic_pm_domain *genpd = &rmobile_pd->genpd;
101
101
struct dev_power_governor *gov = rmobile_pd->gov;
102
102
103
-
genpd->flags |= GENPD_FLAG_PM_CLK | GENPD_FLAG_ACTIVE_WAKEUP;
103
+
genpd->flags |= GENPD_FLAG_PM_CLK | GENPD_FLAG_ACTIVE_WAKEUP |
104
+
GENPD_FLAG_NO_STAY_ON;
104
105
genpd->attach_dev = cpg_mstp_attach_dev;
105
106
genpd->detach_dev = cpg_mstp_detach_dev;
106
107
+1
-1
drivers/pmdomain/rockchip/pm-domains.c
+1
-1
drivers/pmdomain/rockchip/pm-domains.c
···
865
865
pd->genpd.power_on = rockchip_pd_power_on;
866
866
pd->genpd.attach_dev = rockchip_pd_attach_dev;
867
867
pd->genpd.detach_dev = rockchip_pd_detach_dev;
868
-
pd->genpd.flags = GENPD_FLAG_PM_CLK;
868
+
pd->genpd.flags = GENPD_FLAG_PM_CLK | GENPD_FLAG_NO_STAY_ON;
869
869
if (pd_info->active_wakeup)
870
870
pd->genpd.flags |= GENPD_FLAG_ACTIVE_WAKEUP;
871
871
pm_genpd_init(&pd->genpd, NULL,
+11
drivers/reset/reset-eyeq.c
+11
drivers/reset/reset-eyeq.c
···
410
410
return eqr_of_xlate_internal(rcdev, reset_spec->args[0], reset_spec->args[1]);
411
411
}
412
412
413
+
static void eqr_of_node_put(void *_dev)
414
+
{
415
+
struct device *dev = _dev;
416
+
417
+
of_node_put(dev->of_node);
418
+
}
419
+
413
420
static int eqr_probe(struct auxiliary_device *adev,
414
421
const struct auxiliary_device_id *id)
415
422
{
···
434
427
device_set_of_node_from_dev(dev, dev->parent);
435
428
if (!dev->of_node)
436
429
return -ENODEV;
430
+
431
+
ret = devm_add_action_or_reset(dev, eqr_of_node_put, dev);
432
+
if (ret)
433
+
return ret;
437
434
438
435
/*
439
436
* Using our newfound OF node, we can get match data. We cannot use
+2
-2
drivers/ufs/core/ufs-mcq.c
+2
-2
drivers/ufs/core/ufs-mcq.c
···
243
243
hwq->sqe_base_addr = dmam_alloc_coherent(hba->dev, utrdl_size,
244
244
&hwq->sqe_dma_addr,
245
245
GFP_KERNEL);
246
-
if (!hwq->sqe_dma_addr) {
246
+
if (!hwq->sqe_base_addr) {
247
247
dev_err(hba->dev, "SQE allocation failed\n");
248
248
return -ENOMEM;
249
249
}
···
252
252
hwq->cqe_base_addr = dmam_alloc_coherent(hba->dev, cqe_size,
253
253
&hwq->cqe_dma_addr,
254
254
GFP_KERNEL);
255
-
if (!hwq->cqe_dma_addr) {
255
+
if (!hwq->cqe_base_addr) {
256
256
dev_err(hba->dev, "CQE allocation failed\n");
257
257
return -ENOMEM;
258
258
}
+17
-23
drivers/vhost/net.c
+17
-23
drivers/vhost/net.c
···
765
765
int err;
766
766
int sent_pkts = 0;
767
767
bool sock_can_batch = (sock->sk->sk_sndbuf == INT_MAX);
768
-
bool busyloop_intr;
769
768
bool in_order = vhost_has_feature(vq, VIRTIO_F_IN_ORDER);
770
769
771
770
do {
772
-
busyloop_intr = false;
771
+
bool busyloop_intr = false;
772
+
773
773
if (nvq->done_idx == VHOST_NET_BATCH)
774
774
vhost_tx_batch(net, nvq, sock, &msg);
775
775
···
780
780
break;
781
781
/* Nothing new? Wait for eventfd to tell us they refilled. */
782
782
if (head == vq->num) {
783
-
/* Kicks are disabled at this point, break loop and
784
-
* process any remaining batched packets. Queue will
785
-
* be re-enabled afterwards.
783
+
/* Flush batched packets to handle pending RX
784
+
* work (if busyloop_intr is set) and to avoid
785
+
* unnecessary virtqueue kicks.
786
786
*/
787
+
vhost_tx_batch(net, nvq, sock, &msg);
788
+
if (unlikely(busyloop_intr)) {
789
+
vhost_poll_queue(&vq->poll);
790
+
} else if (unlikely(vhost_enable_notify(&net->dev,
791
+
vq))) {
792
+
vhost_disable_notify(&net->dev, vq);
793
+
continue;
794
+
}
787
795
break;
788
796
}
789
797
···
847
839
++nvq->done_idx;
848
840
} while (likely(!vhost_exceeds_weight(vq, ++sent_pkts, total_len)));
849
841
850
-
/* Kicks are still disabled, dispatch any remaining batched msgs. */
851
842
vhost_tx_batch(net, nvq, sock, &msg);
852
-
853
-
if (unlikely(busyloop_intr))
854
-
/* If interrupted while doing busy polling, requeue the
855
-
* handler to be fair handle_rx as well as other tasks
856
-
* waiting on cpu.
857
-
*/
858
-
vhost_poll_queue(&vq->poll);
859
-
else
860
-
/* All of our work has been completed; however, before
861
-
* leaving the TX handler, do one last check for work,
862
-
* and requeue handler if necessary. If there is no work,
863
-
* queue will be reenabled.
864
-
*/
865
-
vhost_net_busy_poll_try_queue(net, vq);
866
843
}
867
844
868
845
static void handle_tx_zerocopy(struct vhost_net *net, struct socket *sock)
···
1007
1014
}
1008
1015
1009
1016
static int vhost_net_rx_peek_head_len(struct vhost_net *net, struct sock *sk,
1010
-
bool *busyloop_intr, unsigned int count)
1017
+
bool *busyloop_intr, unsigned int *count)
1011
1018
{
1012
1019
struct vhost_net_virtqueue *rnvq = &net->vqs[VHOST_NET_VQ_RX];
1013
1020
struct vhost_net_virtqueue *tnvq = &net->vqs[VHOST_NET_VQ_TX];
···
1017
1024
1018
1025
if (!len && rvq->busyloop_timeout) {
1019
1026
/* Flush batched heads first */
1020
-
vhost_net_signal_used(rnvq, count);
1027
+
vhost_net_signal_used(rnvq, *count);
1028
+
*count = 0;
1021
1029
/* Both tx vq and rx socket were polled here */
1022
1030
vhost_net_busy_poll(net, rvq, tvq, busyloop_intr, true);
1023
1031
···
1174
1180
1175
1181
do {
1176
1182
sock_len = vhost_net_rx_peek_head_len(net, sock->sk,
1177
-
&busyloop_intr, count);
1183
+
&busyloop_intr, &count);
1178
1184
if (!sock_len)
1179
1185
break;
1180
1186
sock_len += sock_hlen;
+1
-1
drivers/vhost/scsi.c
+1
-1
drivers/vhost/scsi.c
···
2884
2884
check_len:
2885
2885
if (strlen(name) >= VHOST_SCSI_NAMELEN) {
2886
2886
pr_err("Emulated %s Address: %s, exceeds"
2887
-
" max: %d\n", name, vhost_scsi_dump_proto_id(tport),
2887
+
" max: %d\n", vhost_scsi_dump_proto_id(tport), name,
2888
2888
VHOST_SCSI_NAMELEN);
2889
2889
kfree(tport);
2890
2890
return ERR_PTR(-EINVAL);
+13
-9
fs/btrfs/compression.c
+13
-9
fs/btrfs/compression.c
···
1616
1616
}
1617
1617
1618
1618
/*
1619
-
* Convert the compression suffix (eg. after "zlib" starting with ":") to
1620
-
* level, unrecognized string will set the default level. Negative level
1621
-
* numbers are allowed.
1619
+
* Convert the compression suffix (eg. after "zlib" starting with ":") to level.
1620
+
*
1621
+
* If the resulting level exceeds the algo's supported levels, it will be clamped.
1622
+
*
1623
+
* Return <0 if no valid string can be found.
1624
+
* Return 0 if everything is fine.
1622
1625
*/
1623
-
int btrfs_compress_str2level(unsigned int type, const char *str)
1626
+
int btrfs_compress_str2level(unsigned int type, const char *str, int *level_ret)
1624
1627
{
1625
1628
int level = 0;
1626
1629
int ret;
1627
1630
1628
-
if (!type)
1631
+
if (!type) {
1632
+
*level_ret = btrfs_compress_set_level(type, level);
1629
1633
return 0;
1634
+
}
1630
1635
1631
1636
if (str[0] == ':') {
1632
1637
ret = kstrtoint(str + 1, 10, &level);
1633
1638
if (ret)
1634
-
level = 0;
1639
+
return ret;
1635
1640
}
1636
1641
1637
-
level = btrfs_compress_set_level(type, level);
1638
-
1639
-
return level;
1642
+
*level_ret = btrfs_compress_set_level(type, level);
1643
+
return 0;
1640
1644
}
+1
-1
fs/btrfs/compression.h
+1
-1
fs/btrfs/compression.h
···
102
102
bool writeback);
103
103
void btrfs_submit_compressed_read(struct btrfs_bio *bbio);
104
104
105
-
int btrfs_compress_str2level(unsigned int type, const char *str);
105
+
int btrfs_compress_str2level(unsigned int type, const char *str, int *level_ret);
106
106
107
107
struct folio *btrfs_alloc_compr_folio(void);
108
108
void btrfs_free_compr_folio(struct folio *folio);
+8
-1
fs/btrfs/ref-verify.c
+8
-1
fs/btrfs/ref-verify.c
···
980
980
if (!btrfs_test_opt(fs_info, REF_VERIFY))
981
981
return 0;
982
982
983
+
extent_root = btrfs_extent_root(fs_info, 0);
984
+
/* If the extent tree is damaged we cannot ignore it (IGNOREBADROOTS). */
985
+
if (IS_ERR(extent_root)) {
986
+
btrfs_warn(fs_info, "ref-verify: extent tree not available, disabling");
987
+
btrfs_clear_opt(fs_info->mount_opt, REF_VERIFY);
988
+
return 0;
989
+
}
990
+
983
991
path = btrfs_alloc_path();
984
992
if (!path)
985
993
return -ENOMEM;
986
994
987
-
extent_root = btrfs_extent_root(fs_info, 0);
988
995
eb = btrfs_read_lock_root_node(extent_root);
989
996
level = btrfs_header_level(eb);
990
997
path->nodes[level] = eb;
+19
-8
fs/btrfs/super.c
+19
-8
fs/btrfs/super.c
···
276
276
const struct fs_parameter *param, int opt)
277
277
{
278
278
const char *string = param->string;
279
+
int ret;
279
280
280
281
/*
281
282
* Provide the same semantics as older kernels that don't use fs
···
295
294
btrfs_clear_opt(ctx->mount_opt, NODATASUM);
296
295
} else if (btrfs_match_compress_type(string, "zlib", true)) {
297
296
ctx->compress_type = BTRFS_COMPRESS_ZLIB;
298
-
ctx->compress_level = btrfs_compress_str2level(BTRFS_COMPRESS_ZLIB,
299
-
string + 4);
297
+
ret = btrfs_compress_str2level(BTRFS_COMPRESS_ZLIB, string + 4,
298
+
&ctx->compress_level);
299
+
if (ret < 0)
300
+
goto error;
300
301
btrfs_set_opt(ctx->mount_opt, COMPRESS);
301
302
btrfs_clear_opt(ctx->mount_opt, NODATACOW);
302
303
btrfs_clear_opt(ctx->mount_opt, NODATASUM);
303
304
} else if (btrfs_match_compress_type(string, "lzo", true)) {
304
305
ctx->compress_type = BTRFS_COMPRESS_LZO;
305
-
ctx->compress_level = btrfs_compress_str2level(BTRFS_COMPRESS_LZO,
306
-
string + 3);
306
+
ret = btrfs_compress_str2level(BTRFS_COMPRESS_LZO, string + 3,
307
+
&ctx->compress_level);
308
+
if (ret < 0)
309
+
goto error;
307
310
if (string[3] == ':' && string[4])
308
311
btrfs_warn(NULL, "Compression level ignored for LZO");
309
312
btrfs_set_opt(ctx->mount_opt, COMPRESS);
···
315
310
btrfs_clear_opt(ctx->mount_opt, NODATASUM);
316
311
} else if (btrfs_match_compress_type(string, "zstd", true)) {
317
312
ctx->compress_type = BTRFS_COMPRESS_ZSTD;
318
-
ctx->compress_level = btrfs_compress_str2level(BTRFS_COMPRESS_ZSTD,
319
-
string + 4);
313
+
ret = btrfs_compress_str2level(BTRFS_COMPRESS_ZSTD, string + 4,
314
+
&ctx->compress_level);
315
+
if (ret < 0)
316
+
goto error;
320
317
btrfs_set_opt(ctx->mount_opt, COMPRESS);
321
318
btrfs_clear_opt(ctx->mount_opt, NODATACOW);
322
319
btrfs_clear_opt(ctx->mount_opt, NODATASUM);
···
329
322
btrfs_clear_opt(ctx->mount_opt, COMPRESS);
330
323
btrfs_clear_opt(ctx->mount_opt, FORCE_COMPRESS);
331
324
} else {
332
-
btrfs_err(NULL, "unrecognized compression value %s", string);
333
-
return -EINVAL;
325
+
ret = -EINVAL;
326
+
goto error;
334
327
}
335
328
return 0;
329
+
error:
330
+
btrfs_err(NULL, "failed to parse compression option '%s'", string);
331
+
return ret;
332
+
336
333
}
337
334
338
335
static int btrfs_parse_param(struct fs_context *fc, struct fs_parameter *param)
+2
-2
fs/btrfs/tree-checker.c
+2
-2
fs/btrfs/tree-checker.c
···
1756
1756
while (ptr < end) {
1757
1757
u16 namelen;
1758
1758
1759
-
if (unlikely(ptr + sizeof(iref) > end)) {
1759
+
if (unlikely(ptr + sizeof(*iref) > end)) {
1760
1760
inode_ref_err(leaf, slot,
1761
1761
"inode ref overflow, ptr %lu end %lu inode_ref_size %zu",
1762
-
ptr, end, sizeof(iref));
1762
+
ptr, end, sizeof(*iref));
1763
1763
return -EUCLEAN;
1764
1764
}
1765
1765
+6
fs/btrfs/zoned.c
+6
fs/btrfs/zoned.c
···
514
514
515
515
if (max_active_zones) {
516
516
if (nactive > max_active_zones) {
517
+
if (bdev_max_active_zones(bdev) == 0) {
518
+
max_active_zones = 0;
519
+
zone_info->max_active_zones = 0;
520
+
goto validate;
521
+
}
517
522
btrfs_err(device->fs_info,
518
523
"zoned: %u active zones on %s exceeds max_active_zones %u",
519
524
nactive, rcu_dereference(device->name),
···
531
526
set_bit(BTRFS_FS_ACTIVE_ZONE_TRACKING, &fs_info->flags);
532
527
}
533
528
529
+
validate:
534
530
/* Validate superblock log */
535
531
nr_zones = BTRFS_NR_SB_LOG_ZONES;
536
532
for (i = 0; i < BTRFS_SUPER_MIRROR_MAX; i++) {
+2
-2
fs/smb/client/cifsproto.h
+2
-2
fs/smb/client/cifsproto.h
···
312
312
313
313
extern void cifs_close_all_deferred_files(struct cifs_tcon *cifs_tcon);
314
314
315
-
extern void cifs_close_deferred_file_under_dentry(struct cifs_tcon *cifs_tcon,
316
-
const char *path);
315
+
void cifs_close_deferred_file_under_dentry(struct cifs_tcon *cifs_tcon,
316
+
struct dentry *dentry);
317
317
318
318
extern void cifs_mark_open_handles_for_deleted_file(struct inode *inode,
319
319
const char *path);
+18
-5
fs/smb/client/inode.c
+18
-5
fs/smb/client/inode.c
···
1984
1984
}
1985
1985
1986
1986
netfs_wait_for_outstanding_io(inode);
1987
-
cifs_close_deferred_file_under_dentry(tcon, full_path);
1987
+
cifs_close_deferred_file_under_dentry(tcon, dentry);
1988
1988
#ifdef CONFIG_CIFS_ALLOW_INSECURE_LEGACY
1989
1989
if (cap_unix(tcon->ses) && (CIFS_UNIX_POSIX_PATH_OPS_CAP &
1990
1990
le64_to_cpu(tcon->fsUnixInfo.Capability))) {
···
2003
2003
goto psx_del_no_retry;
2004
2004
}
2005
2005
2006
-
if (sillyrename || (server->vals->protocol_id > SMB10_PROT_ID &&
2007
-
d_is_positive(dentry) && d_count(dentry) > 2))
2006
+
/* For SMB2+, if the file is open, we always perform a silly rename.
2007
+
*
2008
+
* We check for d_count() right after calling
2009
+
* cifs_close_deferred_file_under_dentry() to make sure that the
2010
+
* dentry's refcount gets dropped in case the file had any deferred
2011
+
* close.
2012
+
*/
2013
+
if (!sillyrename && server->vals->protocol_id > SMB10_PROT_ID) {
2014
+
spin_lock(&dentry->d_lock);
2015
+
if (d_count(dentry) > 1)
2016
+
sillyrename = true;
2017
+
spin_unlock(&dentry->d_lock);
2018
+
}
2019
+
2020
+
if (sillyrename)
2008
2021
rc = -EBUSY;
2009
2022
else
2010
2023
rc = server->ops->unlink(xid, tcon, full_path, cifs_sb, dentry);
···
2551
2538
goto cifs_rename_exit;
2552
2539
}
2553
2540
2554
-
cifs_close_deferred_file_under_dentry(tcon, from_name);
2541
+
cifs_close_deferred_file_under_dentry(tcon, source_dentry);
2555
2542
if (d_inode(target_dentry) != NULL) {
2556
2543
netfs_wait_for_outstanding_io(d_inode(target_dentry));
2557
-
cifs_close_deferred_file_under_dentry(tcon, to_name);
2544
+
cifs_close_deferred_file_under_dentry(tcon, target_dentry);
2558
2545
}
2559
2546
2560
2547
rc = cifs_do_rename(xid, source_dentry, from_name, target_dentry,
+15
-21
fs/smb/client/misc.c
+15
-21
fs/smb/client/misc.c
···
832
832
kfree(tmp_list);
833
833
}
834
834
}
835
-
void
836
-
cifs_close_deferred_file_under_dentry(struct cifs_tcon *tcon, const char *path)
835
+
836
+
void cifs_close_deferred_file_under_dentry(struct cifs_tcon *tcon,
837
+
struct dentry *dentry)
837
838
{
838
-
struct cifsFileInfo *cfile;
839
839
struct file_list *tmp_list, *tmp_next_list;
840
-
void *page;
841
-
const char *full_path;
840
+
struct cifsFileInfo *cfile;
842
841
LIST_HEAD(file_head);
843
842
844
-
page = alloc_dentry_path();
845
843
spin_lock(&tcon->open_file_lock);
846
844
list_for_each_entry(cfile, &tcon->openFileList, tlist) {
847
-
full_path = build_path_from_dentry(cfile->dentry, page);
848
-
if (strstr(full_path, path)) {
849
-
if (delayed_work_pending(&cfile->deferred)) {
850
-
if (cancel_delayed_work(&cfile->deferred)) {
851
-
spin_lock(&CIFS_I(d_inode(cfile->dentry))->deferred_lock);
852
-
cifs_del_deferred_close(cfile);
853
-
spin_unlock(&CIFS_I(d_inode(cfile->dentry))->deferred_lock);
845
+
if ((cfile->dentry == dentry) &&
846
+
delayed_work_pending(&cfile->deferred) &&
847
+
cancel_delayed_work(&cfile->deferred)) {
848
+
spin_lock(&CIFS_I(d_inode(cfile->dentry))->deferred_lock);
849
+
cifs_del_deferred_close(cfile);
850
+
spin_unlock(&CIFS_I(d_inode(cfile->dentry))->deferred_lock);
854
851
855
-
tmp_list = kmalloc(sizeof(struct file_list), GFP_ATOMIC);
856
-
if (tmp_list == NULL)
857
-
break;
858
-
tmp_list->cfile = cfile;
859
-
list_add_tail(&tmp_list->list, &file_head);
860
-
}
861
-
}
852
+
tmp_list = kmalloc(sizeof(struct file_list), GFP_ATOMIC);
853
+
if (tmp_list == NULL)
854
+
break;
855
+
tmp_list->cfile = cfile;
856
+
list_add_tail(&tmp_list->list, &file_head);
862
857
}
863
858
}
864
859
spin_unlock(&tcon->open_file_lock);
···
863
868
list_del(&tmp_list->list);
864
869
kfree(tmp_list);
865
870
}
866
-
free_dentry_path(page);
867
871
}
868
872
869
873
/*
+28
-5
fs/smb/client/smbdirect.c
+28
-5
fs/smb/client/smbdirect.c
···
453
453
struct smbdirect_recv_io *response =
454
454
container_of(wc->wr_cqe, struct smbdirect_recv_io, cqe);
455
455
struct smbdirect_socket *sc = response->socket;
456
+
struct smbdirect_socket_parameters *sp = &sc->parameters;
456
457
struct smbd_connection *info =
457
458
container_of(sc, struct smbd_connection, socket);
458
-
int data_length = 0;
459
+
u32 data_offset = 0;
460
+
u32 data_length = 0;
461
+
u32 remaining_data_length = 0;
459
462
460
463
log_rdma_recv(INFO, "response=0x%p type=%d wc status=%d wc opcode %d byte_len=%d pkey_index=%u\n",
461
464
response, sc->recv_io.expected, wc->status, wc->opcode,
···
490
487
/* SMBD data transfer packet */
491
488
case SMBDIRECT_EXPECT_DATA_TRANSFER:
492
489
data_transfer = smbdirect_recv_io_payload(response);
490
+
491
+
if (wc->byte_len <
492
+
offsetof(struct smbdirect_data_transfer, padding))
493
+
goto error;
494
+
495
+
remaining_data_length = le32_to_cpu(data_transfer->remaining_data_length);
496
+
data_offset = le32_to_cpu(data_transfer->data_offset);
493
497
data_length = le32_to_cpu(data_transfer->data_length);
498
+
if (wc->byte_len < data_offset ||
499
+
(u64)wc->byte_len < (u64)data_offset + data_length)
500
+
goto error;
501
+
502
+
if (remaining_data_length > sp->max_fragmented_recv_size ||
503
+
data_length > sp->max_fragmented_recv_size ||
504
+
(u64)remaining_data_length + (u64)data_length > (u64)sp->max_fragmented_recv_size)
505
+
goto error;
494
506
495
507
if (data_length) {
496
508
if (sc->recv_io.reassembly.full_packet_received)
···
1108
1090
log_rdma_event(INFO, "smbd_post_recv rc=%d iov.addr=0x%llx iov.length=%u iov.lkey=0x%x\n",
1109
1091
rc, response->sge.addr,
1110
1092
response->sge.length, response->sge.lkey);
1111
-
if (rc)
1093
+
if (rc) {
1094
+
put_receive_buffer(info, response);
1112
1095
return rc;
1096
+
}
1113
1097
1114
1098
init_completion(&info->negotiate_completion);
1115
1099
info->negotiate_done = false;
···
1349
1329
sc->status == SMBDIRECT_SOCKET_DISCONNECTED);
1350
1330
}
1351
1331
1332
+
log_rdma_event(INFO, "cancelling post_send_credits_work\n");
1333
+
disable_work_sync(&info->post_send_credits_work);
1334
+
1352
1335
log_rdma_event(INFO, "destroying qp\n");
1353
1336
ib_drain_qp(sc->ib.qp);
1354
1337
rdma_destroy_qp(sc->rdma.cm_id);
1355
1338
sc->ib.qp = NULL;
1356
1339
1357
1340
log_rdma_event(INFO, "cancelling idle timer\n");
1358
-
cancel_delayed_work_sync(&info->idle_timer_work);
1341
+
disable_delayed_work_sync(&info->idle_timer_work);
1359
1342
1360
1343
/* It's not possible for upper layer to get to reassembly */
1361
1344
log_rdma_event(INFO, "drain the reassembly queue\n");
···
1731
1708
return NULL;
1732
1709
1733
1710
negotiation_failed:
1734
-
cancel_delayed_work_sync(&info->idle_timer_work);
1711
+
disable_delayed_work_sync(&info->idle_timer_work);
1735
1712
destroy_caches_and_workqueue(info);
1736
1713
sc->status = SMBDIRECT_SOCKET_NEGOTIATE_FAILED;
1737
1714
rdma_disconnect(sc->rdma.cm_id);
···
2090
2067
struct smbdirect_socket *sc = &info->socket;
2091
2068
struct smbd_mr *mr, *tmp;
2092
2069
2093
-
cancel_work_sync(&info->mr_recovery_work);
2070
+
disable_work_sync(&info->mr_recovery_work);
2094
2071
list_for_each_entry_safe(mr, tmp, &info->mr_list, list) {
2095
2072
if (mr->state == MR_INVALIDATED)
2096
2073
ib_dma_unmap_sg(sc->ib.dev, mr->sgt.sgl,
+10
-12
fs/smb/server/transport_rdma.c
+10
-12
fs/smb/server/transport_rdma.c
···
148
148
wait_queue_head_t wait_send_pending;
149
149
atomic_t send_pending;
150
150
151
-
struct delayed_work post_recv_credits_work;
151
+
struct work_struct post_recv_credits_work;
152
152
struct work_struct send_immediate_work;
153
153
struct work_struct disconnect_work;
154
154
···
367
367
368
368
spin_lock_init(&t->lock_new_recv_credits);
369
369
370
-
INIT_DELAYED_WORK(&t->post_recv_credits_work,
371
-
smb_direct_post_recv_credits);
370
+
INIT_WORK(&t->post_recv_credits_work,
371
+
smb_direct_post_recv_credits);
372
372
INIT_WORK(&t->send_immediate_work, smb_direct_send_immediate_work);
373
373
INIT_WORK(&t->disconnect_work, smb_direct_disconnect_rdma_work);
374
374
···
399
399
wait_event(t->wait_send_pending,
400
400
atomic_read(&t->send_pending) == 0);
401
401
402
-
cancel_work_sync(&t->disconnect_work);
403
-
cancel_delayed_work_sync(&t->post_recv_credits_work);
404
-
cancel_work_sync(&t->send_immediate_work);
402
+
disable_work_sync(&t->disconnect_work);
403
+
disable_work_sync(&t->post_recv_credits_work);
404
+
disable_work_sync(&t->send_immediate_work);
405
405
406
406
if (t->qp) {
407
407
ib_drain_qp(t->qp);
···
615
615
wake_up_interruptible(&t->wait_send_credits);
616
616
617
617
if (is_receive_credit_post_required(receive_credits, avail_recvmsg_count))
618
-
mod_delayed_work(smb_direct_wq,
619
-
&t->post_recv_credits_work, 0);
618
+
queue_work(smb_direct_wq, &t->post_recv_credits_work);
620
619
621
620
if (data_length) {
622
621
enqueue_reassembly(t, recvmsg, (int)data_length);
···
772
773
st->count_avail_recvmsg += queue_removed;
773
774
if (is_receive_credit_post_required(st->recv_credits, st->count_avail_recvmsg)) {
774
775
spin_unlock(&st->receive_credit_lock);
775
-
mod_delayed_work(smb_direct_wq,
776
-
&st->post_recv_credits_work, 0);
776
+
queue_work(smb_direct_wq, &st->post_recv_credits_work);
777
777
} else {
778
778
spin_unlock(&st->receive_credit_lock);
779
779
}
···
799
801
static void smb_direct_post_recv_credits(struct work_struct *work)
800
802
{
801
803
struct smb_direct_transport *t = container_of(work,
802
-
struct smb_direct_transport, post_recv_credits_work.work);
804
+
struct smb_direct_transport, post_recv_credits_work);
803
805
struct smb_direct_recvmsg *recvmsg;
804
806
int receive_credits, credits = 0;
805
807
int ret;
···
1732
1734
goto out_err;
1733
1735
}
1734
1736
1735
-
smb_direct_post_recv_credits(&t->post_recv_credits_work.work);
1737
+
smb_direct_post_recv_credits(&t->post_recv_credits_work);
1736
1738
return 0;
1737
1739
out_err:
1738
1740
put_recvmsg(t, recvmsg);
+6
-4
include/crypto/if_alg.h
+6
-4
include/crypto/if_alg.h
···
135
135
* SG?
136
136
* @enc: Cryptographic operation to be performed when
137
137
* recvmsg is invoked.
138
+
* @write: True if we are in the middle of a write.
138
139
* @init: True if metadata has been sent.
139
140
* @len: Length of memory allocated for this data structure.
140
141
* @inflight: Non-zero when AIO requests are in flight.
···
152
151
size_t used;
153
152
atomic_t rcvused;
154
153
155
-
bool more;
156
-
bool merge;
157
-
bool enc;
158
-
bool init;
154
+
bool more:1,
155
+
merge:1,
156
+
enc:1,
157
+
write:1,
158
+
init:1;
159
159
160
160
unsigned int len;
161
161
+47
include/linux/firmware/imx/sm.h
+47
include/linux/firmware/imx/sm.h
···
26
26
#define SCMI_IMX94_CTRL_SAI3_MCLK 5U /*!< WAKE SAI3 MCLK */
27
27
#define SCMI_IMX94_CTRL_SAI4_MCLK 6U /*!< WAKE SAI4 MCLK */
28
28
29
+
#if IS_ENABLED(CONFIG_IMX_SCMI_MISC_DRV)
29
30
int scmi_imx_misc_ctrl_get(u32 id, u32 *num, u32 *val);
30
31
int scmi_imx_misc_ctrl_set(u32 id, u32 val);
32
+
#else
33
+
static inline int scmi_imx_misc_ctrl_get(u32 id, u32 *num, u32 *val)
34
+
{
35
+
return -EOPNOTSUPP;
36
+
}
31
37
38
+
static inline int scmi_imx_misc_ctrl_set(u32 id, u32 val)
39
+
{
40
+
return -EOPNOTSUPP;
41
+
}
42
+
#endif
43
+
44
+
#if IS_ENABLED(CONFIG_IMX_SCMI_CPU_DRV)
32
45
int scmi_imx_cpu_start(u32 cpuid, bool start);
33
46
int scmi_imx_cpu_started(u32 cpuid, bool *started);
34
47
int scmi_imx_cpu_reset_vector_set(u32 cpuid, u64 vector, bool start, bool boot,
35
48
bool resume);
49
+
#else
50
+
static inline int scmi_imx_cpu_start(u32 cpuid, bool start)
51
+
{
52
+
return -EOPNOTSUPP;
53
+
}
54
+
55
+
static inline int scmi_imx_cpu_started(u32 cpuid, bool *started)
56
+
{
57
+
return -EOPNOTSUPP;
58
+
}
59
+
60
+
static inline int scmi_imx_cpu_reset_vector_set(u32 cpuid, u64 vector, bool start,
61
+
bool boot, bool resume)
62
+
{
63
+
return -EOPNOTSUPP;
64
+
}
65
+
#endif
36
66
37
67
enum scmi_imx_lmm_op {
38
68
SCMI_IMX_LMM_BOOT,
···
74
44
#define SCMI_IMX_LMM_OP_FORCEFUL 0
75
45
#define SCMI_IMX_LMM_OP_GRACEFUL BIT(0)
76
46
47
+
#if IS_ENABLED(CONFIG_IMX_SCMI_LMM_DRV)
77
48
int scmi_imx_lmm_operation(u32 lmid, enum scmi_imx_lmm_op op, u32 flags);
78
49
int scmi_imx_lmm_info(u32 lmid, struct scmi_imx_lmm_info *info);
79
50
int scmi_imx_lmm_reset_vector_set(u32 lmid, u32 cpuid, u32 flags, u64 vector);
51
+
#else
52
+
static inline int scmi_imx_lmm_operation(u32 lmid, enum scmi_imx_lmm_op op, u32 flags)
53
+
{
54
+
return -EOPNOTSUPP;
55
+
}
56
+
57
+
static inline int scmi_imx_lmm_info(u32 lmid, struct scmi_imx_lmm_info *info)
58
+
{
59
+
return -EOPNOTSUPP;
60
+
}
61
+
62
+
static inline int scmi_imx_lmm_reset_vector_set(u32 lmid, u32 cpuid, u32 flags, u64 vector)
63
+
{
64
+
return -EOPNOTSUPP;
65
+
}
66
+
#endif
80
67
#endif
-3
include/linux/io_uring_types.h
-3
include/linux/io_uring_types.h
···
420
420
struct list_head defer_list;
421
421
unsigned nr_drained;
422
422
423
-
struct io_alloc_cache msg_cache;
424
-
spinlock_t msg_lock;
425
-
426
423
#ifdef CONFIG_NET_RX_BUSY_POLL
427
424
struct list_head napi_list; /* track busy poll napi_id */
428
425
spinlock_t napi_lock; /* napi_list lock */
+2
include/linux/mlx5/fs.h
+2
include/linux/mlx5/fs.h
···
308
308
void mlx5_fc_destroy(struct mlx5_core_dev *dev, struct mlx5_fc *counter);
309
309
struct mlx5_fc *mlx5_fc_local_create(u32 counter_id, u32 offset, u32 bulk_size);
310
310
void mlx5_fc_local_destroy(struct mlx5_fc *counter);
311
+
void mlx5_fc_local_get(struct mlx5_fc *counter);
312
+
void mlx5_fc_local_put(struct mlx5_fc *counter);
311
313
u64 mlx5_fc_query_lastuse(struct mlx5_fc *counter);
312
314
void mlx5_fc_query_cached(struct mlx5_fc *counter,
313
315
u64 *bytes, u64 *packets, u64 *lastuse);
+7
include/linux/pm_domain.h
+7
include/linux/pm_domain.h
···
115
115
* genpd provider specific way, likely through a
116
116
* parent device node. This flag makes genpd to
117
117
* skip its internal support for this.
118
+
*
119
+
* GENPD_FLAG_NO_STAY_ON: For genpd OF providers a powered-on PM domain at
120
+
* initialization is prevented from being
121
+
* powered-off until the ->sync_state() callback is
122
+
* invoked. This flag informs genpd to allow a
123
+
* power-off without waiting for ->sync_state().
118
124
*/
119
125
#define GENPD_FLAG_PM_CLK (1U << 0)
120
126
#define GENPD_FLAG_IRQ_SAFE (1U << 1)
···
132
126
#define GENPD_FLAG_OPP_TABLE_FW (1U << 7)
133
127
#define GENPD_FLAG_DEV_NAME_FW (1U << 8)
134
128
#define GENPD_FLAG_NO_SYNC_STATE (1U << 9)
129
+
#define GENPD_FLAG_NO_STAY_ON (1U << 10)
135
130
136
131
enum gpd_status {
137
132
GENPD_STATE_ON = 0, /* PM domain is on */
+3
-5
include/linux/rv.h
+3
-5
include/linux/rv.h
···
7
7
#ifndef _LINUX_RV_H
8
8
#define _LINUX_RV_H
9
9
10
-
#include <linux/types.h>
11
-
#include <linux/list.h>
12
-
13
10
#define MAX_DA_NAME_LEN 32
14
11
#define MAX_DA_RETRY_RACING_EVENTS 3
15
12
16
13
#ifdef CONFIG_RV
17
-
#include <linux/bitops.h>
18
-
#include <linux/types.h>
19
14
#include <linux/array_size.h>
15
+
#include <linux/bitops.h>
16
+
#include <linux/list.h>
17
+
#include <linux/types.h>
20
18
21
19
/*
22
20
* Deterministic automaton per-object variables.
+6
-5
include/linux/virtio_config.h
+6
-5
include/linux/virtio_config.h
···
193
193
}
194
194
195
195
static inline void virtio_get_features(struct virtio_device *vdev,
196
-
u64 *features)
196
+
u64 *features_out)
197
197
{
198
198
if (vdev->config->get_extended_features) {
199
-
vdev->config->get_extended_features(vdev, features);
199
+
vdev->config->get_extended_features(vdev, features_out);
200
200
return;
201
201
}
202
202
203
-
virtio_features_from_u64(features, vdev->config->get_features(vdev));
203
+
virtio_features_from_u64(features_out,
204
+
vdev->config->get_features(vdev));
204
205
}
205
206
206
207
/**
···
327
326
328
327
static inline
329
328
bool virtio_get_shm_region(struct virtio_device *vdev,
330
-
struct virtio_shm_region *region, u8 id)
329
+
struct virtio_shm_region *region_out, u8 id)
331
330
{
332
331
if (!vdev->config->get_shm_region)
333
332
return false;
334
-
return vdev->config->get_shm_region(vdev, region, id);
333
+
return vdev->config->get_shm_region(vdev, region_out, id);
335
334
}
336
335
337
336
static inline bool virtio_is_little_endian(struct virtio_device *vdev)
+21
include/net/bluetooth/hci_core.h
+21
include/net/bluetooth/hci_core.h
···
1245
1245
return NULL;
1246
1246
}
1247
1247
1248
+
static inline struct hci_conn *hci_conn_hash_lookup_role(struct hci_dev *hdev,
1249
+
__u8 type, __u8 role,
1250
+
bdaddr_t *ba)
1251
+
{
1252
+
struct hci_conn_hash *h = &hdev->conn_hash;
1253
+
struct hci_conn *c;
1254
+
1255
+
rcu_read_lock();
1256
+
1257
+
list_for_each_entry_rcu(c, &h->list, list) {
1258
+
if (c->type == type && c->role == role && !bacmp(&c->dst, ba)) {
1259
+
rcu_read_unlock();
1260
+
return c;
1261
+
}
1262
+
}
1263
+
1264
+
rcu_read_unlock();
1265
+
1266
+
return NULL;
1267
+
}
1268
+
1248
1269
static inline struct hci_conn *hci_conn_hash_lookup_le(struct hci_dev *hdev,
1249
1270
bdaddr_t *ba,
1250
1271
__u8 ba_type)
+1
include/sound/sdca.h
+1
include/sound/sdca.h
+12
-9
include/sound/sdca_function.h
+12
-9
include/sound/sdca_function.h
···
1063
1063
/**
1064
1064
* struct sdca_entity_hide - information specific to HIDE Entities
1065
1065
* @hid: HID device structure
1066
-
* @hidtx_ids: HIDTx Report ID
1067
1066
* @num_hidtx_ids: number of HIDTx Report ID
1068
-
* @hidrx_ids: HIDRx Report ID
1069
1067
* @num_hidrx_ids: number of HIDRx Report ID
1070
-
* @hide_reside_function_num: indicating which Audio Function Numbers within this Device
1071
-
* @max_delay: the maximum time in microseconds allowed for the Device to change the ownership from Device to Host
1072
-
* @af_number_list: which Audio Function Numbers within this Device are sending/receiving the messages in this HIDE
1073
-
* @hid_desc: HID descriptor for the HIDE Entity
1068
+
* @hidtx_ids: HIDTx Report ID
1069
+
* @hidrx_ids: HIDRx Report ID
1070
+
* @af_number_list: which Audio Function Numbers within this Device are
1071
+
* sending/receiving the messages in this HIDE
1072
+
* @hide_reside_function_num: indicating which Audio Function Numbers
1073
+
* within this Device
1074
+
* @max_delay: the maximum time in microseconds allowed for the Device
1075
+
* to change the ownership from Device to Host
1074
1076
* @hid_report_desc: HID Report Descriptor for the HIDE Entity
1077
+
* @hid_desc: HID descriptor for the HIDE Entity
1075
1078
*/
1076
1079
struct sdca_entity_hide {
1077
1080
struct hid_device *hid;
1078
1081
unsigned int *hidtx_ids;
1079
-
int num_hidtx_ids;
1080
1082
unsigned int *hidrx_ids;
1083
+
int num_hidtx_ids;
1081
1084
int num_hidrx_ids;
1085
+
unsigned int af_number_list[SDCA_MAX_FUNCTION_COUNT];
1082
1086
unsigned int hide_reside_function_num;
1083
1087
unsigned int max_delay;
1084
-
unsigned int af_number_list[SDCA_MAX_FUNCTION_COUNT];
1085
-
struct hid_descriptor hid_desc;
1086
1088
unsigned char *hid_report_desc;
1089
+
struct hid_descriptor hid_desc;
1087
1090
};
1088
1091
1089
1092
/**
+3
include/uapi/linux/ptp_clock.h
+3
include/uapi/linux/ptp_clock.h
···
37
37
38
38
/*
39
39
* flag fields valid for the new PTP_EXTTS_REQUEST2 ioctl.
40
+
*
41
+
* Note: PTP_STRICT_FLAGS is always enabled by the kernel for
42
+
* PTP_EXTTS_REQUEST2 regardless of whether it is set by userspace.
40
43
*/
41
44
#define PTP_EXTTS_VALID_FLAGS (PTP_ENABLE_FEATURE | \
42
45
PTP_RISING_EDGE | \
+1
-1
include/uapi/linux/vduse.h
+1
-1
include/uapi/linux/vduse.h
···
237
237
* struct vduse_iova_info - information of one IOVA region
238
238
* @start: start of the IOVA region
239
239
* @last: last of the IOVA region
240
-
* @capability: capability of the IOVA regsion
240
+
* @capability: capability of the IOVA region
241
241
* @reserved: for future use, needs to be initialized to zero
242
242
*
243
243
* Structure used by VDUSE_IOTLB_GET_INFO ioctl to get information of
+3
-3
io_uring/io-wq.c
+3
-3
io_uring/io-wq.c
···
352
352
struct io_wq *wq;
353
353
354
354
struct io_wq_acct *acct;
355
-
bool do_create = false;
355
+
bool activated_free_worker, do_create = false;
356
356
357
357
worker = container_of(cb, struct io_worker, create_work);
358
358
wq = worker->wq;
359
359
acct = worker->acct;
360
360
361
361
rcu_read_lock();
362
-
do_create = !io_acct_activate_free_worker(acct);
362
+
activated_free_worker = io_acct_activate_free_worker(acct);
363
363
rcu_read_unlock();
364
-
if (!do_create)
364
+
if (activated_free_worker)
365
365
goto no_need_create;
366
366
367
367
raw_spin_lock(&acct->workers_lock);
+4
-6
io_uring/io_uring.c
+4
-6
io_uring/io_uring.c
···
290
290
io_alloc_cache_free(&ctx->netmsg_cache, io_netmsg_cache_free);
291
291
io_alloc_cache_free(&ctx->rw_cache, io_rw_cache_free);
292
292
io_alloc_cache_free(&ctx->cmd_cache, io_cmd_cache_free);
293
-
io_alloc_cache_free(&ctx->msg_cache, kfree);
294
293
io_futex_cache_free(ctx);
295
294
io_rsrc_cache_free(ctx);
296
295
}
···
336
337
ret |= io_alloc_cache_init(&ctx->cmd_cache, IO_ALLOC_CACHE_MAX,
337
338
sizeof(struct io_async_cmd),
338
339
sizeof(struct io_async_cmd));
339
-
spin_lock_init(&ctx->msg_lock);
340
-
ret |= io_alloc_cache_init(&ctx->msg_cache, IO_ALLOC_CACHE_MAX,
341
-
sizeof(struct io_kiocb), 0);
342
340
ret |= io_futex_cache_init(ctx);
343
341
ret |= io_rsrc_cache_init(ctx);
344
342
if (ret)
···
1402
1406
1403
1407
void io_req_task_submit(struct io_kiocb *req, io_tw_token_t tw)
1404
1408
{
1405
-
io_tw_lock(req->ctx, tw);
1406
-
if (unlikely(io_should_terminate_tw()))
1409
+
struct io_ring_ctx *ctx = req->ctx;
1410
+
1411
+
io_tw_lock(ctx, tw);
1412
+
if (unlikely(io_should_terminate_tw(ctx)))
1407
1413
io_req_defer_failed(req, -EFAULT);
1408
1414
else if (req->flags & REQ_F_FORCE_ASYNC)
1409
1415
io_queue_iowq(req);
+2
-2
io_uring/io_uring.h
+2
-2
io_uring/io_uring.h
···
476
476
* 2) PF_KTHREAD is set, in which case the invoker of the task_work is
477
477
* our fallback task_work.
478
478
*/
479
-
static inline bool io_should_terminate_tw(void)
479
+
static inline bool io_should_terminate_tw(struct io_ring_ctx *ctx)
480
480
{
481
-
return current->flags & (PF_KTHREAD | PF_EXITING);
481
+
return (current->flags & (PF_KTHREAD | PF_EXITING)) || percpu_ref_is_dying(&ctx->refs);
482
482
}
483
483
484
484
static inline void io_req_queue_tw_complete(struct io_kiocb *req, s32 res)
+2
-22
io_uring/msg_ring.c
+2
-22
io_uring/msg_ring.c
···
11
11
#include "io_uring.h"
12
12
#include "rsrc.h"
13
13
#include "filetable.h"
14
-
#include "alloc_cache.h"
15
14
#include "msg_ring.h"
16
15
17
16
/* All valid masks for MSG_RING */
···
75
76
struct io_ring_ctx *ctx = req->ctx;
76
77
77
78
io_add_aux_cqe(ctx, req->cqe.user_data, req->cqe.res, req->cqe.flags);
78
-
if (spin_trylock(&ctx->msg_lock)) {
79
-
if (io_alloc_cache_put(&ctx->msg_cache, req))
80
-
req = NULL;
81
-
spin_unlock(&ctx->msg_lock);
82
-
}
83
-
if (req)
84
-
kfree_rcu(req, rcu_head);
79
+
kfree_rcu(req, rcu_head);
85
80
percpu_ref_put(&ctx->refs);
86
81
}
87
82
···
97
104
return 0;
98
105
}
99
106
100
-
static struct io_kiocb *io_msg_get_kiocb(struct io_ring_ctx *ctx)
101
-
{
102
-
struct io_kiocb *req = NULL;
103
-
104
-
if (spin_trylock(&ctx->msg_lock)) {
105
-
req = io_alloc_cache_get(&ctx->msg_cache);
106
-
spin_unlock(&ctx->msg_lock);
107
-
if (req)
108
-
return req;
109
-
}
110
-
return kmem_cache_alloc(req_cachep, GFP_KERNEL | __GFP_NOWARN | __GFP_ZERO);
111
-
}
112
-
113
107
static int io_msg_data_remote(struct io_ring_ctx *target_ctx,
114
108
struct io_msg *msg)
115
109
{
116
110
struct io_kiocb *target;
117
111
u32 flags = 0;
118
112
119
-
target = io_msg_get_kiocb(target_ctx);
113
+
target = kmem_cache_alloc(req_cachep, GFP_KERNEL | __GFP_NOWARN | __GFP_ZERO) ;
120
114
if (unlikely(!target))
121
115
return -ENOMEM;
122
116
+1
-1
io_uring/notif.c
+1
-1
io_uring/notif.c
···
85
85
return -EEXIST;
86
86
87
87
prev_nd = container_of(prev_uarg, struct io_notif_data, uarg);
88
-
prev_notif = cmd_to_io_kiocb(nd);
88
+
prev_notif = cmd_to_io_kiocb(prev_nd);
89
89
90
90
/* make sure all noifications can be finished in the same task_work */
91
91
if (unlikely(notif->ctx != prev_notif->ctx ||
+1
-1
io_uring/poll.c
+1
-1
io_uring/poll.c
+1
-1
io_uring/timeout.c
+1
-1
io_uring/timeout.c
+1
-1
io_uring/uring_cmd.c
+1
-1
io_uring/uring_cmd.c
···
118
118
struct io_uring_cmd *ioucmd = io_kiocb_to_cmd(req, struct io_uring_cmd);
119
119
unsigned int flags = IO_URING_F_COMPLETE_DEFER;
120
120
121
-
if (io_should_terminate_tw())
121
+
if (io_should_terminate_tw(req->ctx))
122
122
flags |= IO_URING_F_TASK_DEAD;
123
123
124
124
/* task_work executor checks the deffered list completion */
+27
-1
kernel/sched/ext_idle.c
+27
-1
kernel/sched/ext_idle.c
···
856
856
return false;
857
857
}
858
858
859
+
/*
860
+
* Determine whether @p is a migration-disabled task in the context of BPF
861
+
* code.
862
+
*
863
+
* We can't simply check whether @p->migration_disabled is set in a
864
+
* sched_ext callback, because migration is always disabled for the current
865
+
* task while running BPF code.
866
+
*
867
+
* The prolog (__bpf_prog_enter) and epilog (__bpf_prog_exit) respectively
868
+
* disable and re-enable migration. For this reason, the current task
869
+
* inside a sched_ext callback is always a migration-disabled task.
870
+
*
871
+
* Therefore, when @p->migration_disabled == 1, check whether @p is the
872
+
* current task or not: if it is, then migration was not disabled before
873
+
* entering the callback, otherwise migration was disabled.
874
+
*
875
+
* Returns true if @p is migration-disabled, false otherwise.
876
+
*/
877
+
static bool is_bpf_migration_disabled(const struct task_struct *p)
878
+
{
879
+
if (p->migration_disabled == 1)
880
+
return p != current;
881
+
else
882
+
return p->migration_disabled;
883
+
}
884
+
859
885
static s32 select_cpu_from_kfunc(struct task_struct *p, s32 prev_cpu, u64 wake_flags,
860
886
const struct cpumask *allowed, u64 flags)
861
887
{
···
924
898
* selection optimizations and simply check whether the previously
925
899
* used CPU is idle and within the allowed cpumask.
926
900
*/
927
-
if (p->nr_cpus_allowed == 1 || is_migration_disabled(p)) {
901
+
if (p->nr_cpus_allowed == 1 || is_bpf_migration_disabled(p)) {
928
902
if (cpumask_test_cpu(prev_cpu, allowed ?: p->cpus_ptr) &&
929
903
scx_idle_test_and_clear_cpu(prev_cpu))
930
904
cpu = prev_cpu;
+4
-3
kernel/trace/fprobe.c
+4
-3
kernel/trace/fprobe.c
···
428
428
{
429
429
unsigned long *addrs;
430
430
431
-
if (alist->index >= alist->size)
432
-
return -ENOMEM;
431
+
/* Previously we failed to expand the list. */
432
+
if (alist->index == alist->size)
433
+
return -ENOSPC;
433
434
434
435
alist->addrs[alist->index++] = addr;
435
436
if (alist->index < alist->size)
···
490
489
for (i = 0; i < FPROBE_IP_TABLE_SIZE; i++)
491
490
fprobe_remove_node_in_module(mod, &fprobe_ip_table[i], &alist);
492
491
493
-
if (alist.index < alist.size && alist.index > 0)
492
+
if (alist.index > 0)
494
493
ftrace_set_filter_ips(&fprobe_graph_ops.ops,
495
494
alist.addrs, alist.index, 1, 0);
496
495
mutex_unlock(&fprobe_mutex);
+4
kernel/trace/rv/monitors/sleep/sleep.c
+4
kernel/trace/rv/monitors/sleep/sleep.c
···
127
127
mon = ltl_get_monitor(current);
128
128
129
129
switch (id) {
130
+
#ifdef __NR_clock_nanosleep
130
131
case __NR_clock_nanosleep:
132
+
#endif
131
133
#ifdef __NR_clock_nanosleep_time64
132
134
case __NR_clock_nanosleep_time64:
133
135
#endif
···
140
138
ltl_atom_update(current, LTL_CLOCK_NANOSLEEP, true);
141
139
break;
142
140
141
+
#ifdef __NR_futex
143
142
case __NR_futex:
143
+
#endif
144
144
#ifdef __NR_futex_time64
145
145
case __NR_futex_time64:
146
146
#endif
+2
-2
kernel/trace/rv/rv.c
+2
-2
kernel/trace/rv/rv.c
···
495
495
*/
496
496
static void *enabled_monitors_next(struct seq_file *m, void *p, loff_t *pos)
497
497
{
498
-
struct rv_monitor *mon = p;
498
+
struct rv_monitor *mon = container_of(p, struct rv_monitor, list);
499
499
500
500
(*pos)++;
501
501
···
805
805
806
806
retval = create_monitor_dir(monitor, parent);
807
807
if (retval)
808
-
return retval;
808
+
goto out_unlock;
809
809
810
810
/* keep children close to the parent for easier visualisation */
811
811
if (parent)
+4
kernel/trace/trace_dynevent.c
+4
kernel/trace/trace_dynevent.c
+2
-1
kernel/vhost_task.c
+2
-1
kernel/vhost_task.c
···
100
100
* freeing it below.
101
101
*/
102
102
wait_for_completion(&vtsk->exited);
103
+
put_task_struct(vtsk->task);
103
104
kfree(vtsk);
104
105
}
105
106
EXPORT_SYMBOL_GPL(vhost_task_stop);
···
149
148
return ERR_CAST(tsk);
150
149
}
151
150
152
-
vtsk->task = tsk;
151
+
vtsk->task = get_task_struct(tsk);
153
152
return vtsk;
154
153
}
155
154
EXPORT_SYMBOL_GPL(vhost_task_create);
+27
-3
net/bluetooth/hci_event.c
+27
-3
net/bluetooth/hci_event.c
···
3087
3087
3088
3088
hci_dev_lock(hdev);
3089
3089
3090
+
/* Check for existing connection:
3091
+
*
3092
+
* 1. If it doesn't exist then it must be receiver/slave role.
3093
+
* 2. If it does exist confirm that it is connecting/BT_CONNECT in case
3094
+
* of initiator/master role since there could be a collision where
3095
+
* either side is attempting to connect or something like a fuzzing
3096
+
* testing is trying to play tricks to destroy the hcon object before
3097
+
* it even attempts to connect (e.g. hcon->state == BT_OPEN).
3098
+
*/
3090
3099
conn = hci_conn_hash_lookup_ba(hdev, ev->link_type, &ev->bdaddr);
3091
-
if (!conn) {
3100
+
if (!conn ||
3101
+
(conn->role == HCI_ROLE_MASTER && conn->state != BT_CONNECT)) {
3092
3102
/* In case of error status and there is no connection pending
3093
3103
* just unlock as there is nothing to cleanup.
3094
3104
*/
···
4401
4391
4402
4392
bt_dev_dbg(hdev, "num %d", ev->num);
4403
4393
4394
+
hci_dev_lock(hdev);
4395
+
4404
4396
for (i = 0; i < ev->num; i++) {
4405
4397
struct hci_comp_pkts_info *info = &ev->handles[i];
4406
4398
struct hci_conn *conn;
···
4484
4472
}
4485
4473
4486
4474
queue_work(hdev->workqueue, &hdev->tx_work);
4475
+
4476
+
hci_dev_unlock(hdev);
4487
4477
}
4488
4478
4489
4479
static void hci_mode_change_evt(struct hci_dev *hdev, void *data,
···
5648
5634
*/
5649
5635
hci_dev_clear_flag(hdev, HCI_LE_ADV);
5650
5636
5651
-
conn = hci_conn_hash_lookup_ba(hdev, LE_LINK, bdaddr);
5652
-
if (!conn) {
5637
+
/* Check for existing connection:
5638
+
*
5639
+
* 1. If it doesn't exist then use the role to create a new object.
5640
+
* 2. If it does exist confirm that it is connecting/BT_CONNECT in case
5641
+
* of initiator/master role since there could be a collision where
5642
+
* either side is attempting to connect or something like a fuzzing
5643
+
* testing is trying to play tricks to destroy the hcon object before
5644
+
* it even attempts to connect (e.g. hcon->state == BT_OPEN).
5645
+
*/
5646
+
conn = hci_conn_hash_lookup_role(hdev, LE_LINK, role, bdaddr);
5647
+
if (!conn ||
5648
+
(conn->role == HCI_ROLE_MASTER && conn->state != BT_CONNECT)) {
5653
5649
/* In case of error status and there is no connection pending
5654
5650
* just unlock as there is nothing to cleanup.
5655
5651
*/
+7
net/bluetooth/hci_sync.c
+7
net/bluetooth/hci_sync.c
···
2594
2594
hci_remove_ext_adv_instance_sync(hdev, adv->instance,
2595
2595
NULL);
2596
2596
}
2597
+
2598
+
/* If current advertising instance is set to instance 0x00
2599
+
* then we need to re-enable it.
2600
+
*/
2601
+
if (!hdev->cur_adv_instance)
2602
+
err = hci_enable_ext_advertising_sync(hdev,
2603
+
hdev->cur_adv_instance);
2597
2604
} else {
2598
2605
/* Schedule for most recent instance to be restarted and begin
2599
2606
* the software rotation loop
+182
-77
net/bluetooth/mgmt.c
+182
-77
net/bluetooth/mgmt.c
···
1323
1323
struct mgmt_mode *cp;
1324
1324
1325
1325
/* Make sure cmd still outstanding. */
1326
-
if (err == -ECANCELED ||
1327
-
cmd != pending_find(MGMT_OP_SET_POWERED, hdev))
1326
+
if (err == -ECANCELED || !mgmt_pending_valid(hdev, cmd))
1328
1327
return;
1329
1328
1330
1329
cp = cmd->param;
···
1350
1351
mgmt_status(err));
1351
1352
}
1352
1353
1353
-
mgmt_pending_remove(cmd);
1354
+
mgmt_pending_free(cmd);
1354
1355
}
1355
1356
1356
1357
static int set_powered_sync(struct hci_dev *hdev, void *data)
1357
1358
{
1358
1359
struct mgmt_pending_cmd *cmd = data;
1359
-
struct mgmt_mode *cp;
1360
+
struct mgmt_mode cp;
1361
+
1362
+
mutex_lock(&hdev->mgmt_pending_lock);
1360
1363
1361
1364
/* Make sure cmd still outstanding. */
1362
-
if (cmd != pending_find(MGMT_OP_SET_POWERED, hdev))
1365
+
if (!__mgmt_pending_listed(hdev, cmd)) {
1366
+
mutex_unlock(&hdev->mgmt_pending_lock);
1363
1367
return -ECANCELED;
1368
+
}
1364
1369
1365
-
cp = cmd->param;
1370
+
memcpy(&cp, cmd->param, sizeof(cp));
1371
+
1372
+
mutex_unlock(&hdev->mgmt_pending_lock);
1366
1373
1367
1374
BT_DBG("%s", hdev->name);
1368
1375
1369
-
return hci_set_powered_sync(hdev, cp->val);
1376
+
return hci_set_powered_sync(hdev, cp.val);
1370
1377
}
1371
1378
1372
1379
static int set_powered(struct sock *sk, struct hci_dev *hdev, void *data,
···
1521
1516
bt_dev_dbg(hdev, "err %d", err);
1522
1517
1523
1518
/* Make sure cmd still outstanding. */
1524
-
if (err == -ECANCELED ||
1525
-
cmd != pending_find(MGMT_OP_SET_DISCOVERABLE, hdev))
1519
+
if (err == -ECANCELED || !mgmt_pending_valid(hdev, cmd))
1526
1520
return;
1527
1521
1528
1522
hci_dev_lock(hdev);
···
1543
1539
new_settings(hdev, cmd->sk);
1544
1540
1545
1541
done:
1546
-
mgmt_pending_remove(cmd);
1542
+
mgmt_pending_free(cmd);
1547
1543
hci_dev_unlock(hdev);
1548
1544
}
1549
1545
1550
1546
static int set_discoverable_sync(struct hci_dev *hdev, void *data)
1551
1547
{
1548
+
if (!mgmt_pending_listed(hdev, data))
1549
+
return -ECANCELED;
1550
+
1552
1551
BT_DBG("%s", hdev->name);
1553
1552
1554
1553
return hci_update_discoverable_sync(hdev);
···
1698
1691
bt_dev_dbg(hdev, "err %d", err);
1699
1692
1700
1693
/* Make sure cmd still outstanding. */
1701
-
if (err == -ECANCELED ||
1702
-
cmd != pending_find(MGMT_OP_SET_CONNECTABLE, hdev))
1694
+
if (err == -ECANCELED || !mgmt_pending_valid(hdev, cmd))
1703
1695
return;
1704
1696
1705
1697
hci_dev_lock(hdev);
···
1713
1707
new_settings(hdev, cmd->sk);
1714
1708
1715
1709
done:
1716
-
mgmt_pending_remove(cmd);
1710
+
mgmt_pending_free(cmd);
1717
1711
1718
1712
hci_dev_unlock(hdev);
1719
1713
}
···
1749
1743
1750
1744
static int set_connectable_sync(struct hci_dev *hdev, void *data)
1751
1745
{
1746
+
if (!mgmt_pending_listed(hdev, data))
1747
+
return -ECANCELED;
1748
+
1752
1749
BT_DBG("%s", hdev->name);
1753
1750
1754
1751
return hci_update_connectable_sync(hdev);
···
1928
1919
{
1929
1920
struct cmd_lookup match = { NULL, hdev };
1930
1921
struct mgmt_pending_cmd *cmd = data;
1931
-
struct mgmt_mode *cp = cmd->param;
1932
-
u8 enable = cp->val;
1922
+
struct mgmt_mode *cp;
1923
+
u8 enable;
1933
1924
bool changed;
1934
1925
1935
1926
/* Make sure cmd still outstanding. */
1936
-
if (err == -ECANCELED || cmd != pending_find(MGMT_OP_SET_SSP, hdev))
1927
+
if (err == -ECANCELED || !mgmt_pending_valid(hdev, cmd))
1937
1928
return;
1929
+
1930
+
cp = cmd->param;
1931
+
enable = cp->val;
1938
1932
1939
1933
if (err) {
1940
1934
u8 mgmt_err = mgmt_status(err);
···
1947
1935
new_settings(hdev, NULL);
1948
1936
}
1949
1937
1950
-
mgmt_pending_foreach(MGMT_OP_SET_SSP, hdev, true,
1951
-
cmd_status_rsp, &mgmt_err);
1938
+
mgmt_cmd_status(cmd->sk, cmd->hdev->id, cmd->opcode, mgmt_err);
1952
1939
return;
1953
1940
}
1954
1941
···
1957
1946
changed = hci_dev_test_and_clear_flag(hdev, HCI_SSP_ENABLED);
1958
1947
}
1959
1948
1960
-
mgmt_pending_foreach(MGMT_OP_SET_SSP, hdev, true, settings_rsp, &match);
1949
+
settings_rsp(cmd, &match);
1961
1950
1962
1951
if (changed)
1963
1952
new_settings(hdev, match.sk);
···
1971
1960
static int set_ssp_sync(struct hci_dev *hdev, void *data)
1972
1961
{
1973
1962
struct mgmt_pending_cmd *cmd = data;
1974
-
struct mgmt_mode *cp = cmd->param;
1963
+
struct mgmt_mode cp;
1975
1964
bool changed = false;
1976
1965
int err;
1977
1966
1978
-
if (cp->val)
1967
+
mutex_lock(&hdev->mgmt_pending_lock);
1968
+
1969
+
if (!__mgmt_pending_listed(hdev, cmd)) {
1970
+
mutex_unlock(&hdev->mgmt_pending_lock);
1971
+
return -ECANCELED;
1972
+
}
1973
+
1974
+
memcpy(&cp, cmd->param, sizeof(cp));
1975
+
1976
+
mutex_unlock(&hdev->mgmt_pending_lock);
1977
+
1978
+
if (cp.val)
1979
1979
changed = !hci_dev_test_and_set_flag(hdev, HCI_SSP_ENABLED);
1980
1980
1981
-
err = hci_write_ssp_mode_sync(hdev, cp->val);
1981
+
err = hci_write_ssp_mode_sync(hdev, cp.val);
1982
1982
1983
1983
if (!err && changed)
1984
1984
hci_dev_clear_flag(hdev, HCI_SSP_ENABLED);
···
2082
2060
2083
2061
static void set_le_complete(struct hci_dev *hdev, void *data, int err)
2084
2062
{
2063
+
struct mgmt_pending_cmd *cmd = data;
2085
2064
struct cmd_lookup match = { NULL, hdev };
2086
2065
u8 status = mgmt_status(err);
2087
2066
2088
2067
bt_dev_dbg(hdev, "err %d", err);
2089
2068
2090
-
if (status) {
2091
-
mgmt_pending_foreach(MGMT_OP_SET_LE, hdev, true, cmd_status_rsp,
2092
-
&status);
2069
+
if (err == -ECANCELED || !mgmt_pending_valid(hdev, data))
2093
2070
return;
2071
+
2072
+
if (status) {
2073
+
mgmt_cmd_status(cmd->sk, cmd->hdev->id, cmd->opcode, status);
2074
+
goto done;
2094
2075
}
2095
2076
2096
-
mgmt_pending_foreach(MGMT_OP_SET_LE, hdev, true, settings_rsp, &match);
2077
+
settings_rsp(cmd, &match);
2097
2078
2098
2079
new_settings(hdev, match.sk);
2099
2080
2100
2081
if (match.sk)
2101
2082
sock_put(match.sk);
2083
+
2084
+
done:
2085
+
mgmt_pending_free(cmd);
2102
2086
}
2103
2087
2104
2088
static int set_le_sync(struct hci_dev *hdev, void *data)
2105
2089
{
2106
2090
struct mgmt_pending_cmd *cmd = data;
2107
-
struct mgmt_mode *cp = cmd->param;
2108
-
u8 val = !!cp->val;
2091
+
struct mgmt_mode cp;
2092
+
u8 val;
2109
2093
int err;
2094
+
2095
+
mutex_lock(&hdev->mgmt_pending_lock);
2096
+
2097
+
if (!__mgmt_pending_listed(hdev, cmd)) {
2098
+
mutex_unlock(&hdev->mgmt_pending_lock);
2099
+
return -ECANCELED;
2100
+
}
2101
+
2102
+
memcpy(&cp, cmd->param, sizeof(cp));
2103
+
val = !!cp.val;
2104
+
2105
+
mutex_unlock(&hdev->mgmt_pending_lock);
2110
2106
2111
2107
if (!val) {
2112
2108
hci_clear_adv_instance_sync(hdev, NULL, 0x00, true);
···
2167
2127
{
2168
2128
struct mgmt_pending_cmd *cmd = data;
2169
2129
u8 status = mgmt_status(err);
2170
-
struct sock *sk = cmd->sk;
2130
+
struct sock *sk;
2131
+
2132
+
if (err == -ECANCELED || !mgmt_pending_valid(hdev, cmd))
2133
+
return;
2134
+
2135
+
sk = cmd->sk;
2171
2136
2172
2137
if (status) {
2173
2138
mgmt_pending_foreach(MGMT_OP_SET_MESH_RECEIVER, hdev, true,
···
2187
2142
static int set_mesh_sync(struct hci_dev *hdev, void *data)
2188
2143
{
2189
2144
struct mgmt_pending_cmd *cmd = data;
2190
-
struct mgmt_cp_set_mesh *cp = cmd->param;
2191
-
size_t len = cmd->param_len;
2145
+
struct mgmt_cp_set_mesh cp;
2146
+
size_t len;
2147
+
2148
+
mutex_lock(&hdev->mgmt_pending_lock);
2149
+
2150
+
if (!__mgmt_pending_listed(hdev, cmd)) {
2151
+
mutex_unlock(&hdev->mgmt_pending_lock);
2152
+
return -ECANCELED;
2153
+
}
2154
+
2155
+
memcpy(&cp, cmd->param, sizeof(cp));
2156
+
2157
+
mutex_unlock(&hdev->mgmt_pending_lock);
2158
+
2159
+
len = cmd->param_len;
2192
2160
2193
2161
memset(hdev->mesh_ad_types, 0, sizeof(hdev->mesh_ad_types));
2194
2162
2195
-
if (cp->enable)
2163
+
if (cp.enable)
2196
2164
hci_dev_set_flag(hdev, HCI_MESH);
2197
2165
else
2198
2166
hci_dev_clear_flag(hdev, HCI_MESH);
2199
2167
2200
-
hdev->le_scan_interval = __le16_to_cpu(cp->period);
2201
-
hdev->le_scan_window = __le16_to_cpu(cp->window);
2168
+
hdev->le_scan_interval = __le16_to_cpu(cp.period);
2169
+
hdev->le_scan_window = __le16_to_cpu(cp.window);
2202
2170
2203
-
len -= sizeof(*cp);
2171
+
len -= sizeof(cp);
2204
2172
2205
2173
/* If filters don't fit, forward all adv pkts */
2206
2174
if (len <= sizeof(hdev->mesh_ad_types))
2207
-
memcpy(hdev->mesh_ad_types, cp->ad_types, len);
2175
+
memcpy(hdev->mesh_ad_types, cp.ad_types, len);
2208
2176
2209
2177
hci_update_passive_scan_sync(hdev);
2210
2178
return 0;
···
3925
3867
static void set_name_complete(struct hci_dev *hdev, void *data, int err)
3926
3868
{
3927
3869
struct mgmt_pending_cmd *cmd = data;
3928
-
struct mgmt_cp_set_local_name *cp = cmd->param;
3870
+
struct mgmt_cp_set_local_name *cp;
3929
3871
u8 status = mgmt_status(err);
3930
3872
3931
3873
bt_dev_dbg(hdev, "err %d", err);
3932
3874
3933
-
if (err == -ECANCELED ||
3934
-
cmd != pending_find(MGMT_OP_SET_LOCAL_NAME, hdev))
3875
+
if (err == -ECANCELED || !mgmt_pending_valid(hdev, cmd))
3935
3876
return;
3877
+
3878
+
cp = cmd->param;
3936
3879
3937
3880
if (status) {
3938
3881
mgmt_cmd_status(cmd->sk, hdev->id, MGMT_OP_SET_LOCAL_NAME,
···
3946
3887
hci_cmd_sync_queue(hdev, name_changed_sync, NULL, NULL);
3947
3888
}
3948
3889
3949
-
mgmt_pending_remove(cmd);
3890
+
mgmt_pending_free(cmd);
3950
3891
}
3951
3892
3952
3893
static int set_name_sync(struct hci_dev *hdev, void *data)
3953
3894
{
3954
3895
struct mgmt_pending_cmd *cmd = data;
3955
-
struct mgmt_cp_set_local_name *cp = cmd->param;
3896
+
struct mgmt_cp_set_local_name cp;
3897
+
3898
+
mutex_lock(&hdev->mgmt_pending_lock);
3899
+
3900
+
if (!__mgmt_pending_listed(hdev, cmd)) {
3901
+
mutex_unlock(&hdev->mgmt_pending_lock);
3902
+
return -ECANCELED;
3903
+
}
3904
+
3905
+
memcpy(&cp, cmd->param, sizeof(cp));
3906
+
3907
+
mutex_unlock(&hdev->mgmt_pending_lock);
3956
3908
3957
3909
if (lmp_bredr_capable(hdev)) {
3958
-
hci_update_name_sync(hdev, cp->name);
3910
+
hci_update_name_sync(hdev, cp.name);
3959
3911
hci_update_eir_sync(hdev);
3960
3912
}
3961
3913
···
4118
4048
static void set_default_phy_complete(struct hci_dev *hdev, void *data, int err)
4119
4049
{
4120
4050
struct mgmt_pending_cmd *cmd = data;
4121
-
struct sk_buff *skb = cmd->skb;
4051
+
struct sk_buff *skb;
4122
4052
u8 status = mgmt_status(err);
4123
4053
4124
-
if (err == -ECANCELED ||
4125
-
cmd != pending_find(MGMT_OP_SET_PHY_CONFIGURATION, hdev))
4126
-
return;
4054
+
skb = cmd->skb;
4127
4055
4128
4056
if (!status) {
4129
4057
if (!skb)
···
4148
4080
if (skb && !IS_ERR(skb))
4149
4081
kfree_skb(skb);
4150
4082
4151
-
mgmt_pending_remove(cmd);
4083
+
mgmt_pending_free(cmd);
4152
4084
}
4153
4085
4154
4086
static int set_default_phy_sync(struct hci_dev *hdev, void *data)
···
4156
4088
struct mgmt_pending_cmd *cmd = data;
4157
4089
struct mgmt_cp_set_phy_configuration *cp = cmd->param;
4158
4090
struct hci_cp_le_set_default_phy cp_phy;
4159
-
u32 selected_phys = __le32_to_cpu(cp->selected_phys);
4091
+
u32 selected_phys;
4092
+
4093
+
selected_phys = __le32_to_cpu(cp->selected_phys);
4160
4094
4161
4095
memset(&cp_phy, 0, sizeof(cp_phy));
4162
4096
···
4298
4228
goto unlock;
4299
4229
}
4300
4230
4301
-
cmd = mgmt_pending_add(sk, MGMT_OP_SET_PHY_CONFIGURATION, hdev, data,
4231
+
cmd = mgmt_pending_new(sk, MGMT_OP_SET_PHY_CONFIGURATION, hdev, data,
4302
4232
len);
4303
4233
if (!cmd)
4304
4234
err = -ENOMEM;
···
5259
5189
{
5260
5190
struct mgmt_rp_add_adv_patterns_monitor rp;
5261
5191
struct mgmt_pending_cmd *cmd = data;
5262
-
struct adv_monitor *monitor = cmd->user_data;
5192
+
struct adv_monitor *monitor;
5193
+
5194
+
/* This is likely the result of hdev being closed and mgmt_index_removed
5195
+
* is attempting to clean up any pending command so
5196
+
* hci_adv_monitors_clear is about to be called which will take care of
5197
+
* freeing the adv_monitor instances.
5198
+
*/
5199
+
if (status == -ECANCELED && !mgmt_pending_valid(hdev, cmd))
5200
+
return;
5201
+
5202
+
monitor = cmd->user_data;
5263
5203
5264
5204
hci_dev_lock(hdev);
5265
5205
···
5295
5215
static int mgmt_add_adv_patterns_monitor_sync(struct hci_dev *hdev, void *data)
5296
5216
{
5297
5217
struct mgmt_pending_cmd *cmd = data;
5298
-
struct adv_monitor *monitor = cmd->user_data;
5218
+
struct adv_monitor *mon;
5299
5219
5300
-
return hci_add_adv_monitor(hdev, monitor);
5220
+
mutex_lock(&hdev->mgmt_pending_lock);
5221
+
5222
+
if (!__mgmt_pending_listed(hdev, cmd)) {
5223
+
mutex_unlock(&hdev->mgmt_pending_lock);
5224
+
return -ECANCELED;
5225
+
}
5226
+
5227
+
mon = cmd->user_data;
5228
+
5229
+
mutex_unlock(&hdev->mgmt_pending_lock);
5230
+
5231
+
return hci_add_adv_monitor(hdev, mon);
5301
5232
}
5302
5233
5303
5234
static int __add_adv_patterns_monitor(struct sock *sk, struct hci_dev *hdev,
···
5575
5484
status);
5576
5485
}
5577
5486
5578
-
static void read_local_oob_data_complete(struct hci_dev *hdev, void *data, int err)
5487
+
static void read_local_oob_data_complete(struct hci_dev *hdev, void *data,
5488
+
int err)
5579
5489
{
5580
5490
struct mgmt_rp_read_local_oob_data mgmt_rp;
5581
5491
size_t rp_size = sizeof(mgmt_rp);
···
5596
5504
bt_dev_dbg(hdev, "status %d", status);
5597
5505
5598
5506
if (status) {
5599
-
mgmt_cmd_status(cmd->sk, hdev->id, MGMT_OP_READ_LOCAL_OOB_DATA, status);
5507
+
mgmt_cmd_status(cmd->sk, hdev->id, MGMT_OP_READ_LOCAL_OOB_DATA,
5508
+
status);
5600
5509
goto remove;
5601
5510
}
5602
5511
···
5879
5786
5880
5787
bt_dev_dbg(hdev, "err %d", err);
5881
5788
5882
-
if (err == -ECANCELED)
5883
-
return;
5884
-
5885
-
if (cmd != pending_find(MGMT_OP_START_DISCOVERY, hdev) &&
5886
-
cmd != pending_find(MGMT_OP_START_LIMITED_DISCOVERY, hdev) &&
5887
-
cmd != pending_find(MGMT_OP_START_SERVICE_DISCOVERY, hdev))
5789
+
if (err == -ECANCELED || !mgmt_pending_valid(hdev, cmd))
5888
5790
return;
5889
5791
5890
5792
mgmt_cmd_complete(cmd->sk, cmd->hdev->id, cmd->opcode, mgmt_status(err),
5891
5793
cmd->param, 1);
5892
-
mgmt_pending_remove(cmd);
5794
+
mgmt_pending_free(cmd);
5893
5795
5894
5796
hci_discovery_set_state(hdev, err ? DISCOVERY_STOPPED:
5895
5797
DISCOVERY_FINDING);
···
5892
5804
5893
5805
static int start_discovery_sync(struct hci_dev *hdev, void *data)
5894
5806
{
5807
+
if (!mgmt_pending_listed(hdev, data))
5808
+
return -ECANCELED;
5809
+
5895
5810
return hci_start_discovery_sync(hdev);
5896
5811
}
5897
5812
···
6100
6009
{
6101
6010
struct mgmt_pending_cmd *cmd = data;
6102
6011
6103
-
if (err == -ECANCELED ||
6104
-
cmd != pending_find(MGMT_OP_STOP_DISCOVERY, hdev))
6012
+
if (err == -ECANCELED || !mgmt_pending_valid(hdev, cmd))
6105
6013
return;
6106
6014
6107
6015
bt_dev_dbg(hdev, "err %d", err);
6108
6016
6109
6017
mgmt_cmd_complete(cmd->sk, cmd->hdev->id, cmd->opcode, mgmt_status(err),
6110
6018
cmd->param, 1);
6111
-
mgmt_pending_remove(cmd);
6019
+
mgmt_pending_free(cmd);
6112
6020
6113
6021
if (!err)
6114
6022
hci_discovery_set_state(hdev, DISCOVERY_STOPPED);
···
6115
6025
6116
6026
static int stop_discovery_sync(struct hci_dev *hdev, void *data)
6117
6027
{
6028
+
if (!mgmt_pending_listed(hdev, data))
6029
+
return -ECANCELED;
6030
+
6118
6031
return hci_stop_discovery_sync(hdev);
6119
6032
}
6120
6033
···
6327
6234
6328
6235
static void set_advertising_complete(struct hci_dev *hdev, void *data, int err)
6329
6236
{
6237
+
struct mgmt_pending_cmd *cmd = data;
6330
6238
struct cmd_lookup match = { NULL, hdev };
6331
6239
u8 instance;
6332
6240
struct adv_info *adv_instance;
6333
6241
u8 status = mgmt_status(err);
6334
6242
6243
+
if (err == -ECANCELED || !mgmt_pending_valid(hdev, data))
6244
+
return;
6245
+
6335
6246
if (status) {
6336
-
mgmt_pending_foreach(MGMT_OP_SET_ADVERTISING, hdev, true,
6337
-
cmd_status_rsp, &status);
6247
+
mgmt_cmd_status(cmd->sk, cmd->hdev->id, cmd->opcode, status);
6248
+
mgmt_pending_free(cmd);
6338
6249
return;
6339
6250
}
6340
6251
···
6347
6250
else
6348
6251
hci_dev_clear_flag(hdev, HCI_ADVERTISING);
6349
6252
6350
-
mgmt_pending_foreach(MGMT_OP_SET_ADVERTISING, hdev, true, settings_rsp,
6351
-
&match);
6253
+
settings_rsp(cmd, &match);
6352
6254
6353
6255
new_settings(hdev, match.sk);
6354
6256
···
6379
6283
static int set_adv_sync(struct hci_dev *hdev, void *data)
6380
6284
{
6381
6285
struct mgmt_pending_cmd *cmd = data;
6382
-
struct mgmt_mode *cp = cmd->param;
6383
-
u8 val = !!cp->val;
6286
+
struct mgmt_mode cp;
6287
+
u8 val;
6384
6288
6385
-
if (cp->val == 0x02)
6289
+
mutex_lock(&hdev->mgmt_pending_lock);
6290
+
6291
+
if (!__mgmt_pending_listed(hdev, cmd)) {
6292
+
mutex_unlock(&hdev->mgmt_pending_lock);
6293
+
return -ECANCELED;
6294
+
}
6295
+
6296
+
memcpy(&cp, cmd->param, sizeof(cp));
6297
+
6298
+
mutex_unlock(&hdev->mgmt_pending_lock);
6299
+
6300
+
val = !!cp.val;
6301
+
6302
+
if (cp.val == 0x02)
6386
6303
hci_dev_set_flag(hdev, HCI_ADVERTISING_CONNECTABLE);
6387
6304
else
6388
6305
hci_dev_clear_flag(hdev, HCI_ADVERTISING_CONNECTABLE);
···
8148
8039
u8 status = mgmt_status(err);
8149
8040
u16 eir_len;
8150
8041
8151
-
if (err == -ECANCELED ||
8152
-
cmd != pending_find(MGMT_OP_READ_LOCAL_OOB_EXT_DATA, hdev))
8153
-
return;
8154
-
8155
8042
if (!status) {
8156
8043
if (!skb)
8157
8044
status = MGMT_STATUS_FAILED;
···
8254
8149
kfree_skb(skb);
8255
8150
8256
8151
kfree(mgmt_rp);
8257
-
mgmt_pending_remove(cmd);
8152
+
mgmt_pending_free(cmd);
8258
8153
}
8259
8154
8260
8155
static int read_local_ssp_oob_req(struct hci_dev *hdev, struct sock *sk,
···
8263
8158
struct mgmt_pending_cmd *cmd;
8264
8159
int err;
8265
8160
8266
-
cmd = mgmt_pending_add(sk, MGMT_OP_READ_LOCAL_OOB_EXT_DATA, hdev,
8161
+
cmd = mgmt_pending_new(sk, MGMT_OP_READ_LOCAL_OOB_EXT_DATA, hdev,
8267
8162
cp, sizeof(*cp));
8268
8163
if (!cmd)
8269
8164
return -ENOMEM;
+46
net/bluetooth/mgmt_util.c
+46
net/bluetooth/mgmt_util.c
···
320
320
mgmt_pending_free(cmd);
321
321
}
322
322
323
+
bool __mgmt_pending_listed(struct hci_dev *hdev, struct mgmt_pending_cmd *cmd)
324
+
{
325
+
struct mgmt_pending_cmd *tmp;
326
+
327
+
lockdep_assert_held(&hdev->mgmt_pending_lock);
328
+
329
+
if (!cmd)
330
+
return false;
331
+
332
+
list_for_each_entry(tmp, &hdev->mgmt_pending, list) {
333
+
if (cmd == tmp)
334
+
return true;
335
+
}
336
+
337
+
return false;
338
+
}
339
+
340
+
bool mgmt_pending_listed(struct hci_dev *hdev, struct mgmt_pending_cmd *cmd)
341
+
{
342
+
bool listed;
343
+
344
+
mutex_lock(&hdev->mgmt_pending_lock);
345
+
listed = __mgmt_pending_listed(hdev, cmd);
346
+
mutex_unlock(&hdev->mgmt_pending_lock);
347
+
348
+
return listed;
349
+
}
350
+
351
+
bool mgmt_pending_valid(struct hci_dev *hdev, struct mgmt_pending_cmd *cmd)
352
+
{
353
+
bool listed;
354
+
355
+
if (!cmd)
356
+
return false;
357
+
358
+
mutex_lock(&hdev->mgmt_pending_lock);
359
+
360
+
listed = __mgmt_pending_listed(hdev, cmd);
361
+
if (listed)
362
+
list_del(&cmd->list);
363
+
364
+
mutex_unlock(&hdev->mgmt_pending_lock);
365
+
366
+
return listed;
367
+
}
368
+
323
369
void mgmt_mesh_foreach(struct hci_dev *hdev,
324
370
void (*cb)(struct mgmt_mesh_tx *mesh_tx, void *data),
325
371
void *data, struct sock *sk)
+3
net/bluetooth/mgmt_util.h
+3
net/bluetooth/mgmt_util.h
···
65
65
void *data, u16 len);
66
66
void mgmt_pending_free(struct mgmt_pending_cmd *cmd);
67
67
void mgmt_pending_remove(struct mgmt_pending_cmd *cmd);
68
+
bool __mgmt_pending_listed(struct hci_dev *hdev, struct mgmt_pending_cmd *cmd);
69
+
bool mgmt_pending_listed(struct hci_dev *hdev, struct mgmt_pending_cmd *cmd);
70
+
bool mgmt_pending_valid(struct hci_dev *hdev, struct mgmt_pending_cmd *cmd);
68
71
void mgmt_mesh_foreach(struct hci_dev *hdev,
69
72
void (*cb)(struct mgmt_mesh_tx *mesh_tx, void *data),
70
73
void *data, struct sock *sk);
+1
-1
net/core/skbuff.c
+1
-1
net/core/skbuff.c
+7
net/ipv4/nexthop.c
+7
net/ipv4/nexthop.c
···
2405
2405
return -EINVAL;
2406
2406
}
2407
2407
2408
+
if (!list_empty(&old->grp_list) &&
2409
+
rtnl_dereference(new->nh_info)->fdb_nh !=
2410
+
rtnl_dereference(old->nh_info)->fdb_nh) {
2411
+
NL_SET_ERR_MSG(extack, "Cannot change nexthop FDB status while in a group");
2412
+
return -EINVAL;
2413
+
}
2414
+
2408
2415
err = call_nexthop_notifiers(net, NEXTHOP_EVENT_REPLACE, new, extack);
2409
2416
if (err)
2410
2417
return err;
+1
-1
net/xfrm/xfrm_device.c
+1
-1
net/xfrm/xfrm_device.c
+3
net/xfrm/xfrm_state.c
+3
net/xfrm/xfrm_state.c
···
2583
2583
2584
2584
for (h = 0; h < range; h++) {
2585
2585
u32 spi = (low == high) ? low : get_random_u32_inclusive(low, high);
2586
+
if (spi == 0)
2587
+
goto next;
2586
2588
newspi = htonl(spi);
2587
2589
2588
2590
spin_lock_bh(&net->xfrm.xfrm_state_lock);
···
2600
2598
xfrm_state_put(x0);
2601
2599
spin_unlock_bh(&net->xfrm.xfrm_state_lock);
2602
2600
2601
+
next:
2603
2602
if (signal_pending(current)) {
2604
2603
err = -ERESTARTSYS;
2605
2604
goto unlock;
+14
-4
sound/hda/codecs/realtek/alc269.c
+14
-4
sound/hda/codecs/realtek/alc269.c
···
3702
3702
ALC236_FIXUP_DELL_DUAL_CODECS,
3703
3703
ALC287_FIXUP_CS35L41_I2C_2_THINKPAD_ACPI,
3704
3704
ALC287_FIXUP_TAS2781_I2C,
3705
+
ALC295_FIXUP_DELL_TAS2781_I2C,
3705
3706
ALC245_FIXUP_TAS2781_SPI_2,
3706
3707
ALC287_FIXUP_TXNW2781_I2C,
3707
3708
ALC287_FIXUP_YOGA7_14ARB7_I2C,
···
5168
5167
.type = HDA_FIXUP_FUNC,
5169
5168
.v.func = alc294_fixup_gx502_hp,
5170
5169
},
5170
+
[ALC295_FIXUP_DELL_TAS2781_I2C] = {
5171
+
.type = HDA_FIXUP_FUNC,
5172
+
.v.func = tas2781_fixup_tias_i2c,
5173
+
.chained = true,
5174
+
.chain_id = ALC289_FIXUP_DUAL_SPK
5175
+
},
5171
5176
[ALC294_FIXUP_ASUS_GU502_PINS] = {
5172
5177
.type = HDA_FIXUP_PINS,
5173
5178
.v.pins = (const struct hda_pintbl[]) {
···
6296
6289
SND_PCI_QUIRK(0x1028, 0x0c1e, "Dell Precision 3540", ALC236_FIXUP_DELL_DUAL_CODECS),
6297
6290
SND_PCI_QUIRK(0x1028, 0x0c28, "Dell Inspiron 16 Plus 7630", ALC295_FIXUP_DELL_INSPIRON_TOP_SPEAKERS),
6298
6291
SND_PCI_QUIRK(0x1028, 0x0c4d, "Dell", ALC287_FIXUP_CS35L41_I2C_4),
6299
-
SND_PCI_QUIRK(0x1028, 0x0c94, "Dell Polaris 3 metal", ALC287_FIXUP_TAS2781_I2C),
6300
-
SND_PCI_QUIRK(0x1028, 0x0c96, "Dell Polaris 2in1", ALC287_FIXUP_TAS2781_I2C),
6292
+
SND_PCI_QUIRK(0x1028, 0x0c94, "Dell Polaris 3 metal", ALC295_FIXUP_DELL_TAS2781_I2C),
6293
+
SND_PCI_QUIRK(0x1028, 0x0c96, "Dell Polaris 2in1", ALC295_FIXUP_DELL_TAS2781_I2C),
6301
6294
SND_PCI_QUIRK(0x1028, 0x0cbd, "Dell Oasis 13 CS MTL-U", ALC289_FIXUP_DELL_CS35L41_SPI_2),
6302
6295
SND_PCI_QUIRK(0x1028, 0x0cbe, "Dell Oasis 13 2-IN-1 MTL-U", ALC289_FIXUP_DELL_CS35L41_SPI_2),
6303
6296
SND_PCI_QUIRK(0x1028, 0x0cbf, "Dell Oasis 13 Low Weight MTU-L", ALC289_FIXUP_DELL_CS35L41_SPI_2),
···
6476
6469
SND_PCI_QUIRK(0x103c, 0x8992, "HP EliteBook 845 G9", ALC287_FIXUP_CS35L41_I2C_2),
6477
6470
SND_PCI_QUIRK(0x103c, 0x8994, "HP EliteBook 855 G9", ALC287_FIXUP_CS35L41_I2C_2_HP_GPIO_LED),
6478
6471
SND_PCI_QUIRK(0x103c, 0x8995, "HP EliteBook 855 G9", ALC287_FIXUP_CS35L41_I2C_2),
6472
+
SND_PCI_QUIRK(0x103c, 0x89a0, "HP Laptop 15-dw4xxx", ALC236_FIXUP_HP_MUTE_LED_COEFBIT2),
6479
6473
SND_PCI_QUIRK(0x103c, 0x89a4, "HP ProBook 440 G9", ALC236_FIXUP_HP_GPIO_LED),
6480
6474
SND_PCI_QUIRK(0x103c, 0x89a6, "HP ProBook 450 G9", ALC236_FIXUP_HP_GPIO_LED),
6481
6475
SND_PCI_QUIRK(0x103c, 0x89aa, "HP EliteBook 630 G9", ALC236_FIXUP_HP_GPIO_LED),
···
7079
7071
SND_PCI_QUIRK(0x17aa, 0x38be, "Yoga S980-14.5 proX YC Dual", ALC287_FIXUP_TAS2781_I2C),
7080
7072
SND_PCI_QUIRK(0x17aa, 0x38bf, "Yoga S980-14.5 proX LX Dual", ALC287_FIXUP_TAS2781_I2C),
7081
7073
SND_PCI_QUIRK(0x17aa, 0x38c3, "Y980 DUAL", ALC287_FIXUP_TAS2781_I2C),
7082
-
SND_PCI_QUIRK(0x17aa, 0x38c7, "Thinkbook 13x Gen 4", ALC287_FIXUP_CS35L41_I2C_4),
7083
-
SND_PCI_QUIRK(0x17aa, 0x38c8, "Thinkbook 13x Gen 4", ALC287_FIXUP_CS35L41_I2C_4),
7074
+
SND_PCI_QUIRK(0x17aa, 0x38c7, "Thinkbook 13x Gen 4", ALC287_FIXUP_MG_RTKC_CSAMP_CS35L41_I2C_THINKPAD),
7075
+
SND_PCI_QUIRK(0x17aa, 0x38c8, "Thinkbook 13x Gen 4", ALC287_FIXUP_MG_RTKC_CSAMP_CS35L41_I2C_THINKPAD),
7084
7076
SND_PCI_QUIRK(0x17aa, 0x38cb, "Y790 YG DUAL", ALC287_FIXUP_TAS2781_I2C),
7085
7077
SND_PCI_QUIRK(0x17aa, 0x38cd, "Y790 VECO DUAL", ALC287_FIXUP_TAS2781_I2C),
7086
7078
SND_PCI_QUIRK(0x17aa, 0x38d2, "Lenovo Yoga 9 14IMH9", ALC287_FIXUP_YOGA9_14IMH9_BASS_SPK_PIN),
···
7101
7093
SND_PCI_QUIRK(0x17aa, 0x3913, "Lenovo 145", ALC236_FIXUP_LENOVO_INV_DMIC),
7102
7094
SND_PCI_QUIRK(0x17aa, 0x391f, "Yoga S990-16 pro Quad YC Quad", ALC287_FIXUP_TXNW2781_I2C),
7103
7095
SND_PCI_QUIRK(0x17aa, 0x3920, "Yoga S990-16 pro Quad VECO Quad", ALC287_FIXUP_TXNW2781_I2C),
7096
+
SND_PCI_QUIRK(0x17aa, 0x3929, "Thinkbook 13x Gen 5", ALC287_FIXUP_MG_RTKC_CSAMP_CS35L41_I2C_THINKPAD),
7097
+
SND_PCI_QUIRK(0x17aa, 0x392b, "Thinkbook 13x Gen 5", ALC287_FIXUP_MG_RTKC_CSAMP_CS35L41_I2C_THINKPAD),
7104
7098
SND_PCI_QUIRK(0x17aa, 0x3977, "IdeaPad S210", ALC283_FIXUP_INT_MIC),
7105
7099
SND_PCI_QUIRK(0x17aa, 0x3978, "Lenovo B50-70", ALC269_FIXUP_DMIC_THINKPAD_ACPI),
7106
7100
SND_PCI_QUIRK(0x17aa, 0x3bf8, "Quanta FL1", ALC269_FIXUP_PCM_44K),
+4
sound/hda/codecs/side-codecs/cs35l41_hda_property.c
+4
sound/hda/codecs/side-codecs/cs35l41_hda_property.c
···
135
135
{ "17AA38C8", 4, INTERNAL, { CS35L41_RIGHT, CS35L41_LEFT, CS35L41_RIGHT, CS35L41_LEFT }, 0, 2, -1, 1000, 4500, 24 },
136
136
{ "17AA38F9", 2, EXTERNAL, { CS35L41_RIGHT, CS35L41_LEFT, 0, 0 }, 0, 2, -1, 0, 0, 0 },
137
137
{ "17AA38FA", 2, EXTERNAL, { CS35L41_RIGHT, CS35L41_LEFT, 0, 0 }, 0, 2, -1, 0, 0, 0 },
138
+
{ "17AA3929", 4, INTERNAL, { CS35L41_RIGHT, CS35L41_LEFT, CS35L41_RIGHT, CS35L41_LEFT }, 0, 2, -1, 1000, 4500, 24 },
139
+
{ "17AA392B", 4, INTERNAL, { CS35L41_RIGHT, CS35L41_LEFT, CS35L41_RIGHT, CS35L41_LEFT }, 0, 2, -1, 1000, 4500, 24 },
138
140
{}
139
141
};
140
142
···
560
558
{ "CSC3551", "17AA38C8", generic_dsd_config },
561
559
{ "CSC3551", "17AA38F9", generic_dsd_config },
562
560
{ "CSC3551", "17AA38FA", generic_dsd_config },
561
+
{ "CSC3551", "17AA3929", generic_dsd_config },
562
+
{ "CSC3551", "17AA392B", generic_dsd_config },
563
563
{}
564
564
};
565
565
+25
-5
sound/hda/codecs/side-codecs/tas2781_hda.c
+25
-5
sound/hda/codecs/side-codecs/tas2781_hda.c
···
33
33
};
34
34
EXPORT_SYMBOL_NS_GPL(tasdev_fct_efi_guid, "SND_HDA_SCODEC_TAS2781");
35
35
36
+
/*
37
+
* The order of calibrated-data writing function is a bit different from the
38
+
* order in UEFI. Here is the conversion to match the order of calibrated-data
39
+
* writing function.
40
+
*/
41
+
static void cali_cnv(unsigned char *data, unsigned int base, int offset)
42
+
{
43
+
struct cali_reg reg_data;
44
+
45
+
memcpy(®_data, &data[base], sizeof(reg_data));
46
+
/* the data order has to be swapped between r0_low_reg and inv0_reg */
47
+
swap(reg_data.r0_low_reg, reg_data.invr0_reg);
48
+
49
+
cpu_to_be32_array((__force __be32 *)(data + offset + 1),
50
+
(u32 *)®_data, TASDEV_CALIB_N);
51
+
}
52
+
36
53
static void tas2781_apply_calib(struct tasdevice_priv *p)
37
54
{
38
55
struct calidata *cali_data = &p->cali_data;
···
120
103
121
104
data[l] = k;
122
105
oft++;
123
-
for (i = 0; i < TASDEV_CALIB_N * 4; i++)
124
-
data[l + i + 1] = data[4 * oft + i];
106
+
cali_cnv(data, 4 * oft, l);
125
107
k++;
126
108
}
127
109
}
···
146
130
147
131
for (j = p->ndev - 1; j >= 0; j--) {
148
132
l = j * (cali_data->cali_dat_sz_per_dev + 1);
149
-
for (i = TASDEV_CALIB_N * 4; i > 0 ; i--)
150
-
data[l + i] = data[p->index * 5 + i];
151
-
data[l+i] = j;
133
+
cali_cnv(data, cali_data->cali_dat_sz_per_dev * j, l);
134
+
data[l] = j;
152
135
}
153
136
}
154
137
···
192
177
unsigned char *data;
193
178
efi_status_t status;
194
179
int i;
180
+
181
+
if (!efi_rt_services_supported(EFI_RT_SUPPORTED_GET_VARIABLE)) {
182
+
dev_err(p->dev, "%s: NO EFI FOUND!\n", __func__);
183
+
return -EINVAL;
184
+
}
195
185
196
186
if (hda->catlog_id < LENOVO)
197
187
efi_guid = tasdev_fct_efi_guid[hda->catlog_id];
+5
sound/hda/codecs/side-codecs/tas2781_hda_i2c.c
+5
sound/hda/codecs/side-codecs/tas2781_hda_i2c.c
···
315
315
unsigned int attr;
316
316
int ret, i, j, k;
317
317
318
+
if (!efi_rt_services_supported(EFI_RT_SUPPORTED_GET_VARIABLE)) {
319
+
dev_err(p->dev, "%s: NO EFI FOUND!\n", __func__);
320
+
return -EINVAL;
321
+
}
322
+
318
323
cd->cali_dat_sz_per_dev = TAS2563_CAL_DATA_SIZE * TASDEV_CALIB_N;
319
324
320
325
/* extra byte for each device is the device number */
+2
sound/hda/core/intel-dsp-config.c
+2
sound/hda/core/intel-dsp-config.c
+5
-6
sound/soc/amd/acp/acp-i2s.c
+5
-6
sound/soc/amd/acp/acp-i2s.c
···
73
73
unsigned int fmt)
74
74
{
75
75
struct device *dev = cpu_dai->component->dev;
76
-
struct acp_chip_info *chip = dev_get_platdata(dev);
76
+
struct acp_chip_info *chip = dev_get_drvdata(dev->parent);
77
77
int mode;
78
78
79
79
mode = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
···
199
199
u32 reg_val, fmt_reg, tdm_fmt;
200
200
u32 lrclk_div_val, bclk_div_val;
201
201
202
-
chip = dev_get_platdata(dev);
202
+
chip = dev_get_drvdata(dev->parent);
203
203
rsrc = chip->rsrc;
204
204
205
205
/* These values are as per Hardware Spec */
···
386
386
{
387
387
struct acp_stream *stream = substream->runtime->private_data;
388
388
struct device *dev = dai->component->dev;
389
-
struct acp_chip_info *chip = dev_get_platdata(dev);
389
+
struct acp_chip_info *chip = dev_get_drvdata(dev->parent);
390
390
struct acp_resource *rsrc = chip->rsrc;
391
391
u32 val, period_bytes, reg_val, ier_val, water_val, buf_size, buf_reg;
392
392
···
516
516
static int acp_i2s_prepare(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
517
517
{
518
518
struct device *dev = dai->component->dev;
519
-
struct acp_chip_info *chip = dev_get_platdata(dev);
519
+
struct acp_chip_info *chip = dev_get_drvdata(dev->parent);
520
520
struct acp_resource *rsrc = chip->rsrc;
521
521
struct acp_stream *stream = substream->runtime->private_data;
522
522
u32 reg_dma_size = 0, reg_fifo_size = 0, reg_fifo_addr = 0;
523
523
u32 phy_addr = 0, acp_fifo_addr = 0, ext_int_ctrl;
524
524
unsigned int dir = substream->stream;
525
525
526
-
chip = dev_get_platdata(dev);
527
526
switch (dai->driver->id) {
528
527
case I2S_SP_INSTANCE:
529
528
if (dir == SNDRV_PCM_STREAM_PLAYBACK) {
···
631
632
{
632
633
struct acp_stream *stream = substream->runtime->private_data;
633
634
struct device *dev = dai->component->dev;
634
-
struct acp_chip_info *chip = dev_get_platdata(dev);
635
+
struct acp_chip_info *chip = dev_get_drvdata(dev->parent);
635
636
struct acp_resource *rsrc = chip->rsrc;
636
637
unsigned int dir = substream->stream;
637
638
unsigned int irq_bit = 0;
+16
sound/soc/amd/acp/acp-sdw-legacy-mach.c
+16
sound/soc/amd/acp/acp-sdw-legacy-mach.c
···
79
79
},
80
80
.driver_data = (void *)(ASOC_SDW_CODEC_SPKR),
81
81
},
82
+
{
83
+
.callback = soc_sdw_quirk_cb,
84
+
.matches = {
85
+
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"),
86
+
DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "0DD3"),
87
+
},
88
+
.driver_data = (void *)(ASOC_SDW_CODEC_SPKR),
89
+
},
90
+
{
91
+
.callback = soc_sdw_quirk_cb,
92
+
.matches = {
93
+
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"),
94
+
DMI_EXACT_MATCH(DMI_PRODUCT_SKU, "0DD4"),
95
+
},
96
+
.driver_data = (void *)(ASOC_SDW_CODEC_SPKR),
97
+
},
82
98
{}
83
99
};
84
100
+1
-1
sound/soc/amd/acp/amd.h
+1
-1
sound/soc/amd/acp/amd.h
+15
-7
sound/soc/codecs/lpass-rx-macro.c
+15
-7
sound/soc/codecs/lpass-rx-macro.c
···
618
618
{176400, 0xB}, {352800, 0xC},
619
619
};
620
620
621
+
/* Matches also rx_macro_mux_text */
621
622
enum {
622
623
RX_MACRO_AIF1_PB,
623
624
RX_MACRO_AIF2_PB,
···
723
722
"ZERO", "RX INT2_2 MUX",
724
723
};
725
724
725
+
/* Order must match RX_MACRO_MAX_DAIS enum (offset by 1) */
726
726
static const char *const rx_macro_mux_text[] = {
727
727
"ZERO", "AIF1_PB", "AIF2_PB", "AIF3_PB", "AIF4_PB"
728
728
};
···
2476
2474
struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
2477
2475
struct snd_soc_dapm_update *update = NULL;
2478
2476
u32 rx_port_value = ucontrol->value.enumerated.item[0];
2477
+
unsigned int dai_id;
2479
2478
u32 aif_rst;
2480
2479
struct rx_macro *rx = snd_soc_component_get_drvdata(component);
2481
2480
···
2493
2490
2494
2491
switch (rx_port_value) {
2495
2492
case 0:
2496
-
if (rx->active_ch_cnt[aif_rst]) {
2497
-
clear_bit(widget->shift,
2498
-
&rx->active_ch_mask[aif_rst]);
2499
-
rx->active_ch_cnt[aif_rst]--;
2493
+
/*
2494
+
* active_ch_cnt and active_ch_mask use DAI IDs (RX_MACRO_MAX_DAIS).
2495
+
* active_ch_cnt == 0 was tested in if() above.
2496
+
*/
2497
+
dai_id = aif_rst - 1;
2498
+
if (rx->active_ch_cnt[dai_id]) {
2499
+
clear_bit(widget->shift, &rx->active_ch_mask[dai_id]);
2500
+
rx->active_ch_cnt[dai_id]--;
2500
2501
}
2501
2502
break;
2502
2503
case 1:
2503
2504
case 2:
2504
2505
case 3:
2505
2506
case 4:
2506
-
set_bit(widget->shift,
2507
-
&rx->active_ch_mask[rx_port_value]);
2508
-
rx->active_ch_cnt[rx_port_value]++;
2507
+
/* active_ch_cnt and active_ch_mask use DAI IDs (WSA_MACRO_MAX_DAIS). */
2508
+
dai_id = rx_port_value - 1;
2509
+
set_bit(widget->shift, &rx->active_ch_mask[dai_id]);
2510
+
rx->active_ch_cnt[dai_id]++;
2509
2511
break;
2510
2512
default:
2511
2513
dev_err(component->dev,
+15
-7
sound/soc/codecs/lpass-wsa-macro.c
+15
-7
sound/soc/codecs/lpass-wsa-macro.c
···
368
368
{192000, 0x6}, /* 192K */
369
369
};
370
370
371
+
/* Matches also rx_mux_text */
371
372
enum {
372
373
WSA_MACRO_AIF1_PB,
373
374
WSA_MACRO_AIF_MIX1_PB,
···
466
465
"ZERO", "RX_MIX_TX0", "RX_MIX_TX1"
467
466
};
468
467
468
+
/* Order must match WSA_MACRO_MAX_DAIS enum (offset by 1) */
469
469
static const char *const rx_mux_text[] = {
470
470
"ZERO", "AIF1_PB", "AIF_MIX1_PB"
471
471
};
···
2209
2207
u32 rx_port_value = ucontrol->value.integer.value[0];
2210
2208
u32 bit_input;
2211
2209
u32 aif_rst;
2210
+
unsigned int dai_id;
2212
2211
struct wsa_macro *wsa = snd_soc_component_get_drvdata(component);
2213
2212
2214
2213
aif_rst = wsa->rx_port_value[widget->shift];
···
2227
2224
2228
2225
switch (rx_port_value) {
2229
2226
case 0:
2230
-
if (wsa->active_ch_cnt[aif_rst]) {
2231
-
clear_bit(bit_input,
2232
-
&wsa->active_ch_mask[aif_rst]);
2233
-
wsa->active_ch_cnt[aif_rst]--;
2227
+
/*
2228
+
* active_ch_cnt and active_ch_mask use DAI IDs (WSA_MACRO_MAX_DAIS).
2229
+
* active_ch_cnt == 0 was tested in if() above.
2230
+
*/
2231
+
dai_id = aif_rst - 1;
2232
+
if (wsa->active_ch_cnt[dai_id]) {
2233
+
clear_bit(bit_input, &wsa->active_ch_mask[dai_id]);
2234
+
wsa->active_ch_cnt[dai_id]--;
2234
2235
}
2235
2236
break;
2236
2237
case 1:
2237
2238
case 2:
2238
-
set_bit(bit_input,
2239
-
&wsa->active_ch_mask[rx_port_value]);
2240
-
wsa->active_ch_cnt[rx_port_value]++;
2239
+
/* active_ch_cnt and active_ch_mask use DAI IDs (WSA_MACRO_MAX_DAIS). */
2240
+
dai_id = rx_port_value - 1;
2241
+
set_bit(bit_input, &wsa->active_ch_mask[dai_id]);
2242
+
wsa->active_ch_cnt[dai_id]++;
2241
2243
break;
2242
2244
default:
2243
2245
dev_err(component->dev,
+9
-8
sound/soc/codecs/rt5682s.c
+9
-8
sound/soc/codecs/rt5682s.c
···
653
653
switch (mode) {
654
654
case SAR_PWR_SAVING:
655
655
snd_soc_component_update_bits(component, RT5682S_CBJ_CTRL_3,
656
-
RT5682S_CBJ_IN_BUF_MASK, RT5682S_CBJ_IN_BUF_DIS);
656
+
RT5682S_CBJ_IN_BUF_MASK, RT5682S_CBJ_IN_BUF_EN);
657
657
snd_soc_component_update_bits(component, RT5682S_CBJ_CTRL_1,
658
-
RT5682S_MB1_PATH_MASK | RT5682S_MB2_PATH_MASK,
659
-
RT5682S_CTRL_MB1_REG | RT5682S_CTRL_MB2_REG);
658
+
RT5682S_MB1_PATH_MASK | RT5682S_MB2_PATH_MASK |
659
+
RT5682S_VREF_POW_MASK, RT5682S_CTRL_MB1_FSM |
660
+
RT5682S_CTRL_MB2_FSM | RT5682S_VREF_POW_FSM);
660
661
snd_soc_component_update_bits(component, RT5682S_SAR_IL_CMD_1,
661
662
RT5682S_SAR_BUTDET_MASK | RT5682S_SAR_BUTDET_POW_MASK |
662
663
RT5682S_SAR_SEL_MB1_2_CTL_MASK, RT5682S_SAR_BUTDET_DIS |
663
-
RT5682S_SAR_BUTDET_POW_SAV | RT5682S_SAR_SEL_MB1_2_MANU);
664
+
RT5682S_SAR_BUTDET_POW_NORM | RT5682S_SAR_SEL_MB1_2_MANU);
664
665
usleep_range(5000, 5500);
665
666
snd_soc_component_update_bits(component, RT5682S_SAR_IL_CMD_1,
666
667
RT5682S_SAR_BUTDET_MASK, RT5682S_SAR_BUTDET_EN);
···
689
688
snd_soc_component_update_bits(component, RT5682S_SAR_IL_CMD_1,
690
689
RT5682S_SAR_BUTDET_MASK | RT5682S_SAR_BUTDET_POW_MASK |
691
690
RT5682S_SAR_SEL_MB1_2_CTL_MASK, RT5682S_SAR_BUTDET_DIS |
692
-
RT5682S_SAR_BUTDET_POW_SAV | RT5682S_SAR_SEL_MB1_2_MANU);
691
+
RT5682S_SAR_BUTDET_POW_NORM | RT5682S_SAR_SEL_MB1_2_MANU);
693
692
break;
694
693
default:
695
694
dev_err(component->dev, "Invalid SAR Power mode: %d\n", mode);
···
726
725
snd_soc_component_update_bits(component, RT5682S_SAR_IL_CMD_1,
727
726
RT5682S_SAR_BUTDET_MASK | RT5682S_SAR_BUTDET_POW_MASK |
728
727
RT5682S_SAR_SEL_MB1_2_CTL_MASK, RT5682S_SAR_BUTDET_DIS |
729
-
RT5682S_SAR_BUTDET_POW_SAV | RT5682S_SAR_SEL_MB1_2_MANU);
728
+
RT5682S_SAR_BUTDET_POW_NORM | RT5682S_SAR_SEL_MB1_2_MANU);
730
729
}
731
730
732
731
/**
···
787
786
jack_type = SND_JACK_HEADSET;
788
787
snd_soc_component_write(component, RT5682S_SAR_IL_CMD_3, 0x024c);
789
788
snd_soc_component_update_bits(component, RT5682S_CBJ_CTRL_1,
790
-
RT5682S_FAST_OFF_MASK, RT5682S_FAST_OFF_EN);
789
+
RT5682S_FAST_OFF_MASK, RT5682S_FAST_OFF_DIS);
791
790
snd_soc_component_update_bits(component, RT5682S_SAR_IL_CMD_1,
792
791
RT5682S_SAR_SEL_MB1_2_MASK, val << RT5682S_SAR_SEL_MB1_2_SFT);
793
792
rt5682s_enable_push_button_irq(component);
···
967
966
RT5682S_EMB_JD_MASK | RT5682S_DET_TYPE |
968
967
RT5682S_POL_FAST_OFF_MASK | RT5682S_MIC_CAP_MASK,
969
968
RT5682S_EMB_JD_EN | RT5682S_DET_TYPE |
970
-
RT5682S_POL_FAST_OFF_HIGH | RT5682S_MIC_CAP_HS);
969
+
RT5682S_POL_FAST_OFF_LOW | RT5682S_MIC_CAP_HS);
971
970
regmap_update_bits(rt5682s->regmap, RT5682S_SAR_IL_CMD_1,
972
971
RT5682S_SAR_POW_MASK, RT5682S_SAR_POW_EN);
973
972
regmap_update_bits(rt5682s->regmap, RT5682S_GPIO_CTRL_1,
+2
-4
sound/soc/codecs/rt712-sdca.c
+2
-4
sound/soc/codecs/rt712-sdca.c
···
1890
1890
1891
1891
rt712_sdca_va_io_init(rt712);
1892
1892
} else {
1893
-
if (!rt712->dmic_function_found) {
1894
-
dev_err(&slave->dev, "%s RT712 VB detected but no SMART_MIC function exposed in ACPI\n",
1893
+
if (!rt712->dmic_function_found)
1894
+
dev_warn(&slave->dev, "%s RT712 VB detected but no SMART_MIC function exposed in ACPI\n",
1895
1895
__func__);
1896
-
goto suspend;
1897
-
}
1898
1896
1899
1897
/* multilanes and DMIC are supported by rt712vb */
1900
1898
prop->lane_control_support = true;
+4
-3
sound/soc/codecs/sma1307.c
+4
-3
sound/soc/codecs/sma1307.c
···
1737
1737
sma1307->set.checksum = data[sma1307->set.header_size - 2];
1738
1738
sma1307->set.num_mode = data[sma1307->set.header_size - 1];
1739
1739
num_mode = sma1307->set.num_mode;
1740
-
sma1307->set.header = devm_kzalloc(sma1307->dev,
1741
-
sma1307->set.header_size,
1742
-
GFP_KERNEL);
1740
+
sma1307->set.header = devm_kmalloc_array(sma1307->dev,
1741
+
sma1307->set.header_size,
1742
+
sizeof(int),
1743
+
GFP_KERNEL);
1743
1744
if (!sma1307->set.header) {
1744
1745
sma1307->set.status = false;
1745
1746
return;
+7
-2
sound/soc/codecs/wm8940.c
+7
-2
sound/soc/codecs/wm8940.c
···
220
220
SOC_SINGLE_TLV("Digital Capture Volume", WM8940_ADCVOL,
221
221
0, 255, 0, wm8940_adc_tlv),
222
222
SOC_ENUM("Mic Bias Level", wm8940_mic_bias_level_enum),
223
-
SOC_SINGLE_TLV("Capture Boost Volue", WM8940_ADCBOOST,
223
+
SOC_SINGLE_TLV("Capture Boost Volume", WM8940_ADCBOOST,
224
224
8, 1, 0, wm8940_capture_boost_vol_tlv),
225
225
SOC_SINGLE_TLV("Speaker Playback Volume", WM8940_SPKVOL,
226
226
0, 63, 0, wm8940_spk_vol_tlv),
···
693
693
f = wm8940_get_mclkdiv(priv->mclk, fs256, &mclkdiv);
694
694
if (f != priv->mclk) {
695
695
/* The PLL performs best around 90MHz */
696
-
fpll = wm8940_get_mclkdiv(22500000, fs256, &mclkdiv);
696
+
if (fs256 % 8000)
697
+
f = 22579200;
698
+
else
699
+
f = 24576000;
700
+
701
+
fpll = wm8940_get_mclkdiv(f, fs256, &mclkdiv);
697
702
}
698
703
699
704
wm8940_set_dai_pll(dai, 0, 0, priv->mclk, fpll);
+6
-2
sound/soc/codecs/wm8974.c
+6
-2
sound/soc/codecs/wm8974.c
···
419
419
fs256 = 256 * priv->fs;
420
420
421
421
f = wm8974_get_mclkdiv(priv->mclk, fs256, &mclkdiv);
422
-
423
422
if (f != priv->mclk) {
424
423
/* The PLL performs best around 90MHz */
425
-
fpll = wm8974_get_mclkdiv(22500000, fs256, &mclkdiv);
424
+
if (fs256 % 8000)
425
+
f = 22579200;
426
+
else
427
+
f = 24576000;
428
+
429
+
fpll = wm8974_get_mclkdiv(f, fs256, &mclkdiv);
426
430
}
427
431
428
432
wm8974_set_dai_pll(dai, 0, 0, priv->mclk, fpll);
+1
-1
sound/soc/intel/boards/sof_sdw.c
+1
-1
sound/soc/intel/boards/sof_sdw.c
···
761
761
.callback = sof_sdw_quirk_cb,
762
762
.matches = {
763
763
DMI_MATCH(DMI_SYS_VENDOR, "Google"),
764
-
DMI_MATCH(DMI_PRODUCT_NAME, "Fatcat"),
764
+
DMI_MATCH(DMI_PRODUCT_FAMILY, "Google_Fatcat"),
765
765
},
766
766
.driver_data = (void *)(SOC_SDW_PCH_DMIC |
767
767
SOF_BT_OFFLOAD_SSP(2) |
+6
sound/soc/intel/boards/sof_ssp_amp.c
+6
sound/soc/intel/boards/sof_ssp_amp.c
···
216
216
/* SSP 0 and SSP 2 are used for HDMI IN */
217
217
SOF_HDMI_PLAYBACK_PRESENT),
218
218
},
219
+
{
220
+
.name = "ptl_lt6911_hdmi_ssp",
221
+
.driver_data = (kernel_ulong_t)(SOF_SSP_MASK_HDMI_CAPTURE(0x5) |
222
+
/* SSP 0 and SSP 2 are used for HDMI IN */
223
+
SOF_HDMI_PLAYBACK_PRESENT),
224
+
},
219
225
{ }
220
226
};
221
227
MODULE_DEVICE_TABLE(platform, board_ids);
+17
-6
sound/soc/intel/catpt/pcm.c
+17
-6
sound/soc/intel/catpt/pcm.c
···
568
568
SNDRV_PCM_INFO_RESUME |
569
569
SNDRV_PCM_INFO_NO_PERIOD_WAKEUP,
570
570
.formats = SNDRV_PCM_FMTBIT_S16_LE |
571
-
SNDRV_PCM_FMTBIT_S24_LE |
572
571
SNDRV_PCM_FMTBIT_S32_LE,
572
+
.subformats = SNDRV_PCM_SUBFMTBIT_MSBITS_24 |
573
+
SNDRV_PCM_SUBFMTBIT_MSBITS_MAX,
573
574
.period_bytes_min = PAGE_SIZE,
574
575
.period_bytes_max = CATPT_BUFFER_MAX_SIZE / CATPT_PCM_PERIODS_MIN,
575
576
.periods_min = CATPT_PCM_PERIODS_MIN,
···
699
698
.channels_min = 2,
700
699
.channels_max = 2,
701
700
.rates = SNDRV_PCM_RATE_48000,
702
-
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
701
+
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
702
+
.subformats = SNDRV_PCM_SUBFMTBIT_MSBITS_24 |
703
+
SNDRV_PCM_SUBFMTBIT_MSBITS_MAX,
703
704
},
704
705
.capture = {
705
706
.stream_name = "Analog Capture",
706
707
.channels_min = 2,
707
708
.channels_max = 4,
708
709
.rates = SNDRV_PCM_RATE_48000,
709
-
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
710
+
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
711
+
.subformats = SNDRV_PCM_SUBFMTBIT_MSBITS_24 |
712
+
SNDRV_PCM_SUBFMTBIT_MSBITS_MAX,
710
713
},
711
714
},
712
715
{
···
722
717
.channels_min = 2,
723
718
.channels_max = 2,
724
719
.rates = SNDRV_PCM_RATE_8000_192000,
725
-
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
720
+
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
721
+
.subformats = SNDRV_PCM_SUBFMTBIT_MSBITS_24 |
722
+
SNDRV_PCM_SUBFMTBIT_MSBITS_MAX,
726
723
},
727
724
},
728
725
{
···
736
729
.channels_min = 2,
737
730
.channels_max = 2,
738
731
.rates = SNDRV_PCM_RATE_8000_192000,
739
-
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
732
+
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
733
+
.subformats = SNDRV_PCM_SUBFMTBIT_MSBITS_24 |
734
+
SNDRV_PCM_SUBFMTBIT_MSBITS_MAX,
740
735
},
741
736
},
742
737
{
···
750
741
.channels_min = 2,
751
742
.channels_max = 2,
752
743
.rates = SNDRV_PCM_RATE_48000,
753
-
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
744
+
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE,
745
+
.subformats = SNDRV_PCM_SUBFMTBIT_MSBITS_24 |
746
+
SNDRV_PCM_SUBFMTBIT_MSBITS_MAX,
754
747
},
755
748
},
756
749
{
+6
sound/soc/intel/common/soc-acpi-intel-ptl-match.c
+6
sound/soc/intel/common/soc-acpi-intel-ptl-match.c
···
61
61
SND_SOC_ACPI_TPLG_INTEL_SSP_MSB |
62
62
SND_SOC_ACPI_TPLG_INTEL_DMIC_NUMBER,
63
63
},
64
+
/* place amp-only boards in the end of table */
65
+
{
66
+
.id = "INTC10B0",
67
+
.drv_name = "ptl_lt6911_hdmi_ssp",
68
+
.sof_tplg_filename = "sof-ptl-hdmi-ssp02.tplg",
69
+
},
64
70
{},
65
71
};
66
72
EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_ptl_machines);
+1
sound/soc/qcom/qdsp6/audioreach.c
+1
sound/soc/qcom/qdsp6/audioreach.c
···
971
971
param_data->param_id = PARAM_ID_I2S_INTF_CFG;
972
972
param_data->param_size = ic_sz - APM_MODULE_PARAM_DATA_SIZE;
973
973
974
+
intf_cfg->cfg.lpaif_type = module->hw_interface_type;
974
975
intf_cfg->cfg.intf_idx = module->hw_interface_idx;
975
976
intf_cfg->cfg.sd_line_idx = module->sd_line_idx;
976
977
+5
-2
sound/soc/qcom/qdsp6/q6apm-lpass-dais.c
+5
-2
sound/soc/qcom/qdsp6/q6apm-lpass-dais.c
···
213
213
214
214
return 0;
215
215
err:
216
-
q6apm_graph_close(dai_data->graph[dai->id]);
217
-
dai_data->graph[dai->id] = NULL;
216
+
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
217
+
q6apm_graph_close(dai_data->graph[dai->id]);
218
+
dai_data->graph[dai->id] = NULL;
219
+
}
218
220
return rc;
219
221
}
220
222
···
262
260
.shutdown = q6apm_lpass_dai_shutdown,
263
261
.set_channel_map = q6dma_set_channel_map,
264
262
.hw_params = q6dma_hw_params,
263
+
.set_fmt = q6i2s_set_fmt,
265
264
};
266
265
267
266
static const struct snd_soc_dai_ops q6hdmi_ops = {
+5
-1
sound/soc/qcom/sc8280xp.c
+5
-1
sound/soc/qcom/sc8280xp.c
···
32
32
int dp_pcm_id = 0;
33
33
34
34
switch (cpu_dai->id) {
35
+
case PRIMARY_MI2S_RX...QUATERNARY_MI2S_TX:
36
+
case QUINARY_MI2S_RX...QUINARY_MI2S_TX:
37
+
snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_BP_FP);
38
+
break;
35
39
case WSA_CODEC_DMA_RX_0:
36
40
case WSA_CODEC_DMA_RX_1:
37
41
/*
···
190
186
static const struct of_device_id snd_sc8280xp_dt_match[] = {
191
187
{.compatible = "qcom,qcm6490-idp-sndcard", "qcm6490"},
192
188
{.compatible = "qcom,qcs6490-rb3gen2-sndcard", "qcs6490"},
193
-
{.compatible = "qcom,qcs8275-sndcard", "qcs8275"},
189
+
{.compatible = "qcom,qcs8275-sndcard", "qcs8300"},
194
190
{.compatible = "qcom,qcs9075-sndcard", "qcs9075"},
195
191
{.compatible = "qcom,qcs9100-sndcard", "qcs9100"},
196
192
{.compatible = "qcom,sc8280xp-sndcard", "sc8280xp"},
+20
sound/soc/sdca/sdca_device.c
+20
sound/soc/sdca/sdca_device.c
···
7
7
*/
8
8
9
9
#include <linux/acpi.h>
10
+
#include <linux/dmi.h>
10
11
#include <linux/module.h>
11
12
#include <linux/property.h>
12
13
#include <linux/soundwire/sdw.h>
···
56
55
return false;
57
56
}
58
57
58
+
static bool sdca_device_quirk_skip_func_type_patching(struct sdw_slave *slave)
59
+
{
60
+
const char *vendor, *sku;
61
+
62
+
vendor = dmi_get_system_info(DMI_SYS_VENDOR);
63
+
sku = dmi_get_system_info(DMI_PRODUCT_SKU);
64
+
65
+
if (vendor && sku &&
66
+
!strcmp(vendor, "Dell Inc.") &&
67
+
(!strcmp(sku, "0C62") || !strcmp(sku, "0C63") || !strcmp(sku, "0C6B")) &&
68
+
slave->sdca_data.interface_revision == 0x061c &&
69
+
slave->id.mfg_id == 0x01fa && slave->id.part_id == 0x4243)
70
+
return true;
71
+
72
+
return false;
73
+
}
74
+
59
75
bool sdca_device_quirk_match(struct sdw_slave *slave, enum sdca_quirk quirk)
60
76
{
61
77
switch (quirk) {
62
78
case SDCA_QUIRKS_RT712_VB:
63
79
return sdca_device_quirk_rt712_vb(slave);
80
+
case SDCA_QUIRKS_SKIP_FUNC_TYPE_PATCHING:
81
+
return sdca_device_quirk_skip_func_type_patching(slave);
64
82
default:
65
83
break;
66
84
}
+8
-5
sound/soc/sdca/sdca_functions.c
+8
-5
sound/soc/sdca/sdca_functions.c
···
90
90
{
91
91
struct fwnode_handle *function_node = acpi_fwnode_handle(adev);
92
92
struct sdca_device_data *sdca_data = data;
93
+
struct sdw_slave *slave = container_of(sdca_data, struct sdw_slave, sdca_data);
93
94
struct device *dev = &adev->dev;
94
95
struct fwnode_handle *control5; /* used to identify function type */
95
96
const char *function_name;
···
138
137
return ret;
139
138
}
140
139
141
-
ret = patch_sdca_function_type(sdca_data->interface_revision, &function_type);
142
-
if (ret < 0) {
143
-
dev_err(dev, "SDCA version %#x invalid function type %d\n",
144
-
sdca_data->interface_revision, function_type);
145
-
return ret;
140
+
if (!sdca_device_quirk_match(slave, SDCA_QUIRKS_SKIP_FUNC_TYPE_PATCHING)) {
141
+
ret = patch_sdca_function_type(sdca_data->interface_revision, &function_type);
142
+
if (ret < 0) {
143
+
dev_err(dev, "SDCA version %#x invalid function type %d\n",
144
+
sdca_data->interface_revision, function_type);
145
+
return ret;
146
+
}
146
147
}
147
148
148
149
function_name = get_sdca_function_name(function_type);
+1
-1
sound/soc/sdca/sdca_interrupts.c
+1
-1
sound/soc/sdca/sdca_interrupts.c
+1
-1
sound/soc/sdca/sdca_regmap.c
+1
-1
sound/soc/sdca/sdca_regmap.c
+2
-2
sound/soc/sof/imx/imx-common.c
+2
-2
sound/soc/sof/imx/imx-common.c
···
316
316
}
317
317
318
318
sdev->bar[blk_type] = devm_ioremap_resource(sdev->dev, res);
319
-
if (!sdev->bar[blk_type])
319
+
if (IS_ERR(sdev->bar[blk_type]))
320
320
return dev_err_probe(sdev->dev,
321
-
-ENOMEM,
321
+
PTR_ERR(sdev->bar[blk_type]),
322
322
"failed to ioremap %s region\n",
323
323
chip_info->memory[i].name);
324
324
}
+1
-1
sound/soc/sof/intel/hda-stream.c
+1
-1
sound/soc/sof/intel/hda-stream.c
+48
-44
sound/usb/qcom/qc_audio_offload.c
+48
-44
sound/usb/qcom/qc_audio_offload.c
···
538
538
umap_size, iova, mapped_iova_size);
539
539
}
540
540
541
+
static int uaudio_iommu_map_prot(bool dma_coherent)
542
+
{
543
+
int prot = IOMMU_READ | IOMMU_WRITE;
544
+
545
+
if (dma_coherent)
546
+
prot |= IOMMU_CACHE;
547
+
return prot;
548
+
}
549
+
541
550
/**
542
-
* uaudio_iommu_map() - maps iommu memory for adsp
551
+
* uaudio_iommu_map_pa() - maps iommu memory for adsp
543
552
* @mtype: ring type
544
553
* @dma_coherent: dma coherent
545
554
* @pa: physical address for ring/buffer
546
555
* @size: size of memory region
547
-
* @sgt: sg table for memory region
548
556
*
549
557
* Maps the XHCI related resources to a memory region that is assigned to be
550
558
* used by the adsp. This will be mapped to the domain, which is created by
551
559
* the ASoC USB backend driver.
552
560
*
553
561
*/
554
-
static unsigned long uaudio_iommu_map(enum mem_type mtype, bool dma_coherent,
555
-
phys_addr_t pa, size_t size,
556
-
struct sg_table *sgt)
562
+
static unsigned long uaudio_iommu_map_pa(enum mem_type mtype, bool dma_coherent,
563
+
phys_addr_t pa, size_t size)
557
564
{
558
-
struct scatterlist *sg;
559
565
unsigned long iova = 0;
560
-
size_t total_len = 0;
561
-
unsigned long iova_sg;
562
-
phys_addr_t pa_sg;
563
566
bool map = true;
564
-
size_t sg_len;
565
-
int prot;
566
-
int ret;
567
-
int i;
568
-
569
-
prot = IOMMU_READ | IOMMU_WRITE;
570
-
571
-
if (dma_coherent)
572
-
prot |= IOMMU_CACHE;
567
+
int prot = uaudio_iommu_map_prot(dma_coherent);
573
568
574
569
switch (mtype) {
575
570
case MEM_EVENT_RING:
···
578
583
&uaudio_qdev->xfer_ring_iova_size,
579
584
&uaudio_qdev->xfer_ring_list, size);
580
585
break;
581
-
case MEM_XFER_BUF:
582
-
iova = uaudio_get_iova(&uaudio_qdev->curr_xfer_buf_iova,
583
-
&uaudio_qdev->xfer_buf_iova_size,
584
-
&uaudio_qdev->xfer_buf_list, size);
585
-
break;
586
586
default:
587
587
dev_err(uaudio_qdev->data->dev, "unknown mem type %d\n", mtype);
588
588
}
589
589
590
590
if (!iova || !map)
591
-
goto done;
591
+
return 0;
592
592
593
-
if (!sgt)
594
-
goto skip_sgt_map;
593
+
iommu_map(uaudio_qdev->data->domain, iova, pa, size, prot, GFP_KERNEL);
594
+
595
+
return iova;
596
+
}
597
+
598
+
static unsigned long uaudio_iommu_map_xfer_buf(bool dma_coherent, size_t size,
599
+
struct sg_table *sgt)
600
+
{
601
+
struct scatterlist *sg;
602
+
unsigned long iova = 0;
603
+
size_t total_len = 0;
604
+
unsigned long iova_sg;
605
+
phys_addr_t pa_sg;
606
+
size_t sg_len;
607
+
int prot = uaudio_iommu_map_prot(dma_coherent);
608
+
int ret;
609
+
int i;
610
+
611
+
prot = IOMMU_READ | IOMMU_WRITE;
612
+
613
+
if (dma_coherent)
614
+
prot |= IOMMU_CACHE;
615
+
616
+
iova = uaudio_get_iova(&uaudio_qdev->curr_xfer_buf_iova,
617
+
&uaudio_qdev->xfer_buf_iova_size,
618
+
&uaudio_qdev->xfer_buf_list, size);
619
+
if (!iova)
620
+
goto done;
595
621
596
622
iova_sg = iova;
597
623
for_each_sg(sgt->sgl, sg, sgt->nents, i) {
···
634
618
uaudio_iommu_unmap(MEM_XFER_BUF, iova, size, total_len);
635
619
iova = 0;
636
620
}
637
-
return iova;
638
-
639
-
skip_sgt_map:
640
-
iommu_map(uaudio_qdev->data->domain, iova, pa, size, prot, GFP_KERNEL);
641
-
642
621
done:
643
622
return iova;
644
623
}
···
1031
1020
struct sg_table xfer_buf_sgt;
1032
1021
dma_addr_t xfer_buf_dma;
1033
1022
void *xfer_buf;
1034
-
phys_addr_t xfer_buf_pa;
1035
1023
u32 len = xfer_buf_len;
1036
1024
bool dma_coherent;
1037
1025
dma_addr_t xfer_buf_dma_sysdev;
···
1061
1051
if (!xfer_buf)
1062
1052
return -ENOMEM;
1063
1053
1064
-
/* Remapping is not possible if xfer_buf is outside of linear map */
1065
-
xfer_buf_pa = virt_to_phys(xfer_buf);
1066
-
if (WARN_ON(!page_is_ram(PFN_DOWN(xfer_buf_pa)))) {
1067
-
ret = -ENXIO;
1068
-
goto unmap_sync;
1069
-
}
1070
1054
dma_get_sgtable(subs->dev->bus->sysdev, &xfer_buf_sgt, xfer_buf,
1071
1055
xfer_buf_dma, len);
1072
1056
1073
1057
/* map the physical buffer into sysdev as well */
1074
-
xfer_buf_dma_sysdev = uaudio_iommu_map(MEM_XFER_BUF, dma_coherent,
1075
-
xfer_buf_pa, len, &xfer_buf_sgt);
1058
+
xfer_buf_dma_sysdev = uaudio_iommu_map_xfer_buf(dma_coherent,
1059
+
len, &xfer_buf_sgt);
1076
1060
if (!xfer_buf_dma_sysdev) {
1077
1061
ret = -ENOMEM;
1078
1062
goto unmap_sync;
···
1147
1143
sg_free_table(sgt);
1148
1144
1149
1145
/* data transfer ring */
1150
-
iova = uaudio_iommu_map(MEM_XFER_RING, dma_coherent, tr_pa,
1151
-
PAGE_SIZE, NULL);
1146
+
iova = uaudio_iommu_map_pa(MEM_XFER_RING, dma_coherent, tr_pa,
1147
+
PAGE_SIZE);
1152
1148
if (!iova) {
1153
1149
ret = -ENOMEM;
1154
1150
goto clear_pa;
···
1211
1207
mem_info->dma = sg_dma_address(sgt->sgl);
1212
1208
sg_free_table(sgt);
1213
1209
1214
-
iova = uaudio_iommu_map(MEM_EVENT_RING, dma_coherent, er_pa,
1215
-
PAGE_SIZE, NULL);
1210
+
iova = uaudio_iommu_map_pa(MEM_EVENT_RING, dma_coherent, er_pa,
1211
+
PAGE_SIZE);
1216
1212
if (!iova) {
1217
1213
ret = -ENOMEM;
1218
1214
goto clear_pa;
+12
tools/arch/loongarch/include/asm/inst.h
+12
tools/arch/loongarch/include/asm/inst.h
···
51
51
bgeu_op = 0x1b,
52
52
};
53
53
54
+
enum reg3_op {
55
+
amswapw_op = 0x70c0,
56
+
};
57
+
54
58
struct reg0i15_format {
55
59
unsigned int immediate : 15;
56
60
unsigned int opcode : 17;
···
100
96
unsigned int opcode : 6;
101
97
};
102
98
99
+
struct reg3_format {
100
+
unsigned int rd : 5;
101
+
unsigned int rj : 5;
102
+
unsigned int rk : 5;
103
+
unsigned int opcode : 17;
104
+
};
105
+
103
106
union loongarch_instruction {
104
107
unsigned int word;
105
108
struct reg0i15_format reg0i15_format;
···
116
105
struct reg2i12_format reg2i12_format;
117
106
struct reg2i14_format reg2i14_format;
118
107
struct reg2i16_format reg2i16_format;
108
+
struct reg3_format reg3_format;
119
109
};
120
110
121
111
#define LOONGARCH_INSN_SIZE sizeof(union loongarch_instruction)
+30
-3
tools/objtool/arch/loongarch/decode.c
+30
-3
tools/objtool/arch/loongarch/decode.c
···
278
278
return true;
279
279
}
280
280
281
+
static bool decode_insn_reg3_fomat(union loongarch_instruction inst,
282
+
struct instruction *insn)
283
+
{
284
+
switch (inst.reg3_format.opcode) {
285
+
case amswapw_op:
286
+
if (inst.reg3_format.rd == LOONGARCH_GPR_ZERO &&
287
+
inst.reg3_format.rk == LOONGARCH_GPR_RA &&
288
+
inst.reg3_format.rj == LOONGARCH_GPR_ZERO) {
289
+
/* amswap.w $zero, $ra, $zero */
290
+
insn->type = INSN_BUG;
291
+
}
292
+
break;
293
+
default:
294
+
return false;
295
+
}
296
+
297
+
return true;
298
+
}
299
+
281
300
int arch_decode_instruction(struct objtool_file *file, const struct section *sec,
282
301
unsigned long offset, unsigned int maxlen,
283
302
struct instruction *insn)
···
328
309
return 0;
329
310
if (decode_insn_reg2i16_fomat(inst, insn))
330
311
return 0;
312
+
if (decode_insn_reg3_fomat(inst, insn))
313
+
return 0;
331
314
332
-
if (inst.word == 0)
315
+
if (inst.word == 0) {
316
+
/* andi $zero, $zero, 0x0 */
333
317
insn->type = INSN_NOP;
334
-
else if (inst.reg0i15_format.opcode == break_op) {
335
-
/* break */
318
+
} else if (inst.reg0i15_format.opcode == break_op &&
319
+
inst.reg0i15_format.immediate == 0x0) {
320
+
/* break 0x0 */
321
+
insn->type = INSN_TRAP;
322
+
} else if (inst.reg0i15_format.opcode == break_op &&
323
+
inst.reg0i15_format.immediate == 0x1) {
324
+
/* break 0x1 */
336
325
insn->type = INSN_BUG;
337
326
} else if (inst.reg2_format.opcode == ertn_op) {
338
327
/* ertn */
+1
-1
tools/testing/selftests/iommu/iommufd_fail_nth.c
+1
-1
tools/testing/selftests/iommu/iommufd_fail_nth.c
+46
-6
tools/testing/selftests/net/fib_nexthops.sh
+46
-6
tools/testing/selftests/net/fib_nexthops.sh
···
467
467
log_test $? 0 "Get Fdb nexthop group by id"
468
468
469
469
# fdb nexthop group can only contain fdb nexthops
470
-
run_cmd "$IP nexthop add id 63 via 2001:db8:91::4"
471
-
run_cmd "$IP nexthop add id 64 via 2001:db8:91::5"
470
+
run_cmd "$IP nexthop add id 63 via 2001:db8:91::4 dev veth1"
471
+
run_cmd "$IP nexthop add id 64 via 2001:db8:91::5 dev veth1"
472
472
run_cmd "$IP nexthop add id 103 group 63/64 fdb"
473
473
log_test $? 2 "Fdb Nexthop group with non-fdb nexthops"
474
474
···
493
493
# fdb nexthop with encap
494
494
run_cmd "$IP nexthop add id 69 encap mpls 101 via 2001:db8:91::8 dev veth1 fdb"
495
495
log_test $? 2 "Fdb Nexthop with encap"
496
+
497
+
# Replace FDB nexthop to non-FDB and vice versa
498
+
run_cmd "$IP nexthop add id 70 via 2001:db8:91::2 fdb"
499
+
run_cmd "$IP nexthop replace id 70 via 2001:db8:91::2 dev veth1"
500
+
log_test $? 0 "Replace FDB nexthop to non-FDB nexthop"
501
+
run_cmd "$IP nexthop replace id 70 via 2001:db8:91::2 fdb"
502
+
log_test $? 0 "Replace non-FDB nexthop to FDB nexthop"
503
+
504
+
# Replace FDB nexthop address while in a group
505
+
run_cmd "$IP nexthop add id 71 group 70 fdb"
506
+
run_cmd "$IP nexthop replace id 70 via 2001:db8:91::3 fdb"
507
+
log_test $? 0 "Replace FDB nexthop address while in a group"
508
+
509
+
# Cannot replace FDB nexthop to non-FDB and vice versa while in a group
510
+
run_cmd "$IP nexthop replace id 70 via 2001:db8:91::2 dev veth1"
511
+
log_test $? 2 "Replace FDB nexthop to non-FDB nexthop while in a group"
512
+
run_cmd "$IP nexthop add id 72 via 2001:db8:91::2 dev veth1"
513
+
run_cmd "$IP nexthop add id 73 group 72"
514
+
run_cmd "$IP nexthop replace id 72 via 2001:db8:91::2 fdb"
515
+
log_test $? 2 "Replace non-FDB nexthop to FDB nexthop while in a group"
496
516
497
517
run_cmd "$IP link add name vx10 type vxlan id 1010 local 2001:db8:91::9 remote 2001:db8:91::10 dstport 4789 nolearning noudpcsum tos inherit ttl 100"
498
518
run_cmd "$BRIDGE fdb add 02:02:00:00:00:13 dev vx10 nhid 102 self"
···
567
547
log_test $? 0 "Get Fdb nexthop group by id"
568
548
569
549
# fdb nexthop group can only contain fdb nexthops
570
-
run_cmd "$IP nexthop add id 14 via 172.16.1.2"
571
-
run_cmd "$IP nexthop add id 15 via 172.16.1.3"
550
+
run_cmd "$IP nexthop add id 14 via 172.16.1.2 dev veth1"
551
+
run_cmd "$IP nexthop add id 15 via 172.16.1.3 dev veth1"
572
552
run_cmd "$IP nexthop add id 103 group 14/15 fdb"
573
553
log_test $? 2 "Fdb Nexthop group with non-fdb nexthops"
574
554
575
555
# Non fdb nexthop group can not contain fdb nexthops
576
556
run_cmd "$IP nexthop add id 16 via 172.16.1.2 fdb"
577
557
run_cmd "$IP nexthop add id 17 via 172.16.1.3 fdb"
578
-
run_cmd "$IP nexthop add id 104 group 14/15"
558
+
run_cmd "$IP nexthop add id 104 group 16/17"
579
559
log_test $? 2 "Non-Fdb Nexthop group with fdb nexthops"
580
560
581
561
# fdb nexthop cannot have blackhole
···
594
574
run_cmd "$IP nexthop add id 17 encap mpls 101 via 172.16.1.2 dev veth1 fdb"
595
575
log_test $? 2 "Fdb Nexthop with encap"
596
576
577
+
# Replace FDB nexthop to non-FDB and vice versa
578
+
run_cmd "$IP nexthop add id 18 via 172.16.1.2 fdb"
579
+
run_cmd "$IP nexthop replace id 18 via 172.16.1.2 dev veth1"
580
+
log_test $? 0 "Replace FDB nexthop to non-FDB nexthop"
581
+
run_cmd "$IP nexthop replace id 18 via 172.16.1.2 fdb"
582
+
log_test $? 0 "Replace non-FDB nexthop to FDB nexthop"
583
+
584
+
# Replace FDB nexthop address while in a group
585
+
run_cmd "$IP nexthop add id 19 group 18 fdb"
586
+
run_cmd "$IP nexthop replace id 18 via 172.16.1.3 fdb"
587
+
log_test $? 0 "Replace FDB nexthop address while in a group"
588
+
589
+
# Cannot replace FDB nexthop to non-FDB and vice versa while in a group
590
+
run_cmd "$IP nexthop replace id 18 via 172.16.1.2 dev veth1"
591
+
log_test $? 2 "Replace FDB nexthop to non-FDB nexthop while in a group"
592
+
run_cmd "$IP nexthop add id 20 via 172.16.1.2 dev veth1"
593
+
run_cmd "$IP nexthop add id 21 group 20"
594
+
run_cmd "$IP nexthop replace id 20 via 172.16.1.2 fdb"
595
+
log_test $? 2 "Replace non-FDB nexthop to FDB nexthop while in a group"
596
+
597
597
run_cmd "$IP link add name vx10 type vxlan id 1010 local 10.0.0.1 remote 10.0.0.2 dstport 4789 nolearning noudpcsum tos inherit ttl 100"
598
598
run_cmd "$BRIDGE fdb add 02:02:00:00:00:13 dev vx10 nhid 102 self"
599
599
log_test $? 0 "Fdb mac add with nexthop group"
···
622
582
run_cmd "$BRIDGE fdb add 02:02:00:00:00:14 dev vx10 nhid 12 self"
623
583
log_test $? 255 "Fdb mac add with nexthop"
624
584
625
-
run_cmd "$IP ro add 172.16.0.0/22 nhid 15"
585
+
run_cmd "$IP ro add 172.16.0.0/22 nhid 16"
626
586
log_test $? 2 "Route add with fdb nexthop"
627
587
628
588
run_cmd "$IP ro add 172.16.0.0/22 nhid 103"