Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6
* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6:
sis900 warning fixes
mv643xx_eth: Place explicit port number in mv643xx_eth_platform_data
pcnet32: Fix PCnet32 performance bug on non-coherent architecutres
__devinit & __devexit cleanups for de2104x driver
3c59x: Handle pci_enable_device() failure while resuming
dmfe: Fix link detection
dmfe: fix two bugs
dmfe: trivial/spelling fixes
revert "drivers/net/tulip/dmfe: support basic carrier detection"
ucc_geth: returns NETDEV_TX_BUSY when BD ring is full
ucc_geth: Fix BD processing
natsemi: netpoll fixes
bonding: Improve IGMP join processing
bonding: only receive ARPs for us
bonding: fix double dev_add_pack
+302
-170
+7
-1
arch/mips/momentum/jaguar_atx/platform.c
+7
-1
arch/mips/momentum/jaguar_atx/platform.c
···
48
48
};
49
49
50
50
static struct mv643xx_eth_platform_data eth0_pd = {
51
+
.port_number = 0,
52
+
51
53
.tx_sram_addr = MV_SRAM_BASE_ETH0,
52
54
.tx_sram_size = MV_SRAM_TXRING_SIZE,
53
55
.tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
···
79
77
};
80
78
81
79
static struct mv643xx_eth_platform_data eth1_pd = {
80
+
.port_number = 1,
81
+
82
82
.tx_sram_addr = MV_SRAM_BASE_ETH1,
83
83
.tx_sram_size = MV_SRAM_TXRING_SIZE,
84
84
.tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
···
109
105
},
110
106
};
111
107
112
-
static struct mv643xx_eth_platform_data eth2_pd;
108
+
static struct mv643xx_eth_platform_data eth2_pd = {
109
+
.port_number = 2,
110
+
};
113
111
114
112
static struct platform_device eth2_device = {
115
113
.name = MV643XX_ETH_NAME,
+7
-1
arch/mips/momentum/ocelot_3/platform.c
+7
-1
arch/mips/momentum/ocelot_3/platform.c
···
48
48
};
49
49
50
50
static struct mv643xx_eth_platform_data eth0_pd = {
51
+
.port_number = 0,
52
+
51
53
.tx_sram_addr = MV_SRAM_BASE_ETH0,
52
54
.tx_sram_size = MV_SRAM_TXRING_SIZE,
53
55
.tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
···
79
77
};
80
78
81
79
static struct mv643xx_eth_platform_data eth1_pd = {
80
+
.port_number = 1,
81
+
82
82
.tx_sram_addr = MV_SRAM_BASE_ETH1,
83
83
.tx_sram_size = MV_SRAM_TXRING_SIZE,
84
84
.tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
···
109
105
},
110
106
};
111
107
112
-
static struct mv643xx_eth_platform_data eth2_pd;
108
+
static struct mv643xx_eth_platform_data eth2_pd = {
109
+
.port_number = 2,
110
+
};
113
111
114
112
static struct platform_device eth2_device = {
115
113
.name = MV643XX_ETH_NAME,
+4
arch/mips/momentum/ocelot_c/platform.c
+4
arch/mips/momentum/ocelot_c/platform.c
···
47
47
};
48
48
49
49
static struct mv643xx_eth_platform_data eth0_pd = {
50
+
.port_number = 0,
51
+
50
52
.tx_sram_addr = MV_SRAM_BASE_ETH0,
51
53
.tx_sram_size = MV_SRAM_TXRING_SIZE,
52
54
.tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
···
78
76
};
79
77
80
78
static struct mv643xx_eth_platform_data eth1_pd = {
79
+
.port_number = 1,
80
+
81
81
.tx_sram_addr = MV_SRAM_BASE_ETH1,
82
82
.tx_sram_size = MV_SRAM_TXRING_SIZE,
83
83
.tx_queue_size = MV_SRAM_TXRING_SIZE / 16,
+2
arch/powerpc/platforms/chrp/pegasos_eth.c
+2
arch/powerpc/platforms/chrp/pegasos_eth.c
···
58
58
59
59
60
60
static struct mv643xx_eth_platform_data eth0_pd = {
61
+
.port_number = 0,
61
62
.tx_sram_addr = PEGASOS2_SRAM_BASE_ETH0,
62
63
.tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE,
63
64
.tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16,
···
88
87
};
89
88
90
89
static struct mv643xx_eth_platform_data eth1_pd = {
90
+
.port_number = 1,
91
91
.tx_sram_addr = PEGASOS2_SRAM_BASE_ETH1,
92
92
.tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE,
93
93
.tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16,
+9
-3
arch/ppc/syslib/mv64x60.c
+9
-3
arch/ppc/syslib/mv64x60.c
···
339
339
},
340
340
};
341
341
342
-
static struct mv643xx_eth_platform_data eth0_pd;
342
+
static struct mv643xx_eth_platform_data eth0_pd = {
343
+
.port_number = 0,
344
+
};
343
345
344
346
static struct platform_device eth0_device = {
345
347
.name = MV643XX_ETH_NAME,
···
364
362
},
365
363
};
366
364
367
-
static struct mv643xx_eth_platform_data eth1_pd;
365
+
static struct mv643xx_eth_platform_data eth1_pd = {
366
+
.port_number = 1,
367
+
};
368
368
369
369
static struct platform_device eth1_device = {
370
370
.name = MV643XX_ETH_NAME,
···
389
385
},
390
386
};
391
387
392
-
static struct mv643xx_eth_platform_data eth2_pd;
388
+
static struct mv643xx_eth_platform_data eth2_pd = {
389
+
.port_number = 2,
390
+
};
393
391
394
392
static struct platform_device eth2_device = {
395
393
.name = MV643XX_ETH_NAME,
+7
-1
drivers/net/3c59x.c
+7
-1
drivers/net/3c59x.c
···
822
822
{
823
823
struct net_device *dev = pci_get_drvdata(pdev);
824
824
struct vortex_private *vp = netdev_priv(dev);
825
+
int err;
825
826
826
827
if (dev && vp) {
827
828
pci_set_power_state(pdev, PCI_D0);
828
829
pci_restore_state(pdev);
829
-
pci_enable_device(pdev);
830
+
err = pci_enable_device(pdev);
831
+
if (err) {
832
+
printk(KERN_WARNING "%s: Could not enable device \n",
833
+
dev->name);
834
+
return err;
835
+
}
830
836
pci_set_master(pdev);
831
837
if (request_irq(dev->irq, vp->full_bus_master_rx ?
832
838
&boomerang_interrupt : &vortex_interrupt, IRQF_SHARED, dev->name, dev)) {
+33
-53
drivers/net/bonding/bond_main.c
+33
-53
drivers/net/bonding/bond_main.c
···
60
60
#include <linux/errno.h>
61
61
#include <linux/netdevice.h>
62
62
#include <linux/inetdevice.h>
63
+
#include <linux/igmp.h>
63
64
#include <linux/etherdevice.h>
64
65
#include <linux/skbuff.h>
65
66
#include <net/sock.h>
···
862
861
}
863
862
}
864
863
864
+
865
+
/*
866
+
* Retrieve the list of registered multicast addresses for the bonding
867
+
* device and retransmit an IGMP JOIN request to the current active
868
+
* slave.
869
+
*/
870
+
static void bond_resend_igmp_join_requests(struct bonding *bond)
871
+
{
872
+
struct in_device *in_dev;
873
+
struct ip_mc_list *im;
874
+
875
+
rcu_read_lock();
876
+
in_dev = __in_dev_get_rcu(bond->dev);
877
+
if (in_dev) {
878
+
for (im = in_dev->mc_list; im; im = im->next) {
879
+
ip_mc_rejoin_group(im);
880
+
}
881
+
}
882
+
883
+
rcu_read_unlock();
884
+
}
885
+
865
886
/*
866
887
* Totally destroys the mc_list in bond
867
888
*/
···
897
874
kfree(dmi);
898
875
dmi = bond->mc_list;
899
876
}
877
+
bond->mc_list = NULL;
900
878
}
901
879
902
880
/*
···
991
967
for (dmi = bond->dev->mc_list; dmi; dmi = dmi->next) {
992
968
dev_mc_add(new_active->dev, dmi->dmi_addr, dmi->dmi_addrlen, 0);
993
969
}
970
+
bond_resend_igmp_join_requests(bond);
994
971
}
995
972
}
996
973
···
3448
3423
{
3449
3424
struct packet_type *pt = &bond->arp_mon_pt;
3450
3425
3426
+
if (pt->type)
3427
+
return;
3428
+
3451
3429
pt->type = htons(ETH_P_ARP);
3452
-
pt->dev = NULL; /*bond->dev;XXX*/
3430
+
pt->dev = bond->dev;
3453
3431
pt->func = bond_arp_rcv;
3454
3432
dev_add_pack(pt);
3455
3433
}
3456
3434
3457
3435
void bond_unregister_arp(struct bonding *bond)
3458
3436
{
3459
-
dev_remove_pack(&bond->arp_mon_pt);
3437
+
struct packet_type *pt = &bond->arp_mon_pt;
3438
+
3439
+
dev_remove_pack(pt);
3440
+
pt->type = 0;
3460
3441
}
3461
3442
3462
3443
/*---------------------------- Hashing Policies -----------------------------*/
···
4042
4011
return 0;
4043
4012
}
4044
4013
4045
-
static void bond_activebackup_xmit_copy(struct sk_buff *skb,
4046
-
struct bonding *bond,
4047
-
struct slave *slave)
4048
-
{
4049
-
struct sk_buff *skb2 = skb_copy(skb, GFP_ATOMIC);
4050
-
struct ethhdr *eth_data;
4051
-
u8 *hwaddr;
4052
-
int res;
4053
-
4054
-
if (!skb2) {
4055
-
printk(KERN_ERR DRV_NAME ": Error: "
4056
-
"bond_activebackup_xmit_copy(): skb_copy() failed\n");
4057
-
return;
4058
-
}
4059
-
4060
-
skb2->mac.raw = (unsigned char *)skb2->data;
4061
-
eth_data = eth_hdr(skb2);
4062
-
4063
-
/* Pick an appropriate source MAC address
4064
-
* -- use slave's perm MAC addr, unless used by bond
4065
-
* -- otherwise, borrow active slave's perm MAC addr
4066
-
* since that will not be used
4067
-
*/
4068
-
hwaddr = slave->perm_hwaddr;
4069
-
if (!memcmp(eth_data->h_source, hwaddr, ETH_ALEN))
4070
-
hwaddr = bond->curr_active_slave->perm_hwaddr;
4071
-
4072
-
/* Set source MAC address appropriately */
4073
-
memcpy(eth_data->h_source, hwaddr, ETH_ALEN);
4074
-
4075
-
res = bond_dev_queue_xmit(bond, skb2, slave->dev);
4076
-
if (res)
4077
-
dev_kfree_skb(skb2);
4078
-
4079
-
return;
4080
-
}
4081
4014
4082
4015
/*
4083
4016
* in active-backup mode, we know that bond->curr_active_slave is always valid if
···
4061
4066
4062
4067
if (!bond->curr_active_slave)
4063
4068
goto out;
4064
-
4065
-
/* Xmit IGMP frames on all slaves to ensure rapid fail-over
4066
-
for multicast traffic on snooping switches */
4067
-
if (skb->protocol == __constant_htons(ETH_P_IP) &&
4068
-
skb->nh.iph->protocol == IPPROTO_IGMP) {
4069
-
struct slave *slave, *active_slave;
4070
-
int i;
4071
-
4072
-
active_slave = bond->curr_active_slave;
4073
-
bond_for_each_slave_from_to(bond, slave, i, active_slave->next,
4074
-
active_slave->prev)
4075
-
if (IS_UP(slave->dev) &&
4076
-
(slave->link == BOND_LINK_UP))
4077
-
bond_activebackup_xmit_copy(skb, bond, slave);
4078
-
}
4079
4069
4080
4070
res = bond_dev_queue_xmit(bond, skb, bond->curr_active_slave->dev);
4081
4071
+30
-25
drivers/net/mv643xx_eth.c
+30
-25
drivers/net/mv643xx_eth.c
···
1309
1309
static int mv643xx_eth_probe(struct platform_device *pdev)
1310
1310
{
1311
1311
struct mv643xx_eth_platform_data *pd;
1312
-
int port_num = pdev->id;
1312
+
int port_num;
1313
1313
struct mv643xx_private *mp;
1314
1314
struct net_device *dev;
1315
1315
u8 *p;
···
1318
1318
struct ethtool_cmd cmd;
1319
1319
int duplex = DUPLEX_HALF;
1320
1320
int speed = 0; /* default to auto-negotiation */
1321
+
1322
+
pd = pdev->dev.platform_data;
1323
+
if (pd == NULL) {
1324
+
printk(KERN_ERR "No mv643xx_eth_platform_data\n");
1325
+
return -ENODEV;
1326
+
}
1321
1327
1322
1328
dev = alloc_etherdev(sizeof(struct mv643xx_private));
1323
1329
if (!dev)
···
1336
1330
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1337
1331
BUG_ON(!res);
1338
1332
dev->irq = res->start;
1339
-
1340
-
mp->port_num = port_num;
1341
1333
1342
1334
dev->open = mv643xx_eth_open;
1343
1335
dev->stop = mv643xx_eth_stop;
···
1377
1373
1378
1374
spin_lock_init(&mp->lock);
1379
1375
1376
+
port_num = pd->port_number;
1377
+
1380
1378
/* set default config values */
1381
1379
eth_port_uc_addr_get(dev, dev->dev_addr);
1382
1380
mp->rx_ring_size = MV643XX_ETH_PORT_DEFAULT_RECEIVE_QUEUE_SIZE;
1383
1381
mp->tx_ring_size = MV643XX_ETH_PORT_DEFAULT_TRANSMIT_QUEUE_SIZE;
1384
1382
1385
-
pd = pdev->dev.platform_data;
1386
-
if (pd) {
1387
-
if (is_valid_ether_addr(pd->mac_addr))
1388
-
memcpy(dev->dev_addr, pd->mac_addr, 6);
1383
+
if (is_valid_ether_addr(pd->mac_addr))
1384
+
memcpy(dev->dev_addr, pd->mac_addr, 6);
1389
1385
1390
-
if (pd->phy_addr || pd->force_phy_addr)
1391
-
ethernet_phy_set(port_num, pd->phy_addr);
1386
+
if (pd->phy_addr || pd->force_phy_addr)
1387
+
ethernet_phy_set(port_num, pd->phy_addr);
1392
1388
1393
-
if (pd->rx_queue_size)
1394
-
mp->rx_ring_size = pd->rx_queue_size;
1389
+
if (pd->rx_queue_size)
1390
+
mp->rx_ring_size = pd->rx_queue_size;
1395
1391
1396
-
if (pd->tx_queue_size)
1397
-
mp->tx_ring_size = pd->tx_queue_size;
1392
+
if (pd->tx_queue_size)
1393
+
mp->tx_ring_size = pd->tx_queue_size;
1398
1394
1399
-
if (pd->tx_sram_size) {
1400
-
mp->tx_sram_size = pd->tx_sram_size;
1401
-
mp->tx_sram_addr = pd->tx_sram_addr;
1402
-
}
1403
-
1404
-
if (pd->rx_sram_size) {
1405
-
mp->rx_sram_size = pd->rx_sram_size;
1406
-
mp->rx_sram_addr = pd->rx_sram_addr;
1407
-
}
1408
-
1409
-
duplex = pd->duplex;
1410
-
speed = pd->speed;
1395
+
if (pd->tx_sram_size) {
1396
+
mp->tx_sram_size = pd->tx_sram_size;
1397
+
mp->tx_sram_addr = pd->tx_sram_addr;
1411
1398
}
1399
+
1400
+
if (pd->rx_sram_size) {
1401
+
mp->rx_sram_size = pd->rx_sram_size;
1402
+
mp->rx_sram_addr = pd->rx_sram_addr;
1403
+
}
1404
+
1405
+
duplex = pd->duplex;
1406
+
speed = pd->speed;
1407
+
1408
+
mp->port_num = port_num;
1412
1409
1413
1410
/* Hook up MII support for ethtool */
1414
1411
mp->mii.dev = dev;
+19
-5
drivers/net/natsemi.c
+19
-5
drivers/net/natsemi.c
···
2024
2024
struct netdev_private *np = netdev_priv(dev);
2025
2025
void __iomem * ioaddr = ns_ioaddr(dev);
2026
2026
unsigned entry;
2027
+
unsigned long flags;
2027
2028
2028
2029
/* Note: Ordering is important here, set the field with the
2029
2030
"ownership" bit last, and only then increment cur_tx. */
···
2038
2037
2039
2038
np->tx_ring[entry].addr = cpu_to_le32(np->tx_dma[entry]);
2040
2039
2041
-
spin_lock_irq(&np->lock);
2040
+
spin_lock_irqsave(&np->lock, flags);
2042
2041
2043
2042
if (!np->hands_off) {
2044
2043
np->tx_ring[entry].cmd_status = cpu_to_le32(DescOwn | skb->len);
···
2057
2056
dev_kfree_skb_irq(skb);
2058
2057
np->stats.tx_dropped++;
2059
2058
}
2060
-
spin_unlock_irq(&np->lock);
2059
+
spin_unlock_irqrestore(&np->lock, flags);
2061
2060
2062
2061
dev->trans_start = jiffies;
2063
2062
···
2223
2222
pkt_len = (desc_status & DescSizeMask) - 4;
2224
2223
if ((desc_status&(DescMore|DescPktOK|DescRxLong)) != DescPktOK){
2225
2224
if (desc_status & DescMore) {
2225
+
unsigned long flags;
2226
+
2226
2227
if (netif_msg_rx_err(np))
2227
2228
printk(KERN_WARNING
2228
2229
"%s: Oversized(?) Ethernet "
···
2239
2236
* reset procedure documented in
2240
2237
* AN-1287. */
2241
2238
2242
-
spin_lock_irq(&np->lock);
2239
+
spin_lock_irqsave(&np->lock, flags);
2243
2240
reset_rx(dev);
2244
2241
reinit_rx(dev);
2245
2242
writel(np->ring_dma, ioaddr + RxRingPtr);
2246
2243
check_link(dev);
2247
-
spin_unlock_irq(&np->lock);
2244
+
spin_unlock_irqrestore(&np->lock, flags);
2248
2245
2249
2246
/* We'll enable RX on exit from this
2250
2247
* function. */
···
2399
2396
#ifdef CONFIG_NET_POLL_CONTROLLER
2400
2397
static void natsemi_poll_controller(struct net_device *dev)
2401
2398
{
2399
+
struct netdev_private *np = netdev_priv(dev);
2400
+
2402
2401
disable_irq(dev->irq);
2403
-
intr_handler(dev->irq, dev);
2402
+
2403
+
/*
2404
+
* A real interrupt might have already reached us at this point
2405
+
* but NAPI might still haven't called us back. As the interrupt
2406
+
* status register is cleared by reading, we should prevent an
2407
+
* interrupt loss in this case...
2408
+
*/
2409
+
if (!np->intr_status)
2410
+
intr_handler(dev->irq, dev);
2411
+
2404
2412
enable_irq(dev->irq);
2405
2413
}
2406
2414
#endif
+2
-2
drivers/net/pcnet32.c
+2
-2
drivers/net/pcnet32.c
···
1234
1234
skb_put(skb, pkt_len); /* Make room */
1235
1235
pci_dma_sync_single_for_cpu(lp->pci_dev,
1236
1236
lp->rx_dma_addr[entry],
1237
-
PKT_BUF_SZ - 2,
1237
+
pkt_len,
1238
1238
PCI_DMA_FROMDEVICE);
1239
1239
eth_copy_and_sum(skb,
1240
1240
(unsigned char *)(lp->rx_skbuff[entry]->data),
1241
1241
pkt_len, 0);
1242
1242
pci_dma_sync_single_for_device(lp->pci_dev,
1243
1243
lp->rx_dma_addr[entry],
1244
-
PKT_BUF_SZ - 2,
1244
+
pkt_len,
1245
1245
PCI_DMA_FROMDEVICE);
1246
1246
}
1247
1247
lp->stats.rx_bytes += skb->len;
+5
-5
drivers/net/sis900.c
+5
-5
drivers/net/sis900.c
···
968
968
969
969
static u16 sis900_reset_phy(struct net_device *net_dev, int phy_addr)
970
970
{
971
-
int i = 0;
971
+
int i;
972
972
u16 status;
973
973
974
-
while (i++ < 2)
974
+
for (i = 0; i < 2; i++)
975
975
status = mdio_read(net_dev, phy_addr, MII_STATUS);
976
976
977
977
mdio_write( net_dev, phy_addr, MII_CONTROL, MII_CNTL_RESET );
···
1430
1430
int i = 0;
1431
1431
u32 status;
1432
1432
1433
-
while (i++ < 2)
1433
+
for (i = 0; i < 2; i++)
1434
1434
status = mdio_read(net_dev, phy_addr, MII_STATUS);
1435
1435
1436
1436
if (!(status & MII_STAT_LINK)){
···
1466
1466
int phy_addr = sis_priv->cur_phy;
1467
1467
u32 status;
1468
1468
u16 autoadv, autorec;
1469
-
int i = 0;
1469
+
int i;
1470
1470
1471
-
while (i++ < 2)
1471
+
for (i = 0; i < 2; i++)
1472
1472
status = mdio_read(net_dev, phy_addr, MII_STATUS);
1473
1473
1474
1474
if (!(status & MII_STAT_LINK))
+3
-3
drivers/net/tulip/de2104x.c
+3
-3
drivers/net/tulip/de2104x.c
···
1685
1685
.get_regs = de_get_regs,
1686
1686
};
1687
1687
1688
-
static void __init de21040_get_mac_address (struct de_private *de)
1688
+
static void __devinit de21040_get_mac_address (struct de_private *de)
1689
1689
{
1690
1690
unsigned i;
1691
1691
···
1703
1703
}
1704
1704
}
1705
1705
1706
-
static void __init de21040_get_media_info(struct de_private *de)
1706
+
static void __devinit de21040_get_media_info(struct de_private *de)
1707
1707
{
1708
1708
unsigned int i;
1709
1709
···
1765
1765
return retval;
1766
1766
}
1767
1767
1768
-
static void __init de21041_get_srom_info (struct de_private *de)
1768
+
static void __devinit de21041_get_srom_info (struct de_private *de)
1769
1769
{
1770
1770
unsigned i, sa_offset = 0, ofs;
1771
1771
u8 ee_data[DE_EEPROM_SIZE + 6] = {};
+137
-65
drivers/net/tulip/dmfe.c
+137
-65
drivers/net/tulip/dmfe.c
···
143
143
#define DMFE_TX_TIMEOUT ((3*HZ)/2) /* tx packet time-out time 1.5 s" */
144
144
#define DMFE_TX_KICK (HZ/2) /* tx packet Kick-out time 0.5 s" */
145
145
146
-
#define DMFE_DBUG(dbug_now, msg, value) if (dmfe_debug || (dbug_now)) printk(KERN_ERR DRV_NAME ": %s %lx\n", (msg), (long) (value))
146
+
#define DMFE_DBUG(dbug_now, msg, value) \
147
+
do { \
148
+
if (dmfe_debug || (dbug_now)) \
149
+
printk(KERN_ERR DRV_NAME ": %s %lx\n",\
150
+
(msg), (long) (value)); \
151
+
} while (0)
147
152
148
-
#define SHOW_MEDIA_TYPE(mode) printk(KERN_ERR DRV_NAME ": Change Speed to %sMhz %s duplex\n",mode & 1 ?"100":"10", mode & 4 ? "full":"half");
153
+
#define SHOW_MEDIA_TYPE(mode) \
154
+
printk (KERN_INFO DRV_NAME ": Change Speed to %sMhz %s duplex\n" , \
155
+
(mode & 1) ? "100":"10", (mode & 4) ? "full":"half");
149
156
150
157
151
158
/* CR9 definition: SROM/MII */
···
170
163
171
164
#define SROM_V41_CODE 0x14
172
165
173
-
#define SROM_CLK_WRITE(data, ioaddr) outl(data|CR9_SROM_READ|CR9_SRCS,ioaddr);udelay(5);outl(data|CR9_SROM_READ|CR9_SRCS|CR9_SRCLK,ioaddr);udelay(5);outl(data|CR9_SROM_READ|CR9_SRCS,ioaddr);udelay(5);
166
+
#define SROM_CLK_WRITE(data, ioaddr) \
167
+
outl(data|CR9_SROM_READ|CR9_SRCS,ioaddr); \
168
+
udelay(5); \
169
+
outl(data|CR9_SROM_READ|CR9_SRCS|CR9_SRCLK,ioaddr); \
170
+
udelay(5); \
171
+
outl(data|CR9_SROM_READ|CR9_SRCS,ioaddr); \
172
+
udelay(5);
174
173
175
-
#define __CHK_IO_SIZE(pci_id, dev_rev) ( ((pci_id)==PCI_DM9132_ID) || ((dev_rev) >= 0x02000030) ) ? DM9102A_IO_SIZE: DM9102_IO_SIZE
176
-
#define CHK_IO_SIZE(pci_dev, dev_rev) __CHK_IO_SIZE(((pci_dev)->device << 16) | (pci_dev)->vendor, dev_rev)
174
+
#define __CHK_IO_SIZE(pci_id, dev_rev) \
175
+
(( ((pci_id)==PCI_DM9132_ID) || ((dev_rev) >= 0x02000030) ) ? \
176
+
DM9102A_IO_SIZE: DM9102_IO_SIZE)
177
+
178
+
#define CHK_IO_SIZE(pci_dev, dev_rev) \
179
+
(__CHK_IO_SIZE(((pci_dev)->device << 16) | (pci_dev)->vendor, dev_rev))
177
180
178
181
/* Sten Check */
179
182
#define DEVICE net_device
···
204
187
struct dmfe_board_info {
205
188
u32 chip_id; /* Chip vendor/Device ID */
206
189
u32 chip_revision; /* Chip revision */
207
-
struct DEVICE *dev; /* net device */
190
+
struct DEVICE *next_dev; /* next device */
208
191
struct pci_dev *pdev; /* PCI device */
209
192
spinlock_t lock;
210
193
···
248
231
u8 media_mode; /* user specify media mode */
249
232
u8 op_mode; /* real work media mode */
250
233
u8 phy_addr;
251
-
u8 link_failed; /* Ever link failed */
252
234
u8 wait_reset; /* Hardware failed, need to reset */
253
235
u8 dm910x_chk_mode; /* Operating mode check */
254
236
u8 first_in_callback; /* Flag to record state */
···
345
329
static void dmfe_HPNA_remote_cmd_chk(struct dmfe_board_info * );
346
330
static void dmfe_set_phyxcer(struct dmfe_board_info *);
347
331
348
-
/* DM910X network baord routine ---------------------------- */
332
+
/* DM910X network board routine ---------------------------- */
349
333
350
334
/*
351
335
* Search DM910X board ,allocate space and register it
···
372
356
SET_NETDEV_DEV(dev, &pdev->dev);
373
357
374
358
if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
375
-
printk(KERN_WARNING DRV_NAME ": 32-bit PCI DMA not available.\n");
359
+
printk(KERN_WARNING DRV_NAME
360
+
": 32-bit PCI DMA not available.\n");
376
361
err = -ENODEV;
377
362
goto err_out_free;
378
363
}
···
416
399
/* Init system & device */
417
400
db = netdev_priv(dev);
418
401
419
-
db->dev = dev;
420
-
421
402
/* Allocate Tx/Rx descriptor memory */
422
-
db->desc_pool_ptr = pci_alloc_consistent(pdev, sizeof(struct tx_desc) * DESC_ALL_CNT + 0x20, &db->desc_pool_dma_ptr);
423
-
db->buf_pool_ptr = pci_alloc_consistent(pdev, TX_BUF_ALLOC * TX_DESC_CNT + 4, &db->buf_pool_dma_ptr);
403
+
db->desc_pool_ptr = pci_alloc_consistent(pdev, sizeof(struct tx_desc) *
404
+
DESC_ALL_CNT + 0x20, &db->desc_pool_dma_ptr);
405
+
406
+
db->buf_pool_ptr = pci_alloc_consistent(pdev, TX_BUF_ALLOC *
407
+
TX_DESC_CNT + 4, &db->buf_pool_dma_ptr);
424
408
425
409
db->first_tx_desc = (struct tx_desc *) db->desc_pool_ptr;
426
410
db->first_tx_desc_dma = db->desc_pool_dma_ptr;
···
446
428
dev->poll_controller = &poll_dmfe;
447
429
#endif
448
430
dev->ethtool_ops = &netdev_ethtool_ops;
449
-
netif_carrier_off(db->dev);
431
+
netif_carrier_off(dev);
450
432
spin_lock_init(&db->lock);
451
433
452
434
pci_read_config_dword(pdev, 0x50, &pci_pmr);
···
458
440
459
441
/* read 64 word srom data */
460
442
for (i = 0; i < 64; i++)
461
-
((u16 *) db->srom)[i] = cpu_to_le16(read_srom_word(db->ioaddr, i));
443
+
((u16 *) db->srom)[i] =
444
+
cpu_to_le16(read_srom_word(db->ioaddr, i));
462
445
463
446
/* Set Node address */
464
447
for (i = 0; i < 6; i++)
···
501
482
DMFE_DBUG(0, "dmfe_remove_one()", 0);
502
483
503
484
if (dev) {
485
+
486
+
unregister_netdev(dev);
487
+
504
488
pci_free_consistent(db->pdev, sizeof(struct tx_desc) *
505
489
DESC_ALL_CNT + 0x20, db->desc_pool_ptr,
506
490
db->desc_pool_dma_ptr);
507
491
pci_free_consistent(db->pdev, TX_BUF_ALLOC * TX_DESC_CNT + 4,
508
492
db->buf_pool_ptr, db->buf_pool_dma_ptr);
509
-
unregister_netdev(dev);
510
493
pci_release_regions(pdev);
511
494
free_netdev(dev); /* free board information */
495
+
512
496
pci_set_drvdata(pdev, NULL);
513
497
}
514
498
···
531
509
532
510
DMFE_DBUG(0, "dmfe_open", 0);
533
511
534
-
ret = request_irq(dev->irq, &dmfe_interrupt, IRQF_SHARED, dev->name, dev);
512
+
ret = request_irq(dev->irq, &dmfe_interrupt,
513
+
IRQF_SHARED, dev->name, dev);
535
514
if (ret)
536
515
return ret;
537
516
···
541
518
db->tx_packet_cnt = 0;
542
519
db->tx_queue_cnt = 0;
543
520
db->rx_avail_cnt = 0;
544
-
db->link_failed = 1;
545
521
db->wait_reset = 0;
546
522
547
523
db->first_in_callback = 0;
···
672
650
/* No Tx resource check, it never happen nromally */
673
651
if (db->tx_queue_cnt >= TX_FREE_DESC_CNT) {
674
652
spin_unlock_irqrestore(&db->lock, flags);
675
-
printk(KERN_ERR DRV_NAME ": No Tx resource %ld\n", db->tx_queue_cnt);
653
+
printk(KERN_ERR DRV_NAME ": No Tx resource %ld\n",
654
+
db->tx_queue_cnt);
676
655
return 1;
677
656
}
678
657
···
745
722
746
723
#if 0
747
724
/* show statistic counter */
748
-
printk(DRV_NAME ": FU:%lx EC:%lx LC:%lx NC:%lx LOC:%lx TXJT:%lx RESET:%lx RCR8:%lx FAL:%lx TT:%lx\n",
725
+
printk(DRV_NAME ": FU:%lx EC:%lx LC:%lx NC:%lx"
726
+
" LOC:%lx TXJT:%lx RESET:%lx RCR8:%lx FAL:%lx TT:%lx\n",
749
727
db->tx_fifo_underrun, db->tx_excessive_collision,
750
728
db->tx_late_collision, db->tx_no_carrier, db->tx_loss_carrier,
751
729
db->tx_jabber_timeout, db->reset_count, db->reset_cr8,
···
929
905
static void dmfe_rx_packet(struct DEVICE *dev, struct dmfe_board_info * db)
930
906
{
931
907
struct rx_desc *rxptr;
932
-
struct sk_buff *skb;
908
+
struct sk_buff *skb, *newskb;
933
909
int rxlen;
934
910
u32 rdes0;
935
911
···
943
919
db->rx_avail_cnt--;
944
920
db->interval_rx_cnt++;
945
921
946
-
pci_unmap_single(db->pdev, le32_to_cpu(rxptr->rdes2), RX_ALLOC_SIZE, PCI_DMA_FROMDEVICE);
922
+
pci_unmap_single(db->pdev, le32_to_cpu(rxptr->rdes2),
923
+
RX_ALLOC_SIZE, PCI_DMA_FROMDEVICE);
924
+
947
925
if ( (rdes0 & 0x300) != 0x300) {
948
926
/* A packet without First/Last flag */
949
927
/* reuse this SKB */
···
982
956
} else {
983
957
/* Good packet, send to upper layer */
984
958
/* Shorst packet used new SKB */
985
-
if ( (rxlen < RX_COPY_SIZE) &&
986
-
( (skb = dev_alloc_skb(rxlen + 2) )
987
-
!= NULL) ) {
959
+
if ((rxlen < RX_COPY_SIZE) &&
960
+
((newskb = dev_alloc_skb(rxlen + 2))
961
+
!= NULL)) {
962
+
963
+
skb = newskb;
988
964
/* size less than COPY_SIZE, allocate a rxlen SKB */
989
965
skb->dev = dev;
990
966
skb_reserve(skb, 2); /* 16byte align */
···
1097
1069
struct dmfe_board_info *db = netdev_priv(dev);
1098
1070
unsigned long flags;
1099
1071
1072
+
int link_ok, link_ok_phy;
1073
+
1100
1074
DMFE_DBUG(0, "dmfe_timer()", 0);
1101
1075
spin_lock_irqsave(&db->lock, flags);
1102
1076
···
1108
1078
if (db->chip_type && (db->chip_id==PCI_DM9102_ID)) {
1109
1079
db->cr6_data &= ~0x40000;
1110
1080
update_cr6(db->cr6_data, db->ioaddr);
1111
-
phy_write(db->ioaddr, db->phy_addr, 0, 0x1000, db->chip_id);
1081
+
phy_write(db->ioaddr,
1082
+
db->phy_addr, 0, 0x1000, db->chip_id);
1112
1083
db->cr6_data |= 0x40000;
1113
1084
update_cr6(db->cr6_data, db->ioaddr);
1114
1085
db->timer.expires = DMFE_TIMER_WUT + HZ * 2;
···
1170
1139
(db->chip_revision == 0x02000010)) ) {
1171
1140
/* DM9102A Chip */
1172
1141
if (tmp_cr12 & 2)
1173
-
tmp_cr12 = 0x0; /* Link failed */
1142
+
link_ok = 0;
1174
1143
else
1175
-
tmp_cr12 = 0x3; /* Link OK */
1144
+
link_ok = 1;
1176
1145
}
1146
+
else
1147
+
/*0x43 is used instead of 0x3 because bit 6 should represent
1148
+
link status of external PHY */
1149
+
link_ok = (tmp_cr12 & 0x43) ? 1 : 0;
1177
1150
1178
-
if ( !(tmp_cr12 & 0x3) && !db->link_failed ) {
1151
+
1152
+
/* If chip reports that link is failed it could be because external
1153
+
PHY link status pin is not conected correctly to chip
1154
+
To be sure ask PHY too.
1155
+
*/
1156
+
1157
+
/* need a dummy read because of PHY's register latch*/
1158
+
phy_read (db->ioaddr, db->phy_addr, 1, db->chip_id);
1159
+
link_ok_phy = (phy_read (db->ioaddr,
1160
+
db->phy_addr, 1, db->chip_id) & 0x4) ? 1 : 0;
1161
+
1162
+
if (link_ok_phy != link_ok) {
1163
+
DMFE_DBUG (0, "PHY and chip report different link status", 0);
1164
+
link_ok = link_ok | link_ok_phy;
1165
+
}
1166
+
1167
+
if ( !link_ok && netif_carrier_ok(dev)) {
1179
1168
/* Link Failed */
1180
1169
DMFE_DBUG(0, "Link Failed", tmp_cr12);
1181
-
db->link_failed = 1;
1182
-
netif_carrier_off(db->dev);
1170
+
netif_carrier_off(dev);
1183
1171
1184
1172
/* For Force 10/100M Half/Full mode: Enable Auto-Nego mode */
1185
1173
/* AUTO or force 1M Homerun/Longrun don't need */
1186
1174
if ( !(db->media_mode & 0x38) )
1187
-
phy_write(db->ioaddr, db->phy_addr, 0, 0x1000, db->chip_id);
1175
+
phy_write(db->ioaddr, db->phy_addr,
1176
+
0, 0x1000, db->chip_id);
1188
1177
1189
1178
/* AUTO mode, if INT phyxcer link failed, select EXT device */
1190
1179
if (db->media_mode & DMFE_AUTO) {
···
1213
1162
db->cr6_data&=~0x00000200; /* bit9=0, HD mode */
1214
1163
update_cr6(db->cr6_data, db->ioaddr);
1215
1164
}
1216
-
} else
1217
-
if ((tmp_cr12 & 0x3) && db->link_failed) {
1218
-
DMFE_DBUG(0, "Link link OK", tmp_cr12);
1219
-
db->link_failed = 0;
1165
+
} else if (!netif_carrier_ok(dev)) {
1220
1166
1221
-
/* Auto Sense Speed */
1222
-
if ( (db->media_mode & DMFE_AUTO) &&
1223
-
dmfe_sense_speed(db) )
1224
-
db->link_failed = 1;
1225
-
else
1226
-
netif_carrier_on(db->dev);
1227
-
dmfe_process_mode(db);
1228
-
/* SHOW_MEDIA_TYPE(db->op_mode); */
1167
+
DMFE_DBUG(0, "Link link OK", tmp_cr12);
1168
+
1169
+
/* Auto Sense Speed */
1170
+
if ( !(db->media_mode & DMFE_AUTO) || !dmfe_sense_speed(db)) {
1171
+
netif_carrier_on(dev);
1172
+
SHOW_MEDIA_TYPE(db->op_mode);
1229
1173
}
1174
+
1175
+
dmfe_process_mode(db);
1176
+
}
1230
1177
1231
1178
/* HPNA remote command check */
1232
1179
if (db->HPNA_command & 0xf00) {
···
1270
1221
db->tx_packet_cnt = 0;
1271
1222
db->tx_queue_cnt = 0;
1272
1223
db->rx_avail_cnt = 0;
1273
-
db->link_failed = 1;
1224
+
netif_carrier_off(dev);
1274
1225
db->wait_reset = 0;
1275
1226
1276
1227
/* Re-initilize DM910X board */
···
1308
1259
1309
1260
if (!(rxptr->rdes0 & cpu_to_le32(0x80000000))) {
1310
1261
rxptr->rx_skb_ptr = skb;
1311
-
rxptr->rdes2 = cpu_to_le32( pci_map_single(db->pdev, skb->data, RX_ALLOC_SIZE, PCI_DMA_FROMDEVICE) );
1262
+
rxptr->rdes2 = cpu_to_le32( pci_map_single(db->pdev,
1263
+
skb->data, RX_ALLOC_SIZE, PCI_DMA_FROMDEVICE) );
1312
1264
wmb();
1313
1265
rxptr->rdes0 = cpu_to_le32(0x80000000);
1314
1266
db->rx_avail_cnt++;
···
1341
1291
outl(db->first_tx_desc_dma, ioaddr + DCR4); /* TX DESC address */
1342
1292
1343
1293
/* rx descriptor start pointer */
1344
-
db->first_rx_desc = (void *)db->first_tx_desc + sizeof(struct tx_desc) * TX_DESC_CNT;
1345
-
db->first_rx_desc_dma = db->first_tx_desc_dma + sizeof(struct tx_desc) * TX_DESC_CNT;
1294
+
db->first_rx_desc = (void *)db->first_tx_desc +
1295
+
sizeof(struct tx_desc) * TX_DESC_CNT;
1296
+
1297
+
db->first_rx_desc_dma = db->first_tx_desc_dma +
1298
+
sizeof(struct tx_desc) * TX_DESC_CNT;
1346
1299
db->rx_insert_ptr = db->first_rx_desc;
1347
1300
db->rx_ready_ptr = db->first_rx_desc;
1348
1301
outl(db->first_rx_desc_dma, ioaddr + DCR3); /* RX DESC address */
···
1523
1470
if ( ( skb = dev_alloc_skb(RX_ALLOC_SIZE) ) == NULL )
1524
1471
break;
1525
1472
rxptr->rx_skb_ptr = skb; /* FIXME (?) */
1526
-
rxptr->rdes2 = cpu_to_le32( pci_map_single(db->pdev, skb->data, RX_ALLOC_SIZE, PCI_DMA_FROMDEVICE) );
1473
+
rxptr->rdes2 = cpu_to_le32( pci_map_single(db->pdev, skb->data,
1474
+
RX_ALLOC_SIZE, PCI_DMA_FROMDEVICE) );
1527
1475
wmb();
1528
1476
rxptr->rdes0 = cpu_to_le32(0x80000000);
1529
1477
rxptr = rxptr->next_rx_desc;
···
1564
1510
for (i = 16; i > 0; i--) {
1565
1511
outl(CR9_SROM_READ | CR9_SRCS | CR9_SRCLK, cr9_ioaddr);
1566
1512
udelay(5);
1567
-
srom_data = (srom_data << 1) | ((inl(cr9_ioaddr) & CR9_CRDOUT) ? 1 : 0);
1513
+
srom_data = (srom_data << 1) |
1514
+
((inl(cr9_ioaddr) & CR9_CRDOUT) ? 1 : 0);
1568
1515
outl(CR9_SROM_READ | CR9_SRCS, cr9_ioaddr);
1569
1516
udelay(5);
1570
1517
}
···
1592
1537
1593
1538
if ( (phy_mode & 0x24) == 0x24 ) {
1594
1539
if (db->chip_id == PCI_DM9132_ID) /* DM9132 */
1595
-
phy_mode = phy_read(db->ioaddr, db->phy_addr, 7, db->chip_id) & 0xf000;
1540
+
phy_mode = phy_read(db->ioaddr,
1541
+
db->phy_addr, 7, db->chip_id) & 0xf000;
1596
1542
else /* DM9102/DM9102A */
1597
-
phy_mode = phy_read(db->ioaddr, db->phy_addr, 17, db->chip_id) & 0xf000;
1543
+
phy_mode = phy_read(db->ioaddr,
1544
+
db->phy_addr, 17, db->chip_id) & 0xf000;
1598
1545
/* printk(DRV_NAME ": Phy_mode %x ",phy_mode); */
1599
1546
switch (phy_mode) {
1600
1547
case 0x1000: db->op_mode = DMFE_10MHF; break;
···
1633
1576
1634
1577
/* DM9009 Chip: Phyxcer reg18 bit12=0 */
1635
1578
if (db->chip_id == PCI_DM9009_ID) {
1636
-
phy_reg = phy_read(db->ioaddr, db->phy_addr, 18, db->chip_id) & ~0x1000;
1637
-
phy_write(db->ioaddr, db->phy_addr, 18, phy_reg, db->chip_id);
1579
+
phy_reg = phy_read(db->ioaddr,
1580
+
db->phy_addr, 18, db->chip_id) & ~0x1000;
1581
+
1582
+
phy_write(db->ioaddr,
1583
+
db->phy_addr, 18, phy_reg, db->chip_id);
1638
1584
}
1639
1585
1640
1586
/* Phyxcer capability setting */
···
1710
1650
case DMFE_100MHF: phy_reg = 0x2000; break;
1711
1651
case DMFE_100MFD: phy_reg = 0x2100; break;
1712
1652
}
1713
-
phy_write(db->ioaddr, db->phy_addr, 0, phy_reg, db->chip_id);
1653
+
phy_write(db->ioaddr,
1654
+
db->phy_addr, 0, phy_reg, db->chip_id);
1714
1655
if ( db->chip_type && (db->chip_id == PCI_DM9102_ID) )
1715
1656
mdelay(20);
1716
-
phy_write(db->ioaddr, db->phy_addr, 0, phy_reg, db->chip_id);
1657
+
phy_write(db->ioaddr,
1658
+
db->phy_addr, 0, phy_reg, db->chip_id);
1717
1659
}
1718
1660
}
1719
1661
}
···
1725
1663
* Write a word to Phy register
1726
1664
*/
1727
1665
1728
-
static void phy_write(unsigned long iobase, u8 phy_addr, u8 offset, u16 phy_data, u32 chip_id)
1666
+
static void phy_write(unsigned long iobase, u8 phy_addr, u8 offset,
1667
+
u16 phy_data, u32 chip_id)
1729
1668
{
1730
1669
u16 i;
1731
1670
unsigned long ioaddr;
···
1752
1689
1753
1690
/* Send Phy address */
1754
1691
for (i = 0x10; i > 0; i = i >> 1)
1755
-
phy_write_1bit(ioaddr, phy_addr & i ? PHY_DATA_1 : PHY_DATA_0);
1692
+
phy_write_1bit(ioaddr,
1693
+
phy_addr & i ? PHY_DATA_1 : PHY_DATA_0);
1756
1694
1757
1695
/* Send register address */
1758
1696
for (i = 0x10; i > 0; i = i >> 1)
1759
-
phy_write_1bit(ioaddr, offset & i ? PHY_DATA_1 : PHY_DATA_0);
1697
+
phy_write_1bit(ioaddr,
1698
+
offset & i ? PHY_DATA_1 : PHY_DATA_0);
1760
1699
1761
1700
/* written trasnition */
1762
1701
phy_write_1bit(ioaddr, PHY_DATA_1);
···
1766
1701
1767
1702
/* Write a word data to PHY controller */
1768
1703
for ( i = 0x8000; i > 0; i >>= 1)
1769
-
phy_write_1bit(ioaddr, phy_data & i ? PHY_DATA_1 : PHY_DATA_0);
1704
+
phy_write_1bit(ioaddr,
1705
+
phy_data & i ? PHY_DATA_1 : PHY_DATA_0);
1770
1706
}
1771
1707
}
1772
1708
···
1804
1738
1805
1739
/* Send Phy address */
1806
1740
for (i = 0x10; i > 0; i = i >> 1)
1807
-
phy_write_1bit(ioaddr, phy_addr & i ? PHY_DATA_1 : PHY_DATA_0);
1741
+
phy_write_1bit(ioaddr,
1742
+
phy_addr & i ? PHY_DATA_1 : PHY_DATA_0);
1808
1743
1809
1744
/* Send register address */
1810
1745
for (i = 0x10; i > 0; i = i >> 1)
1811
-
phy_write_1bit(ioaddr, offset & i ? PHY_DATA_1 : PHY_DATA_0);
1746
+
phy_write_1bit(ioaddr,
1747
+
offset & i ? PHY_DATA_1 : PHY_DATA_0);
1812
1748
1813
1749
/* Skip transition state */
1814
1750
phy_read_1bit(ioaddr);
···
2031
1963
2032
1964
/* Check remote device status match our setting ot not */
2033
1965
if ( phy_reg != (db->HPNA_command & 0x0f00) ) {
2034
-
phy_write(db->ioaddr, db->phy_addr, 16, db->HPNA_command, db->chip_id);
1966
+
phy_write(db->ioaddr, db->phy_addr, 16, db->HPNA_command,
1967
+
db->chip_id);
2035
1968
db->HPNA_timer=8;
2036
1969
} else
2037
1970
db->HPNA_timer=600; /* Match, every 10 minutes, check */
···
2072
2003
module_param(HPNA_NoiseFloor, byte, 0);
2073
2004
module_param(SF_mode, byte, 0);
2074
2005
MODULE_PARM_DESC(debug, "Davicom DM9xxx enable debugging (0-1)");
2075
-
MODULE_PARM_DESC(mode, "Davicom DM9xxx: Bit 0: 10/100Mbps, bit 2: duplex, bit 8: HomePNA");
2076
-
MODULE_PARM_DESC(SF_mode, "Davicom DM9xxx special function (bit 0: VLAN, bit 1 Flow Control, bit 2: TX pause packet)");
2006
+
MODULE_PARM_DESC(mode, "Davicom DM9xxx: "
2007
+
"Bit 0: 10/100Mbps, bit 2: duplex, bit 8: HomePNA");
2008
+
2009
+
MODULE_PARM_DESC(SF_mode, "Davicom DM9xxx special function "
2010
+
"(bit 0: VLAN, bit 1 Flow Control, bit 2: TX pause packet)");
2077
2011
2078
2012
/* Description:
2079
2013
* when user used insmod to add module, system invoked init_module()
+11
-6
drivers/net/ucc_geth.c
+11
-6
drivers/net/ucc_geth.c
···
3598
3598
3599
3599
/* Move to next BD in the ring */
3600
3600
if (!(bd_status & T_W))
3601
-
ugeth->txBd[txQ] = bd + sizeof(struct qe_bd);
3601
+
bd += sizeof(struct qe_bd);
3602
3602
else
3603
-
ugeth->txBd[txQ] = ugeth->p_tx_bd_ring[txQ];
3603
+
bd = ugeth->p_tx_bd_ring[txQ];
3604
3604
3605
3605
/* If the next BD still needs to be cleaned up, then the bds
3606
3606
are full. We need to tell the kernel to stop sending us stuff. */
3607
3607
if (bd == ugeth->confBd[txQ]) {
3608
3608
if (!netif_queue_stopped(dev))
3609
3609
netif_stop_queue(dev);
3610
+
return NETDEV_TX_BUSY;
3610
3611
}
3612
+
3613
+
ugeth->txBd[txQ] = bd;
3611
3614
3612
3615
if (ugeth->p_scheduler) {
3613
3616
ugeth->cpucount[txQ]++;
···
3623
3620
3624
3621
spin_unlock_irq(&ugeth->lock);
3625
3622
3626
-
return 0;
3623
+
return NETDEV_TX_OK;
3627
3624
}
3628
3625
3629
3626
static int ucc_geth_rx(struct ucc_geth_private *ugeth, u8 rxQ, int rx_work_limit)
···
3725
3722
/* Handle the transmitted buffer and release */
3726
3723
/* the BD to be used with the current frame */
3727
3724
3728
-
if ((bd = ugeth->txBd[txQ]) && (netif_queue_stopped(dev) == 0))
3725
+
if ((bd == ugeth->txBd[txQ]) && (netif_queue_stopped(dev) == 0))
3729
3726
break;
3730
3727
3731
3728
ugeth->stats.tx_packets++;
···
3744
3741
3745
3742
/* Advance the confirmation BD pointer */
3746
3743
if (!(bd_status & T_W))
3747
-
ugeth->confBd[txQ] += sizeof(struct qe_bd);
3744
+
bd += sizeof(struct qe_bd);
3748
3745
else
3749
-
ugeth->confBd[txQ] = ugeth->p_tx_bd_ring[txQ];
3746
+
bd = ugeth->p_tx_bd_ring[txQ];
3747
+
bd_status = in_be32((u32 *)bd);
3750
3748
}
3749
+
ugeth->confBd[txQ] = bd;
3751
3750
return 0;
3752
3751
}
3753
3752
+2
include/linux/igmp.h
+2
include/linux/igmp.h
···
218
218
extern void ip_mc_down(struct in_device *);
219
219
extern void ip_mc_dec_group(struct in_device *in_dev, __be32 addr);
220
220
extern void ip_mc_inc_group(struct in_device *in_dev, __be32 addr);
221
+
extern void ip_mc_rejoin_group(struct ip_mc_list *im);
222
+
221
223
#endif
222
224
#endif
+1
include/linux/mv643xx.h
+1
include/linux/mv643xx.h
+23
net/ipv4/igmp.c
+23
net/ipv4/igmp.c
···
1251
1251
}
1252
1252
1253
1253
/*
1254
+
* Resend IGMP JOIN report; used for bonding.
1255
+
*/
1256
+
void ip_mc_rejoin_group(struct ip_mc_list *im)
1257
+
{
1258
+
struct in_device *in_dev = im->interface;
1259
+
1260
+
#ifdef CONFIG_IP_MULTICAST
1261
+
if (im->multiaddr == IGMP_ALL_HOSTS)
1262
+
return;
1263
+
1264
+
if (IGMP_V1_SEEN(in_dev) || IGMP_V2_SEEN(in_dev)) {
1265
+
igmp_mod_timer(im, IGMP_Initial_Report_Delay);
1266
+
return;
1267
+
}
1268
+
/* else, v3 */
1269
+
im->crcount = in_dev->mr_qrv ? in_dev->mr_qrv :
1270
+
IGMP_Unsolicited_Report_Count;
1271
+
igmp_ifc_event(in_dev);
1272
+
#endif
1273
+
}
1274
+
1275
+
/*
1254
1276
* A socket has left a multicast group on device dev
1255
1277
*/
1256
1278
···
2618
2596
EXPORT_SYMBOL(ip_mc_dec_group);
2619
2597
EXPORT_SYMBOL(ip_mc_inc_group);
2620
2598
EXPORT_SYMBOL(ip_mc_join_group);
2599
+
EXPORT_SYMBOL(ip_mc_rejoin_group);