Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'powerpc-6.5-3' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc fixes from Michael Ellerman:
- Fix Speculation_Store_Bypass reporting in /proc/self/status on
Power10
- Fix HPT with 4K pages since recent changes by implementing pmd_same()
- Fix 64-bit native_hpte_remove() to be irq-safe
Thanks to Aneesh Kumar K.V, Nageswara R Sastry, and Russell Currey.
* tag 'powerpc-6.5-3' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
powerpc/mm/book3s64/hash/4k: Add pmd_same callback for 4K page size
powerpc/64e: Fix obtool warnings in exceptions-64e.S
powerpc/security: Fix Speculation_Store_Bypass reporting on Power10
powerpc/64s: Fix native_hpte_remove() to be irq-safe
+51
-46
-6
arch/powerpc/include/asm/book3s/64/hash-4k.h
-6
arch/powerpc/include/asm/book3s/64/hash-4k.h
-5
arch/powerpc/include/asm/book3s/64/hash-64k.h
-5
arch/powerpc/include/asm/book3s/64/hash-64k.h
···
263
263
(_PAGE_PTE | H_PAGE_THP_HUGE));
264
264
}
265
265
266
-
static inline int hash__pmd_same(pmd_t pmd_a, pmd_t pmd_b)
267
-
{
268
-
return (((pmd_raw(pmd_a) ^ pmd_raw(pmd_b)) & ~cpu_to_be64(_PAGE_HPTEFLAGS)) == 0);
269
-
}
270
-
271
266
static inline pmd_t hash__pmd_mkhuge(pmd_t pmd)
272
267
{
273
268
return __pmd(pmd_val(pmd) | (_PAGE_PTE | H_PAGE_THP_HUGE));
+5
arch/powerpc/include/asm/book3s/64/hash.h
+5
arch/powerpc/include/asm/book3s/64/hash.h
···
132
132
return region_id;
133
133
}
134
134
135
+
static inline int hash__pmd_same(pmd_t pmd_a, pmd_t pmd_b)
136
+
{
137
+
return (((pmd_raw(pmd_a) ^ pmd_raw(pmd_b)) & ~cpu_to_be64(_PAGE_HPTEFLAGS)) == 0);
138
+
}
139
+
135
140
#define hash__pmd_bad(pmd) (pmd_val(pmd) & H_PMD_BAD_BITS)
136
141
#define hash__pud_bad(pud) (pud_val(pud) & H_PUD_BAD_BITS)
137
142
static inline int hash__p4d_bad(p4d_t p4d)
+18
-13
arch/powerpc/kernel/exceptions-64e.S
+18
-13
arch/powerpc/kernel/exceptions-64e.S
···
5
5
* Copyright (C) 2007 Ben. Herrenschmidt (benh@kernel.crashing.org), IBM Corp.
6
6
*/
7
7
8
+
#include <linux/linkage.h>
8
9
#include <linux/threads.h>
9
10
#include <asm/reg.h>
10
11
#include <asm/page.h>
···
67
66
#define SPECIAL_EXC_LOAD(reg, name) \
68
67
ld reg, (SPECIAL_EXC_##name * 8 + SPECIAL_EXC_FRAME_OFFS)(r1)
69
68
70
-
special_reg_save:
69
+
SYM_CODE_START_LOCAL(special_reg_save)
71
70
/*
72
71
* We only need (or have stack space) to save this stuff if
73
72
* we interrupted the kernel.
···
132
131
SPECIAL_EXC_STORE(r10,CSRR1)
133
132
134
133
blr
134
+
SYM_CODE_END(special_reg_save)
135
135
136
-
ret_from_level_except:
136
+
SYM_CODE_START_LOCAL(ret_from_level_except)
137
137
ld r3,_MSR(r1)
138
138
andi. r3,r3,MSR_PR
139
139
beq 1f
···
208
206
mtxer r11
209
207
210
208
blr
209
+
SYM_CODE_END(ret_from_level_except)
211
210
212
211
.macro ret_from_level srr0 srr1 paca_ex scratch
213
212
bl ret_from_level_except
···
235
232
mfspr r13,\scratch
236
233
.endm
237
234
238
-
ret_from_crit_except:
235
+
SYM_CODE_START_LOCAL(ret_from_crit_except)
239
236
ret_from_level SPRN_CSRR0 SPRN_CSRR1 PACA_EXCRIT SPRN_SPRG_CRIT_SCRATCH
240
237
rfci
238
+
SYM_CODE_END(ret_from_crit_except)
241
239
242
-
ret_from_mc_except:
240
+
SYM_CODE_START_LOCAL(ret_from_mc_except)
243
241
ret_from_level SPRN_MCSRR0 SPRN_MCSRR1 PACA_EXMC SPRN_SPRG_MC_SCRATCH
244
242
rfmci
243
+
SYM_CODE_END(ret_from_mc_except)
245
244
246
245
/* Exception prolog code for all exceptions */
247
246
#define EXCEPTION_PROLOG(n, intnum, type, addition) \
···
983
978
* r14 and r15 containing the fault address and error code, with the
984
979
* original values stashed away in the PACA
985
980
*/
986
-
storage_fault_common:
981
+
SYM_CODE_START_LOCAL(storage_fault_common)
987
982
addi r3,r1,STACK_INT_FRAME_REGS
988
983
bl do_page_fault
989
984
b interrupt_return
985
+
SYM_CODE_END(storage_fault_common)
990
986
991
987
/*
992
988
* Alignment exception doesn't fit entirely in the 0x100 bytes so it
993
989
* continues here.
994
990
*/
995
-
alignment_more:
991
+
SYM_CODE_START_LOCAL(alignment_more)
996
992
addi r3,r1,STACK_INT_FRAME_REGS
997
993
bl alignment_exception
998
994
REST_NVGPRS(r1)
999
995
b interrupt_return
996
+
SYM_CODE_END(alignment_more)
1000
997
1001
998
/*
1002
999
* Trampolines used when spotting a bad kernel stack pointer in
···
1037
1030
BAD_STACK_TRAMPOLINE(0xf00)
1038
1031
BAD_STACK_TRAMPOLINE(0xf20)
1039
1032
1040
-
.globl bad_stack_book3e
1041
-
bad_stack_book3e:
1033
+
_GLOBAL(bad_stack_book3e)
1042
1034
/* XXX: Needs to make SPRN_SPRG_GEN depend on exception type */
1043
1035
mfspr r10,SPRN_SRR0; /* read SRR0 before touching stack */
1044
1036
ld r1,PACAEMERGSP(r13)
···
1291
1285
* ever takes any parameters, the SCOM code must also be updated to
1292
1286
* provide them.
1293
1287
*/
1294
-
.globl a2_tlbinit_code_start
1295
-
a2_tlbinit_code_start:
1288
+
_GLOBAL(a2_tlbinit_code_start)
1296
1289
1297
1290
ori r11,r3,MAS0_WQ_ALLWAYS
1298
1291
oris r11,r11,MAS0_ESEL(3)@h /* Use way 3: workaround A2 erratum 376 */
···
1484
1479
mflr r28
1485
1480
b 3b
1486
1481
1487
-
.globl init_core_book3e
1488
-
init_core_book3e:
1482
+
_GLOBAL(init_core_book3e)
1489
1483
/* Establish the interrupt vector base */
1490
1484
tovirt(r2,r2)
1491
1485
LOAD_REG_ADDR(r3, interrupt_base_book3e)
···
1492
1488
sync
1493
1489
blr
1494
1490
1495
-
init_thread_book3e:
1491
+
SYM_CODE_START_LOCAL(init_thread_book3e)
1496
1492
lis r3,(SPRN_EPCR_ICM | SPRN_EPCR_GICM)@h
1497
1493
mtspr SPRN_EPCR,r3
1498
1494
···
1506
1502
mtspr SPRN_TSR,r3
1507
1503
1508
1504
blr
1505
+
SYM_CODE_END(init_thread_book3e)
1509
1506
1510
1507
_GLOBAL(__setup_base_ivors)
1511
1508
SET_IVOR(0, 0x020) /* Critical Input */
+19
-18
arch/powerpc/kernel/security.c
+19
-18
arch/powerpc/kernel/security.c
···
364
364
365
365
static int ssb_prctl_get(struct task_struct *task)
366
366
{
367
-
if (stf_enabled_flush_types == STF_BARRIER_NONE)
368
-
/*
369
-
* We don't have an explicit signal from firmware that we're
370
-
* vulnerable or not, we only have certain CPU revisions that
371
-
* are known to be vulnerable.
372
-
*
373
-
* We assume that if we're on another CPU, where the barrier is
374
-
* NONE, then we are not vulnerable.
375
-
*/
367
+
/*
368
+
* The STF_BARRIER feature is on by default, so if it's off that means
369
+
* firmware has explicitly said the CPU is not vulnerable via either
370
+
* the hypercall or device tree.
371
+
*/
372
+
if (!security_ftr_enabled(SEC_FTR_STF_BARRIER))
376
373
return PR_SPEC_NOT_AFFECTED;
377
-
else
378
-
/*
379
-
* If we do have a barrier type then we are vulnerable. The
380
-
* barrier is not a global or per-process mitigation, so the
381
-
* only value we can report here is PR_SPEC_ENABLE, which
382
-
* appears as "vulnerable" in /proc.
383
-
*/
384
-
return PR_SPEC_ENABLE;
385
374
386
-
return -EINVAL;
375
+
/*
376
+
* If the system's CPU has no known barrier (see setup_stf_barrier())
377
+
* then assume that the CPU is not vulnerable.
378
+
*/
379
+
if (stf_enabled_flush_types == STF_BARRIER_NONE)
380
+
return PR_SPEC_NOT_AFFECTED;
381
+
382
+
/*
383
+
* Otherwise the CPU is vulnerable. The barrier is not a global or
384
+
* per-process mitigation, so the only value that can be reported here
385
+
* is PR_SPEC_ENABLE, which appears as "vulnerable" in /proc.
386
+
*/
387
+
return PR_SPEC_ENABLE;
387
388
}
388
389
389
390
int arch_prctl_spec_ctrl_get(struct task_struct *task, unsigned long which)
+9
-4
arch/powerpc/mm/book3s64/hash_native.c
+9
-4
arch/powerpc/mm/book3s64/hash_native.c
···
328
328
329
329
static long native_hpte_remove(unsigned long hpte_group)
330
330
{
331
+
unsigned long hpte_v, flags;
331
332
struct hash_pte *hptep;
332
333
int i;
333
334
int slot_offset;
334
-
unsigned long hpte_v;
335
+
336
+
local_irq_save(flags);
335
337
336
338
DBG_LOW(" remove(group=%lx)\n", hpte_group);
337
339
···
358
356
slot_offset &= 0x7;
359
357
}
360
358
361
-
if (i == HPTES_PER_GROUP)
362
-
return -1;
359
+
if (i == HPTES_PER_GROUP) {
360
+
i = -1;
361
+
goto out;
362
+
}
363
363
364
364
/* Invalidate the hpte. NOTE: this also unlocks it */
365
365
release_hpte_lock();
366
366
hptep->v = 0;
367
-
367
+
out:
368
+
local_irq_restore(flags);
368
369
return i;
369
370
}
370
371