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dt-bindings: reset: renesas,rzg2l-usbphy-ctrl: Document RZ/G3S support

The Renesas USB PHY hardware block needs to have the PWRRDY bit in the
system controller set before applying any other settings. The PWRRDY bit
must be controlled during power-on, power-off, and system suspend/resume
sequences as follows:
- during power-on/resume, it must be set to zero before enabling clocks and
modules
- during power-off/suspend, it must be set to one after disabling clocks
and modules

Add the renesas,sysc-pwrrdy device tree property, which allows the
reset-rzg2l-usbphy-ctrl driver to parse, map, and control the system
controller PWRRDY bit at the appropriate time. Along with it add a new
compatible for the RZ/G3S SoC.

Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>

authored by

Claudiu Beznea and committed by
Philipp Zabel 20eee0f6 0884bd97

+35 -6
+35 -6
Documentation/devicetree/bindings/reset/renesas,rzg2l-usbphy-ctrl.yaml
··· 15 15 16 16 properties: 17 17 compatible: 18 - items: 19 - - enum: 20 - - renesas,r9a07g043-usbphy-ctrl # RZ/G2UL and RZ/Five 21 - - renesas,r9a07g044-usbphy-ctrl # RZ/G2{L,LC} 22 - - renesas,r9a07g054-usbphy-ctrl # RZ/V2L 23 - - const: renesas,rzg2l-usbphy-ctrl 18 + oneOf: 19 + - items: 20 + - enum: 21 + - renesas,r9a07g043-usbphy-ctrl # RZ/G2UL and RZ/Five 22 + - renesas,r9a07g044-usbphy-ctrl # RZ/G2{L,LC} 23 + - renesas,r9a07g054-usbphy-ctrl # RZ/V2L 24 + - const: renesas,rzg2l-usbphy-ctrl 25 + - const: renesas,r9a08g045-usbphy-ctrl # RZ/G3S 24 26 25 27 reg: 26 28 maxItems: 1 ··· 50 48 $ref: /schemas/regulator/regulator.yaml# 51 49 unevaluatedProperties: false 52 50 51 + renesas,sysc-pwrrdy: 52 + description: 53 + The system controller PWRRDY indicates to the USB PHY if the power supply 54 + is ready. PWRRDY needs to be set during power-on before applying any 55 + other settings. It also needs to be set before powering off the USB. 56 + $ref: /schemas/types.yaml#/definitions/phandle-array 57 + items: 58 + - items: 59 + - description: 60 + System controller phandle required by USB PHY CTRL driver to set 61 + PWRRDY 62 + - description: Register offset associated with PWRRDY 63 + - description: Register bitmask associated with PWRRDY 64 + 53 65 required: 54 66 - compatible 55 67 - reg ··· 72 56 - power-domains 73 57 - '#reset-cells' 74 58 - regulator-vbus 59 + 60 + allOf: 61 + - if: 62 + properties: 63 + compatible: 64 + contains: 65 + const: renesas,r9a08g045-usbphy-ctrl 66 + then: 67 + required: 68 + - renesas,sysc-pwrrdy 69 + else: 70 + properties: 71 + renesas,sysc-pwrrdy: false 75 72 76 73 additionalProperties: false 77 74