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drm/msm/a6xx: Fix the bogus protect error on X2-85

Update the X2-85 gpu's register protect count configuration with the
correct count_max value to avoid blocking the entire MMIO region from the
UMD.

Protect configurations are a bit complicated on A8xx. There are 2 set of
protect registers with different counts: Global and Pipe-specific. The
last-span-unbound feature is available only on the Pipe-specific protect
registers. Due to this, we cannot use the BUILD_BUG sanity check for A8x
protect configurations, so remove the A840 entry from there.

Fixes: 01ff3bf27215 ("drm/msm/a8xx: Add support for Adreno X2-85 GPU")
Signed-off-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/706944/
Message-ID: <20260225-glymur-protect-fix-v1-1-0deddedf9277@oss.qualcomm.com>
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>

authored by

Akhil P Oommen and committed by
Rob Clark 20f644f4 ac47870f

+1 -2
+1 -2
drivers/gpu/drm/msm/adreno/a6xx_catalog.c
··· 1759 1759 A6XX_PROTECT_NORDWR(0x27c06, 0x0000), 1760 1760 }; 1761 1761 1762 - DECLARE_ADRENO_PROTECT(x285_protect, 64); 1762 + DECLARE_ADRENO_PROTECT(x285_protect, 15); 1763 1763 1764 1764 static const struct adreno_reglist_pipe a840_nonctxt_regs[] = { 1765 1765 { REG_A8XX_CP_SMMU_STREAM_ID_LPAC, 0x00000101, BIT(PIPE_NONE) }, ··· 1966 1966 BUILD_BUG_ON(a660_protect.count > a660_protect.count_max); 1967 1967 BUILD_BUG_ON(a690_protect.count > a690_protect.count_max); 1968 1968 BUILD_BUG_ON(a730_protect.count > a730_protect.count_max); 1969 - BUILD_BUG_ON(a840_protect.count > a840_protect.count_max); 1970 1969 }