tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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crypto: hisilicon/qm - enhance the configuration of req_type in queue attributes

Originally, when a queue was requested, it could only be configured
with the default algorithm type of 0. Now, when multiple tfms use
the same queue, the queue must be selected based on its attributes
to meet the requirements of tfm tasks. So the algorithm type
attribute of queue need to be distinguished. Just like a queue used
for compression in ZIP cannot be used for decompression tasks.

Fixes: 3f1ec97aacf1 ("crypto: hisilicon/qm - Put device finding logic into QM")
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

authored by

Chenghai Huang and committed by
Herbert Xu 21452eaa 3a198475

+34 -20
+1 -1
drivers/crypto/hisilicon/hpre/hpre_main.c
··· 465 465 * type: 0 - RSA/DH. algorithm supported in V2, 466 466 * 1 - ECC algorithm in V3. 467 467 */ 468 - ret = hisi_qm_alloc_qps_node(&hpre_devices, 1, type, node, &qp); 468 + ret = hisi_qm_alloc_qps_node(&hpre_devices, 1, &type, node, &qp); 469 469 if (!ret) 470 470 return qp; 471 471
+4 -4
drivers/crypto/hisilicon/qm.c
··· 3620 3620 * not meet the requirements will return error. 3621 3621 */ 3622 3622 int hisi_qm_alloc_qps_node(struct hisi_qm_list *qm_list, int qp_num, 3623 - u8 alg_type, int node, struct hisi_qp **qps) 3623 + u8 *alg_type, int node, struct hisi_qp **qps) 3624 3624 { 3625 3625 struct hisi_qm_resource *tmp; 3626 3626 int ret = -ENODEV; ··· 3638 3638 3639 3639 list_for_each_entry(tmp, &head, list) { 3640 3640 for (i = 0; i < qp_num; i++) { 3641 - qps[i] = hisi_qm_create_qp(tmp->qm, alg_type); 3641 + qps[i] = hisi_qm_create_qp(tmp->qm, alg_type[i]); 3642 3642 if (IS_ERR(qps[i])) { 3643 3643 hisi_qm_free_qps(qps, i); 3644 3644 break; ··· 3653 3653 3654 3654 mutex_unlock(&qm_list->lock); 3655 3655 if (ret) 3656 - pr_info("Failed to create qps, node[%d], alg[%u], qp[%d]!\n", 3657 - node, alg_type, qp_num); 3656 + pr_info("Failed to create qps, node[%d], qp[%d]!\n", 3657 + node, qp_num); 3658 3658 3659 3659 err: 3660 3660 free_list(&head);
-1
drivers/crypto/hisilicon/sec2/sec_crypto.c
··· 626 626 627 627 qp_ctx = &ctx->qp_ctx[qp_ctx_id]; 628 628 qp = ctx->qps[qp_ctx_id]; 629 - qp->req_type = 0; 630 629 qp->qp_ctx = qp_ctx; 631 630 qp_ctx->qp = qp; 632 631 qp_ctx->ctx = ctx;
+16 -5
drivers/crypto/hisilicon/sec2/sec_main.c
··· 417 417 int node = cpu_to_node(raw_smp_processor_id()); 418 418 u32 ctx_num = ctx_q_num; 419 419 struct hisi_qp **qps; 420 + u8 *type; 420 421 int ret; 421 422 422 423 qps = kcalloc(ctx_num, sizeof(struct hisi_qp *), GFP_KERNEL); 423 424 if (!qps) 424 425 return NULL; 425 426 426 - ret = hisi_qm_alloc_qps_node(&sec_devices, ctx_num, 0, node, qps); 427 - if (!ret) 428 - return qps; 427 + /* The type of SEC is all 0, so just allocated by kcalloc */ 428 + type = kcalloc(ctx_num, sizeof(u8), GFP_KERNEL); 429 + if (!type) { 430 + kfree(qps); 431 + return NULL; 432 + } 429 433 430 - kfree(qps); 431 - return NULL; 434 + ret = hisi_qm_alloc_qps_node(&sec_devices, ctx_num, type, node, qps); 435 + if (ret) { 436 + kfree(type); 437 + kfree(qps); 438 + return NULL; 439 + } 440 + 441 + kfree(type); 442 + return qps; 432 443 } 433 444 434 445 u64 sec_get_alg_bitmap(struct hisi_qm *qm, u32 high, u32 low)
+1 -1
drivers/crypto/hisilicon/zip/zip.h
··· 99 99 ZIP_CORE5_BITMAP, 100 100 }; 101 101 102 - int zip_create_qps(struct hisi_qp **qps, int qp_num, int node); 102 + int zip_create_qps(struct hisi_qp **qps, int qp_num, int node, u8 *alg_type); 103 103 int hisi_zip_register_to_crypto(struct hisi_qm *qm); 104 104 void hisi_zip_unregister_from_crypto(struct hisi_qm *qm); 105 105 bool hisi_zip_alg_support(struct hisi_qm *qm, u32 alg);
+9 -4
drivers/crypto/hisilicon/zip/zip_crypto.c
··· 66 66 struct hisi_acc_sgl_pool *sgl_pool; 67 67 struct hisi_zip *zip_dev; 68 68 struct hisi_zip_ctx *ctx; 69 + u8 req_type; 69 70 }; 70 71 71 72 struct hisi_zip_sqe_ops { ··· 246 245 goto err_unmap_input; 247 246 } 248 247 249 - hisi_zip_fill_sqe(qp_ctx->ctx, &zip_sqe, qp->req_type, req); 248 + hisi_zip_fill_sqe(qp_ctx->ctx, &zip_sqe, qp_ctx->req_type, req); 250 249 251 250 /* send command to start a task */ 252 251 atomic64_inc(&dfx->send_cnt); ··· 361 360 struct device *dev = &qp->qm->pdev->dev; 362 361 int ret; 363 362 364 - qp->req_type = req_type; 365 363 qp->alg_type = alg_type; 366 364 qp->qp_ctx = qp_ctx; 367 365 ··· 397 397 { 398 398 struct hisi_qp *qps[HZIP_CTX_Q_NUM] = { NULL }; 399 399 struct hisi_zip_qp_ctx *qp_ctx; 400 + u8 alg_type[HZIP_CTX_Q_NUM]; 400 401 struct hisi_zip *hisi_zip; 401 402 int ret, i, j; 402 403 403 - ret = zip_create_qps(qps, HZIP_CTX_Q_NUM, node); 404 + /* alg_type = 0 for compress, 1 for decompress in hw sqe */ 405 + for (i = 0; i < HZIP_CTX_Q_NUM; i++) 406 + alg_type[i] = i; 407 + 408 + ret = zip_create_qps(qps, HZIP_CTX_Q_NUM, node, alg_type); 404 409 if (ret) { 405 410 pr_err("failed to create zip qps (%d)!\n", ret); 406 411 return -ENODEV; ··· 414 409 hisi_zip = container_of(qps[0]->qm, struct hisi_zip, qm); 415 410 416 411 for (i = 0; i < HZIP_CTX_Q_NUM; i++) { 417 - /* alg_type = 0 for compress, 1 for decompress in hw sqe */ 418 412 qp_ctx = &hisi_zip_ctx->qp_ctx[i]; 419 413 qp_ctx->ctx = hisi_zip_ctx; 420 414 ret = hisi_zip_start_qp(qps[i], qp_ctx, i, req_type); ··· 426 422 } 427 423 428 424 qp_ctx->zip_dev = hisi_zip; 425 + qp_ctx->req_type = req_type; 429 426 } 430 427 431 428 hisi_zip_ctx->ops = &hisi_zip_ops;
+2 -2
drivers/crypto/hisilicon/zip/zip_main.c
··· 446 446 }; 447 447 MODULE_DEVICE_TABLE(pci, hisi_zip_dev_ids); 448 448 449 - int zip_create_qps(struct hisi_qp **qps, int qp_num, int node) 449 + int zip_create_qps(struct hisi_qp **qps, int qp_num, int node, u8 *alg_type) 450 450 { 451 451 if (node == NUMA_NO_NODE) 452 452 node = cpu_to_node(raw_smp_processor_id()); 453 453 454 - return hisi_qm_alloc_qps_node(&zip_devices, qp_num, 0, node, qps); 454 + return hisi_qm_alloc_qps_node(&zip_devices, qp_num, alg_type, node, qps); 455 455 } 456 456 457 457 bool hisi_zip_alg_support(struct hisi_qm *qm, u32 alg)
+1 -2
include/linux/hisi_acc_qm.h
··· 457 457 u16 sq_depth; 458 458 u16 cq_depth; 459 459 u8 alg_type; 460 - u8 req_type; 461 460 462 461 struct qm_dma qdma; 463 462 void *sqe; ··· 582 583 void hisi_acc_free_sgl_pool(struct device *dev, 583 584 struct hisi_acc_sgl_pool *pool); 584 585 int hisi_qm_alloc_qps_node(struct hisi_qm_list *qm_list, int qp_num, 585 - u8 alg_type, int node, struct hisi_qp **qps); 586 + u8 *alg_type, int node, struct hisi_qp **qps); 586 587 void hisi_qm_free_qps(struct hisi_qp **qps, int qp_num); 587 588 void hisi_qm_dev_shutdown(struct pci_dev *pdev); 588 589 void hisi_qm_wait_task_finish(struct hisi_qm *qm, struct hisi_qm_list *qm_list);