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drm/msm/dpu: get rid of DPU_MIXER_COMBINED_ALPHA

Continue migration to the MDSS-revision based checks and replace
DPU_MIXER_COMBINED_ALPHA feature bit with the core_major_ver >= 4 check.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/655398/
Link: https://lore.kernel.org/r/20250522-dpu-drop-features-v5-21-3b2085a07884@oss.qualcomm.com

authored by

Dmitry Baryshkov and committed by
Dmitry Baryshkov 2154cff6 ff63c4a4

+9 -8
+2 -2
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
··· 90 90 (BIT(DPU_MIXER_SOURCESPLIT)) 91 91 92 92 #define MIXER_SDM845_MASK \ 93 - (BIT(DPU_MIXER_SOURCESPLIT) | BIT(DPU_DIM_LAYER) | BIT(DPU_MIXER_COMBINED_ALPHA)) 93 + (BIT(DPU_MIXER_SOURCESPLIT) | BIT(DPU_DIM_LAYER)) 94 94 95 95 #define MIXER_QCM2290_MASK \ 96 - (BIT(DPU_DIM_LAYER) | BIT(DPU_MIXER_COMBINED_ALPHA)) 96 + (BIT(DPU_DIM_LAYER)) 97 97 98 98 #define WB_SDM845_MASK (BIT(DPU_WB_LINE_MODE) | \ 99 99 BIT(DPU_WB_UBWC) | \
-2
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h
··· 85 85 * @DPU_MIXER_SOURCESPLIT Layer mixer supports source-split configuration 86 86 * @DPU_MIXER_GC Gamma correction block 87 87 * @DPU_DIM_LAYER Layer mixer supports dim layer 88 - * @DPU_MIXER_COMBINED_ALPHA Layer mixer has combined alpha register 89 88 * @DPU_MIXER_MAX maximum value 90 89 */ 91 90 enum { ··· 92 93 DPU_MIXER_SOURCESPLIT, 93 94 DPU_MIXER_GC, 94 95 DPU_DIM_LAYER, 95 - DPU_MIXER_COMBINED_ALPHA, 96 96 DPU_MIXER_MAX 97 97 }; 98 98
+4 -2
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c
··· 150 150 * @dev: Corresponding device for devres management 151 151 * @cfg: mixer catalog entry for which driver object is required 152 152 * @addr: mapped register io address of MDP 153 + * @mdss_ver: DPU core's major and minor versions 153 154 */ 154 155 struct dpu_hw_mixer *dpu_hw_lm_init(struct drm_device *dev, 155 156 const struct dpu_lm_cfg *cfg, 156 - void __iomem *addr) 157 + void __iomem *addr, 158 + const struct dpu_mdss_version *mdss_ver) 157 159 { 158 160 struct dpu_hw_mixer *c; 159 161 ··· 175 173 c->idx = cfg->id; 176 174 c->cap = cfg; 177 175 c->ops.setup_mixer_out = dpu_hw_lm_setup_out; 178 - if (test_bit(DPU_MIXER_COMBINED_ALPHA, &c->cap->features)) 176 + if (mdss_ver->core_major_ver >= 4) 179 177 c->ops.setup_blend_config = dpu_hw_lm_setup_blend_config_combined_alpha; 180 178 else 181 179 c->ops.setup_blend_config = dpu_hw_lm_setup_blend_config;
+2 -1
drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h
··· 95 95 96 96 struct dpu_hw_mixer *dpu_hw_lm_init(struct drm_device *dev, 97 97 const struct dpu_lm_cfg *cfg, 98 - void __iomem *addr); 98 + void __iomem *addr, 99 + const struct dpu_mdss_version *mdss_ver); 99 100 100 101 #endif /*_DPU_HW_LM_H */
+1 -1
drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c
··· 60 60 struct dpu_hw_mixer *hw; 61 61 const struct dpu_lm_cfg *lm = &cat->mixer[i]; 62 62 63 - hw = dpu_hw_lm_init(dev, lm, mmio); 63 + hw = dpu_hw_lm_init(dev, lm, mmio, cat->mdss_ver); 64 64 if (IS_ERR(hw)) { 65 65 rc = PTR_ERR(hw); 66 66 DPU_ERROR("failed lm object creation: err %d\n", rc);