tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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net/mlx5: Fix 1600G link mode enum naming

Rename TAUI/TBASE to GAUI/GBASE in 1600G link mode identifier and its
usage in ethtool and link-info tables.

Reported-by: Dawid Osuchowski <dawid.osuchowski@linux.intel.com>
Signed-off-by: Yael Chemla <ychemla@nvidia.com>
Reviewed-by: Shahar Shitrit <shshitrit@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Reviewed-by: Jacob Keller <jacob.e.keller@intel.com>
Reviewed-by: Dawid Osuchowski <dawid.osuchowski@linux.intel.com>
Reported-by: Dawid Osuchowski <dawid.osuchowski@linux.intel.com>
Signed-off-by: Yael Chemla <ychemla@nvidia.com>
Reviewed-by: Leon Romanovsky <leonro@nvidia.com>
Link: https://patch.msgid.link/20260204194324.1723534-1-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

authored by

Yael Chemla and committed by
Jakub Kicinski 215b5309 a182a62f

+4 -4
+1 -1
drivers/infiniband/hw/mlx5/main.c
··· 511 511 *active_width = IB_WIDTH_4X; 512 512 *active_speed = IB_SPEED_XDR; 513 513 break; 514 - case MLX5E_PROT_MASK(MLX5E_1600TAUI_8_1600TBASE_CR8_KR8): 514 + case MLX5E_PROT_MASK(MLX5E_1600GAUI_8_1600GBASE_CR8_KR8): 515 515 *active_width = IB_WIDTH_8X; 516 516 *active_speed = IB_SPEED_XDR; 517 517 break;
+1 -1
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
··· 261 261 ETHTOOL_LINK_MODE_800000baseDR4_2_Full_BIT, 262 262 ETHTOOL_LINK_MODE_800000baseSR4_Full_BIT, 263 263 ETHTOOL_LINK_MODE_800000baseVR4_Full_BIT); 264 - MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1600TAUI_8_1600TBASE_CR8_KR8, ext, 264 + MLX5_BUILD_PTYS2ETHTOOL_CONFIG(MLX5E_1600GAUI_8_1600GBASE_CR8_KR8, ext, 265 265 ETHTOOL_LINK_MODE_1600000baseCR8_Full_BIT, 266 266 ETHTOOL_LINK_MODE_1600000baseKR8_Full_BIT, 267 267 ETHTOOL_LINK_MODE_1600000baseDR8_Full_BIT,
+1 -1
drivers/net/ethernet/mellanox/mlx5/core/port.c
··· 1111 1111 [MLX5E_200GAUI_1_200GBASE_CR1_KR1] = {.speed = 200000, .lanes = 1}, 1112 1112 [MLX5E_400GAUI_2_400GBASE_CR2_KR2] = {.speed = 400000, .lanes = 2}, 1113 1113 [MLX5E_800GAUI_4_800GBASE_CR4_KR4] = {.speed = 800000, .lanes = 4}, 1114 - [MLX5E_1600TAUI_8_1600TBASE_CR8_KR8] = {.speed = 1600000, .lanes = 8}, 1114 + [MLX5E_1600GAUI_8_1600GBASE_CR8_KR8] = {.speed = 1600000, .lanes = 8}, 1115 1115 }; 1116 1116 1117 1117 int mlx5_port_query_eth_proto(struct mlx5_core_dev *dev, u8 port, bool ext,
+1 -1
include/linux/mlx5/port.h
··· 112 112 MLX5E_400GAUI_2_400GBASE_CR2_KR2 = 17, 113 113 MLX5E_800GAUI_8_800GBASE_CR8_KR8 = 19, 114 114 MLX5E_800GAUI_4_800GBASE_CR4_KR4 = 20, 115 - MLX5E_1600TAUI_8_1600TBASE_CR8_KR8 = 23, 115 + MLX5E_1600GAUI_8_1600GBASE_CR8_KR8 = 23, 116 116 MLX5E_EXT_LINK_MODES_NUMBER, 117 117 }; 118 118