Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"A few fixes that came in too late to make it into the first set of
pull requests but would still be nice to have in -rc1.
The majority of these are trivial build fixes for bugs that I found
myself using randconfig testing, and a set of two patches from Uwe to
mark DT strings as 'const' where appropriate, to resolve inconsistent
section attributes"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: make of_device_ids const
ARM: make arrays containing machine compatible strings const
ARM: mm: Remove Kconfig symbol CACHE_PL310
ARM: rockchip: force built-in regulator support for PM
ARM: mvebu: build armada375-smp code conditionally
ARM: sti: always enable RESET_CONTROLLER
ARM: rockchip: make rockchip_suspend_init conditional
ARM: ixp4xx: fix {in,out}s{bwl} data types
ARM: prima2: do not select SMP_ON_UP
ARM: at91: fix pm declarations
ARM: davinci: multi-soc kernels require AUTO_ZRELADDR
ARM: davinci: davinci_cfg_reg cannot be init
ARM: BCM: put back ARCH_MULTI_V7 dependency for mobile
ARM: vexpress: use ARM_CPU_SUSPEND if needed
ARM: dts: add I2C device nodes for Broadcom Cygnus
ARM: dts: BCM63xx: fix L2 cache properties
+88
-58
+20
arch/arm/boot/dts/bcm-cygnus.dtsi
+20
arch/arm/boot/dts/bcm-cygnus.dtsi
···
70
70
};
71
71
};
72
72
73
+
i2c0: i2c@18008000 {
74
+
compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
75
+
reg = <0x18008000 0x100>;
76
+
#address-cells = <1>;
77
+
#size-cells = <0>;
78
+
interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
79
+
clock-frequency = <100000>;
80
+
status = "disabled";
81
+
};
82
+
83
+
i2c1: i2c@1800b000 {
84
+
compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
85
+
reg = <0x1800b000 0x100>;
86
+
#address-cells = <1>;
87
+
#size-cells = <0>;
88
+
interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>;
89
+
clock-frequency = <100000>;
90
+
status = "disabled";
91
+
};
92
+
73
93
uart0: serial@18020000 {
74
94
compatible = "snps,dw-apb-uart";
75
95
reg = <0x18020000 0x100>;
+3
-2
arch/arm/boot/dts/bcm63138.dtsi
+3
-2
arch/arm/boot/dts/bcm63138.dtsi
+1
-1
arch/arm/kernel/perf_event_cpu.c
+1
-1
arch/arm/kernel/perf_event_cpu.c
···
231
231
/*
232
232
* PMU platform driver and devicetree bindings.
233
233
*/
234
-
static struct of_device_id cpu_pmu_of_device_ids[] = {
234
+
static const struct of_device_id cpu_pmu_of_device_ids[] = {
235
235
{.compatible = "arm,cortex-a17-pmu", .data = armv7_a17_pmu_init},
236
236
{.compatible = "arm,cortex-a15-pmu", .data = armv7_a15_pmu_init},
237
237
{.compatible = "arm,cortex-a12-pmu", .data = armv7_a12_pmu_init},
-1
arch/arm/mach-at91/Kconfig
-1
arch/arm/mach-at91/Kconfig
+1
-1
arch/arm/mach-at91/at91rm9200_time.c
+1
-1
arch/arm/mach-at91/at91rm9200_time.c
···
183
183
void __iomem *at91_st_base;
184
184
EXPORT_SYMBOL_GPL(at91_st_base);
185
185
186
-
static struct of_device_id at91rm9200_st_timer_ids[] = {
186
+
static const struct of_device_id at91rm9200_st_timer_ids[] = {
187
187
{ .compatible = "atmel,at91rm9200-st" },
188
188
{ /* sentinel */ }
189
189
};
+4
-4
arch/arm/mach-at91/generic.h
+4
-4
arch/arm/mach-at91/generic.h
···
35
35
extern void __init at91sam9g45_pm_init(void);
36
36
extern void __init at91sam9x5_pm_init(void);
37
37
#else
38
-
void __init at91rm9200_pm_init(void) { }
39
-
void __init at91sam9260_pm_init(void) { }
40
-
void __init at91sam9g45_pm_init(void) { }
41
-
void __init at91sam9x5_pm_init(void) { }
38
+
static inline void __init at91rm9200_pm_init(void) { }
39
+
static inline void __init at91sam9260_pm_init(void) { }
40
+
static inline void __init at91sam9g45_pm_init(void) { }
41
+
static inline void __init at91sam9x5_pm_init(void) { }
42
42
#endif
43
43
44
44
#endif /* _AT91_GENERIC_H */
+2
-2
arch/arm/mach-at91/pm.c
+2
-2
arch/arm/mach-at91/pm.c
···
226
226
}
227
227
}
228
228
229
-
static struct of_device_id ramc_ids[] = {
229
+
static const struct of_device_id ramc_ids[] __initconst = {
230
230
{ .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby },
231
231
{ .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby },
232
232
{ .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby },
···
234
234
{ /*sentinel*/ }
235
235
};
236
236
237
-
static void at91_dt_ramc(void)
237
+
static __init void at91_dt_ramc(void)
238
238
{
239
239
struct device_node *np;
240
240
const struct of_device_id *of_id;
+1
-1
arch/arm/mach-axxia/axxia.c
+1
-1
arch/arm/mach-axxia/axxia.c
+2
-2
arch/arm/mach-bcm/Kconfig
+2
-2
arch/arm/mach-bcm/Kconfig
···
68
68
This enables support for systems based on Broadcom mobile SoCs.
69
69
70
70
config ARCH_BCM_281XX
71
-
bool "Broadcom BCM281XX SoC family"
71
+
bool "Broadcom BCM281XX SoC family" if ARCH_MULTI_V7
72
72
select ARCH_BCM_MOBILE
73
73
select HAVE_SMP
74
74
help
···
77
77
variants.
78
78
79
79
config ARCH_BCM_21664
80
-
bool "Broadcom BCM21664 SoC family"
80
+
bool "Broadcom BCM21664 SoC family" if ARCH_MULTI_V7
81
81
select ARCH_BCM_MOBILE
82
82
select HAVE_SMP
83
83
help
+1
-1
arch/arm/mach-bcm/brcmstb.c
+1
-1
arch/arm/mach-bcm/brcmstb.c
+2
arch/arm/mach-davinci/Kconfig
+2
arch/arm/mach-davinci/Kconfig
···
32
32
33
33
config ARCH_DAVINCI_DA830
34
34
bool "DA830/OMAP-L137/AM17x based system"
35
+
depends on !ARCH_DAVINCI_DMx || AUTO_ZRELADDR
35
36
select ARCH_DAVINCI_DA8XX
36
37
select CPU_DCACHE_WRITETHROUGH # needed on silicon revs 1.0, 1.1
37
38
select CP_INTC
38
39
39
40
config ARCH_DAVINCI_DA850
40
41
bool "DA850/OMAP-L138/AM18x based system"
42
+
depends on !ARCH_DAVINCI_DMx || AUTO_ZRELADDR
41
43
select ARCH_DAVINCI_DA8XX
42
44
select CP_INTC
43
45
+1
-1
arch/arm/mach-davinci/da8xx-dt.c
+1
-1
arch/arm/mach-davinci/da8xx-dt.c
+2
-2
arch/arm/mach-davinci/mux.c
+2
-2
arch/arm/mach-davinci/mux.c
···
30
30
/*
31
31
* Sets the DAVINCI MUX register based on the table
32
32
*/
33
-
int __init_or_module davinci_cfg_reg(const unsigned long index)
33
+
int davinci_cfg_reg(const unsigned long index)
34
34
{
35
35
static DEFINE_SPINLOCK(mux_spin_lock);
36
36
struct davinci_soc_info *soc_info = &davinci_soc_info;
···
101
101
}
102
102
EXPORT_SYMBOL(davinci_cfg_reg);
103
103
104
-
int __init_or_module davinci_cfg_reg_list(const short pins[])
104
+
int davinci_cfg_reg_list(const short pins[])
105
105
{
106
106
int i, error = -EINVAL;
107
107
+1
-1
arch/arm/mach-exynos/exynos.c
+1
-1
arch/arm/mach-exynos/exynos.c
···
227
227
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
228
228
}
229
229
230
-
static char const *exynos_dt_compat[] __initconst = {
230
+
static char const *const exynos_dt_compat[] __initconst = {
231
231
"samsung,exynos3",
232
232
"samsung,exynos3250",
233
233
"samsung,exynos4",
+1
-1
arch/arm/mach-exynos/suspend.c
+1
-1
arch/arm/mach-exynos/suspend.c
···
587
587
.cpu_suspend = exynos5420_cpu_suspend,
588
588
};
589
589
590
-
static struct of_device_id exynos_pmu_of_device_ids[] = {
590
+
static const struct of_device_id exynos_pmu_of_device_ids[] __initconst = {
591
591
{
592
592
.compatible = "samsung,exynos3250-pmu",
593
593
.data = &exynos3250_pm_data,
+1
-1
arch/arm/mach-highbank/highbank.c
+1
-1
arch/arm/mach-highbank/highbank.c
+4
-4
arch/arm/mach-hisi/hisilicon.c
+4
-4
arch/arm/mach-hisi/hisilicon.c
···
45
45
iotable_init(hi3620_io_desc, ARRAY_SIZE(hi3620_io_desc));
46
46
}
47
47
48
-
static const char *hi3xxx_compat[] __initconst = {
48
+
static const char *const hi3xxx_compat[] __initconst = {
49
49
"hisilicon,hi3620-hi4511",
50
50
NULL,
51
51
};
···
55
55
.dt_compat = hi3xxx_compat,
56
56
MACHINE_END
57
57
58
-
static const char *hix5hd2_compat[] __initconst = {
58
+
static const char *const hix5hd2_compat[] __initconst = {
59
59
"hisilicon,hix5hd2",
60
60
NULL,
61
61
};
···
64
64
.dt_compat = hix5hd2_compat,
65
65
MACHINE_END
66
66
67
-
static const char *hip04_compat[] __initconst = {
67
+
static const char *const hip04_compat[] __initconst = {
68
68
"hisilicon,hip04-d01",
69
69
NULL,
70
70
};
···
73
73
.dt_compat = hip04_compat,
74
74
MACHINE_END
75
75
76
-
static const char *hip01_compat[] __initconst = {
76
+
static const char *const hip01_compat[] __initconst = {
77
77
"hisilicon,hip01",
78
78
"hisilicon,hip01-ca9x2",
79
79
NULL,
+1
-1
arch/arm/mach-imx/mmdc.c
+1
-1
arch/arm/mach-imx/mmdc.c
+13
-6
arch/arm/mach-ixp4xx/include/mach/io.h
+13
-6
arch/arm/mach-ixp4xx/include/mach/io.h
···
245
245
}
246
246
247
247
#define outsb outsb
248
-
static inline void outsb(u32 io_addr, const u8 *vaddr, u32 count)
248
+
static inline void outsb(u32 io_addr, const void *p, u32 count)
249
249
{
250
+
const u8 *vaddr = p;
251
+
250
252
while (count--)
251
253
outb(*vaddr++, io_addr);
252
254
}
···
264
262
}
265
263
266
264
#define outsw outsw
267
-
static inline void outsw(u32 io_addr, const u16 *vaddr, u32 count)
265
+
static inline void outsw(u32 io_addr, const void *p, u32 count)
268
266
{
267
+
const u16 *vaddr = p;
269
268
while (count--)
270
269
outw(cpu_to_le16(*vaddr++), io_addr);
271
270
}
···
278
275
}
279
276
280
277
#define outsl outsl
281
-
static inline void outsl(u32 io_addr, const u32 *vaddr, u32 count)
278
+
static inline void outsl(u32 io_addr, const void *p, u32 count)
282
279
{
280
+
const u32 *vaddr = p;
283
281
while (count--)
284
282
outl(cpu_to_le32(*vaddr++), io_addr);
285
283
}
···
298
294
}
299
295
300
296
#define insb insb
301
-
static inline void insb(u32 io_addr, u8 *vaddr, u32 count)
297
+
static inline void insb(u32 io_addr, void *p, u32 count)
302
298
{
299
+
u8 *vaddr = p;
303
300
while (count--)
304
301
*vaddr++ = inb(io_addr);
305
302
}
···
318
313
}
319
314
320
315
#define insw insw
321
-
static inline void insw(u32 io_addr, u16 *vaddr, u32 count)
316
+
static inline void insw(u32 io_addr, void *p, u32 count)
322
317
{
318
+
u16 *vaddr = p;
323
319
while (count--)
324
320
*vaddr++ = le16_to_cpu(inw(io_addr));
325
321
}
···
336
330
}
337
331
338
332
#define insl insl
339
-
static inline void insl(u32 io_addr, u32 *vaddr, u32 count)
333
+
static inline void insl(u32 io_addr, void *p, u32 count)
340
334
{
335
+
u32 *vaddr = p;
341
336
while (count--)
342
337
*vaddr++ = le32_to_cpu(inl(io_addr));
343
338
}
+1
-1
arch/arm/mach-keystone/keystone.c
+1
-1
arch/arm/mach-keystone/keystone.c
+1
-1
arch/arm/mach-keystone/pm_domain.c
+1
-1
arch/arm/mach-keystone/pm_domain.c
+1
-1
arch/arm/mach-mmp/time.c
+1
-1
arch/arm/mach-mmp/time.c
+1
-1
arch/arm/mach-mvebu/coherency.c
+1
-1
arch/arm/mach-mvebu/coherency.c
···
51
51
COHERENCY_FABRIC_TYPE_ARMADA_380,
52
52
};
53
53
54
-
static struct of_device_id of_coherency_table[] = {
54
+
static const struct of_device_id of_coherency_table[] = {
55
55
{.compatible = "marvell,coherency-fabric",
56
56
.data = (void *) COHERENCY_FABRIC_TYPE_ARMADA_370_XP },
57
57
{.compatible = "marvell,armada-375-coherency-fabric",
+1
-1
arch/arm/mach-mvebu/pmsu.c
+1
-1
arch/arm/mach-mvebu/pmsu.c
···
104
104
105
105
static void *mvebu_cpu_resume;
106
106
107
-
static struct of_device_id of_pmsu_table[] = {
107
+
static const struct of_device_id of_pmsu_table[] = {
108
108
{ .compatible = "marvell,armada-370-pmsu", },
109
109
{ .compatible = "marvell,armada-370-xp-pmsu", },
110
110
{ .compatible = "marvell,armada-380-pmsu", },
+1
-1
arch/arm/mach-mvebu/system-controller.c
+1
-1
arch/arm/mach-mvebu/system-controller.c
+1
-1
arch/arm/mach-nspire/nspire.c
+1
-1
arch/arm/mach-nspire/nspire.c
+1
-1
arch/arm/mach-omap2/omap4-common.c
+1
-1
arch/arm/mach-omap2/omap4-common.c
+1
-1
arch/arm/mach-omap2/prm3xxx.c
+1
-1
arch/arm/mach-omap2/prm3xxx.c
+1
-1
arch/arm/mach-omap2/prm44xx.c
+1
-1
arch/arm/mach-omap2/prm44xx.c
···
712
712
return prm_register(&omap44xx_prm_ll_data);
713
713
}
714
714
715
-
static struct of_device_id omap_prm_dt_match_table[] = {
715
+
static const struct of_device_id omap_prm_dt_match_table[] = {
716
716
{ .compatible = "ti,omap4-prm" },
717
717
{ .compatible = "ti,omap5-prm" },
718
718
{ .compatible = "ti,dra7-prm" },
-1
arch/arm/mach-prima2/Kconfig
-1
arch/arm/mach-prima2/Kconfig
+3
-3
arch/arm/mach-prima2/common.c
+3
-3
arch/arm/mach-prima2/common.c
···
21
21
}
22
22
23
23
#ifdef CONFIG_ARCH_ATLAS6
24
-
static const char *atlas6_dt_match[] __initconst = {
24
+
static const char *const atlas6_dt_match[] __initconst = {
25
25
"sirf,atlas6",
26
26
NULL
27
27
};
···
36
36
#endif
37
37
38
38
#ifdef CONFIG_ARCH_PRIMA2
39
-
static const char *prima2_dt_match[] __initconst = {
39
+
static const char *const prima2_dt_match[] __initconst = {
40
40
"sirf,prima2",
41
41
NULL
42
42
};
···
52
52
#endif
53
53
54
54
#ifdef CONFIG_ARCH_ATLAS7
55
-
static const char *atlas7_dt_match[] __initdata = {
55
+
static const char *const atlas7_dt_match[] __initconst = {
56
56
"sirf,atlas7",
57
57
NULL
58
58
};
+1
-1
arch/arm/mach-prima2/platsmp.c
+1
-1
arch/arm/mach-prima2/platsmp.c
+1
arch/arm/mach-rockchip/Kconfig
+1
arch/arm/mach-rockchip/Kconfig
+6
arch/arm/mach-rockchip/pm.h
+6
arch/arm/mach-rockchip/pm.h
···
24
24
extern unsigned long rk3288_bootram_sz;
25
25
26
26
void rockchip_slp_cpu_resume(void);
27
+
#ifdef CONFIG_PM_SLEEP
27
28
void __init rockchip_suspend_init(void);
29
+
#else
30
+
static inline void rockchip_suspend_init(void)
31
+
{
32
+
}
33
+
#endif
28
34
29
35
/****** following is rk3288 defined **********/
30
36
#define RK3288_PMU_WAKEUP_CFG0 0x00
+1
-1
arch/arm/mach-s5pv210/s5pv210.c
+1
-1
arch/arm/mach-s5pv210/s5pv210.c
+1
-1
arch/arm/mach-shmobile/setup-emev2.c
+1
-1
arch/arm/mach-shmobile/setup-emev2.c
+1
arch/arm/mach-sti/Kconfig
+1
arch/arm/mach-sti/Kconfig
+1
-1
arch/arm/mach-ux500/pm_domains.c
+1
-1
arch/arm/mach-ux500/pm_domains.c
+1
-1
arch/arm/mach-versatile/versatile_dt.c
+1
-1
arch/arm/mach-versatile/versatile_dt.c
+1
arch/arm/mach-vexpress/Kconfig
+1
arch/arm/mach-vexpress/Kconfig
-7
arch/arm/mm/Kconfig
-7
arch/arm/mm/Kconfig
···
892
892
893
893
if CACHE_L2X0
894
894
895
-
config CACHE_PL310
896
-
bool
897
-
default y if CPU_V7 && !(CPU_V6 || CPU_V6K)
898
-
help
899
-
This option enables optimisations for the PL310 cache
900
-
controller.
901
-
902
895
config PL310_ERRATA_588369
903
896
bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
904
897
help