tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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iio: dac: ad3552r-hs: use instruction mode for configuration

Use "instruction" mode over initial configuration and all other
non-streaming operations.

DAC boots in streaming mode as default, and the driver is not
changing this mode.

Instruction r/w is still working because instruction is processed
from the DAC after chip select is deasserted, this works until
loop mode is 0 or greater than the instruction size.

All initial operations should be more safely done in instruction
mode, a mode provided for this.

Signed-off-by: Angelo Dureghello <adureghello@baylibre.com>
Link: https://patch.msgid.link/20250114-wip-bl-ad3552r-axi-v0-iio-testing-carlos-v4-6-979402e33545@baylibre.com
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>

authored by

Angelo Dureghello and committed by
Jonathan Cameron 21889245 96873eea

+28 -1
+28 -1
drivers/iio/dac/ad3552r-hs.c
··· 137 137 if (ret) 138 138 return ret; 139 139 140 + /* Primary region access, set streaming mode (now in SPI + SDR). */ 141 + ret = ad3552r_qspi_update_reg_bits(st, 142 + AD3552R_REG_ADDR_INTERFACE_CONFIG_B, 143 + AD3552R_MASK_SINGLE_INST, 0, 1); 144 + if (ret) 145 + return ret; 146 + 140 147 /* Inform DAC chip to switch into DDR mode */ 141 148 ret = ad3552r_qspi_update_reg_bits(st, 142 149 AD3552R_REG_ADDR_INTERFACE_CONFIG_D, 143 150 AD3552R_MASK_SPI_CONFIG_DDR, 144 151 AD3552R_MASK_SPI_CONFIG_DDR, 1); 145 152 if (ret) 146 - return ret; 153 + goto exit_err_ddr; 147 154 148 155 /* Inform DAC IP to go for DDR mode from now on */ 149 156 ret = iio_backend_ddr_enable(st->back); ··· 181 174 182 175 iio_backend_ddr_disable(st->back); 183 176 177 + exit_err_ddr: 178 + ad3552r_qspi_update_reg_bits(st, AD3552R_REG_ADDR_INTERFACE_CONFIG_B, 179 + AD3552R_MASK_SINGLE_INST, 180 + AD3552R_MASK_SINGLE_INST, 1); 181 + 184 182 return ret; 185 183 } 186 184 ··· 207 195 return ret; 208 196 209 197 ret = iio_backend_ddr_disable(st->back); 198 + if (ret) 199 + return ret; 200 + 201 + /* Back to single instruction mode, disabling loop. */ 202 + ret = ad3552r_qspi_update_reg_bits(st, 203 + AD3552R_REG_ADDR_INTERFACE_CONFIG_B, 204 + AD3552R_MASK_SINGLE_INST, 205 + AD3552R_MASK_SINGLE_INST, 1); 210 206 if (ret) 211 207 return ret; 212 208 ··· 325 305 return ret; 326 306 327 307 ret = iio_backend_ddr_disable(st->back); 308 + if (ret) 309 + return ret; 310 + 311 + ret = st->data->bus_reg_write(st->back, 312 + AD3552R_REG_ADDR_INTERFACE_CONFIG_B, 313 + AD3552R_MASK_SINGLE_INST | 314 + AD3552R_MASK_SHORT_INSTRUCTION, 1); 328 315 if (ret) 329 316 return ret; 330 317