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irqchip/gic-v3: Switch high priority PPIs over to handle_percpu_devid_irq()

It so appears that handle_percpu_devid_irq() is extremely similar to
handle_percpu_devid_fasteoi_nmi(), and that the differences do no justify
the horrid machinery in the GICv3 driver to handle the flow handler switch.

Stick with the standard flow handler, even for NMIs.

Suggested-by: Will Deacon <will@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Will Deacon <will@kernel.org>
Link: https://patch.msgid.link/20251020122944.3074811-11-maz@kernel.org

authored by

Marc Zyngier and committed by
Thomas Gleixner 21bbbc50 f6c8aced

+2 -52
+2 -52
drivers/irqchip/irq-gic-v3.c
··· 230 230 !cpus_have_group0); 231 231 } 232 232 233 - /* rdist_nmi_refs[n] == number of cpus having the rdist interrupt n set as NMI */ 234 - static refcount_t *rdist_nmi_refs; 235 - 236 233 static struct gic_kvm_info gic_v3_kvm_info __initdata; 237 234 static DEFINE_PER_CPU(bool, has_rss); 238 235 ··· 605 608 } 606 609 } 607 610 608 - static u32 __gic_get_rdist_index(irq_hw_number_t hwirq) 609 - { 610 - switch (__get_intid_range(hwirq)) { 611 - case SGI_RANGE: 612 - case PPI_RANGE: 613 - return hwirq; 614 - case EPPI_RANGE: 615 - return hwirq - EPPI_BASE_INTID + 32; 616 - default: 617 - unreachable(); 618 - } 619 - } 620 - 621 - static u32 gic_get_rdist_index(struct irq_data *d) 622 - { 623 - return __gic_get_rdist_index(d->hwirq); 624 - } 625 - 626 611 static int gic_irq_nmi_setup(struct irq_data *d) 627 612 { 628 613 struct irq_desc *desc = irq_to_desc(d->irq); ··· 625 646 return -EINVAL; 626 647 627 648 /* desc lock should already be held */ 628 - if (gic_irq_in_rdist(d)) { 629 - u32 idx = gic_get_rdist_index(d); 630 - 631 - /* 632 - * Setting up a percpu interrupt as NMI, only switch handler 633 - * for first NMI 634 - */ 635 - if (!refcount_inc_not_zero(&rdist_nmi_refs[idx])) { 636 - refcount_set(&rdist_nmi_refs[idx], 1); 637 - desc->handle_irq = handle_percpu_devid_fasteoi_nmi; 638 - } 639 - } else { 649 + if (!gic_irq_in_rdist(d)) 640 650 desc->handle_irq = handle_fasteoi_nmi; 641 - } 642 651 643 652 gic_irq_set_prio(d, dist_prio_nmi); 644 653 ··· 653 686 return; 654 687 655 688 /* desc lock should already be held */ 656 - if (gic_irq_in_rdist(d)) { 657 - u32 idx = gic_get_rdist_index(d); 658 - 659 - /* Tearing down NMI, only switch handler for last NMI */ 660 - if (refcount_dec_and_test(&rdist_nmi_refs[idx])) 661 - desc->handle_irq = handle_percpu_devid_irq; 662 - } else { 689 + if (!gic_irq_in_rdist(d)) 663 690 desc->handle_irq = handle_fasteoi_irq; 664 - } 665 691 666 692 gic_irq_set_prio(d, dist_prio_irq); 667 693 } ··· 2040 2080 2041 2081 static void gic_enable_nmi_support(void) 2042 2082 { 2043 - int i; 2044 - 2045 2083 if (!gic_prio_masking_enabled() || nmi_support_forbidden) 2046 2084 return; 2047 - 2048 - rdist_nmi_refs = kcalloc(gic_data.ppi_nr + SGI_NR, 2049 - sizeof(*rdist_nmi_refs), GFP_KERNEL); 2050 - if (!rdist_nmi_refs) 2051 - return; 2052 - 2053 - for (i = 0; i < gic_data.ppi_nr + SGI_NR; i++) 2054 - refcount_set(&rdist_nmi_refs[i], 0); 2055 2085 2056 2086 pr_info("Pseudo-NMIs enabled using %s ICC_PMR_EL1 synchronisation\n", 2057 2087 gic_has_relaxed_pmr_sync() ? "relaxed" : "forced");