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Merge tag 'phy-fixes-6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy

Pull phy fixes from Vinod Koul:
"A bunch of renesas fixes and few smaller fixes in other drivers:

- Rensas fixes for unbind ole detection, irq, locking etc

- tegra fixes for error handling at init and UTMI power states and
stray unlock fix

- rockchip missing assignment and pll output fixes

- startfive usb host detection fixes"

* tag 'phy-fixes-6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy:
phy: Fix error handling in tegra_xusb_port_init
phy: renesas: rcar-gen3-usb2: Set timing registers only once
phy: renesas: rcar-gen3-usb2: Assert PLL reset on PHY power off
phy: renesas: rcar-gen3-usb2: Lock around hardware registers and driver data
phy: renesas: rcar-gen3-usb2: Move IRQ request in probe
phy: renesas: rcar-gen3-usb2: Fix role detection on unbind/bind
phy: tegra: xusb: remove a stray unlock
phy: phy-rockchip-samsung-hdptx: Fix PHY PLL output 50.25MHz error
phy: starfive: jh7110-usb: Fix USB 2.0 host occasional detection failure
phy: rockchip-samsung-dcphy: Add missing assignment
phy: can-transceiver: Re-instate "mux-states" property presence check
phy: qcom-qmp-ufs: check for mode type for phy setting
phy: tegra: xusb: Use a bitmask for UTMI pad power state tracking

+132 -91
+15 -7
drivers/phy/phy-can-transceiver.c
··· 93 93 }; 94 94 MODULE_DEVICE_TABLE(of, can_transceiver_phy_ids); 95 95 96 + /* Temporary wrapper until the multiplexer subsystem supports optional muxes */ 97 + static inline struct mux_state * 98 + devm_mux_state_get_optional(struct device *dev, const char *mux_name) 99 + { 100 + if (!of_property_present(dev->of_node, "mux-states")) 101 + return NULL; 102 + 103 + return devm_mux_state_get(dev, mux_name); 104 + } 105 + 96 106 static int can_transceiver_phy_probe(struct platform_device *pdev) 97 107 { 98 108 struct phy_provider *phy_provider; ··· 124 114 match = of_match_node(can_transceiver_phy_ids, pdev->dev.of_node); 125 115 drvdata = match->data; 126 116 127 - mux_state = devm_mux_state_get(dev, NULL); 128 - if (IS_ERR(mux_state)) { 129 - if (PTR_ERR(mux_state) == -EPROBE_DEFER) 130 - return PTR_ERR(mux_state); 131 - } else { 132 - can_transceiver_phy->mux_state = mux_state; 133 - } 117 + mux_state = devm_mux_state_get_optional(dev, NULL); 118 + if (IS_ERR(mux_state)) 119 + return PTR_ERR(mux_state); 120 + 121 + can_transceiver_phy->mux_state = mux_state; 134 122 135 123 phy = devm_phy_create(dev, dev->of_node, 136 124 &can_transceiver_phy_ops);
+2 -1
drivers/phy/qualcomm/phy-qcom-qmp-ufs.c
··· 1754 1754 qmp_ufs_init_all(qmp, &cfg->tbls_hs_overlay[i]); 1755 1755 } 1756 1756 1757 - qmp_ufs_init_all(qmp, &cfg->tbls_hs_b); 1757 + if (qmp->mode == PHY_MODE_UFS_HS_B) 1758 + qmp_ufs_init_all(qmp, &cfg->tbls_hs_b); 1758 1759 } 1759 1760 1760 1761 static int qmp_ufs_com_init(struct qmp_ufs *qmp)
+74 -59
drivers/phy/renesas/phy-rcar-gen3-usb2.c
··· 9 9 * Copyright (C) 2014 Cogent Embedded, Inc. 10 10 */ 11 11 12 + #include <linux/cleanup.h> 12 13 #include <linux/extcon-provider.h> 13 14 #include <linux/interrupt.h> 14 15 #include <linux/io.h> ··· 108 107 struct rcar_gen3_chan *ch; 109 108 u32 int_enable_bits; 110 109 bool initialized; 111 - bool otg_initialized; 112 110 bool powered; 113 111 }; 114 112 ··· 119 119 struct regulator *vbus; 120 120 struct reset_control *rstc; 121 121 struct work_struct work; 122 - struct mutex lock; /* protects rphys[...].powered */ 122 + spinlock_t lock; /* protects access to hardware and driver data structure. */ 123 123 enum usb_dr_mode dr_mode; 124 - int irq; 125 124 u32 obint_enable_bits; 126 125 bool extcon_host; 127 126 bool is_otg_channel; ··· 319 320 return false; 320 321 } 321 322 322 - static bool rcar_gen3_needs_init_otg(struct rcar_gen3_chan *ch) 323 + static bool rcar_gen3_is_any_otg_rphy_initialized(struct rcar_gen3_chan *ch) 323 324 { 324 - int i; 325 - 326 - for (i = 0; i < NUM_OF_PHYS; i++) { 327 - if (ch->rphys[i].otg_initialized) 328 - return false; 325 + for (enum rcar_gen3_phy_index i = PHY_INDEX_BOTH_HC; i <= PHY_INDEX_EHCI; 326 + i++) { 327 + if (ch->rphys[i].initialized) 328 + return true; 329 329 } 330 330 331 - return true; 331 + return false; 332 332 } 333 333 334 334 static bool rcar_gen3_are_all_rphys_power_off(struct rcar_gen3_chan *ch) ··· 349 351 bool is_b_device; 350 352 enum phy_mode cur_mode, new_mode; 351 353 352 - if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch)) 354 + guard(spinlock_irqsave)(&ch->lock); 355 + 356 + if (!ch->is_otg_channel || !rcar_gen3_is_any_otg_rphy_initialized(ch)) 353 357 return -EIO; 354 358 355 359 if (sysfs_streq(buf, "host")) ··· 389 389 { 390 390 struct rcar_gen3_chan *ch = dev_get_drvdata(dev); 391 391 392 - if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch)) 392 + if (!ch->is_otg_channel || !rcar_gen3_is_any_otg_rphy_initialized(ch)) 393 393 return -EIO; 394 394 395 395 return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" : ··· 401 401 { 402 402 void __iomem *usb2_base = ch->base; 403 403 u32 val; 404 + 405 + if (!ch->is_otg_channel || rcar_gen3_is_any_otg_rphy_initialized(ch)) 406 + return; 404 407 405 408 /* Should not use functions of read-modify-write a register */ 406 409 val = readl(usb2_base + USB2_LINECTRL1); ··· 418 415 val = readl(usb2_base + USB2_ADPCTRL); 419 416 writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL); 420 417 } 421 - msleep(20); 418 + mdelay(20); 422 419 423 420 writel(0xffffffff, usb2_base + USB2_OBINTSTA); 424 421 writel(ch->obint_enable_bits, usb2_base + USB2_OBINTEN); ··· 430 427 { 431 428 struct rcar_gen3_chan *ch = _ch; 432 429 void __iomem *usb2_base = ch->base; 433 - u32 status = readl(usb2_base + USB2_OBINTSTA); 430 + struct device *dev = ch->dev; 434 431 irqreturn_t ret = IRQ_NONE; 432 + u32 status; 435 433 436 - if (status & ch->obint_enable_bits) { 437 - dev_vdbg(ch->dev, "%s: %08x\n", __func__, status); 438 - writel(ch->obint_enable_bits, usb2_base + USB2_OBINTSTA); 439 - rcar_gen3_device_recognition(ch); 440 - ret = IRQ_HANDLED; 434 + pm_runtime_get_noresume(dev); 435 + 436 + if (pm_runtime_suspended(dev)) 437 + goto rpm_put; 438 + 439 + scoped_guard(spinlock, &ch->lock) { 440 + status = readl(usb2_base + USB2_OBINTSTA); 441 + if (status & ch->obint_enable_bits) { 442 + dev_vdbg(dev, "%s: %08x\n", __func__, status); 443 + writel(ch->obint_enable_bits, usb2_base + USB2_OBINTSTA); 444 + rcar_gen3_device_recognition(ch); 445 + ret = IRQ_HANDLED; 446 + } 441 447 } 442 448 449 + rpm_put: 450 + pm_runtime_put_noidle(dev); 443 451 return ret; 444 452 } 445 453 ··· 460 446 struct rcar_gen3_chan *channel = rphy->ch; 461 447 void __iomem *usb2_base = channel->base; 462 448 u32 val; 463 - int ret; 464 449 465 - if (!rcar_gen3_is_any_rphy_initialized(channel) && channel->irq >= 0) { 466 - INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work); 467 - ret = request_irq(channel->irq, rcar_gen3_phy_usb2_irq, 468 - IRQF_SHARED, dev_name(channel->dev), channel); 469 - if (ret < 0) { 470 - dev_err(channel->dev, "No irq handler (%d)\n", channel->irq); 471 - return ret; 472 - } 473 - } 450 + guard(spinlock_irqsave)(&channel->lock); 474 451 475 452 /* Initialize USB2 part */ 476 453 val = readl(usb2_base + USB2_INT_ENABLE); 477 454 val |= USB2_INT_ENABLE_UCOM_INTEN | rphy->int_enable_bits; 478 455 writel(val, usb2_base + USB2_INT_ENABLE); 479 - writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET); 480 - writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET); 481 456 482 - /* Initialize otg part */ 483 - if (channel->is_otg_channel) { 484 - if (rcar_gen3_needs_init_otg(channel)) 485 - rcar_gen3_init_otg(channel); 486 - rphy->otg_initialized = true; 457 + if (!rcar_gen3_is_any_rphy_initialized(channel)) { 458 + writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET); 459 + writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET); 487 460 } 461 + 462 + /* Initialize otg part (only if we initialize a PHY with IRQs). */ 463 + if (rphy->int_enable_bits) 464 + rcar_gen3_init_otg(channel); 488 465 489 466 rphy->initialized = true; 490 467 ··· 489 484 void __iomem *usb2_base = channel->base; 490 485 u32 val; 491 486 492 - rphy->initialized = false; 487 + guard(spinlock_irqsave)(&channel->lock); 493 488 494 - if (channel->is_otg_channel) 495 - rphy->otg_initialized = false; 489 + rphy->initialized = false; 496 490 497 491 val = readl(usb2_base + USB2_INT_ENABLE); 498 492 val &= ~rphy->int_enable_bits; 499 493 if (!rcar_gen3_is_any_rphy_initialized(channel)) 500 494 val &= ~USB2_INT_ENABLE_UCOM_INTEN; 501 495 writel(val, usb2_base + USB2_INT_ENABLE); 502 - 503 - if (channel->irq >= 0 && !rcar_gen3_is_any_rphy_initialized(channel)) 504 - free_irq(channel->irq, channel); 505 496 506 497 return 0; 507 498 } ··· 510 509 u32 val; 511 510 int ret = 0; 512 511 513 - mutex_lock(&channel->lock); 514 - if (!rcar_gen3_are_all_rphys_power_off(channel)) 515 - goto out; 516 - 517 512 if (channel->vbus) { 518 513 ret = regulator_enable(channel->vbus); 519 514 if (ret) 520 - goto out; 515 + return ret; 521 516 } 517 + 518 + guard(spinlock_irqsave)(&channel->lock); 519 + 520 + if (!rcar_gen3_are_all_rphys_power_off(channel)) 521 + goto out; 522 522 523 523 val = readl(usb2_base + USB2_USBCTR); 524 524 val |= USB2_USBCTR_PLL_RST; ··· 530 528 out: 531 529 /* The powered flag should be set for any other phys anyway */ 532 530 rphy->powered = true; 533 - mutex_unlock(&channel->lock); 534 531 535 532 return 0; 536 533 } ··· 540 539 struct rcar_gen3_chan *channel = rphy->ch; 541 540 int ret = 0; 542 541 543 - mutex_lock(&channel->lock); 544 - rphy->powered = false; 542 + scoped_guard(spinlock_irqsave, &channel->lock) { 543 + rphy->powered = false; 545 544 546 - if (!rcar_gen3_are_all_rphys_power_off(channel)) 547 - goto out; 545 + if (rcar_gen3_are_all_rphys_power_off(channel)) { 546 + u32 val = readl(channel->base + USB2_USBCTR); 547 + 548 + val |= USB2_USBCTR_PLL_RST; 549 + writel(val, channel->base + USB2_USBCTR); 550 + } 551 + } 548 552 549 553 if (channel->vbus) 550 554 ret = regulator_disable(channel->vbus); 551 - 552 - out: 553 - mutex_unlock(&channel->lock); 554 555 555 556 return ret; 556 557 } ··· 706 703 struct device *dev = &pdev->dev; 707 704 struct rcar_gen3_chan *channel; 708 705 struct phy_provider *provider; 709 - int ret = 0, i; 706 + int ret = 0, i, irq; 710 707 711 708 if (!dev->of_node) { 712 709 dev_err(dev, "This driver needs device tree\n"); ··· 722 719 return PTR_ERR(channel->base); 723 720 724 721 channel->obint_enable_bits = USB2_OBINT_BITS; 725 - /* get irq number here and request_irq for OTG in phy_init */ 726 - channel->irq = platform_get_irq_optional(pdev, 0); 727 722 channel->dr_mode = rcar_gen3_get_dr_mode(dev->of_node); 728 723 if (channel->dr_mode != USB_DR_MODE_UNKNOWN) { 729 724 channel->is_otg_channel = true; ··· 764 763 if (phy_data->no_adp_ctrl) 765 764 channel->obint_enable_bits = USB2_OBINT_IDCHG_EN; 766 765 767 - mutex_init(&channel->lock); 766 + spin_lock_init(&channel->lock); 768 767 for (i = 0; i < NUM_OF_PHYS; i++) { 769 768 channel->rphys[i].phy = devm_phy_create(dev, NULL, 770 769 phy_data->phy_usb2_ops); ··· 788 787 goto error; 789 788 } 790 789 channel->vbus = NULL; 790 + } 791 + 792 + irq = platform_get_irq_optional(pdev, 0); 793 + if (irq < 0 && irq != -ENXIO) { 794 + ret = irq; 795 + goto error; 796 + } else if (irq > 0) { 797 + INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work); 798 + ret = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq, 799 + IRQF_SHARED, dev_name(dev), channel); 800 + if (ret < 0) { 801 + dev_err(dev, "Failed to request irq (%d)\n", irq); 802 + goto error; 803 + } 791 804 } 792 805 793 806 provider = devm_of_phy_provider_register(dev, rcar_gen3_phy_usb2_xlate);
+1 -1
drivers/phy/rockchip/phy-rockchip-samsung-dcphy.c
··· 1653 1653 return ret; 1654 1654 } 1655 1655 1656 - clk_prepare_enable(samsung->ref_clk); 1656 + ret = clk_prepare_enable(samsung->ref_clk); 1657 1657 if (ret) { 1658 1658 dev_err(samsung->dev, "Failed to enable reference clock, %d\n", ret); 1659 1659 clk_disable_unprepare(samsung->pclk);
+2
drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c
··· 476 476 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, 477 477 { 650000, 162, 162, 1, 1, 11, 1, 1, 1, 1, 1, 1, 1, 54, 0, 16, 4, 1, 478 478 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, 479 + { 502500, 84, 84, 1, 1, 7, 1, 1, 1, 1, 1, 1, 1, 11, 1, 4, 5, 480 + 4, 11, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, 479 481 { 337500, 0x70, 0x70, 1, 1, 0xf, 1, 1, 1, 1, 1, 1, 1, 0x2, 0, 0x01, 5, 480 482 1, 1, 1, 0, 0x20, 0x0c, 1, 0x0e, 0, 0, }, 481 483 { 400000, 100, 100, 1, 1, 11, 1, 1, 0, 1, 0, 1, 1, 0x9, 0, 0x05, 0,
+7
drivers/phy/starfive/phy-jh7110-usb.c
··· 18 18 #include <linux/usb/of.h> 19 19 20 20 #define USB_125M_CLK_RATE 125000000 21 + #define USB_CLK_MODE_OFF 0x0 22 + #define USB_CLK_MODE_RX_NORMAL_PWR BIT(1) 21 23 #define USB_LS_KEEPALIVE_OFF 0x4 22 24 #define USB_LS_KEEPALIVE_ENABLE BIT(4) 23 25 ··· 80 78 { 81 79 struct jh7110_usb2_phy *phy = phy_get_drvdata(_phy); 82 80 int ret; 81 + unsigned int val; 83 82 84 83 ret = clk_set_rate(phy->usb_125m_clk, USB_125M_CLK_RATE); 85 84 if (ret) ··· 89 86 ret = clk_prepare_enable(phy->app_125m); 90 87 if (ret) 91 88 return ret; 89 + 90 + val = readl(phy->regs + USB_CLK_MODE_OFF); 91 + val |= USB_CLK_MODE_RX_NORMAL_PWR; 92 + writel(val, phy->regs + USB_CLK_MODE_OFF); 92 93 93 94 return 0; 94 95 }
+27 -19
drivers/phy/tegra/xusb-tegra186.c
··· 237 237 #define DATA0_VAL_PD BIT(1) 238 238 #define USE_XUSB_AO BIT(4) 239 239 240 + #define TEGRA_UTMI_PAD_MAX 4 241 + 240 242 #define TEGRA186_LANE(_name, _offset, _shift, _mask, _type) \ 241 243 { \ 242 244 .name = _name, \ ··· 271 269 272 270 /* UTMI bias and tracking */ 273 271 struct clk *usb2_trk_clk; 274 - unsigned int bias_pad_enable; 272 + DECLARE_BITMAP(utmi_pad_enabled, TEGRA_UTMI_PAD_MAX); 275 273 276 274 /* padctl context */ 277 275 struct tegra186_xusb_padctl_context context; ··· 605 603 u32 value; 606 604 int err; 607 605 608 - mutex_lock(&padctl->lock); 609 - 610 - if (priv->bias_pad_enable++ > 0) { 611 - mutex_unlock(&padctl->lock); 606 + if (!bitmap_empty(priv->utmi_pad_enabled, TEGRA_UTMI_PAD_MAX)) 612 607 return; 613 - } 614 608 615 609 err = clk_prepare_enable(priv->usb2_trk_clk); 616 610 if (err < 0) ··· 656 658 } else { 657 659 clk_disable_unprepare(priv->usb2_trk_clk); 658 660 } 659 - 660 - mutex_unlock(&padctl->lock); 661 661 } 662 662 663 663 static void tegra186_utmi_bias_pad_power_off(struct tegra_xusb_padctl *padctl) ··· 663 667 struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); 664 668 u32 value; 665 669 666 - mutex_lock(&padctl->lock); 667 - 668 - if (WARN_ON(priv->bias_pad_enable == 0)) { 669 - mutex_unlock(&padctl->lock); 670 + if (!bitmap_empty(priv->utmi_pad_enabled, TEGRA_UTMI_PAD_MAX)) 670 671 return; 671 - } 672 - 673 - if (--priv->bias_pad_enable > 0) { 674 - mutex_unlock(&padctl->lock); 675 - return; 676 - } 677 672 678 673 value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); 679 674 value |= USB2_PD_TRK; ··· 677 690 clk_disable_unprepare(priv->usb2_trk_clk); 678 691 } 679 692 680 - mutex_unlock(&padctl->lock); 681 693 } 682 694 683 695 static void tegra186_utmi_pad_power_on(struct phy *phy) 684 696 { 685 697 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); 686 698 struct tegra_xusb_padctl *padctl = lane->pad->padctl; 699 + struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); 687 700 struct tegra_xusb_usb2_port *port; 688 701 struct device *dev = padctl->dev; 689 702 unsigned int index = lane->index; ··· 692 705 if (!phy) 693 706 return; 694 707 708 + mutex_lock(&padctl->lock); 709 + if (test_bit(index, priv->utmi_pad_enabled)) { 710 + mutex_unlock(&padctl->lock); 711 + return; 712 + } 713 + 695 714 port = tegra_xusb_find_usb2_port(padctl, index); 696 715 if (!port) { 697 716 dev_err(dev, "no port found for USB2 lane %u\n", index); 717 + mutex_unlock(&padctl->lock); 698 718 return; 699 719 } 700 720 ··· 718 724 value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); 719 725 value &= ~USB2_OTG_PD_DR; 720 726 padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); 727 + 728 + set_bit(index, priv->utmi_pad_enabled); 729 + mutex_unlock(&padctl->lock); 721 730 } 722 731 723 732 static void tegra186_utmi_pad_power_down(struct phy *phy) 724 733 { 725 734 struct tegra_xusb_lane *lane = phy_get_drvdata(phy); 726 735 struct tegra_xusb_padctl *padctl = lane->pad->padctl; 736 + struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); 727 737 unsigned int index = lane->index; 728 738 u32 value; 729 739 730 740 if (!phy) 731 741 return; 742 + 743 + mutex_lock(&padctl->lock); 744 + if (!test_bit(index, priv->utmi_pad_enabled)) { 745 + mutex_unlock(&padctl->lock); 746 + return; 747 + } 732 748 733 749 dev_dbg(padctl->dev, "power down UTMI pad %u\n", index); 734 750 ··· 752 748 753 749 udelay(2); 754 750 751 + clear_bit(index, priv->utmi_pad_enabled); 752 + 755 753 tegra186_utmi_bias_pad_power_off(padctl); 754 + 755 + mutex_unlock(&padctl->lock); 756 756 } 757 757 758 758 static int tegra186_xusb_padctl_vbus_override(struct tegra_xusb_padctl *padctl,
+4 -4
drivers/phy/tegra/xusb.c
··· 548 548 549 549 err = dev_set_name(&port->dev, "%s-%u", name, index); 550 550 if (err < 0) 551 - goto unregister; 551 + goto put_device; 552 552 553 553 err = device_add(&port->dev); 554 554 if (err < 0) 555 - goto unregister; 555 + goto put_device; 556 556 557 557 return 0; 558 558 559 - unregister: 560 - device_unregister(&port->dev); 559 + put_device: 560 + put_device(&port->dev); 561 561 return err; 562 562 } 563 563