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dt-bindings: dma: rz-dmac: Document RZ/V2H(P) family of SoCs

Document the Renesas RZ/V2H(P) family of SoCs DMAC block.
The Renesas RZ/V2H(P) DMAC is very similar to the one found on the
Renesas RZ/G2L family of SoCs, but there are some differences:
* It only uses one register area
* It only uses one clock
* It only uses one reset
* Instead of using MID/IRD it uses REQ No
* It is connected to the Interrupt Control Unit (ICU)

Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250423143422.3747702-3-fabrizio.castro.jz@renesas.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Fabrizio Castro and committed by
Vinod Koul 22228b93 ec52f10a

+82 -19
+82 -19
Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml
··· 11 11 12 12 properties: 13 13 compatible: 14 - items: 15 - - enum: 16 - - renesas,r7s72100-dmac # RZ/A1H 17 - - renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five 18 - - renesas,r9a07g044-dmac # RZ/G2{L,LC} 19 - - renesas,r9a07g054-dmac # RZ/V2L 20 - - renesas,r9a08g045-dmac # RZ/G3S 21 - - const: renesas,rz-dmac 14 + oneOf: 15 + - items: 16 + - enum: 17 + - renesas,r7s72100-dmac # RZ/A1H 18 + - renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five 19 + - renesas,r9a07g044-dmac # RZ/G2{L,LC} 20 + - renesas,r9a07g054-dmac # RZ/V2L 21 + - renesas,r9a08g045-dmac # RZ/G3S 22 + - const: renesas,rz-dmac 23 + 24 + - const: renesas,r9a09g057-dmac # RZ/V2H(P) 22 25 23 26 reg: 24 27 items: 25 28 - description: Control and channel register block 26 29 - description: DMA extended resource selector block 30 + minItems: 1 27 31 28 32 interrupts: 29 33 maxItems: 17 ··· 56 52 items: 57 53 - description: DMA main clock 58 54 - description: DMA register access clock 55 + minItems: 1 59 56 60 57 clock-names: 61 58 items: ··· 66 61 '#dma-cells': 67 62 const: 1 68 63 description: 69 - The cell specifies the encoded MID/RID values of the DMAC port 70 - connected to the DMA client and the slave channel configuration 71 - parameters. 72 - bits[0:9] - Specifies MID/RID value 64 + The cell specifies the encoded MID/RID or the REQ No values of 65 + the DMAC port connected to the DMA client and the slave channel 66 + configuration parameters. 67 + bits[0:9] - Specifies the MID/RID or the REQ No value 73 68 bit[10] - Specifies DMA request high enable (HIEN) 74 69 bit[11] - Specifies DMA request detection type (LVL) 75 70 bits[12:14] - Specifies DMAACK output mode (AM) ··· 85 80 items: 86 81 - description: Reset for DMA ARESETN reset terminal 87 82 - description: Reset for DMA RST_ASYNC reset terminal 83 + minItems: 1 88 84 89 85 reset-names: 90 86 items: 91 87 - const: arst 92 88 - const: rst_async 89 + 90 + renesas,icu: 91 + description: 92 + It must contain the phandle to the ICU and the index of the DMAC as seen 93 + from the ICU. 94 + $ref: /schemas/types.yaml#/definitions/phandle-array 95 + items: 96 + - items: 97 + - description: Phandle to the ICU node. 98 + - description: 99 + The number of the DMAC as seen from the ICU, i.e. parameter k from 100 + register ICU_DMkSELy. This may differ from the actual DMAC instance 101 + number. 93 102 94 103 required: 95 104 - compatible ··· 117 98 - $ref: dma-controller.yaml# 118 99 119 100 - if: 120 - not: 121 - properties: 122 - compatible: 123 - contains: 124 - enum: 125 - - renesas,r7s72100-dmac 101 + properties: 102 + compatible: 103 + contains: 104 + enum: 105 + - renesas,r9a07g043-dmac 106 + - renesas,r9a07g044-dmac 107 + - renesas,r9a07g054-dmac 108 + - renesas,r9a08g045-dmac 126 109 then: 110 + properties: 111 + reg: 112 + minItems: 2 113 + clocks: 114 + minItems: 2 115 + resets: 116 + minItems: 2 117 + 118 + renesas,icu: false 119 + 127 120 required: 128 121 - clocks 129 122 - clock-names ··· 143 112 - resets 144 113 - reset-names 145 114 146 - else: 115 + - if: 147 116 properties: 117 + compatible: 118 + contains: 119 + const: renesas,r7s72100-dmac 120 + then: 121 + properties: 122 + reg: 123 + minItems: 2 124 + 148 125 clocks: false 149 126 clock-names: false 150 127 power-domains: false 151 128 resets: false 152 129 reset-names: false 130 + renesas,icu: false 131 + 132 + - if: 133 + properties: 134 + compatible: 135 + contains: 136 + const: renesas,r9a09g057-dmac 137 + then: 138 + properties: 139 + reg: 140 + maxItems: 1 141 + clocks: 142 + maxItems: 1 143 + resets: 144 + maxItems: 1 145 + 146 + clock-names: false 147 + reset-names: false 148 + 149 + required: 150 + - clocks 151 + - power-domains 152 + - renesas,icu 153 + - resets 153 154 154 155 additionalProperties: false 155 156