Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

Merge branch 'mlx5-misc-2023-07-08-sf-max-eq'

Saeed Mahameed says:

====================
mlx5 misc 2023-07-08 (sf max eq)

Link: https://patchwork.kernel.org/project/netdevbpf/patch/20240708080025.1593555-2-tariqt@nvidia.com/
====================

Link: https://patch.msgid.link/20240712003310.355106-1-saeed@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

+41 -12
+5 -2
drivers/net/ethernet/mellanox/mlx5/core/eq.c
··· 1187 1187 { 1188 1188 struct mlx5_eq_table *eq_table = dev->priv.eq_table; 1189 1189 int max_dev_eqs; 1190 - int max_eqs_sf; 1191 1190 int num_eqs; 1192 1191 1193 1192 /* If ethernet is disabled we use just a single completion vector to ··· 1201 1202 num_eqs = min_t(int, mlx5_irq_table_get_num_comp(eq_table->irq_table), 1202 1203 max_dev_eqs - MLX5_MAX_ASYNC_EQS); 1203 1204 if (mlx5_core_is_sf(dev)) { 1204 - max_eqs_sf = min_t(int, MLX5_COMP_EQS_PER_SF, 1205 + int max_eqs_sf = MLX5_CAP_GEN_2(dev, sf_eq_usage) ? 1206 + MLX5_CAP_GEN_2(dev, max_num_eqs_24b) : 1207 + MLX5_COMP_EQS_PER_SF; 1208 + 1209 + max_eqs_sf = min_t(int, max_eqs_sf, 1205 1210 mlx5_irq_table_get_sfs_vec(eq_table->irq_table)); 1206 1211 num_eqs = min_t(int, num_eqs, max_eqs_sf); 1207 1212 }
+3
drivers/net/ethernet/mellanox/mlx5/core/eswitch.h
··· 223 223 224 224 u16 vport; 225 225 bool enabled; 226 + bool max_eqs_set; 226 227 enum mlx5_eswitch_vport_event enabled_events; 227 228 int index; 228 229 struct mlx5_devlink_port *dl_port; ··· 580 579 int mlx5_devlink_port_fn_max_io_eqs_set(struct devlink_port *port, 581 580 u32 max_io_eqs, 582 581 struct netlink_ext_ack *extack); 582 + int mlx5_devlink_port_fn_max_io_eqs_set_sf_default(struct devlink_port *port, 583 + struct netlink_ext_ack *extack); 583 584 584 585 void *mlx5_eswitch_get_uplink_priv(struct mlx5_eswitch *esw, u8 rep_type); 585 586
+14 -1
drivers/net/ethernet/mellanox/mlx5/core/eswitch_offloads.c
··· 68 68 #define MLX5_ESW_FT_OFFLOADS_DROP_RULE (1) 69 69 70 70 #define MLX5_ESW_MAX_CTRL_EQS 4 71 + #define MLX5_ESW_DEFAULT_SF_COMP_EQS 8 71 72 72 73 static struct esw_vport_tbl_namespace mlx5_esw_vport_tbl_mirror_ns = { 73 74 .max_fte = MLX5_ESW_VPORT_TBL_SIZE, ··· 4677 4676 hca_caps = MLX5_ADDR_OF(query_hca_cap_out, query_ctx, capability); 4678 4677 MLX5_SET(cmd_hca_cap_2, hca_caps, max_num_eqs_24b, max_eqs); 4679 4678 4679 + if (mlx5_esw_is_sf_vport(esw, vport_num)) 4680 + MLX5_SET(cmd_hca_cap_2, hca_caps, sf_eq_usage, 1); 4681 + 4680 4682 err = mlx5_vport_set_other_func_cap(esw->dev, hca_caps, vport_num, 4681 4683 MLX5_SET_HCA_CAP_OP_MOD_GENERAL_DEVICE2); 4682 4684 if (err) 4683 4685 NL_SET_ERR_MSG_MOD(extack, "Failed setting HCA caps"); 4684 - 4686 + vport->max_eqs_set = true; 4685 4687 out: 4686 4688 mutex_unlock(&esw->state_lock); 4687 4689 kfree(query_ctx); 4688 4690 return err; 4691 + } 4692 + 4693 + int 4694 + mlx5_devlink_port_fn_max_io_eqs_set_sf_default(struct devlink_port *port, 4695 + struct netlink_ext_ack *extack) 4696 + { 4697 + return mlx5_devlink_port_fn_max_io_eqs_set(port, 4698 + MLX5_ESW_DEFAULT_SF_COMP_EQS, 4699 + extack); 4689 4700 }
+4 -8
drivers/net/ethernet/mellanox/mlx5/core/pci_irq.c
··· 16 16 #endif 17 17 18 18 #define MLX5_SFS_PER_CTRL_IRQ 64 19 + #define MLX5_MAX_MSIX_PER_SF 256 19 20 #define MLX5_IRQ_CTRL_SF_MAX 8 20 21 /* min num of vectors for SFs to be enabled */ 21 22 #define MLX5_IRQ_VEC_COMP_BASE_SF 2 ··· 590 589 static int irq_pools_init(struct mlx5_core_dev *dev, int sf_vec, int pcif_vec) 591 590 { 592 591 struct mlx5_irq_table *table = dev->priv.irq_table; 593 - int num_sf_ctrl_by_msix; 594 - int num_sf_ctrl_by_sfs; 595 592 int num_sf_ctrl; 596 593 int err; 597 594 ··· 607 608 } 608 609 609 610 /* init sf_ctrl_pool */ 610 - num_sf_ctrl_by_msix = DIV_ROUND_UP(sf_vec, MLX5_COMP_EQS_PER_SF); 611 - num_sf_ctrl_by_sfs = DIV_ROUND_UP(mlx5_sf_max_functions(dev), 612 - MLX5_SFS_PER_CTRL_IRQ); 613 - num_sf_ctrl = min_t(int, num_sf_ctrl_by_msix, num_sf_ctrl_by_sfs); 611 + num_sf_ctrl = DIV_ROUND_UP(mlx5_sf_max_functions(dev), 612 + MLX5_SFS_PER_CTRL_IRQ); 614 613 num_sf_ctrl = min_t(int, MLX5_IRQ_CTRL_SF_MAX, num_sf_ctrl); 615 614 table->sf_ctrl_pool = irq_pool_alloc(dev, pcif_vec, num_sf_ctrl, 616 615 "mlx5_sf_ctrl", ··· 723 726 724 727 total_vec = pcif_vec; 725 728 if (mlx5_sf_max_functions(dev)) 726 - total_vec += MLX5_IRQ_CTRL_SF_MAX + 727 - MLX5_COMP_EQS_PER_SF * mlx5_sf_max_functions(dev); 729 + total_vec += MLX5_MAX_MSIX_PER_SF * mlx5_sf_max_functions(dev); 728 730 total_vec = min_t(int, total_vec, pci_msix_vec_count(dev->pdev)); 729 731 pcif_vec = min_t(int, pcif_vec, pci_msix_vec_count(dev->pdev)); 730 732
+12
drivers/net/ethernet/mellanox/mlx5/core/sf/devlink.c
··· 161 161 static int mlx5_sf_activate(struct mlx5_core_dev *dev, struct mlx5_sf *sf, 162 162 struct netlink_ext_ack *extack) 163 163 { 164 + struct mlx5_vport *vport; 164 165 int err; 165 166 166 167 if (mlx5_sf_is_active(sf)) ··· 171 170 return -EBUSY; 172 171 } 173 172 173 + vport = mlx5_devlink_port_vport_get(&sf->dl_port.dl_port); 174 + if (!vport->max_eqs_set && MLX5_CAP_GEN_2(dev, max_num_eqs_24b)) { 175 + err = mlx5_devlink_port_fn_max_io_eqs_set_sf_default(&sf->dl_port.dl_port, 176 + extack); 177 + if (err) 178 + return err; 179 + } 174 180 err = mlx5_cmd_sf_enable_hca(dev, sf->hw_fn_id); 175 181 if (err) 176 182 return err; ··· 326 318 327 319 static void mlx5_sf_dealloc(struct mlx5_sf_table *table, struct mlx5_sf *sf) 328 320 { 321 + struct mlx5_vport *vport; 322 + 329 323 mutex_lock(&table->sf_state_lock); 324 + vport = mlx5_devlink_port_vport_get(&sf->dl_port.dl_port); 325 + vport->max_eqs_set = false; 330 326 331 327 mlx5_sf_function_id_erase(table, sf); 332 328
+3 -1
include/linux/mlx5/mlx5_ifc.h
··· 1994 1994 u8 migration_tracking_state[0x1]; 1995 1995 u8 reserved_at_ca[0x6]; 1996 1996 u8 migration_in_chunks[0x1]; 1997 - u8 reserved_at_d1[0xf]; 1997 + u8 reserved_at_d1[0x1]; 1998 + u8 sf_eq_usage[0x1]; 1999 + u8 reserved_at_d3[0xd]; 1998 2000 1999 2001 u8 cross_vhca_object_to_object_supported[0x20]; 2000 2002