tjh.dev / kernel
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Merge branch '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue

Tony Nguyen says:

====================
Intel Wired LAN Driver Updates 2024-10-08 (ice, iavf, igb, e1000e, e1000)

This series contains updates to ice, iavf, igb, e1000e, and e1000
drivers.

For ice:

Wojciech adds support for ethtool reset.

Paul adds support for hardware based VF mailbox limits for E830 devices.

Jake adjusts to a common iterator in ice_vc_cfg_qs_msg() and moves
storing of max_frame and rx_buf_len from VSI struct to the ring
structure.

Hongbo Li uses assign_bit() to replace an open-coded instance.

Markus Elfring adjusts a couple of PTP error paths to use a common,
shared exit point.

Yue Haibing removes unused declarations.

For iavf:

Yue Haibing removes unused declarations.

For igb:

Yue Haibing removes unused declarations.

For e1000e:

Takamitsu Iwai removes unneccessary writel() calls.

Joe Damato adds support for netdev-genl support to query IRQ, NAPI,
and queue information.

For e1000:

Joe Damato adds support for netdev-genl support to query IRQ, NAPI,
and queue information.

* '100GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue:
e1000: Link NAPI instances to queues and IRQs
e1000e: Link NAPI instances to queues and IRQs
e1000e: Remove duplicated writel() in e1000_configure_tx/rx()
igb: Cleanup unused declarations
iavf: Remove unused declarations
ice: Cleanup unused declarations
ice: Use common error handling code in two functions
ice: Make use of assign_bit() API
ice: store max_frame and rx_buf_len only in ice_rx_ring
ice: consistently use q_idx in ice_vc_cfg_qs_msg()
ice: add E830 HW VF mailbox message limit support
ice: Implement ethtool reset support
====================

Link: https://patch.msgid.link/20241008233441.928802-1-anthony.l.nguyen@intel.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

Jakub Kicinski 22ee378e 80c549cd

+269 -100
+31
Documentation/networking/device_drivers/ethernet/intel/ice.rst
··· 101 101 rx_bytes as "X", then ethtool (hardware statistics) will display rx_bytes as 102 102 "X+40" (4 bytes CRC x 10 packets). 103 103 104 + ethtool reset 105 + ------------- 106 + The driver supports 3 types of resets: 107 + 108 + - PF reset - resets only components associated with the given PF, does not 109 + impact other PFs 110 + 111 + - CORE reset - whole adapter is affected, reset all PFs 112 + 113 + - GLOBAL reset - same as CORE but mac and phy components are also reinitialized 114 + 115 + These are mapped to ethtool reset flags as follow: 116 + 117 + - PF reset: 118 + 119 + # ethtool --reset <ethX> irq dma filter offload 120 + 121 + - CORE reset: 122 + 123 + # ethtool --reset <ethX> irq-shared dma-shared filter-shared offload-shared \ 124 + ram-shared 125 + 126 + - GLOBAL reset: 127 + 128 + # ethtool --reset <ethX> irq-shared dma-shared filter-shared offload-shared \ 129 + mac-shared phy-shared ram-shared 130 + 131 + In switchdev mode you can reset a VF using port representor: 132 + 133 + # ethtool --reset <repr> irq dma filter offload 134 + 104 135 105 136 Viewing Link Messages 106 137 ---------------------
+5
drivers/net/ethernet/intel/e1000/e1000_main.c
··· 513 513 */ 514 514 netif_carrier_off(netdev); 515 515 516 + netif_queue_set_napi(netdev, 0, NETDEV_QUEUE_TYPE_RX, NULL); 517 + netif_queue_set_napi(netdev, 0, NETDEV_QUEUE_TYPE_TX, NULL); 516 518 napi_disable(&adapter->napi); 517 519 518 520 e1000_irq_disable(adapter); ··· 1394 1392 /* From here on the code is the same as e1000_up() */ 1395 1393 clear_bit(__E1000_DOWN, &adapter->flags); 1396 1394 1395 + netif_napi_set_irq(&adapter->napi, adapter->pdev->irq); 1397 1396 napi_enable(&adapter->napi); 1397 + netif_queue_set_napi(netdev, 0, NETDEV_QUEUE_TYPE_RX, &adapter->napi); 1398 + netif_queue_set_napi(netdev, 0, NETDEV_QUEUE_TYPE_TX, &adapter->napi); 1398 1399 1399 1400 e1000_irq_enable(adapter); 1400 1401
+11 -6
drivers/net/ethernet/intel/e1000e/netdev.c
··· 2928 2928 tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0); 2929 2929 tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0); 2930 2930 2931 - writel(0, tx_ring->head); 2932 2931 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 2933 2932 e1000e_update_tdt_wa(tx_ring, 0); 2934 - else 2935 - writel(0, tx_ring->tail); 2936 2933 2937 2934 /* Set the Tx Interrupt Delay register */ 2938 2935 ew32(TIDV, adapter->tx_int_delay); ··· 3250 3253 rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0); 3251 3254 rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0); 3252 3255 3253 - writel(0, rx_ring->head); 3254 3256 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA) 3255 3257 e1000e_update_rdt_wa(rx_ring, 0); 3256 - else 3257 - writel(0, rx_ring->tail); 3258 3258 3259 3259 /* Enable Receive Checksum Offload for TCP and UDP */ 3260 3260 rxcsum = er32(RXCSUM); ··· 4607 4613 struct e1000_hw *hw = &adapter->hw; 4608 4614 struct pci_dev *pdev = adapter->pdev; 4609 4615 int err; 4616 + int irq; 4610 4617 4611 4618 /* disallow open during test */ 4612 4619 if (test_bit(__E1000_TESTING, &adapter->state)) ··· 4671 4676 /* From here on the code is the same as e1000e_up() */ 4672 4677 clear_bit(__E1000_DOWN, &adapter->state); 4673 4678 4679 + if (adapter->int_mode == E1000E_INT_MODE_MSIX) 4680 + irq = adapter->msix_entries[0].vector; 4681 + else 4682 + irq = adapter->pdev->irq; 4683 + 4684 + netif_napi_set_irq(&adapter->napi, irq); 4674 4685 napi_enable(&adapter->napi); 4686 + netif_queue_set_napi(netdev, 0, NETDEV_QUEUE_TYPE_RX, &adapter->napi); 4687 + netif_queue_set_napi(netdev, 0, NETDEV_QUEUE_TYPE_TX, &adapter->napi); 4675 4688 4676 4689 e1000_irq_enable(adapter); 4677 4690 ··· 4738 4735 netdev_info(netdev, "NIC Link is Down\n"); 4739 4736 } 4740 4737 4738 + netif_queue_set_napi(netdev, 0, NETDEV_QUEUE_TYPE_RX, NULL); 4739 + netif_queue_set_napi(netdev, 0, NETDEV_QUEUE_TYPE_TX, NULL); 4741 4740 napi_disable(&adapter->napi); 4742 4741 4743 4742 e1000e_free_tx_resources(adapter->tx_ring);
-10
drivers/net/ethernet/intel/iavf/iavf.h
··· 529 529 iavf_state_str(adapter->state)); 530 530 } 531 531 532 - int iavf_up(struct iavf_adapter *adapter); 533 532 void iavf_down(struct iavf_adapter *adapter); 534 533 int iavf_process_config(struct iavf_adapter *adapter); 535 534 int iavf_parse_vf_resource_msg(struct iavf_adapter *adapter); 536 535 void iavf_schedule_reset(struct iavf_adapter *adapter, u64 flags); 537 536 void iavf_schedule_aq_request(struct iavf_adapter *adapter, u64 flags); 538 537 void iavf_schedule_finish_config(struct iavf_adapter *adapter); 539 - void iavf_reset(struct iavf_adapter *adapter); 540 538 void iavf_set_ethtool_ops(struct net_device *netdev); 541 - void iavf_update_stats(struct iavf_adapter *adapter); 542 539 void iavf_free_all_tx_resources(struct iavf_adapter *adapter); 543 540 void iavf_free_all_rx_resources(struct iavf_adapter *adapter); 544 - 545 - void iavf_napi_add_all(struct iavf_adapter *adapter); 546 - void iavf_napi_del_all(struct iavf_adapter *adapter); 547 541 548 542 int iavf_send_api_ver(struct iavf_adapter *adapter); 549 543 int iavf_verify_api_ver(struct iavf_adapter *adapter); ··· 549 555 u16 iavf_get_num_vlans_added(struct iavf_adapter *adapter); 550 556 void iavf_irq_enable(struct iavf_adapter *adapter, bool flush); 551 557 void iavf_configure_queues(struct iavf_adapter *adapter); 552 - void iavf_deconfigure_queues(struct iavf_adapter *adapter); 553 558 void iavf_enable_queues(struct iavf_adapter *adapter); 554 559 void iavf_disable_queues(struct iavf_adapter *adapter); 555 560 void iavf_map_queues(struct iavf_adapter *adapter); 556 - int iavf_request_queues(struct iavf_adapter *adapter, int num); 557 561 void iavf_add_ether_addrs(struct iavf_adapter *adapter); 558 562 void iavf_del_ether_addrs(struct iavf_adapter *adapter); 559 563 void iavf_add_vlans(struct iavf_adapter *adapter); ··· 571 579 enum virtchnl_ops v_opcode, 572 580 enum iavf_status v_retval, u8 *msg, u16 msglen); 573 581 int iavf_config_rss(struct iavf_adapter *adapter); 574 - int iavf_lan_add_device(struct iavf_adapter *adapter); 575 - int iavf_lan_del_device(struct iavf_adapter *adapter); 576 582 void iavf_enable_channels(struct iavf_adapter *adapter); 577 583 void iavf_disable_channels(struct iavf_adapter *adapter); 578 584 void iavf_add_cloud_filter(struct iavf_adapter *adapter);
-3
drivers/net/ethernet/intel/iavf/iavf_prototype.h
··· 18 18 /* adminq functions */ 19 19 enum iavf_status iavf_init_adminq(struct iavf_hw *hw); 20 20 enum iavf_status iavf_shutdown_adminq(struct iavf_hw *hw); 21 - void iavf_adminq_init_ring_data(struct iavf_hw *hw); 22 21 enum iavf_status iavf_clean_arq_element(struct iavf_hw *hw, 23 22 struct iavf_arq_event_info *e, 24 23 u16 *events_pending); ··· 32 33 void iavf_debug_aq(struct iavf_hw *hw, enum iavf_debug_mask mask, 33 34 void *desc, void *buffer, u16 buf_len); 34 35 35 - void iavf_idle_aq(struct iavf_hw *hw); 36 - void iavf_resume_aq(struct iavf_hw *hw); 37 36 bool iavf_check_asq_alive(struct iavf_hw *hw); 38 37 enum iavf_status iavf_aq_queue_shutdown(struct iavf_hw *hw, bool unloading); 39 38 const char *iavf_aq_str(struct iavf_hw *hw, enum iavf_admin_queue_err aq_err);
+1 -3
drivers/net/ethernet/intel/ice/ice.h
··· 207 207 ICE_F_GNSS, 208 208 ICE_F_ROCE_LAG, 209 209 ICE_F_SRIOV_LAG, 210 + ICE_F_MBX_LIMIT, 210 211 ICE_F_MAX 211 212 }; 212 213 ··· 371 370 struct ice_arfs_active_fltr_cntrs *arfs_fltr_cntrs; 372 371 spinlock_t arfs_lock; /* protects aRFS hash table and filter state */ 373 372 atomic_t *arfs_last_fltr_id; 374 - 375 - u16 max_frame; 376 - u16 rx_buf_len; 377 373 378 374 struct ice_aqc_vsi_props info; /* VSI properties */ 379 375 struct ice_vsi_vlan_info vlan_info; /* vlan config to be restored */
+18 -16
drivers/net/ethernet/intel/ice/ice_base.c
··· 445 445 /* Max packet size for this queue - must not be set to a larger value 446 446 * than 5 x DBUF 447 447 */ 448 - rlan_ctx.rxmax = min_t(u32, vsi->max_frame, 448 + rlan_ctx.rxmax = min_t(u32, ring->max_frame, 449 449 ICE_MAX_CHAINED_RX_BUFS * ring->rx_buf_len); 450 450 451 451 /* Rx queue threshold in units of 64 */ ··· 540 540 struct device *dev = ice_pf_to_dev(ring->vsi->back); 541 541 u32 num_bufs = ICE_RX_DESC_UNUSED(ring); 542 542 int err; 543 - 544 - ring->rx_buf_len = ring->vsi->rx_buf_len; 545 543 546 544 if (ring->vsi->type == ICE_VSI_PF || ring->vsi->type == ICE_VSI_SF) { 547 545 if (!xdp_rxq_info_is_reg(&ring->xdp_rxq)) { ··· 639 641 /** 640 642 * ice_vsi_cfg_frame_size - setup max frame size and Rx buffer length 641 643 * @vsi: VSI 644 + * @ring: Rx ring to configure 645 + * 646 + * Determine the maximum frame size and Rx buffer length to use for a PF VSI. 647 + * Set these in the associated Rx ring structure. 642 648 */ 643 - static void ice_vsi_cfg_frame_size(struct ice_vsi *vsi) 649 + static void ice_vsi_cfg_frame_size(struct ice_vsi *vsi, struct ice_rx_ring *ring) 644 650 { 645 651 if (!vsi->netdev || test_bit(ICE_FLAG_LEGACY_RX, vsi->back->flags)) { 646 - vsi->max_frame = ICE_MAX_FRAME_LEGACY_RX; 647 - vsi->rx_buf_len = ICE_RXBUF_1664; 652 + ring->max_frame = ICE_MAX_FRAME_LEGACY_RX; 653 + ring->rx_buf_len = ICE_RXBUF_1664; 648 654 #if (PAGE_SIZE < 8192) 649 655 } else if (!ICE_2K_TOO_SMALL_WITH_PADDING && 650 656 (vsi->netdev->mtu <= ETH_DATA_LEN)) { 651 - vsi->max_frame = ICE_RXBUF_1536 - NET_IP_ALIGN; 652 - vsi->rx_buf_len = ICE_RXBUF_1536 - NET_IP_ALIGN; 657 + ring->max_frame = ICE_RXBUF_1536 - NET_IP_ALIGN; 658 + ring->rx_buf_len = ICE_RXBUF_1536 - NET_IP_ALIGN; 653 659 #endif 654 660 } else { 655 - vsi->max_frame = ICE_AQ_SET_MAC_FRAME_SIZE_MAX; 656 - vsi->rx_buf_len = ICE_RXBUF_3072; 661 + ring->max_frame = ICE_AQ_SET_MAC_FRAME_SIZE_MAX; 662 + ring->rx_buf_len = ICE_RXBUF_3072; 657 663 } 658 664 } 659 665 ··· 672 670 { 673 671 u16 i; 674 672 675 - if (vsi->type == ICE_VSI_VF) 676 - goto setup_rings; 677 - 678 - ice_vsi_cfg_frame_size(vsi); 679 - setup_rings: 680 673 /* set up individual rings */ 681 674 ice_for_each_rxq(vsi, i) { 682 - int err = ice_vsi_cfg_rxq(vsi->rx_rings[i]); 675 + struct ice_rx_ring *ring = vsi->rx_rings[i]; 676 + int err; 683 677 678 + if (vsi->type != ICE_VSI_VF) 679 + ice_vsi_cfg_frame_size(vsi, ring); 680 + 681 + err = ice_vsi_cfg_rxq(ring); 684 682 if (err) 685 683 return err; 686 684 }
-5
drivers/net/ethernet/intel/ice/ice_eswitch.h
··· 60 60 static inline void 61 61 ice_eswitch_update_repr(unsigned long *repr_id, struct ice_vsi *vsi) { } 62 62 63 - static inline int ice_eswitch_configure(struct ice_pf *pf) 64 - { 65 - return 0; 66 - } 67 - 68 63 static inline int ice_eswitch_mode_get(struct devlink *devlink, u16 *mode) 69 64 { 70 65 return DEVLINK_ESWITCH_MODE_LEGACY;
+77
drivers/net/ethernet/intel/ice/ice_ethtool.c
··· 4716 4716 pi->lport, err); 4717 4717 } 4718 4718 4719 + #define ICE_ETHTOOL_PFR (ETH_RESET_IRQ | ETH_RESET_DMA | \ 4720 + ETH_RESET_FILTER | ETH_RESET_OFFLOAD) 4721 + 4722 + #define ICE_ETHTOOL_CORER ((ICE_ETHTOOL_PFR | ETH_RESET_RAM) << \ 4723 + ETH_RESET_SHARED_SHIFT) 4724 + 4725 + #define ICE_ETHTOOL_GLOBR (ICE_ETHTOOL_CORER | \ 4726 + (ETH_RESET_MAC << ETH_RESET_SHARED_SHIFT) | \ 4727 + (ETH_RESET_PHY << ETH_RESET_SHARED_SHIFT)) 4728 + 4729 + #define ICE_ETHTOOL_VFR ICE_ETHTOOL_PFR 4730 + 4731 + /** 4732 + * ice_ethtool_reset - triggers a given type of reset 4733 + * @dev: network interface device structure 4734 + * @flags: set of reset flags 4735 + * 4736 + * Return: 0 on success, -EOPNOTSUPP when using unsupported set of flags. 4737 + */ 4738 + static int ice_ethtool_reset(struct net_device *dev, u32 *flags) 4739 + { 4740 + struct ice_netdev_priv *np = netdev_priv(dev); 4741 + struct ice_pf *pf = np->vsi->back; 4742 + enum ice_reset_req reset; 4743 + 4744 + switch (*flags) { 4745 + case ICE_ETHTOOL_CORER: 4746 + reset = ICE_RESET_CORER; 4747 + break; 4748 + case ICE_ETHTOOL_GLOBR: 4749 + reset = ICE_RESET_GLOBR; 4750 + break; 4751 + case ICE_ETHTOOL_PFR: 4752 + reset = ICE_RESET_PFR; 4753 + break; 4754 + default: 4755 + netdev_info(dev, "Unsupported set of ethtool flags"); 4756 + return -EOPNOTSUPP; 4757 + } 4758 + 4759 + ice_schedule_reset(pf, reset); 4760 + 4761 + *flags = 0; 4762 + 4763 + return 0; 4764 + } 4765 + 4766 + /** 4767 + * ice_repr_ethtool_reset - triggers a VF reset 4768 + * @dev: network interface device structure 4769 + * @flags: set of reset flags 4770 + * 4771 + * Return: 0 on success, 4772 + * -EOPNOTSUPP when using unsupported set of flags 4773 + * -EBUSY when VF is not ready for reset. 4774 + */ 4775 + static int ice_repr_ethtool_reset(struct net_device *dev, u32 *flags) 4776 + { 4777 + struct ice_repr *repr = ice_netdev_to_repr(dev); 4778 + struct ice_vf *vf; 4779 + 4780 + if (repr->type != ICE_REPR_TYPE_VF || 4781 + *flags != ICE_ETHTOOL_VFR) 4782 + return -EOPNOTSUPP; 4783 + 4784 + vf = repr->vf; 4785 + 4786 + if (ice_check_vf_ready_for_cfg(vf)) 4787 + return -EBUSY; 4788 + 4789 + *flags = 0; 4790 + 4791 + return ice_reset_vf(vf, ICE_VF_RESET_VFLR | ICE_VF_RESET_LOCK); 4792 + } 4793 + 4719 4794 static const struct ethtool_ops ice_ethtool_ops = { 4720 4795 .cap_rss_ctx_supported = true, 4721 4796 .supported_coalesce_params = ETHTOOL_COALESCE_USECS | ··· 4827 4752 .nway_reset = ice_nway_reset, 4828 4753 .get_pauseparam = ice_get_pauseparam, 4829 4754 .set_pauseparam = ice_set_pauseparam, 4755 + .reset = ice_ethtool_reset, 4830 4756 .get_rxfh_key_size = ice_get_rxfh_key_size, 4831 4757 .get_rxfh_indir_size = ice_get_rxfh_indir_size, 4832 4758 .get_rxfh = ice_get_rxfh, ··· 4880 4804 .get_strings = ice_repr_get_strings, 4881 4805 .get_ethtool_stats = ice_repr_get_ethtool_stats, 4882 4806 .get_sset_count = ice_repr_get_sset_count, 4807 + .reset = ice_repr_ethtool_reset, 4883 4808 }; 4884 4809 4885 4810 /**
-3
drivers/net/ethernet/intel/ice/ice_flex_pipe.h
··· 23 23 ice_get_sw_fv_list(struct ice_hw *hw, struct ice_prot_lkup_ext *lkups, 24 24 unsigned long *bm, struct list_head *fv_list); 25 25 int 26 - ice_pkg_buf_unreserve_section(struct ice_buf_build *bld, u16 count); 27 - u16 ice_pkg_buf_get_free_space(struct ice_buf_build *bld); 28 - int 29 26 ice_aq_upload_section(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf, 30 27 u16 buf_size, struct ice_sq_cd *cd); 31 28 bool
+3
drivers/net/ethernet/intel/ice/ice_hw_autogen.h
··· 539 539 #define E830_PRTMAC_CL01_QNT_THR_CL0_M GENMASK(15, 0) 540 540 #define VFINT_DYN_CTLN(_i) (0x00003800 + ((_i) * 4)) 541 541 #define VFINT_DYN_CTLN_CLEARPBA_M BIT(1) 542 + #define E830_MBX_PF_IN_FLIGHT_VF_MSGS_THRESH 0x00234000 543 + #define E830_MBX_VF_DEC_TRIG(_VF) (0x00233800 + (_VF) * 4) 544 + #define E830_MBX_VF_IN_FLIGHT_MSGS_AT_PF_CNT(_VF) (0x00233000 + (_VF) * 4) 542 545 543 546 #endif /* _ICE_HW_AUTOGEN_H_ */
+3
drivers/net/ethernet/intel/ice/ice_lib.c
··· 3880 3880 default: 3881 3881 break; 3882 3882 } 3883 + 3884 + if (pf->hw.mac_type == ICE_MAC_E830) 3885 + ice_set_feature_support(pf, ICE_F_MBX_LIMIT); 3883 3886 } 3884 3887 3885 3888 /**
-2
drivers/net/ethernet/intel/ice/ice_lib.h
··· 88 88 void ice_write_itr(struct ice_ring_container *rc, u16 itr); 89 89 void ice_set_q_vector_intrl(struct ice_q_vector *q_vector); 90 90 91 - int ice_vsi_cfg_mac_fltr(struct ice_vsi *vsi, const u8 *macaddr, bool set); 92 - 93 91 bool ice_is_safe_mode(struct ice_pf *pf); 94 92 bool ice_is_rdma_ena(struct ice_pf *pf); 95 93 bool ice_is_dflt_vsi_in_use(struct ice_port_info *pi);
+19 -8
drivers/net/ethernet/intel/ice/ice_main.c
··· 1563 1563 ice_vf_lan_overflow_event(pf, &event); 1564 1564 break; 1565 1565 case ice_mbx_opc_send_msg_to_pf: 1566 - data.num_msg_proc = i; 1567 - data.num_pending_arq = pending; 1568 - data.max_num_msgs_mbx = hw->mailboxq.num_rq_entries; 1569 - data.async_watermark_val = ICE_MBX_OVERFLOW_WATERMARK; 1566 + if (ice_is_feature_supported(pf, ICE_F_MBX_LIMIT)) { 1567 + ice_vc_process_vf_msg(pf, &event, NULL); 1568 + ice_mbx_vf_dec_trig_e830(hw, &event); 1569 + } else { 1570 + u16 val = hw->mailboxq.num_rq_entries; 1570 1571 1571 - ice_vc_process_vf_msg(pf, &event, &data); 1572 + data.max_num_msgs_mbx = val; 1573 + val = ICE_MBX_OVERFLOW_WATERMARK; 1574 + data.async_watermark_val = val; 1575 + data.num_msg_proc = i; 1576 + data.num_pending_arq = pending; 1577 + 1578 + ice_vc_process_vf_msg(pf, &event, &data); 1579 + } 1572 1580 break; 1573 1581 case ice_aqc_opc_fw_logs_event: 1574 1582 ice_get_fwlog_data(pf, &event); ··· 4107 4099 4108 4100 mutex_init(&pf->vfs.table_lock); 4109 4101 hash_init(pf->vfs.table); 4110 - ice_mbx_init_snapshot(&pf->hw); 4102 + if (ice_is_feature_supported(pf, ICE_F_MBX_LIMIT)) 4103 + wr32(&pf->hw, E830_MBX_PF_IN_FLIGHT_VF_MSGS_THRESH, 4104 + ICE_MBX_OVERFLOW_WATERMARK); 4105 + else 4106 + ice_mbx_init_snapshot(&pf->hw); 4111 4107 4112 4108 xa_init(&pf->dyn_ports); 4113 4109 xa_init(&pf->sf_nums); ··· 6549 6537 if (changed & NETIF_F_HW_TC) { 6550 6538 bool ena = !!(features & NETIF_F_HW_TC); 6551 6539 6552 - ena ? set_bit(ICE_FLAG_CLS_FLOWER, pf->flags) : 6553 - clear_bit(ICE_FLAG_CLS_FLOWER, pf->flags); 6540 + assign_bit(ICE_FLAG_CLS_FLOWER, pf->flags, ena); 6554 6541 } 6555 6542 6556 6543 if (changed & NETIF_F_LOOPBACK)
+16 -16
drivers/net/ethernet/intel/ice/ice_ptp.c
··· 2857 2857 2858 2858 /* Write the increment time value to PHY and LAN */ 2859 2859 err = ice_ptp_write_incval(hw, ice_base_incval(pf)); 2860 - if (err) { 2861 - ice_ptp_unlock(hw); 2862 - return err; 2863 - } 2860 + if (err) 2861 + goto err_unlock; 2864 2862 2865 2863 /* Write the initial Time value to PHY and LAN using the cached PHC 2866 2864 * time before the reset and time difference between stopping and ··· 2871 2873 ts = ktime_to_timespec64(ktime_get_real()); 2872 2874 } 2873 2875 err = ice_ptp_write_init(pf, &ts); 2874 - if (err) { 2875 - ice_ptp_unlock(hw); 2876 - return err; 2877 - } 2876 + if (err) 2877 + goto err_unlock; 2878 2878 2879 2879 /* Release the global hardware lock */ 2880 2880 ice_ptp_unlock(hw); ··· 2896 2900 ice_ptp_enable_all_extts(pf); 2897 2901 2898 2902 return 0; 2903 + 2904 + err_unlock: 2905 + ice_ptp_unlock(hw); 2906 + return err; 2899 2907 } 2900 2908 2901 2909 /** ··· 3032 3032 3033 3033 /* Write the increment time value to PHY and LAN */ 3034 3034 err = ice_ptp_write_incval(hw, ice_base_incval(pf)); 3035 - if (err) { 3036 - ice_ptp_unlock(hw); 3037 - goto err_exit; 3038 - } 3035 + if (err) 3036 + goto err_unlock; 3039 3037 3040 3038 ts = ktime_to_timespec64(ktime_get_real()); 3041 3039 /* Write the initial Time value to PHY and LAN */ 3042 3040 err = ice_ptp_write_init(pf, &ts); 3043 - if (err) { 3044 - ice_ptp_unlock(hw); 3045 - goto err_exit; 3046 - } 3041 + if (err) 3042 + goto err_unlock; 3047 3043 3048 3044 /* Release the global hardware lock */ 3049 3045 ice_ptp_unlock(hw); ··· 3058 3062 err_clk: 3059 3063 pf->ptp.clock = NULL; 3060 3064 err_exit: 3065 + return err; 3066 + 3067 + err_unlock: 3068 + ice_ptp_unlock(hw); 3061 3069 return err; 3062 3070 } 3063 3071
-3
drivers/net/ethernet/intel/ice/ice_ptp_hw.h
··· 405 405 int ice_read_sma_ctrl(struct ice_hw *hw, u8 *data); 406 406 int ice_write_sma_ctrl(struct ice_hw *hw, u8 data); 407 407 int ice_read_pca9575_reg(struct ice_hw *hw, u8 offset, u8 *data); 408 - bool ice_is_pca9575_present(struct ice_hw *hw); 409 408 int ice_ptp_read_sdp_ac(struct ice_hw *hw, __le16 *entries, uint *num_entries); 410 409 enum dpll_pin_type ice_cgu_get_pin_type(struct ice_hw *hw, u8 pin, bool input); 411 410 struct dpll_pin_frequency * ··· 422 423 int ice_ptp_read_tx_hwtstamp_status_eth56g(struct ice_hw *hw, u32 *ts_status); 423 424 int ice_stop_phy_timer_eth56g(struct ice_hw *hw, u8 port, bool soft_reset); 424 425 int ice_start_phy_timer_eth56g(struct ice_hw *hw, u8 port); 425 - int ice_phy_cfg_tx_offset_eth56g(struct ice_hw *hw, u8 port); 426 - int ice_phy_cfg_rx_offset_eth56g(struct ice_hw *hw, u8 port); 427 426 int ice_phy_cfg_intr_eth56g(struct ice_hw *hw, u8 port, bool ena, u8 threshold); 428 427 int ice_phy_cfg_ptp_1step_eth56g(struct ice_hw *hw, u8 port); 429 428
+2 -1
drivers/net/ethernet/intel/ice/ice_sriov.c
··· 194 194 } 195 195 196 196 /* clear malicious info since the VF is getting released */ 197 - list_del(&vf->mbx_info.list_entry); 197 + if (!ice_is_feature_supported(pf, ICE_F_MBX_LIMIT)) 198 + list_del(&vf->mbx_info.list_entry); 198 199 199 200 mutex_unlock(&vf->cfg_lock); 200 201 }
+2 -1
drivers/net/ethernet/intel/ice/ice_txrx.h
··· 359 359 struct ice_rx_ring *next; /* pointer to next ring in q_vector */ 360 360 struct xsk_buff_pool *xsk_pool; 361 361 u32 nr_frags; 362 - dma_addr_t dma; /* physical address of ring */ 362 + u16 max_frame; 363 363 u16 rx_buf_len; 364 + dma_addr_t dma; /* physical address of ring */ 364 365 u8 dcb_tc; /* Traffic class of ring */ 365 366 u8 ptp_rx; 366 367 #define ICE_RX_FLAGS_RING_BUILD_SKB BIT(1)
-1
drivers/net/ethernet/intel/ice/ice_txrx_lib.h
··· 154 154 } 155 155 156 156 void ice_finalize_xdp_rx(struct ice_tx_ring *xdp_ring, unsigned int xdp_res, u32 first_idx); 157 - int ice_xmit_xdp_buff(struct xdp_buff *xdp, struct ice_tx_ring *xdp_ring); 158 157 int __ice_xmit_xdp_ring(struct xdp_buff *xdp, struct ice_tx_ring *xdp_ring, 159 158 bool frame); 160 159 void ice_release_rx_desc(struct ice_rx_ring *rx_ring, u16 val);
+23 -3
drivers/net/ethernet/intel/ice/ice_vf_lib.c
··· 710 710 } 711 711 712 712 /** 713 + * ice_reset_vf_mbx_cnt - reset VF mailbox message count 714 + * @vf: pointer to the VF structure 715 + * 716 + * This function clears the VF mailbox message count, and should be called on 717 + * VF reset. 718 + */ 719 + static void ice_reset_vf_mbx_cnt(struct ice_vf *vf) 720 + { 721 + struct ice_pf *pf = vf->pf; 722 + 723 + if (ice_is_feature_supported(pf, ICE_F_MBX_LIMIT)) 724 + ice_mbx_vf_clear_cnt_e830(&pf->hw, vf->vf_id); 725 + else 726 + ice_mbx_clear_malvf(&vf->mbx_info); 727 + } 728 + 729 + /** 713 730 * ice_reset_all_vfs - reset all allocated VFs in one go 714 731 * @pf: pointer to the PF structure 715 732 * ··· 752 735 753 736 /* clear all malicious info if the VFs are getting reset */ 754 737 ice_for_each_vf(pf, bkt, vf) 755 - ice_mbx_clear_malvf(&vf->mbx_info); 738 + ice_reset_vf_mbx_cnt(vf); 756 739 757 740 /* If VFs have been disabled, there is no need to reset */ 758 741 if (test_and_set_bit(ICE_VF_DIS, pf->state)) { ··· 968 951 ice_eswitch_update_repr(&vf->repr_id, vsi); 969 952 970 953 /* if the VF has been reset allow it to come up again */ 971 - ice_mbx_clear_malvf(&vf->mbx_info); 954 + ice_reset_vf_mbx_cnt(vf); 972 955 973 956 out_unlock: 974 957 if (lag && lag->bonded && lag->primary && ··· 1021 1004 ice_vf_fdir_init(vf); 1022 1005 1023 1006 /* Initialize mailbox info for this VF */ 1024 - ice_mbx_init_vf_info(&pf->hw, &vf->mbx_info); 1007 + if (ice_is_feature_supported(pf, ICE_F_MBX_LIMIT)) 1008 + ice_mbx_vf_clear_cnt_e830(&pf->hw, vf->vf_id); 1009 + else 1010 + ice_mbx_init_vf_info(&pf->hw, &vf->mbx_info); 1025 1011 1026 1012 mutex_init(&vf->cfg_lock); 1027 1013 }
+32
drivers/net/ethernet/intel/ice/ice_vf_mbx.c
··· 211 211 } 212 212 213 213 /** 214 + * ice_mbx_vf_dec_trig_e830 - Decrements the VF mailbox queue counter 215 + * @hw: pointer to the HW struct 216 + * @event: pointer to the control queue receive event 217 + * 218 + * This function triggers to decrement the counter 219 + * MBX_VF_IN_FLIGHT_MSGS_AT_PF_CNT when the driver replenishes 220 + * the buffers at the PF mailbox queue. 221 + */ 222 + void ice_mbx_vf_dec_trig_e830(const struct ice_hw *hw, 223 + const struct ice_rq_event_info *event) 224 + { 225 + u16 vfid = le16_to_cpu(event->desc.retval); 226 + 227 + wr32(hw, E830_MBX_VF_DEC_TRIG(vfid), 1); 228 + } 229 + 230 + /** 231 + * ice_mbx_vf_clear_cnt_e830 - Clear the VF mailbox queue count 232 + * @hw: pointer to the HW struct 233 + * @vf_id: VF ID in the PF space 234 + * 235 + * This function clears the counter MBX_VF_IN_FLIGHT_MSGS_AT_PF_CNT, and should 236 + * be called when a VF is created and on VF reset. 237 + */ 238 + void ice_mbx_vf_clear_cnt_e830(const struct ice_hw *hw, u16 vf_id) 239 + { 240 + u32 reg = rd32(hw, E830_MBX_VF_IN_FLIGHT_MSGS_AT_PF_CNT(vf_id)); 241 + 242 + wr32(hw, E830_MBX_VF_DEC_TRIG(vf_id), reg); 243 + } 244 + 245 + /** 214 246 * ice_mbx_vf_state_handler - Handle states of the overflow algorithm 215 247 * @hw: pointer to the HW struct 216 248 * @mbx_data: pointer to structure containing mailbox data
+9
drivers/net/ethernet/intel/ice/ice_vf_mbx.h
··· 19 19 u8 *msg, u16 msglen, struct ice_sq_cd *cd); 20 20 21 21 u32 ice_conv_link_speed_to_virtchnl(bool adv_link_support, u16 link_speed); 22 + void ice_mbx_vf_dec_trig_e830(const struct ice_hw *hw, 23 + const struct ice_rq_event_info *event); 24 + void ice_mbx_vf_clear_cnt_e830(const struct ice_hw *hw, u16 vf_id); 22 25 int 23 26 ice_mbx_vf_state_handler(struct ice_hw *hw, struct ice_mbx_data *mbx_data, 24 27 struct ice_mbx_vf_info *vf_info, bool *report_malvf); ··· 47 44 } 48 45 49 46 static inline void ice_mbx_init_snapshot(struct ice_hw *hw) 47 + { 48 + } 49 + 50 + static inline void 51 + ice_mbx_vf_dec_trig_e830(const struct ice_hw *hw, 52 + const struct ice_rq_event_info *event) 50 53 { 51 54 } 52 55
+17 -17
drivers/net/ethernet/intel/ice/ice_virtchnl.c
··· 1715 1715 1716 1716 /* copy Tx queue info from VF into VSI */ 1717 1717 if (qpi->txq.ring_len > 0) { 1718 - vsi->tx_rings[i]->dma = qpi->txq.dma_ring_addr; 1719 - vsi->tx_rings[i]->count = qpi->txq.ring_len; 1718 + vsi->tx_rings[q_idx]->dma = qpi->txq.dma_ring_addr; 1719 + vsi->tx_rings[q_idx]->count = qpi->txq.ring_len; 1720 1720 1721 1721 /* Disable any existing queue first */ 1722 1722 if (ice_vf_vsi_dis_single_txq(vf, vsi, q_idx)) ··· 1725 1725 /* Configure a queue with the requested settings */ 1726 1726 if (ice_vsi_cfg_single_txq(vsi, vsi->tx_rings, q_idx)) { 1727 1727 dev_warn(ice_pf_to_dev(pf), "VF-%d failed to configure TX queue %d\n", 1728 - vf->vf_id, i); 1728 + vf->vf_id, q_idx); 1729 1729 goto error_param; 1730 1730 } 1731 1731 } ··· 1733 1733 /* copy Rx queue info from VF into VSI */ 1734 1734 if (qpi->rxq.ring_len > 0) { 1735 1735 u16 max_frame_size = ice_vc_get_max_frame_size(vf); 1736 + struct ice_rx_ring *ring = vsi->rx_rings[q_idx]; 1736 1737 u32 rxdid; 1737 1738 1738 - vsi->rx_rings[i]->dma = qpi->rxq.dma_ring_addr; 1739 - vsi->rx_rings[i]->count = qpi->rxq.ring_len; 1739 + ring->dma = qpi->rxq.dma_ring_addr; 1740 + ring->count = qpi->rxq.ring_len; 1740 1741 1741 1742 if (qpi->rxq.crc_disable) 1742 - vsi->rx_rings[q_idx]->flags |= 1743 - ICE_RX_FLAGS_CRC_STRIP_DIS; 1743 + ring->flags |= ICE_RX_FLAGS_CRC_STRIP_DIS; 1744 1744 else 1745 - vsi->rx_rings[q_idx]->flags &= 1746 - ~ICE_RX_FLAGS_CRC_STRIP_DIS; 1745 + ring->flags &= ~ICE_RX_FLAGS_CRC_STRIP_DIS; 1747 1746 1748 1747 if (qpi->rxq.databuffer_size != 0 && 1749 1748 (qpi->rxq.databuffer_size > ((16 * 1024) - 128) || 1750 1749 qpi->rxq.databuffer_size < 1024)) 1751 1750 goto error_param; 1752 - vsi->rx_buf_len = qpi->rxq.databuffer_size; 1753 - vsi->rx_rings[i]->rx_buf_len = vsi->rx_buf_len; 1751 + ring->rx_buf_len = qpi->rxq.databuffer_size; 1754 1752 if (qpi->rxq.max_pkt_size > max_frame_size || 1755 1753 qpi->rxq.max_pkt_size < 64) 1756 1754 goto error_param; 1757 1755 1758 - vsi->max_frame = qpi->rxq.max_pkt_size; 1756 + ring->max_frame = qpi->rxq.max_pkt_size; 1759 1757 /* add space for the port VLAN since the VF driver is 1760 1758 * not expected to account for it in the MTU 1761 1759 * calculation 1762 1760 */ 1763 1761 if (ice_vf_is_port_vlan_ena(vf)) 1764 - vsi->max_frame += VLAN_HLEN; 1762 + ring->max_frame += VLAN_HLEN; 1765 1763 1766 1764 if (ice_vsi_cfg_single_rxq(vsi, q_idx)) { 1767 1765 dev_warn(ice_pf_to_dev(pf), "VF-%d failed to configure RX queue %d\n", 1768 - vf->vf_id, i); 1766 + vf->vf_id, q_idx); 1769 1767 goto error_param; 1770 1768 } 1771 1769 ··· 4007 4009 * @event: pointer to the AQ event 4008 4010 * @mbxdata: information used to detect VF attempting mailbox overflow 4009 4011 * 4010 - * called from the common asq/arq handler to 4011 - * process request from VF 4012 + * Called from the common asq/arq handler to process request from VF. When this 4013 + * flow is used for devices with hardware VF to PF message queue overflow 4014 + * support (ICE_F_MBX_LIMIT) mbxdata is set to NULL and ice_is_malicious_vf 4015 + * check is skipped. 4012 4016 */ 4013 4017 void ice_vc_process_vf_msg(struct ice_pf *pf, struct ice_rq_event_info *event, 4014 4018 struct ice_mbx_data *mbxdata) ··· 4036 4036 mutex_lock(&vf->cfg_lock); 4037 4037 4038 4038 /* Check if the VF is trying to overflow the mailbox */ 4039 - if (ice_is_malicious_vf(vf, mbxdata)) 4039 + if (mbxdata && ice_is_malicious_vf(vf, mbxdata)) 4040 4040 goto finish; 4041 4041 4042 4042 /* Check if VF is disabled. */
-1
drivers/net/ethernet/intel/igb/e1000_mac.h
··· 63 63 64 64 #define E1000_MNG_DHCP_COOKIE_STATUS_VLAN 0x2 65 65 66 - void e1000_init_function_pointers_82575(struct e1000_hw *hw); 67 66 68 67 #endif
-1
drivers/net/ethernet/intel/igb/e1000_nvm.h
··· 7 7 s32 igb_acquire_nvm(struct e1000_hw *hw); 8 8 void igb_release_nvm(struct e1000_hw *hw); 9 9 s32 igb_read_mac_addr(struct e1000_hw *hw); 10 - s32 igb_read_part_num(struct e1000_hw *hw, u32 *part_num); 11 10 s32 igb_read_part_string(struct e1000_hw *hw, u8 *part_num, 12 11 u32 part_num_size); 13 12 s32 igb_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);