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clocksource/drivers/riscv: Events are stopped during CPU suspend

Some implementations of the SBI time extension depend on hart-local
state (for example, CSRs) that are lost or hardware that is powered
down when a CPU is suspended. To be safe, the clockevents driver
cannot assume that timer IRQs will be received during CPU suspend.

Fixes: 62b019436814 ("clocksource: new RISC-V SBI timer driver")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20220509012121.40031-1-samuel@sholland.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>

authored by

Samuel Holland and committed by
Daniel Lezcano
232ccac1 41929c9f

+1 -1
+1 -1
drivers/clocksource/timer-riscv.c
··· 34 34 static unsigned int riscv_clock_event_irq; 35 35 static DEFINE_PER_CPU(struct clock_event_device, riscv_clock_event) = { 36 36 .name = "riscv_timer_clockevent", 37 - .features = CLOCK_EVT_FEAT_ONESHOT, 37 + .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_FEAT_C3STOP, 38 38 .rating = 100, 39 39 .set_next_event = riscv_clock_next_event, 40 40 };