Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
gpu: nova-core: sequencer: Add register opcodes
These opcodes are used for register write, modify, poll and store (save)
sequencer operations.
Signed-off-by: Joel Fernandes <joelagnelf@nvidia.com>
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
[acourbot@nvidia.com: apply Lyude's suggested fixes.]
Message-ID: <20251114195552.739371-9-joelagnelf@nvidia.com>
authored by
Joel Fernandes
and committed by
Alexandre Courbot
2367ce2e
6ddfc892
+107
-15
+1
-4
drivers/gpu/nova-core/gsp/fw.rs
+1
-4
drivers/gpu/nova-core/gsp/fw.rs
···
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#[derive(Copy, Clone)]
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pub(crate) struct RegWritePayload(r570_144::GSP_SEQ_BUF_PAYLOAD_REG_WRITE);
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-
#[expect(unused)]
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impl RegWritePayload {
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/// Returns the register address.
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pub(crate) fn addr(&self) -> u32 {
···
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#[derive(Copy, Clone)]
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pub(crate) struct RegModifyPayload(r570_144::GSP_SEQ_BUF_PAYLOAD_REG_MODIFY);
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-
#[expect(unused)]
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impl RegModifyPayload {
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/// Returns the register address.
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pub(crate) fn addr(&self) -> u32 {
···
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#[derive(Copy, Clone)]
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pub(crate) struct RegPollPayload(r570_144::GSP_SEQ_BUF_PAYLOAD_REG_POLL);
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-
#[expect(unused)]
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impl RegPollPayload {
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/// Returns the register address.
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pub(crate) fn addr(&self) -> u32 {
···
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#[derive(Copy, Clone)]
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pub(crate) struct RegStorePayload(r570_144::GSP_SEQ_BUF_PAYLOAD_REG_STORE);
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-
#[expect(unused)]
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impl RegStorePayload {
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/// Returns the register address.
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pub(crate) fn addr(&self) -> u32 {
···
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}
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/// Returns the storage index.
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+
#[allow(unused)]
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pub(crate) fn index(&self) -> u32 {
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self.0.index
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}
+106
-11
drivers/gpu/nova-core/gsp/sequencer.rs
+106
-11
drivers/gpu/nova-core/gsp/sequencer.rs
···
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use core::{
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array,
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mem::size_of, //
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mem::{
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size_of,
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size_of_val, //
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},
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};
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use kernel::{
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device,
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io::poll::read_poll_timeout,
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prelude::*,
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time::Delta,
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transmute::FromBytes,
···
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},
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fw,
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},
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num::FromSafeCast,
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sbuffer::SBufferIter,
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};
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···
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/// GSP Sequencer Command types with payload data.
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/// Commands have an opcode and an opcode-dependent struct.
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-
#[allow(dead_code)]
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pub(crate) enum GspSeqCmd {}
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#[allow(clippy::enum_variant_names)]
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pub(crate) enum GspSeqCmd {
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RegWrite(fw::RegWritePayload),
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RegModify(fw::RegModifyPayload),
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RegPoll(fw::RegPollPayload),
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RegStore(fw::RegStorePayload),
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}
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impl GspSeqCmd {
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/// Creates a new `GspSeqCmd` from raw data returning the command and its size in bytes.
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pub(crate) fn new(data: &[u8], _dev: &device::Device) -> Result<(Self, usize)> {
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let _fw_cmd = fw::SequencerBufferCmd::from_bytes(data).ok_or(EINVAL)?;
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let _opcode_size = core::mem::size_of::<u32>();
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pub(crate) fn new(data: &[u8], dev: &device::Device) -> Result<(Self, usize)> {
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let fw_cmd = fw::SequencerBufferCmd::from_bytes(data).ok_or(EINVAL)?;
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let opcode_size = core::mem::size_of::<u32>();
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// NOTE: At this commit, NO opcodes exist yet, so just return error.
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-
// Later commits will add match arms here.
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Err(EINVAL)
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let (cmd, size) = match fw_cmd.opcode()? {
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fw::SeqBufOpcode::RegWrite => {
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let payload = fw_cmd.reg_write_payload()?;
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let size = opcode_size + size_of_val(&payload);
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(GspSeqCmd::RegWrite(payload), size)
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}
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fw::SeqBufOpcode::RegModify => {
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let payload = fw_cmd.reg_modify_payload()?;
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let size = opcode_size + size_of_val(&payload);
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(GspSeqCmd::RegModify(payload), size)
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}
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fw::SeqBufOpcode::RegPoll => {
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let payload = fw_cmd.reg_poll_payload()?;
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let size = opcode_size + size_of_val(&payload);
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(GspSeqCmd::RegPoll(payload), size)
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}
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fw::SeqBufOpcode::RegStore => {
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let payload = fw_cmd.reg_store_payload()?;
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let size = opcode_size + size_of_val(&payload);
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(GspSeqCmd::RegStore(payload), size)
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}
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_ => return Err(EINVAL),
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};
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+
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if data.len() < size {
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dev_err!(dev, "Data is not enough for command");
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return Err(EINVAL);
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}
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Ok((cmd, size))
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}
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}
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···
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fn run(&self, sequencer: &GspSequencer<'_>) -> Result;
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}
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impl GspSeqCmdRunner for fw::RegWritePayload {
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fn run(&self, sequencer: &GspSequencer<'_>) -> Result {
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let addr = usize::from_safe_cast(self.addr());
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sequencer.bar.try_write32(self.val(), addr)
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}
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}
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+
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impl GspSeqCmdRunner for fw::RegModifyPayload {
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fn run(&self, sequencer: &GspSequencer<'_>) -> Result {
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let addr = usize::from_safe_cast(self.addr());
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+
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sequencer.bar.try_read32(addr).and_then(|val| {
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sequencer
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.bar
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.try_write32((val & !self.mask()) | self.val(), addr)
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})
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}
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}
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+
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impl GspSeqCmdRunner for fw::RegPollPayload {
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fn run(&self, sequencer: &GspSequencer<'_>) -> Result {
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let addr = usize::from_safe_cast(self.addr());
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+
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// Default timeout to 4 seconds.
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let timeout_us = if self.timeout() == 0 {
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4_000_000
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} else {
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i64::from(self.timeout())
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};
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// First read.
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sequencer.bar.try_read32(addr)?;
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+
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// Poll the requested register with requested timeout.
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read_poll_timeout(
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|| sequencer.bar.try_read32(addr),
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|current| (current & self.mask()) == self.val(),
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Delta::ZERO,
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Delta::from_micros(timeout_us),
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)
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.map(|_| ())
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}
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}
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+
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impl GspSeqCmdRunner for fw::RegStorePayload {
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fn run(&self, sequencer: &GspSequencer<'_>) -> Result {
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let addr = usize::from_safe_cast(self.addr());
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+
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sequencer.bar.try_read32(addr).map(|_| ())
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}
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}
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+
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impl GspSeqCmdRunner for GspSeqCmd {
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-
fn run(&self, _seq: &GspSequencer<'_>) -> Result {
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-
Ok(())
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fn run(&self, seq: &GspSequencer<'_>) -> Result {
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match self {
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GspSeqCmd::RegWrite(cmd) => cmd.run(seq),
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GspSeqCmd::RegModify(cmd) => cmd.run(seq),
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GspSeqCmd::RegPoll(cmd) => cmd.run(seq),
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GspSeqCmd::RegStore(cmd) => cmd.run(seq),
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}
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}
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}
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