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drm/panel: ltk500hd1829: add panel type for ltk101b4029w

The ltk101b4029w ist a 10.1 inch DSI panel and shares the same supplies
and startup timings with the existing ltk500hd1829.

So simply add it as a variant with its own init sequence and display-mode.

Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de>
Acked-by: Jessica Zhang <quic_jesszhan@quicinc.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240215090515.3513817-4-heiko@sntech.de

authored by

Heiko Stuebner and committed by
Heiko Stuebner
239cce65 c71efc63

+196
+196
drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c
··· 43 43 bool prepared; 44 44 }; 45 45 46 + static const struct ltk500hd1829_cmd ltk101b4029w_init[] = { 47 + /* Page0 */ 48 + { 0xE0, 0x00 }, 49 + /* PASSWORD */ 50 + { 0xE1, 0x93 }, 51 + { 0xE2, 0x65 }, 52 + { 0xE3, 0xF8 }, 53 + { 0x80, 0x03 }, /* 0X03:4-LANE; 0X02:3-LANE; 0X01:2-LANE */ 54 + /* Page1 */ 55 + { 0xE0, 0x01 }, 56 + /* Set VCOM */ 57 + { 0x00, 0x00 }, 58 + { 0x01, 0x6F }, 59 + /* Set Gamma Power, VGMP,VGMN,VGSP,VGSN */ 60 + { 0x17, 0x00 }, 61 + { 0x18, 0xAF }, /* 4.3V */ 62 + { 0x19, 0x01 }, /* 0.3V */ 63 + { 0x1A, 0x00 }, 64 + { 0x1B, 0xAF }, /* 4.3V */ 65 + { 0x1C, 0x01 }, /* 0.3V */ 66 + /* Set Gate Power */ 67 + { 0x1F, 0x3E }, /* VGH_R = 15V */ 68 + { 0x20, 0x28 }, /* VGL_R = -12V */ 69 + { 0x21, 0x28 }, /* VGL_R2 = -12V */ 70 + { 0x22, 0x7E }, 71 + /* SETPANEL */ 72 + { 0x35, 0x26 }, 73 + { 0x37, 0x09 }, 74 + /* SET RGBCYC */ 75 + { 0x38, 0x04 }, 76 + { 0x39, 0x00 }, 77 + { 0x3A, 0x01 }, 78 + { 0x3C, 0x7C }, 79 + { 0x3D, 0xFF }, 80 + { 0x3E, 0xFF }, 81 + { 0x3F, 0x7F }, 82 + /* Set TCON */ 83 + { 0x40, 0x06 }, /* RSO = 800 RGB */ 84 + { 0x41, 0xA0 }, /* LN = 640->1280 line */ 85 + { 0x42, 0x81 }, 86 + { 0x43, 0x08 }, /* VFP = 8 */ 87 + { 0x44, 0x0B }, /* VBP = 12 */ 88 + { 0x45, 0x28 }, /* HBP = 40 */ 89 + /* power voltage */ 90 + { 0x55, 0x0F }, /* DCDCM = 0001, JD PWR_IC */ 91 + { 0x57, 0x69 }, 92 + { 0x59, 0x0A }, /* VCL = -2.9V */ 93 + { 0x5A, 0x28 }, /* VGH = 15V */ 94 + { 0x5B, 0x14 }, /* VGL = -11V */ 95 + /* Gamma */ 96 + { 0x5D, 0x7C }, 97 + { 0x5E, 0x65 }, 98 + { 0x5F, 0x55 }, 99 + { 0x60, 0x47 }, 100 + { 0x61, 0x43 }, 101 + { 0x62, 0x32 }, 102 + { 0x63, 0x34 }, 103 + { 0x64, 0x1C }, 104 + { 0x65, 0x33 }, 105 + { 0x66, 0x31 }, 106 + { 0x67, 0x30 }, 107 + { 0x68, 0x4E }, 108 + { 0x69, 0x3C }, 109 + { 0x6A, 0x44 }, 110 + { 0x6B, 0x35 }, 111 + { 0x6C, 0x31 }, 112 + { 0x6D, 0x23 }, 113 + { 0x6E, 0x11 }, 114 + { 0x6F, 0x00 }, 115 + { 0x70, 0x7C }, 116 + { 0x71, 0x65 }, 117 + { 0x72, 0x55 }, 118 + { 0x73, 0x47 }, 119 + { 0x74, 0x43 }, 120 + { 0x75, 0x32 }, 121 + { 0x76, 0x34 }, 122 + { 0x77, 0x1C }, 123 + { 0x78, 0x33 }, 124 + { 0x79, 0x31 }, 125 + { 0x7A, 0x30 }, 126 + { 0x7B, 0x4E }, 127 + { 0x7C, 0x3C }, 128 + { 0x7D, 0x44 }, 129 + { 0x7E, 0x35 }, 130 + { 0x7F, 0x31 }, 131 + { 0x80, 0x23 }, 132 + { 0x81, 0x11 }, 133 + { 0x82, 0x00 }, 134 + /* Page2, for GIP */ 135 + { 0xE0, 0x02 }, 136 + /* GIP_L Pin mapping */ 137 + { 0x00, 0x1E }, 138 + { 0x01, 0x1E }, 139 + { 0x02, 0x41 }, 140 + { 0x03, 0x41 }, 141 + { 0x04, 0x43 }, 142 + { 0x05, 0x43 }, 143 + { 0x06, 0x1F }, 144 + { 0x07, 0x1F }, 145 + { 0x08, 0x35 }, 146 + { 0x09, 0x1F }, 147 + { 0x0A, 0x15 }, 148 + { 0x0B, 0x15 }, 149 + { 0x0C, 0x1F }, 150 + { 0x0D, 0x47 }, 151 + { 0x0E, 0x47 }, 152 + { 0x0F, 0x45 }, 153 + { 0x10, 0x45 }, 154 + { 0x11, 0x4B }, 155 + { 0x12, 0x4B }, 156 + { 0x13, 0x49 }, 157 + { 0x14, 0x49 }, 158 + { 0x15, 0x1F }, 159 + /* GIP_R Pin mapping */ 160 + { 0x16, 0x1E }, 161 + { 0x17, 0x1E }, 162 + { 0x18, 0x40 }, 163 + { 0x19, 0x40 }, 164 + { 0x1A, 0x42 }, 165 + { 0x1B, 0x42 }, 166 + { 0x1C, 0x1F }, 167 + { 0x1D, 0x1F }, 168 + { 0x1E, 0x35 }, 169 + { 0x1F, 0x1F }, 170 + { 0x20, 0x15 }, 171 + { 0x21, 0x15 }, 172 + { 0x22, 0x1f }, 173 + { 0x23, 0x46 }, 174 + { 0x24, 0x46 }, 175 + { 0x25, 0x44 }, 176 + { 0x26, 0x44 }, 177 + { 0x27, 0x4A }, 178 + { 0x28, 0x4A }, 179 + { 0x29, 0x48 }, 180 + { 0x2A, 0x48 }, 181 + { 0x2B, 0x1F }, 182 + /* GIP Timing */ 183 + { 0x58, 0x40 }, 184 + { 0x5B, 0x30 }, 185 + { 0x5C, 0x03 }, 186 + { 0x5D, 0x30 }, 187 + { 0x5E, 0x01 }, 188 + { 0x5F, 0x02 }, 189 + { 0x63, 0x14 }, 190 + { 0x64, 0x6A }, 191 + { 0x67, 0x73 }, 192 + { 0x68, 0x05 }, 193 + { 0x69, 0x14 }, 194 + { 0x6A, 0x6A }, 195 + { 0x6B, 0x08 }, 196 + { 0x6C, 0x00 }, 197 + { 0x6D, 0x00 }, 198 + { 0x6E, 0x00 }, 199 + { 0x6F, 0x88 }, 200 + { 0x77, 0xDD }, 201 + { 0x79, 0x0E }, 202 + { 0x7A, 0x03 }, 203 + { 0x7D, 0x14 }, 204 + { 0x7E, 0x6A }, 205 + /* Page4 */ 206 + { 0xE0, 0x04 }, 207 + { 0x09, 0x11 }, 208 + { 0x0E, 0x48 }, 209 + { 0x2B, 0x2B }, 210 + { 0x2D, 0x03 }, 211 + { 0x2E, 0x44 }, 212 + /* Page0 */ 213 + { 0xE0, 0x00 }, 214 + { 0xE6, 0x02 }, 215 + { 0xE7, 0x0C }, 216 + }; 217 + 218 + static const struct drm_display_mode ltk101b4029w_mode = { 219 + .hdisplay = 800, 220 + .hsync_start = 800 + 18, 221 + .hsync_end = 800 + 18 + 18, 222 + .htotal = 800 + 18 + 18 + 18, 223 + .vdisplay = 1280, 224 + .vsync_start = 1280 + 24, 225 + .vsync_end = 1280 + 24 + 4, 226 + .vtotal = 1280 + 24 + 4 + 8, 227 + .clock = 67330, 228 + .width_mm = 136, 229 + .height_mm = 218, 230 + }; 231 + 232 + static const struct ltk500hd1829_desc ltk101b4029w_data = { 233 + .mode = &ltk101b4029w_mode, 234 + .init = ltk101b4029w_init, 235 + .num_init = ARRAY_SIZE(ltk101b4029w_init), 236 + }; 237 + 46 238 /* 47 239 * There is no description in the Reference Manual about these commands. 48 240 * We received them from the vendor, so just use them as is. ··· 702 510 } 703 511 704 512 static const struct of_device_id ltk500hd1829_of_match[] = { 513 + { 514 + .compatible = "leadtek,ltk101b4029w", 515 + .data = &ltk101b4029w_data, 516 + }, 705 517 { 706 518 .compatible = "leadtek,ltk500hd1829", 707 519 .data = &ltk500hd1829_data,